From: Paulo Zanoni Date: Wed, 8 Aug 2012 17:15:28 +0000 (-0300) Subject: drm/i915: set the DDI sync polarity bits X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f63eb7c4528060e54688baafb7a499e9391eefe6;p=openwrt%2Fstaging%2Fblogic.git drm/i915: set the DDI sync polarity bits During my tests, everything worked even if the wrong polarity was set. Still, we should try to set the correct values. Signed-off-by: Paulo Zanoni Reviewed-by: Jani Nikula Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 97f00fb5307f..896b27966bc4 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4312,6 +4312,8 @@ #define PIPE_DDI_BPC_10 (1<<20) #define PIPE_DDI_BPC_6 (2<<20) #define PIPE_DDI_BPC_12 (3<<20) +#define PIPE_DDI_PVSYNC (1<<17) +#define PIPE_DDI_PHSYNC (1<<16) #define PIPE_DDI_BFI_ENABLE (1<<4) #define PIPE_DDI_PORT_WIDTH_X1 (0<<1) #define PIPE_DDI_PORT_WIDTH_X2 (1<<1) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 0d7acd76c1b4..1fbd67cd5586 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -727,6 +727,7 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, temp &= ~PIPE_DDI_PORT_MASK; temp &= ~PIPE_DDI_BPC_12; temp &= ~PIPE_DDI_MODE_SELECT_MASK; + temp &= ~(PIPE_DDI_PVSYNC | PIPE_DDI_PHSYNC); temp |= PIPE_DDI_SELECT_PORT(port) | ((intel_crtc->bpp > 24) ? PIPE_DDI_BPC_12 : @@ -738,6 +739,11 @@ void intel_ddi_mode_set(struct drm_encoder *encoder, else temp |= PIPE_DDI_MODE_SELECT_DVI; + if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) + temp |= PIPE_DDI_PVSYNC; + if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) + temp |= PIPE_DDI_PHSYNC; + I915_WRITE(DDI_FUNC_CTL(pipe), temp); intel_hdmi->set_infoframes(encoder, adjusted_mode);