From: Imre Kaloz <kaloz@openwrt.org>
Date: Fri, 9 Nov 2012 21:37:54 +0000 (+0000)
Subject: cns3xxx: clean up pcie patches
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f3f3f52259c1db74069295ad296ac1d53b080b45;p=openwrt%2Fstaging%2Fyousong.git

cns3xxx: clean up pcie patches

Combine two pcie patches (2nd patch undid the 1st patch) together
and refresh the other affected patches

Signed-off-by: Tim Harvey <tharvey@gateworks.com>

SVN-Revision: 34132
---

diff --git a/target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch b/target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch
deleted file mode 100644
index e70ef9675b..0000000000
--- a/target/linux/cns3xxx/patches-3.3/055-cns3xxx_pci_iospace_init.patch
+++ /dev/null
@@ -1,76 +0,0 @@
---- a/arch/arm/mach-cns3xxx/cns3420vb.c
-+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -32,6 +32,7 @@
- #include <asm/mach/time.h>
- #include <mach/cns3xxx.h>
- #include <mach/irqs.h>
-+#include <mach/platform.h>
- #include "core.h"
- #include "devices.h"
- 
-@@ -199,6 +200,8 @@ static void __init cns3420_init(void)
- 	cns3xxx_ahci_init();
- 	cns3xxx_sdhci_init();
- 
-+	cns3xxx_pcie_init(0x3);
-+
- 	pm_power_off = cns3xxx_power_off;
- }
- 
---- a/arch/arm/mach-cns3xxx/core.h
-+++ b/arch/arm/mach-cns3xxx/core.h
-@@ -12,6 +12,8 @@
- #define __CNS3XXX_CORE_H
- 
- extern struct sys_timer cns3xxx_timer;
-+extern int cns3xxx_pcie_init(u8 bitmap);
-+extern void cns3xxx_pcie_iotable_init(u8 bitmap);
- 
- #ifdef CONFIG_CACHE_L2X0
- void __init cns3xxx_l2x0_init(void);
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -365,7 +365,23 @@ static int cns3xxx_pcie_abort_handler(un
- 	return 0;
- }
- 
--static int __init cns3xxx_pcie_init(void)
-+void __init cns3xxx_pcie_iotable_init(u8 bitmap)
-+{
-+	static int _iotable_init = 0;
-+	int i;
-+
-+	bitmap &= ~_iotable_init;
-+	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
-+		if (!(bitmap & (1 << i)))
-+			continue;
-+
-+		iotable_init(cns3xxx_pcie[i].cfg_bases,
-+			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
-+	}
-+	_iotable_init |= bitmap;
-+}
-+
-+int __init cns3xxx_pcie_init(u8 bitmap)
- {
- 	int i;
- 
-@@ -375,9 +391,11 @@ static int __init cns3xxx_pcie_init(void
- 	hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
- 			"imprecise external abort");
- 
-+	cns3xxx_pcie_iotable_init(bitmap);
- 	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
--		iotable_init(cns3xxx_pcie[i].cfg_bases,
--			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
-+		if (!(bitmap & (1 << i)))
-+			continue;
-+
- 		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
- 		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
- 		pci_common_init(&cns3xxx_pcie[i].hw_pci);
-@@ -387,4 +405,3 @@ static int __init cns3xxx_pcie_init(void
- 
- 	return 0;
- }
--device_initcall(cns3xxx_pcie_init);
diff --git a/target/linux/cns3xxx/patches-3.3/104-cns3xxx_gpio.patch b/target/linux/cns3xxx/patches-3.3/104-cns3xxx_gpio.patch
index bda0222cca..1f0d44401b 100644
--- a/target/linux/cns3xxx/patches-3.3/104-cns3xxx_gpio.patch
+++ b/target/linux/cns3xxx/patches-3.3/104-cns3xxx_gpio.patch
@@ -1,6 +1,6 @@
 --- a/arch/arm/mach-cns3xxx/cns3420vb.c
 +++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -216,7 +216,7 @@ static struct map_desc cns3420_io_desc[]
+@@ -213,7 +213,7 @@ static struct map_desc cns3420_io_desc[]
  
  static void __init cns3420_map_io(void)
  {
@@ -96,7 +96,7 @@
  /* used by entry-macro.S */
 --- a/arch/arm/mach-cns3xxx/core.h
 +++ b/arch/arm/mach-cns3xxx/core.h
-@@ -21,7 +21,7 @@ void __init cns3xxx_l2x0_init(void);
+@@ -19,7 +19,7 @@ void __init cns3xxx_l2x0_init(void);
  static inline void cns3xxx_l2x0_init(void) {}
  #endif /* CONFIG_CACHE_L2X0 */
  
diff --git a/target/linux/cns3xxx/patches-3.3/470-gpio_irq.patch b/target/linux/cns3xxx/patches-3.3/470-gpio_irq.patch
index cb80d6419b..fa40c5ba4e 100644
--- a/target/linux/cns3xxx/patches-3.3/470-gpio_irq.patch
+++ b/target/linux/cns3xxx/patches-3.3/470-gpio_irq.patch
@@ -8,18 +8,17 @@
  obj-$(CONFIG_MACH_GW2388)		+= laguna.o
 --- a/arch/arm/mach-cns3xxx/cns3420vb.c
 +++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -199,7 +199,10 @@ static void __init cns3420_init(void)
+@@ -198,6 +198,10 @@ static void __init cns3420_init(void)
  
  	cns3xxx_ahci_init();
  	cns3xxx_sdhci_init();
--
 +	cns3xxx_gpio_init( 0, 32, CNS3XXX_GPIOA_BASE_VIRT, IRQ_CNS3XXX_GPIOA,
 +		NR_IRQS_CNS3XXX);
 +	cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
 +		NR_IRQS_CNS3XXX + 32);
- 	cns3xxx_pcie_init(0x3);
  
  	pm_power_off = cns3xxx_power_off;
+ }
 --- a/arch/arm/mach-cns3xxx/core.c
 +++ b/arch/arm/mach-cns3xxx/core.c
 @@ -21,7 +21,6 @@
diff --git a/target/linux/cns3xxx/patches-3.3/480-cns3xxx_pcie_early_init.patch b/target/linux/cns3xxx/patches-3.3/480-cns3xxx_pcie_early_init.patch
index dba0da8438..cd288f61bb 100644
--- a/target/linux/cns3xxx/patches-3.3/480-cns3xxx_pcie_early_init.patch
+++ b/target/linux/cns3xxx/patches-3.3/480-cns3xxx_pcie_early_init.patch
@@ -1,14 +1,6 @@
 --- a/arch/arm/mach-cns3xxx/cns3420vb.c
 +++ b/arch/arm/mach-cns3xxx/cns3420vb.c
-@@ -203,7 +203,6 @@ static void __init cns3420_init(void)
- 		NR_IRQS_CNS3XXX);
- 	cns3xxx_gpio_init(32, 32, CNS3XXX_GPIOB_BASE_VIRT, IRQ_CNS3XXX_GPIOB,
- 		NR_IRQS_CNS3XXX + 32);
--	cns3xxx_pcie_init(0x3);
- 
- 	pm_power_off = cns3xxx_power_off;
- }
-@@ -220,11 +219,21 @@ static struct map_desc cns3420_io_desc[]
+@@ -218,11 +218,21 @@ static struct map_desc cns3420_io_desc[]
  static void __init cns3420_map_io(void)
  {
  	cns3xxx_common_init();
@@ -32,18 +24,16 @@
  	.map_io		= cns3420_map_io,
 --- a/arch/arm/mach-cns3xxx/core.h
 +++ b/arch/arm/mach-cns3xxx/core.h
-@@ -12,8 +12,8 @@
+@@ -12,6 +12,8 @@
  #define __CNS3XXX_CORE_H
  
  extern struct sys_timer cns3xxx_timer;
--extern int cns3xxx_pcie_init(u8 bitmap);
--extern void cns3xxx_pcie_iotable_init(u8 bitmap);
 +extern void cns3xxx_pcie_iotable_init(void);
 +
  
  #ifdef CONFIG_CACHE_L2X0
  void __init cns3xxx_l2x0_init(void);
-@@ -23,6 +23,7 @@ static inline void cns3xxx_l2x0_init(voi
+@@ -21,6 +23,7 @@ static inline void cns3xxx_l2x0_init(voi
  
  void __init cns3xxx_common_init(void);
  void __init cns3xxx_init_irq(void);
@@ -53,42 +43,32 @@
  
 --- a/arch/arm/mach-cns3xxx/pcie.c
 +++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -456,23 +456,18 @@ static int cns3xxx_pcie_abort_handler(un
+@@ -456,7 +456,18 @@ static int cns3xxx_pcie_abort_handler(un
  	return 0;
  }
  
--void __init cns3xxx_pcie_iotable_init(u8 bitmap)
+-static int __init cns3xxx_pcie_init(void)
 +
 +void __init cns3xxx_pcie_iotable_init()
- {
--	static int _iotable_init = 0;
- 	int i;
- 
--	bitmap &= ~_iotable_init;
- 	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
--		if (!(bitmap & (1 << i)))
--			continue;
--
- 		iotable_init(cns3xxx_pcie[i].cfg_bases,
- 			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
- 	}
--	_iotable_init |= bitmap;
- }
- 
--int __init cns3xxx_pcie_init(u8 bitmap)
++{
++	int i;
++
++	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
++		iotable_init(cns3xxx_pcie[i].cfg_bases,
++			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
++	}
++}
++
 +int __init cns3xxx_pcie_init(void)
  {
  	int i;
  
-@@ -482,14 +477,12 @@ int __init cns3xxx_pcie_init(u8 bitmap)
- 	hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
+@@ -467,15 +478,14 @@ static int __init cns3xxx_pcie_init(void
  			"imprecise external abort");
  
--	cns3xxx_pcie_iotable_init(bitmap);
  	for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
--		if (!(bitmap & (1 << i)))
--			continue;
--
+-		iotable_init(cns3xxx_pcie[i].cfg_bases,
+-			     ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
  		cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
 -		cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
 -		pci_common_init(&cns3xxx_pcie[i].hw_pci);
@@ -99,3 +79,7 @@
  	}
  
  	pci_assign_unassigned_resources();
+ 
+ 	return 0;
+ }
+-device_initcall(cns3xxx_pcie_init);