From: Jonathan A. Kollasch Date: Fri, 11 Sep 2020 19:33:39 +0000 (-0500) Subject: ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender X-Git-Tag: mikrotik~1909 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f36990eae77c3a22842a2c418378c5dd40dec366;p=openwrt%2Fstaging%2Fchunkeey.git ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender This replaces the register bits for RGMII delay on the MAC side in favor of having the RGMII delay on the PHY side by setting the phy-mode property to rgmii-id (RGMII internal delay), which is supported by the at803x driver. Speed 1000 is fixed as a result, so now all ethernet speeds function. Signed-off-by: Jonathan A. Kollasch Reviewed-by: Michael Pratt --- diff --git a/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts b/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts index 575c72ee7c..7313e9acc2 100644 --- a/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts +++ b/target/linux/ath79/dts/ar9344_wd_mynet-wifi-rangeextender.dts @@ -144,10 +144,10 @@ ð0 { status = "okay"; - pll-data = <0x0e000000 0x3c000101 0x3c001313>; + pll-data = <0x02000000 0x00000101 0x00001313>; /* ethernet MAC is stored in nvram */ - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&phy4>; gmac-config {