From: Gabor Juhos Date: Thu, 4 Oct 2007 10:56:38 +0000 (+0000) Subject: NAND driver cleanups, thanks to Alexandros C. Couloumbis for testing * use generic... X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f1e27efeddf41f343f28e27e3d99ba04f9b34c9b;p=openwrt%2Fstaging%2Fdangole.git NAND driver cleanups, thanks to Alexandros C. Couloumbis for testing * use generic NAND driver from now * add experimental support for RouterBOARD 150 NAND device SVN-Revision: 9118 --- diff --git a/target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c b/target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c index cec57f7e94..fee9db8031 100644 --- a/target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c +++ b/target/linux/adm5120/files/arch/mips/adm5120/boards/mikrotik.c @@ -1,11 +1,18 @@ /* * $Id$ * - * Mikrotik RouterBOARDs 1xx series + * Mikrotik RouterBOARD 1xx series * * Copyright (C) 2007 OpenWrt.org * Copyright (C) 2007 Gabor Juhos * + * NAND initialization code was based on a driver for Linux 2.6.19+ which + * was derived from the driver for Linux 2.4.xx published by Mikrotik for + * their RouterBoard 1xx and 5xx series boards. + * Copyright (C) 2007 David Goodenough + * Copyright (C) 2007 Florian Fainelli + * The original Mikrotik code seems not to have a license. + * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 @@ -25,13 +32,33 @@ #include #include +#include #include #include +#include +#include +#include #include #include -#include + +#define RB1XX_NAND_CHIP_DELAY 25 + +#define RB150_NAND_BASE 0x1FC80000 +#define RB150_NAND_SIZE 1 + +#define RB150_GPIO_NAND_READY ADM5120_GPIO_PIN0 +#define RB150_GPIO_NAND_NCE ADM5120_GPIO_PIN1 +#define RB150_GPIO_NAND_CLE ADM5120_GPIO_P2L2 +#define RB150_GPIO_NAND_ALE ADM5120_GPIO_P3L2 + +#define RB150_NAND_DELAY 100 + +#define RB150_NAND_WRITE(v) \ + writeb((v),(void __iomem *)KSEG1ADDR(RB150_NAND_BASE)) + +/*--------------------------------------------------------------------------*/ static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = { PCIIRQ(1, 0, 1, ADM5120_IRQ_PCI0), @@ -39,7 +66,7 @@ static struct adm5120_pci_irq rb1xx_pci_irqs[] __initdata = { PCIIRQ(3, 0, 1, ADM5120_IRQ_PCI2) }; -static struct mtd_partition rb1xx_partitions[] = { +static struct mtd_partition rb1xx_nor_partitions[] = { { .name = "booter", .offset = 0, @@ -52,24 +79,42 @@ static struct mtd_partition rb1xx_partitions[] = { } }; +static struct mtd_partition rb1xx_nand_partitions[] = { + { + .name = "kernel", + .offset = 0, + .size = 4 * 1024 * 1024, + } , { + .name = "rootfs", + .offset = MTDPART_OFS_NXTBLK, + .size = MTDPART_SIZ_FULL + } +}; + static struct platform_device *rb1xx_devices[] __initdata = { &adm5120_flash0_device, &adm5120_nand_device, }; -static struct platform_device *rb150_devices[] __initdata = { - &adm5120_flash0_device, - /* TODO: nand device is not yet supported */ +/* + * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader + * will not be able to find the kernel that we load. So set the oobinfo + * when creating the partitions + */ +static struct nand_ecclayout rb1xx_nand_ecclayout = { + .eccbytes = 6, + .eccpos = { 8, 9, 10, 13, 14, 15 }, + .oobavail = 9, + .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } }; -static void __init rb1xx_setup(void) -{ - /* setup data for flash0 device */ - adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_partitions); - adm5120_flash0_data.parts = rb1xx_partitions; - - /* TODO: setup mac address */ -} +static struct resource rb150_nand_resource[] = { + [0] = { + .start = RB150_NAND_BASE, + .end = RB150_NAND_BASE + RB150_NAND_SIZE-1, + .flags = IORESOURCE_MEM, + }, +}; #if 0 /* @@ -110,6 +155,86 @@ static unsigned char rb_vlans[6] __initdata = { #define rb192_vlans rb_vlans #endif +/*--------------------------------------------------------------------------*/ + +static int rb150_nand_ready(struct mtd_info *mtd) { + + return gpio_get_value(RB150_GPIO_NAND_READY); +} + +static void rb150_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, + unsigned int ctrl) +{ + if (ctrl & NAND_CTRL_CHANGE) { + gpio_set_value(RB150_GPIO_NAND_CLE, (ctrl & NAND_CLE) ? 1 : 0); + gpio_set_value(RB150_GPIO_NAND_ALE, (ctrl & NAND_ALE) ? 1 : 0); + gpio_set_value(RB150_GPIO_NAND_NCE, (ctrl & NAND_NCE) ? 0 : 1); + } + + udelay(RB150_NAND_DELAY); + + if (cmd != NAND_CMD_NONE) + RB150_NAND_WRITE(cmd); +} + +/*--------------------------------------------------------------------------*/ + +static void __init rb1xx_mac_setup(void) +{ + /* TODO */ +} + +static void __init rb1xx_flash_setup(void) +{ + /* setup data for flash0 device */ + adm5120_flash0_data.nr_parts = ARRAY_SIZE(rb1xx_nor_partitions); + adm5120_flash0_data.parts = rb1xx_nor_partitions; + + /* setup data for NAND device */ + adm5120_nand_data.chip.nr_chips = 1; + adm5120_nand_data.chip.nr_partitions = ARRAY_SIZE(rb1xx_nand_partitions); + adm5120_nand_data.chip.partitions = rb1xx_nand_partitions; + adm5120_nand_data.chip.ecclayout = &rb1xx_nand_ecclayout; + adm5120_nand_data.chip.chip_delay = RB1XX_NAND_CHIP_DELAY; + adm5120_nand_data.chip.options = NAND_NO_AUTOINCR; +} + +static void __init rb1xx_setup(void) +{ + /* enable NAND flash interface */ + adm5120_nand_enable(); + + /* initialize NAND chip */ + adm5120_nand_set_spn(1); + adm5120_nand_set_wpn(0); + + rb1xx_flash_setup(); + rb1xx_mac_setup(); +} + +static void __init rb150_setup(void) +{ + /* setup GPIO pins for NAND flash chip */ + gpio_request(RB150_GPIO_NAND_READY, "nand-ready"); + gpio_direction_input(RB150_GPIO_NAND_READY); + gpio_request(RB150_GPIO_NAND_NCE, "nand-nce"); + gpio_direction_output(RB150_GPIO_NAND_NCE, 1); + gpio_request(RB150_GPIO_NAND_CLE, "nand-cle"); + gpio_direction_output(RB150_GPIO_NAND_CLE, 0); + gpio_request(RB150_GPIO_NAND_ALE, "nand-ale"); + gpio_direction_output(RB150_GPIO_NAND_ALE, 0); + + adm5120_nand_device.num_resources = ARRAY_SIZE(rb150_nand_resource); + adm5120_nand_device.resource = rb150_nand_resource; + adm5120_nand_data.ctrl.cmd_ctrl = rb150_nand_cmd_ctrl; + adm5120_nand_data.ctrl.dev_ready = rb150_nand_ready; + + rb1xx_flash_setup(); + rb1xx_mac_setup(); +} + +/*--------------------------------------------------------------------------*/ + static struct adm5120_board rb111_board __initdata = { .mach_type = MACH_ADM5120_RB_111, .name = "Mikrotik RouterBOARD 111", @@ -161,11 +286,11 @@ static struct adm5120_board rb133c_board __initdata = { static struct adm5120_board rb150_board __initdata = { .mach_type = MACH_ADM5120_RB_150, .name = "Mikrotik RouterBOARD 150", - .board_setup = rb1xx_setup, + .board_setup = rb150_setup, .eth_num_ports = 5, .eth_vlans = rb15x_vlans, - .num_devices = ARRAY_SIZE(rb150_devices), - .devices = rb150_devices, + .num_devices = ARRAY_SIZE(rb1xx_devices), + .devices = rb1xx_devices, }; static struct adm5120_board rb153_board __initdata = { diff --git a/target/linux/adm5120/files/arch/mips/adm5120/platform.c b/target/linux/adm5120/files/arch/mips/adm5120/platform.c index 2a795c950e..175e1a5d89 100644 --- a/target/linux/adm5120/files/arch/mips/adm5120/platform.c +++ b/target/linux/adm5120/files/arch/mips/adm5120/platform.c @@ -32,14 +32,12 @@ #include #include -#include -#include -#include -#include -#include - -static void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base, - unsigned int mctrl); +#include +#include +#include +#include +#include +#include #if 1 /* @@ -120,20 +118,23 @@ struct platform_device adm5120_flash1_device = { /* NAND flash */ struct resource adm5120_nand_resource[] = { [0] = { - .start = ADM5120_SRAM1_BASE, - .end = ADM5120_SRAM1_BASE+ADM5120_MPMC_SIZE-1, + .start = ADM5120_NAND_BASE, + .end = ADM5120_NAND_BASE + ADM5120_NAND_SIZE-1, .flags = IORESOURCE_MEM, }, }; -struct adm5120_nand_platform_data adm5120_nand_data; +struct platform_nand_data adm5120_nand_data = { + .ctrl.dev_ready = adm5120_nand_ready, + .ctrl.cmd_ctrl = adm5120_nand_cmd_ctrl, +}; struct platform_device adm5120_nand_device = { - .name = "adm5120-nand", + .name = "gen_nand", .id = -1, - .dev.platform_data = &adm5120_nand_data, .num_resources = ARRAY_SIZE(adm5120_nand_resource), .resource = adm5120_nand_resource, + .dev.platform_data = &adm5120_nand_data, }; /* built-in UARTs */ @@ -173,7 +174,25 @@ struct amba_device adm5120_uart1_device = { .periphid = 0x0041010, }; -static void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base, +void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl) { } + +int adm5120_nand_ready(struct mtd_info *mtd) +{ + return ((adm5120_nand_get_status() & ADM5120_NAND_STATUS_READY) != 0); +} + +void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) +{ + if (ctrl & NAND_CTRL_CHANGE) { + adm5120_nand_set_cle(ctrl & NAND_CLE); + adm5120_nand_set_ale(ctrl & NAND_ALE); + adm5120_nand_set_cen(ctrl & NAND_NCE); + } + + if (cmd != NAND_CMD_NONE) + NAND_WRITE_REG(NAND_REG_DATA, cmd); +} + diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h index f5ab1b3f1c..d39620aabb 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_defs.h @@ -29,6 +29,7 @@ #define ADM5120_SDRAM0_BASE 0x00000000 #define ADM5120_SDRAM1_BASE 0x01000000 #define ADM5120_SRAM1_BASE 0x10000000 +#define ADM5120_NAND_BASE ADM5120_SRAM1_BASE #define ADM5120_MPMC_BASE 0x11000000 #define ADM5120_USBC_BASE 0x11200000 #define ADM5120_PCIMEM_BASE 0x11400000 @@ -41,6 +42,7 @@ #define ADM5120_UART1_BASE 0x12800000 #define ADM5120_SRAM0_BASE 0x1FC00000 +#define ADM5120_NAND_SIZE 0xB #define ADM5120_MPMC_SIZE 0x1000 #define ADM5120_USBC_SIZE 0x84 #define ADM5120_PCIMEM_SIZE (ADM5120_PCIIO_BASE - ADM5120_PCIMEM_BASE) diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h new file mode 100644 index 0000000000..8d86fc6e78 --- /dev/null +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h @@ -0,0 +1,102 @@ +/* + * ADM5120 NAND interface definitions + * + * This header file defines the hardware registers of the ADM5120 SoC + * built-in NAND interface. + * + * Copyright (C) 2007 OpenWrt.org + * Copyright (C) 2007 Gabor Juhos + * + * NAND interface routines was based on a driver for Linux 2.6.19+ which + * was derived from the driver for Linux 2.4.xx published by Mikrotik for + * their RouterBoard 1xx and 5xx series boards. + * Copyright (C) 2007 David Goodenough + * Copyright (C) 2007 Florian Fainelli + * The original Mikrotik code seems not to have a license. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the + * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, + * Boston, MA 02110-1301, USA. + * + */ + +#ifndef _ADM5120_NAND_H_ +#define _ADM5120_NAND_H_ + +#include +#include + +#include +#include + +/* NAND control registers */ +#define NAND_REG_DATA 0x0 /* data register */ +#define NAND_REG_SET_CEn 0x1 /* CE# low */ +#define NAND_REG_CLR_CEn 0x2 /* CE# high */ +#define NAND_REG_CLR_CLE 0x3 /* CLE low */ +#define NAND_REG_SET_CLE 0x4 /* CLE high */ +#define NAND_REG_CLR_ALE 0x5 /* ALE low */ +#define NAND_REG_SET_ALE 0x6 /* ALE high */ +#define NAND_REG_SET_SPn 0x7 /* SP# low (use spare area) */ +#define NAND_REG_CLR_SPn 0x8 /* SP# high (do not use spare area) */ +#define NAND_REG_SET_WPn 0x9 /* WP# low */ +#define NAND_REG_CLR_WPn 0xA /* WP# high */ +#define NAND_REG_STATUS 0xB /* Status register */ + +#define ADM5120_NAND_STATUS_READY 0x80 + +#define NAND_READ_REG(r) \ + readb((void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r)) +#define NAND_WRITE_REG(r, v) \ + writeb((v),(void __iomem *)KSEG1ADDR(ADM5120_NAND_BASE) + (r)) + +/*-------------------------------------------------------------------------*/ + +static inline void adm5120_nand_enable(void) +{ + SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE); + SW_WRITE_REG(BOOT_DONE, 1); +} + +static inline void adm5120_nand_set_wpn(unsigned int set) +{ + NAND_WRITE_REG((set) ? NAND_REG_SET_WPn : NAND_REG_CLR_WPn, 1); +} + +static inline void adm5120_nand_set_spn(unsigned int set) +{ + NAND_WRITE_REG((set) ? NAND_REG_SET_SPn : NAND_REG_CLR_SPn, 1); +} + +static inline void adm5120_nand_set_cle(unsigned int set) +{ + NAND_WRITE_REG((set) ? NAND_REG_SET_CLE : NAND_REG_CLR_CLE, 1); +} + +static inline void adm5120_nand_set_ale(unsigned int set) +{ + NAND_WRITE_REG((set) ? NAND_REG_SET_ALE : NAND_REG_CLR_ALE, 1); +} + +static inline void adm5120_nand_set_cen(unsigned int set) +{ + NAND_WRITE_REG((set) ? NAND_REG_SET_CEn : NAND_REG_CLR_CEn, 1); +} + +static inline u8 adm5120_nand_get_status(void) +{ + return NAND_READ_REG(NAND_REG_STATUS); +} + +#endif /* _ADM5120_NAND_H_ */ diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h index 9b2c98dc9b..b20c483b84 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_platform.h @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -44,10 +45,6 @@ struct adm5120_flash_platform_data { #endif }; -struct adm5120_nand_platform_data { - /* TODO : not yet implemented */ -}; - struct adm5120_switch_platform_data { /* TODO: not yet implemented */ }; @@ -73,7 +70,7 @@ static inline void adm5120_pci_set_irq_map(unsigned int nr_irqs, extern struct adm5120_flash_platform_data adm5120_flash0_data; extern struct adm5120_flash_platform_data adm5120_flash1_data; -extern struct adm5120_nand_platform_data adm5120_nand_data; +extern struct platform_nand_data adm5120_nand_data; extern struct adm5120_switch_platform_data adm5120_switch_data; extern struct amba_pl010_data adm5120_uart0_data; extern struct amba_pl010_data adm5120_uart1_data; @@ -86,4 +83,11 @@ extern struct platform_device adm5120_switch_device; extern struct amba_device adm5120_uart0_device; extern struct amba_device adm5120_uart1_device; +extern void adm5120_uart_set_mctrl(struct amba_device *dev, void __iomem *base, + unsigned int mctrl); + +extern void adm5120_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, + unsigned int ctrl); +extern int adm5120_nand_ready(struct mtd_info *mtd); + #endif /* _ADM5120_PLATFORM_H_ */ diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h index f3c05f6ef3..c3af94ba74 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h @@ -171,6 +171,8 @@ #define P5TBC_SHIFT 8 #define P5RBC_SHIFT 12 +#define BW_CNTL1_NAND_ENABLE 0x100 + /* PHY_CNTL0 register bits */ #define PHY_CNTL0_PHYA_MASK BITMASK(5) #define PHY_CNTL0_PHYR_MASK BITMASK(5) diff --git a/target/linux/adm5120/router_le/config-2.6.22 b/target/linux/adm5120/router_le/config-2.6.22 index a331c2a134..0f93b1affa 100644 --- a/target/linux/adm5120/router_le/config-2.6.22 +++ b/target/linux/adm5120/router_le/config-2.6.22 @@ -154,14 +154,14 @@ CONFIG_MTD_MAP_BANK_WIDTH_4=y # CONFIG_MTD_MTDRAM is not set CONFIG_MTD_MYLOADER_PARTS=y CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_ADM5120=y +# CONFIG_MTD_NAND_ADM5120 is not set # CONFIG_MTD_NAND_CAFE is not set # CONFIG_MTD_NAND_DISKONCHIP is not set # CONFIG_MTD_NAND_ECC_SMC is not set CONFIG_MTD_NAND_IDS=y # CONFIG_MTD_NAND_MUSEUM_IDS is not set # CONFIG_MTD_NAND_NANDSIM is not set -# CONFIG_MTD_NAND_PLATFORM is not set +CONFIG_MTD_NAND_PLATFORM=y # CONFIG_MTD_NAND_VERIFY_WRITE is not set # CONFIG_MTD_ONENAND is not set CONFIG_MTD_PARTITIONS=y