From: Jonas Gorski Date: Mon, 13 Jan 2014 12:11:45 +0000 (+0000) Subject: brcm63xx: update HSSPI driver with upstream submission X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=f08f0cafc24619242853e3fe11e2e5876c498551;p=openwrt%2Fstaging%2Faparcar.git brcm63xx: update HSSPI driver with upstream submission Update the HSSPI driver with the upstream submitted one that has a workaround for the auto cs down issue. Signed-off-by: Jonas Gorski SVN-Revision: 39264 --- diff --git a/target/linux/brcm63xx/patches-3.10/049-spi-add-bcm63xx-HSSPI-driver.patch b/target/linux/brcm63xx/patches-3.10/049-spi-add-bcm63xx-HSSPI-driver.patch new file mode 100644 index 0000000000..a18117ba5d --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/049-spi-add-bcm63xx-HSSPI-driver.patch @@ -0,0 +1,531 @@ +From 8e051b79ae3f66dbad96312fe2976401c28d2148 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:19:55 +0100 +Subject: [PATCH 5/5] spi: add bcm63xx HSSPI driver + +Add a driver for the High Speed SPI controller found on newer BCM63XX SoCs. + +It does feature some new modes like 3-wire or dual spi, but neither of it +is currently implemented. + +Signed-off-by: Jonas Gorski +--- + drivers/spi/Kconfig | 7 + + drivers/spi/Makefile | 1 + + drivers/spi/spi-bcm63xx-hsspi.c | 484 ++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 492 insertions(+) + create mode 100644 drivers/spi/spi-bcm63xx-hsspi.c + +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -112,6 +112,13 @@ config SPI_BCM63XX + help + Enable support for the SPI controller on the Broadcom BCM63xx SoCs. + ++config SPI_BCM63XX_HSSPI ++ tristate "Broadcom BCM63XX HS SPI controller driver" ++ depends on BCM63XX || COMPILE_TEST ++ help ++ This enables support for the High Speed SPI controller present on ++ newer Broadcom BCM63XX SoCs. ++ + config SPI_BITBANG + tristate "Utilities for Bitbanging SPI masters" + help +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_ATH79) += spi-ath79.o + obj-$(CONFIG_SPI_AU1550) += spi-au1550.o + obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o + obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o ++obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o + obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o + obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o + obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o +--- /dev/null ++++ b/drivers/spi/spi-bcm63xx-hsspi.c +@@ -0,0 +1,484 @@ ++/* ++ * Broadcom BCM63XX High Speed SPI Controller driver ++ * ++ * Copyright 2000-2010 Broadcom Corporation ++ * Copyright 2012-2013 Jonas Gorski ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define HSSPI_GLOBAL_CTRL_REG 0x0 ++#define GLOBAL_CTRL_CS_POLARITY_SHIFT 0 ++#define GLOBAL_CTRL_CS_POLARITY_MASK 0x000000ff ++#define GLOBAL_CTRL_PLL_CLK_CTRL_SHIFT 8 ++#define GLOBAL_CTRL_PLL_CLK_CTRL_MASK 0x0000ff00 ++#define GLOBAL_CTRL_CLK_GATE_SSOFF BIT(16) ++#define GLOBAL_CTRL_CLK_POLARITY BIT(17) ++#define GLOBAL_CTRL_MOSI_IDLE BIT(18) ++ ++#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4 ++ ++#define HSSPI_INT_STATUS_REG 0x8 ++#define HSSPI_INT_STATUS_MASKED_REG 0xc ++#define HSSPI_INT_MASK_REG 0x10 ++ ++#define HSSPI_PINGx_CMD_DONE(i) BIT((i * 8) + 0) ++#define HSSPI_PINGx_RX_OVER(i) BIT((i * 8) + 1) ++#define HSSPI_PINGx_TX_UNDER(i) BIT((i * 8) + 2) ++#define HSSPI_PINGx_POLL_TIMEOUT(i) BIT((i * 8) + 3) ++#define HSSPI_PINGx_CTRL_INVAL(i) BIT((i * 8) + 4) ++ ++#define HSSPI_INT_CLEAR_ALL 0xff001f1f ++ ++#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40) ++#define PINGPONG_CMD_COMMAND_MASK 0xf ++#define PINGPONG_COMMAND_NOOP 0 ++#define PINGPONG_COMMAND_START_NOW 1 ++#define PINGPONG_COMMAND_START_TRIGGER 2 ++#define PINGPONG_COMMAND_HALT 3 ++#define PINGPONG_COMMAND_FLUSH 4 ++#define PINGPONG_CMD_PROFILE_SHIFT 8 ++#define PINGPONG_CMD_SS_SHIFT 12 ++ ++#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40) ++ ++#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20) ++#define CLK_CTRL_FREQ_CTRL_MASK 0x0000ffff ++#define CLK_CTRL_SPI_CLK_2X_SEL BIT(14) ++#define CLK_CTRL_ACCUM_RST_ON_LOOP BIT(15) ++ ++#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20) ++#define SIGNAL_CTRL_LATCH_RISING BIT(12) ++#define SIGNAL_CTRL_LAUNCH_RISING BIT(13) ++#define SIGNAL_CTRL_ASYNC_INPUT_PATH BIT(16) ++ ++#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20) ++#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8 ++#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12 ++#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16 ++#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18 ++#define MODE_CTRL_MODE_3WIRE BIT(20) ++#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24 ++ ++#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200) ++ ++ ++#define HSSPI_OP_CODE_SHIFT 13 ++#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_SETIRQ (4 << HSSPI_OP_CODE_SHIFT) ++ ++#define HSSPI_BUFFER_LEN 512 ++#define HSSPI_OPCODE_LEN 2 ++ ++#define HSSPI_MAX_PREPEND_LEN 15 ++ ++#define HSSPI_MAX_SYNC_CLOCK 30000000 ++ ++#define HSSPI_BUS_NUM 1 /* 0 is legacy SPI */ ++ ++struct bcm63xx_hsspi { ++ struct completion done; ++ struct mutex bus_mutex; ++ ++ struct platform_device *pdev; ++ struct clk *clk; ++ void __iomem *regs; ++ u8 __iomem *fifo; ++ ++ u32 speed_hz; ++ u8 cs_polarity; ++}; ++ ++static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned cs, ++ bool active) ++{ ++ u32 reg; ++ ++ mutex_lock(&bs->bus_mutex); ++ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ ++ reg &= ~BIT(cs); ++ if (active == !(bs->cs_polarity & BIT(cs))) ++ reg |= BIT(cs); ++ ++ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ mutex_unlock(&bs->bus_mutex); ++} ++ ++static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, ++ struct spi_device *spi, int hz) ++{ ++ unsigned profile = spi->chip_select; ++ u32 reg; ++ ++ reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz)); ++ __raw_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg, ++ bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile)); ++ ++ reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); ++ if (hz > HSSPI_MAX_SYNC_CLOCK) ++ reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH; ++ else ++ reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH; ++ __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); ++ ++ mutex_lock(&bs->bus_mutex); ++ /* setup clock polarity */ ++ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ reg &= ~GLOBAL_CTRL_CLK_POLARITY; ++ if (spi->mode & SPI_CPOL) ++ reg |= GLOBAL_CTRL_CLK_POLARITY; ++ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ mutex_unlock(&bs->bus_mutex); ++} ++ ++static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, struct spi_transfer *t) ++{ ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); ++ unsigned chip_select = spi->chip_select; ++ u16 opcode = 0; ++ int pending = t->len; ++ int step_size = HSSPI_BUFFER_LEN; ++ const u8 *tx = t->tx_buf; ++ u8 *rx = t->rx_buf; ++ ++ bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz); ++ bcm63xx_hsspi_set_cs(bs, spi->chip_select, true); ++ ++ if (tx && rx) ++ opcode = HSSPI_OP_READ_WRITE; ++ else if (tx) ++ opcode = HSSPI_OP_WRITE; ++ else if (rx) ++ opcode = HSSPI_OP_READ; ++ ++ if (opcode != HSSPI_OP_READ) ++ step_size -= HSSPI_OPCODE_LEN; ++ ++ __raw_writel(0 << MODE_CTRL_PREPENDBYTE_CNT_SHIFT | ++ 2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT | ++ 2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff, ++ bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select)); ++ ++ while (pending > 0) { ++ int curr_step = min_t(int, step_size, pending); ++ ++ init_completion(&bs->done); ++ if (tx) { ++ memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step); ++ tx += curr_step; ++ } ++ ++ __raw_writew(opcode | curr_step, bs->fifo); ++ ++ /* enable interrupt */ ++ __raw_writel(HSSPI_PINGx_CMD_DONE(0), ++ bs->regs + HSSPI_INT_MASK_REG); ++ ++ /* start the transfer */ ++ __raw_writel(!chip_select << PINGPONG_CMD_SS_SHIFT | ++ chip_select << PINGPONG_CMD_PROFILE_SHIFT | ++ PINGPONG_COMMAND_START_NOW, ++ bs->regs + HSSPI_PINGPONG_COMMAND_REG(0)); ++ ++ if (wait_for_completion_timeout(&bs->done, HZ) == 0) { ++ dev_err(&bs->pdev->dev, "transfer timed out!\n"); ++ return -ETIMEDOUT; ++ } ++ ++ if (rx) { ++ memcpy_fromio(rx, bs->fifo, curr_step); ++ rx += curr_step; ++ } ++ ++ pending -= curr_step; ++ } ++ ++ return 0; ++} ++ ++static int bcm63xx_hsspi_setup(struct spi_device *spi) ++{ ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); ++ u32 reg; ++ ++ reg = __raw_readl(bs->regs + ++ HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); ++ reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING); ++ if (spi->mode & SPI_CPHA) ++ reg |= SIGNAL_CTRL_LAUNCH_RISING; ++ else ++ reg |= SIGNAL_CTRL_LATCH_RISING; ++ __raw_writel(reg, bs->regs + ++ HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); ++ ++ mutex_lock(&bs->bus_mutex); ++ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ ++ /* only change actual polarities if there is no transfer */ ++ if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) { ++ if (spi->mode & SPI_CS_HIGH) ++ reg |= BIT(spi->chip_select); ++ else ++ reg &= ~BIT(spi->chip_select); ++ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ } ++ ++ if (spi->mode & SPI_CS_HIGH) ++ bs->cs_polarity |= BIT(spi->chip_select); ++ else ++ bs->cs_polarity &= ~BIT(spi->chip_select); ++ ++ mutex_unlock(&bs->bus_mutex); ++ ++ return 0; ++} ++ ++static int bcm63xx_hsspi_transfer_one(struct spi_master *master, ++ struct spi_message *msg) ++{ ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ struct spi_transfer *t; ++ struct spi_device *spi = msg->spi; ++ int status = -EINVAL; ++ int dummy_cs; ++ u32 reg; ++ ++ /* This controller does not support keeping CS active during idle. ++ * To work around this, we use the following ugly hack: ++ * ++ * a. Invert the target chip select's polarity so it will be active. ++ * b. Select a "dummy" chip select to use as the hardware target. ++ * c. Invert the dummy chip select's polarity so it will be inactive ++ * during the actual transfers. ++ * d. Tell the hardware to send to the dummy chip select. Thanks to ++ * the multiplexed nature of SPI the actual target will receive ++ * the transfer and we see its response. ++ * ++ * e. At the end restore the polarities again to their default values. ++ */ ++ ++ dummy_cs = !spi->chip_select; ++ bcm63xx_hsspi_set_cs(bs, dummy_cs, true); ++ ++ list_for_each_entry(t, &msg->transfers, transfer_list) { ++ status = bcm63xx_hsspi_do_txrx(spi, t); ++ if (status) ++ break; ++ ++ msg->actual_length += t->len; ++ ++ if (t->delay_usecs) ++ udelay(t->delay_usecs); ++ ++ if (t->cs_change) ++ bcm63xx_hsspi_set_cs(bs, spi->chip_select, false); ++ } ++ ++ mutex_lock(&bs->bus_mutex); ++ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ reg &= ~GLOBAL_CTRL_CS_POLARITY_MASK; ++ reg |= bs->cs_polarity; ++ __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ mutex_unlock(&bs->bus_mutex); ++ ++ msg->status = status; ++ spi_finalize_current_message(master); ++ ++ return 0; ++} ++ ++static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id) ++{ ++ struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id; ++ ++ if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0) ++ return IRQ_NONE; ++ ++ __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG); ++ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); ++ ++ complete(&bs->done); ++ ++ return IRQ_HANDLED; ++} ++ ++static int bcm63xx_hsspi_probe(struct platform_device *pdev) ++{ ++ struct spi_master *master; ++ struct bcm63xx_hsspi *bs; ++ struct resource *res_mem; ++ void __iomem *regs; ++ struct device *dev = &pdev->dev; ++ struct clk *clk; ++ int irq, ret; ++ u32 reg, rate; ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(dev, "no irq\n"); ++ return -ENXIO; ++ } ++ ++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ regs = devm_request_and_ioremap(dev, res_mem); ++ if (IS_ERR(regs)) ++ return PTR_ERR(regs); ++ ++ clk = clk_get(dev, "hsspi"); ++ ++ if (IS_ERR(clk)) ++ return PTR_ERR(clk); ++ ++ rate = clk_get_rate(clk); ++ if (!rate) { ++ ret = -EINVAL; ++ goto out_put_clk; ++ } ++ ++ clk_prepare_enable(clk); ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*bs)); ++ if (!master) { ++ ret = -ENOMEM; ++ goto out_disable_clk; ++ } ++ ++ bs = spi_master_get_devdata(master); ++ bs->pdev = pdev; ++ bs->clk = clk; ++ bs->regs = regs; ++ bs->speed_hz = rate; ++ bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); ++ ++ mutex_init(&bs->bus_mutex); ++ ++ master->bus_num = HSSPI_BUS_NUM; ++ master->num_chipselect = 8; ++ master->setup = bcm63xx_hsspi_setup; ++ master->transfer_one_message = bcm63xx_hsspi_transfer_one; ++ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; ++ master->bits_per_word_mask = SPI_BPW_MASK(8); ++ master->auto_runtime_pm = true; ++ ++ platform_set_drvdata(pdev, master); ++ ++ /* Initialize the hardware */ ++ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); ++ ++ /* clean up any pending interrupts */ ++ __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG); ++ ++ /* read out default CS polarities */ ++ reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK; ++ __raw_writel(reg | GLOBAL_CTRL_CLK_GATE_SSOFF, ++ bs->regs + HSSPI_GLOBAL_CTRL_REG); ++ ++ ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED, ++ pdev->name, bs); ++ ++ if (ret) ++ goto out_put_master; ++ ++ /* register and we are done */ ++ ret = spi_register_master(master); ++ if (ret) ++ goto out_put_master; ++ ++ return 0; ++ ++out_put_master: ++ spi_master_put(master); ++out_disable_clk: ++ clk_disable_unprepare(clk); ++out_put_clk: ++ clk_put(clk); ++ ++ return ret; ++} ++ ++ ++static int bcm63xx_hsspi_remove(struct platform_device *pdev) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ spi_unregister_master(master); ++ ++ /* reset the hardware and block queue progress */ ++ __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG); ++ clk_disable_unprepare(bs->clk); ++ clk_put(bs->clk); ++ ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int bcm63xx_hsspi_suspend(struct device *dev) ++{ ++ struct spi_master *master = dev_get_drvdata(dev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ spi_master_suspend(master); ++ clk_disable(bs->clk); ++ ++ return 0; ++} ++ ++static int bcm63xx_hsspi_resume(struct device *dev) ++{ ++ struct spi_master *master = dev_get_drvdata(dev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ clk_enable(bs->clk); ++ spi_master_resume(master); ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = { ++ .suspend = bcm63xx_hsspi_suspend, ++ .resume = bcm63xx_hsspi_resume, ++}; ++ ++#define BCM63XX_HSSPI_PM_OPS (&bcm63xx_hsspi_pm_ops) ++#else ++#define BCM63XX_HSSPI_PM_OPS NULL ++#endif ++ ++ ++ ++static struct platform_driver bcm63xx_hsspi_driver = { ++ .driver = { ++ .name = "bcm63xx-hsspi", ++ .owner = THIS_MODULE, ++ .pm = BCM63XX_HSSPI_PM_OPS, ++ }, ++ .probe = bcm63xx_hsspi_probe, ++ .remove = bcm63xx_hsspi_remove, ++}; ++ ++module_platform_driver(bcm63xx_hsspi_driver); ++ ++MODULE_ALIAS("platform:bcm63xx_hsspi"); ++MODULE_DESCRIPTION("Broadcom BCM63xx High Speed SPI Controller driver"); ++MODULE_AUTHOR("Jonas Gorski "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/patches-3.10/050-MIPS-BCM63XX-expose-the-HSSPI-clock.patch b/target/linux/brcm63xx/patches-3.10/050-MIPS-BCM63XX-expose-the-HSSPI-clock.patch new file mode 100644 index 0000000000..3d55c3496e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/050-MIPS-BCM63XX-expose-the-HSSPI-clock.patch @@ -0,0 +1,50 @@ +From f0df10fb498c21bbb201bc81dd209ea646b5a311 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:19:09 +0100 +Subject: [PATCH 1/5] MIPS: BCM63XX: expose the HSSPI clock + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -226,6 +226,28 @@ static struct clk clk_spi = { + }; + + /* ++ * HSSPI clock ++ */ ++static void hsspi_set(struct clk *clk, int enable) ++{ ++ u32 mask; ++ ++ if (BCMCPU_IS_6328()) ++ mask = CKCTL_6328_HSSPI_EN; ++ else if (BCMCPU_IS_6362()) ++ mask = CKCTL_6362_HSSPI_EN; ++ else ++ return; ++ ++ bcm_hwclock_set(mask, enable); ++} ++ ++static struct clk clk_hsspi = { ++ .set = hsspi_set, ++}; ++ ++ ++/* + * XTM clock + */ + static void xtm_set(struct clk *clk, int enable) +@@ -334,6 +356,8 @@ struct clk *clk_get(struct device *dev, + return &clk_usbd; + if (!strcmp(id, "spi")) + return &clk_spi; ++ if (!strcmp(id, "hsspi")) ++ return &clk_hsspi; + if (!strcmp(id, "xtm")) + return &clk_xtm; + if (!strcmp(id, "periph")) diff --git a/target/linux/brcm63xx/patches-3.10/051-MIPS-BCM63XX-setup-the-HSSPI-clock-rate.patch b/target/linux/brcm63xx/patches-3.10/051-MIPS-BCM63XX-setup-the-HSSPI-clock-rate.patch new file mode 100644 index 0000000000..6f2bc5fb50 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/051-MIPS-BCM63XX-setup-the-HSSPI-clock-rate.patch @@ -0,0 +1,36 @@ +From c8b7d2630d907025ce30989bddd01f4f0f13c103 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Wed, 20 Nov 2013 17:22:40 +0100 +Subject: [PATCH 2/5] MIPS: BCM63XX: setup the HSSPI clock rate + +Properly set up the HSSPI clock rate depending on the SoC's PLL rate. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -378,3 +378,21 @@ void clk_put(struct clk *clk) + } + + EXPORT_SYMBOL(clk_put); ++ ++#define HSSPI_PLL_HZ_6328 133333333 ++#define HSSPI_PLL_HZ_6362 400000000 ++ ++static int __init bcm63xx_clk_init(void) ++{ ++ switch (bcm63xx_get_cpu_id()) { ++ case BCM6328_CPU_ID: ++ clk_hsspi.rate = HSSPI_PLL_HZ_6328; ++ break; ++ case BCM6362_CPU_ID: ++ clk_hsspi.rate = HSSPI_PLL_HZ_6362; ++ break; ++ } ++ ++ return 0; ++} ++arch_initcall(bcm63xx_clk_init); diff --git a/target/linux/brcm63xx/patches-3.10/052-MIPS-BCM63XX-add-HSSPI-IRQ-and-register-offsets.patch b/target/linux/brcm63xx/patches-3.10/052-MIPS-BCM63XX-add-HSSPI-IRQ-and-register-offsets.patch new file mode 100644 index 0000000000..7bd98c158b --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/052-MIPS-BCM63XX-add-HSSPI-IRQ-and-register-offsets.patch @@ -0,0 +1,156 @@ +From 33a6acbe47636adcd9062a0e0af7985c0df9faa5 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:19:55 +0100 +Subject: [PATCH 3/5] MIPS: BCM63XX: add HSSPI IRQ and register offsets + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -145,6 +145,7 @@ enum bcm63xx_regs_set { + RSET_UART1, + RSET_GPIO, + RSET_SPI, ++ RSET_HSSPI, + RSET_UDC0, + RSET_OHCI0, + RSET_OHCI_PRIV, +@@ -193,6 +194,7 @@ enum bcm63xx_regs_set { + #define RSET_ENETDMAS_SIZE(chans) (16 * (chans)) + #define RSET_ENETSW_SIZE 65536 + #define RSET_UART_SIZE 24 ++#define RSET_HSSPI_SIZE 1536 + #define RSET_UDC_SIZE 256 + #define RSET_OHCI_SIZE 256 + #define RSET_EHCI_SIZE 256 +@@ -265,6 +267,7 @@ enum bcm63xx_regs_set { + #define BCM_6328_UART1_BASE (0xb0000120) + #define BCM_6328_GPIO_BASE (0xb0000080) + #define BCM_6328_SPI_BASE (0xdeadbeef) ++#define BCM_6328_HSSPI_BASE (0xb0001000) + #define BCM_6328_UDC0_BASE (0xdeadbeef) + #define BCM_6328_USBDMA_BASE (0xb000c000) + #define BCM_6328_OHCI0_BASE (0xb0002600) +@@ -313,6 +316,7 @@ enum bcm63xx_regs_set { + #define BCM_6338_UART1_BASE (0xdeadbeef) + #define BCM_6338_GPIO_BASE (0xfffe0400) + #define BCM_6338_SPI_BASE (0xfffe0c00) ++#define BCM_6338_HSSPI_BASE (0xdeadbeef) + #define BCM_6338_UDC0_BASE (0xdeadbeef) + #define BCM_6338_USBDMA_BASE (0xfffe2400) + #define BCM_6338_OHCI0_BASE (0xdeadbeef) +@@ -360,6 +364,7 @@ enum bcm63xx_regs_set { + #define BCM_6345_UART1_BASE (0xdeadbeef) + #define BCM_6345_GPIO_BASE (0xfffe0400) + #define BCM_6345_SPI_BASE (0xdeadbeef) ++#define BCM_6345_HSSPI_BASE (0xdeadbeef) + #define BCM_6345_UDC0_BASE (0xdeadbeef) + #define BCM_6345_USBDMA_BASE (0xfffe2800) + #define BCM_6345_ENET0_BASE (0xfffe1800) +@@ -406,6 +411,7 @@ enum bcm63xx_regs_set { + #define BCM_6348_UART1_BASE (0xdeadbeef) + #define BCM_6348_GPIO_BASE (0xfffe0400) + #define BCM_6348_SPI_BASE (0xfffe0c00) ++#define BCM_6348_HSSPI_BASE (0xdeadbeef) + #define BCM_6348_UDC0_BASE (0xfffe1000) + #define BCM_6348_USBDMA_BASE (0xdeadbeef) + #define BCM_6348_OHCI0_BASE (0xfffe1b00) +@@ -451,6 +457,7 @@ enum bcm63xx_regs_set { + #define BCM_6358_UART1_BASE (0xfffe0120) + #define BCM_6358_GPIO_BASE (0xfffe0080) + #define BCM_6358_SPI_BASE (0xfffe0800) ++#define BCM_6358_HSSPI_BASE (0xdeadbeef) + #define BCM_6358_UDC0_BASE (0xfffe0800) + #define BCM_6358_USBDMA_BASE (0xdeadbeef) + #define BCM_6358_OHCI0_BASE (0xfffe1400) +@@ -553,6 +560,7 @@ enum bcm63xx_regs_set { + #define BCM_6368_UART1_BASE (0xb0000120) + #define BCM_6368_GPIO_BASE (0xb0000080) + #define BCM_6368_SPI_BASE (0xb0000800) ++#define BCM_6368_HSSPI_BASE (0xdeadbeef) + #define BCM_6368_UDC0_BASE (0xdeadbeef) + #define BCM_6368_USBDMA_BASE (0xb0004800) + #define BCM_6368_OHCI0_BASE (0xb0001600) +@@ -604,6 +612,7 @@ extern const unsigned long *bcm63xx_regs + __GEN_RSET_BASE(__cpu, UART1) \ + __GEN_RSET_BASE(__cpu, GPIO) \ + __GEN_RSET_BASE(__cpu, SPI) \ ++ __GEN_RSET_BASE(__cpu, HSSPI) \ + __GEN_RSET_BASE(__cpu, UDC0) \ + __GEN_RSET_BASE(__cpu, OHCI0) \ + __GEN_RSET_BASE(__cpu, OHCI_PRIV) \ +@@ -647,6 +656,7 @@ extern const unsigned long *bcm63xx_regs + [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \ + [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \ + [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \ ++ [RSET_HSSPI] = BCM_## __cpu ##_HSSPI_BASE, \ + [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \ + [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \ + [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \ +@@ -727,6 +737,7 @@ enum bcm63xx_irq { + IRQ_ENET0, + IRQ_ENET1, + IRQ_ENET_PHY, ++ IRQ_HSSPI, + IRQ_OHCI0, + IRQ_EHCI0, + IRQ_USBD, +@@ -815,6 +826,7 @@ enum bcm63xx_irq { + #define BCM_6328_ENET0_IRQ 0 + #define BCM_6328_ENET1_IRQ 0 + #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29) + #define BCM_6328_OHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 9) + #define BCM_6328_EHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 10) + #define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4) +@@ -860,6 +872,7 @@ enum bcm63xx_irq { + #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6338_ENET1_IRQ 0 + #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6338_HSSPI_IRQ 0 + #define BCM_6338_OHCI0_IRQ 0 + #define BCM_6338_EHCI0_IRQ 0 + #define BCM_6338_USBD_IRQ 0 +@@ -898,6 +911,7 @@ enum bcm63xx_irq { + #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6345_ENET1_IRQ 0 + #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6345_HSSPI_IRQ 0 + #define BCM_6345_OHCI0_IRQ 0 + #define BCM_6345_EHCI0_IRQ 0 + #define BCM_6345_USBD_IRQ 0 +@@ -936,6 +950,7 @@ enum bcm63xx_irq { + #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) + #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6348_HSSPI_IRQ 0 + #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) + #define BCM_6348_EHCI0_IRQ 0 + #define BCM_6348_USBD_IRQ 0 +@@ -974,6 +989,7 @@ enum bcm63xx_irq { + #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) + #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6358_HSSPI_IRQ 0 + #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) + #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) + #define BCM_6358_USBD_IRQ 0 +@@ -1086,6 +1102,7 @@ enum bcm63xx_irq { + #define BCM_6368_ENET0_IRQ 0 + #define BCM_6368_ENET1_IRQ 0 + #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15) ++#define BCM_6368_HSSPI_IRQ 0 + #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) + #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7) + #define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8) +@@ -1133,6 +1150,7 @@ extern const int *bcm63xx_irqs; + [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \ + [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \ + [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \ ++ [IRQ_HSSPI] = BCM_## __cpu ##_HSSPI_IRQ, \ + [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \ + [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \ + [IRQ_USBD] = BCM_## __cpu ##_USBD_IRQ, \ diff --git a/target/linux/brcm63xx/patches-3.10/053-MIPS-BCM63XX-add-HSSPI-platform-device-and-register-.patch b/target/linux/brcm63xx/patches-3.10/053-MIPS-BCM63XX-add-HSSPI-platform-device-and-register-.patch new file mode 100644 index 0000000000..b20cf2c867 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/053-MIPS-BCM63XX-add-HSSPI-platform-device-and-register-.patch @@ -0,0 +1,107 @@ +From ad04c99347cf9e583457f7258e97f0be22fad2ec Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:18:26 +0100 +Subject: [PATCH 4/5] MIPS: BCM63XX: add HSSPI platform device and register it + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Makefile | 4 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++ + arch/mips/bcm63xx/dev-hsspi.c | 47 ++++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 8 ++++ + 4 files changed, 60 insertions(+), 2 deletions(-) + create mode 100644 arch/mips/bcm63xx/dev-hsspi.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ +- dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ +- dev-usb-usbd.o ++ dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ ++ dev-wdt.o dev-usb-usbd.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -915,6 +916,8 @@ int __init board_register_devices(void) + + bcm63xx_spi_register(); + ++ bcm63xx_hsspi_register(); ++ + bcm63xx_flash_register(); + + bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds); +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -0,0 +1,47 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2012 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++static struct resource spi_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct platform_device bcm63xx_hsspi_device = { ++ .name = "bcm63xx-hsspi", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(spi_resources), ++ .resource = spi_resources, ++}; ++ ++int __init bcm63xx_hsspi_register(void) ++{ ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) ++ return -ENODEV; ++ ++ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); ++ spi_resources[0].end = spi_resources[0].start; ++ spi_resources[0].end += RSET_HSSPI_SIZE - 1; ++ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); ++ ++ return platform_device_register(&bcm63xx_hsspi_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h +@@ -0,0 +1,8 @@ ++#ifndef BCM63XX_DEV_HSSPI_H ++#define BCM63XX_DEV_HSSPI_H ++ ++#include ++ ++int bcm63xx_hsspi_register(void); ++ ++#endif /* BCM63XX_DEV_HSSPI_H */ diff --git a/target/linux/brcm63xx/patches-3.10/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-3.10/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch index 4d00f0e763..88217bd656 100644 --- a/target/linux/brcm63xx/patches-3.10/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch +++ b/target/linux/brcm63xx/patches-3.10/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch @@ -24,9 +24,9 @@ Signed-off-by: Florian Fainelli @@ -1,7 +1,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-usbd.o -+ dev-usb-usbd.o usb-common.o + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o ++ dev-wdt.o dev-usb-usbd.o usb-common.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += boards/ diff --git a/target/linux/brcm63xx/patches-3.10/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-3.10/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch index 732fe94cfd..111d481e54 100644 --- a/target/linux/brcm63xx/patches-3.10/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch +++ b/target/linux/brcm63xx/patches-3.10/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch @@ -24,9 +24,9 @@ Signed-off-by: Florian Fainelli @@ -1,7 +1,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-usbd.o usb-common.o -+ dev-usb-ohci.o dev-usb-usbd.o usb-common.o + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += boards/ diff --git a/target/linux/brcm63xx/patches-3.10/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.10/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch index 621e1f909d..2c264829fb 100644 --- a/target/linux/brcm63xx/patches-3.10/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch +++ b/target/linux/brcm63xx/patches-3.10/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch @@ -16,15 +16,15 @@ Signed-off-by: Florian Fainelli --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -25,6 +25,7 @@ - #include +@@ -26,6 +26,7 @@ + #include #include #include +#include #include #include -@@ -897,6 +898,9 @@ int __init board_register_devices(void) +@@ -898,6 +899,9 @@ int __init board_register_devices(void) if (board.has_usbd) bcm63xx_usbd_register(&board.usbd); diff --git a/target/linux/brcm63xx/patches-3.10/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-3.10/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch index ef4ba17a4d..8b1f8d22b8 100644 --- a/target/linux/brcm63xx/patches-3.10/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch +++ b/target/linux/brcm63xx/patches-3.10/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch @@ -21,12 +21,13 @@ Signed-off-by: Florian Fainelli --- a/arch/mips/bcm63xx/Makefile +++ b/arch/mips/bcm63xx/Makefile -@@ -1,7 +1,7 @@ +@@ -1,7 +1,8 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-ohci.o dev-usb-usbd.o usb-common.o -+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ +- dev-wdt.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o ++ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ ++ usb-common.o obj-$(CONFIG_EARLY_PRINTK) += early_printk.o obj-y += boards/ diff --git a/target/linux/brcm63xx/patches-3.10/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.10/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch index 3d1e7f58cc..641a57c4c0 100644 --- a/target/linux/brcm63xx/patches-3.10/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch +++ b/target/linux/brcm63xx/patches-3.10/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch @@ -16,15 +16,15 @@ Signed-off-by: Florian Fainelli --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -25,6 +25,7 @@ - #include +@@ -26,6 +26,7 @@ + #include #include #include +#include #include #include #include -@@ -898,6 +899,9 @@ int __init board_register_devices(void) +@@ -899,6 +900,9 @@ int __init board_register_devices(void) if (board.has_usbd) bcm63xx_usbd_register(&board.usbd); diff --git a/target/linux/brcm63xx/patches-3.10/300-reset_buttons.patch b/target/linux/brcm63xx/patches-3.10/300-reset_buttons.patch index fcd3c52ecd..0886f6c5fc 100644 --- a/target/linux/brcm63xx/patches-3.10/300-reset_buttons.patch +++ b/target/linux/brcm63xx/patches-3.10/300-reset_buttons.patch @@ -9,7 +9,7 @@ #include #include #include -@@ -36,6 +38,9 @@ +@@ -37,6 +39,9 @@ #define HCS_OFFSET_128K 0x20000 @@ -19,7 +19,7 @@ static struct board_info board; /* -@@ -379,6 +384,16 @@ static struct board_info __initdata boar +@@ -380,6 +385,16 @@ static struct board_info __initdata boar .active_low = 1, }, }, @@ -36,7 +36,7 @@ }; static struct board_info __initdata board_96348gw = { -@@ -437,6 +452,16 @@ static struct board_info __initdata boar +@@ -438,6 +453,16 @@ static struct board_info __initdata boar .active_low = 1, }, }, @@ -53,7 +53,7 @@ }; static struct board_info __initdata board_FAST2404 = { -@@ -870,11 +895,23 @@ static struct platform_device bcm63xx_gp +@@ -871,11 +896,23 @@ static struct platform_device bcm63xx_gp .dev.platform_data = &bcm63xx_led_data, }; @@ -77,7 +77,7 @@ if (board.has_uart0) bcm63xx_uart_register(0); -@@ -934,5 +971,16 @@ int __init board_register_devices(void) +@@ -937,5 +974,16 @@ int __init board_register_devices(void) gpio_request_one(board.ephy_reset_gpio, board.ephy_reset_gpio_flags, "ephy-reset"); diff --git a/target/linux/brcm63xx/patches-3.10/301-led_count.patch b/target/linux/brcm63xx/patches-3.10/301-led_count.patch index e8234b0285..5b9a12e96e 100644 --- a/target/linux/brcm63xx/patches-3.10/301-led_count.patch +++ b/target/linux/brcm63xx/patches-3.10/301-led_count.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -911,6 +911,7 @@ static struct platform_device bcm63xx_gp +@@ -912,6 +912,7 @@ static struct platform_device bcm63xx_gp int __init board_register_devices(void) { int button_count = 0; @@ -8,7 +8,7 @@ if (board.has_uart0) bcm63xx_uart_register(0); -@@ -962,10 +963,16 @@ int __init board_register_devices(void) +@@ -965,10 +966,16 @@ int __init board_register_devices(void) bcm63xx_flash_register(); diff --git a/target/linux/brcm63xx/patches-3.10/302-extended-platform-devices.patch b/target/linux/brcm63xx/patches-3.10/302-extended-platform-devices.patch index c657b19688..2810b6f629 100644 --- a/target/linux/brcm63xx/patches-3.10/302-extended-platform-devices.patch +++ b/target/linux/brcm63xx/patches-3.10/302-extended-platform-devices.patch @@ -1,8 +1,8 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -961,6 +961,9 @@ int __init board_register_devices(void) +@@ -964,6 +964,9 @@ int __init board_register_devices(void) - bcm63xx_spi_register(); + bcm63xx_hsspi_register(); + if (board.num_devs) + platform_add_devices(board.devs, board.num_devs); diff --git a/target/linux/brcm63xx/patches-3.10/303-spi-board-info.patch b/target/linux/brcm63xx/patches-3.10/303-spi-board-info.patch index ce3da3f158..0258710f0b 100644 --- a/target/linux/brcm63xx/patches-3.10/303-spi-board-info.patch +++ b/target/linux/brcm63xx/patches-3.10/303-spi-board-info.patch @@ -8,7 +8,7 @@ #include #include #include -@@ -964,6 +965,9 @@ int __init board_register_devices(void) +@@ -967,6 +968,9 @@ int __init board_register_devices(void) if (board.num_devs) platform_add_devices(board.devs, board.num_devs); diff --git a/target/linux/brcm63xx/patches-3.10/304-boardid_fixup.patch b/target/linux/brcm63xx/patches-3.10/304-boardid_fixup.patch index 6dfb540b7c..937b9d64f3 100644 --- a/target/linux/brcm63xx/patches-3.10/304-boardid_fixup.patch +++ b/target/linux/brcm63xx/patches-3.10/304-boardid_fixup.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -34,6 +34,7 @@ +@@ -35,6 +35,7 @@ #include #include @@ -8,7 +8,7 @@ #define PFX "board_bcm963xx: " -@@ -42,6 +43,9 @@ +@@ -43,6 +44,9 @@ #define BCM963XX_KEYS_POLL_INTERVAL 20 #define BCM963XX_KEYS_DEBOUNCE_INTERVAL (BCM963XX_KEYS_POLL_INTERVAL * 3) @@ -18,7 +18,7 @@ static struct board_info board; /* -@@ -781,6 +785,30 @@ const char *board_get_name(void) +@@ -782,6 +786,30 @@ const char *board_get_name(void) return board.name; } @@ -49,7 +49,7 @@ /* * early init callback, read nvram data from flash and checksum it */ -@@ -819,6 +847,10 @@ void __init board_prom_init(void) +@@ -820,6 +848,10 @@ void __init board_prom_init(void) hcs = (struct bcm_hcs *)boot_addr; board_name = hcs->filename; } else { diff --git a/target/linux/brcm63xx/patches-3.10/306-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch b/target/linux/brcm63xx/patches-3.10/306-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch deleted file mode 100644 index 6b3b980356..0000000000 --- a/target/linux/brcm63xx/patches-3.10/306-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 5aeb6273a610f8aab090b3499827177eb41311ba Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sat, 12 Nov 2011 12:19:09 +0100 -Subject: [PATCH 53/79] MIPS: BCM63XX: expose the HS SPI clock - -Signed-off-by: Jonas Gorski ---- - arch/mips/bcm63xx/clk.c | 22 ++++++++++++++++++++++ - 1 file changed, 22 insertions(+) - ---- a/arch/mips/bcm63xx/clk.c -+++ b/arch/mips/bcm63xx/clk.c -@@ -236,6 +236,26 @@ static struct clk clk_spi = { - }; - - /* -+ * SPI clock -+ */ -+static void hsspi_set(struct clk *clk, int enable) -+{ -+ u32 mask; -+ -+ if (BCMCPU_IS_6328()) -+ mask = CKCTL_6328_HSSPI_EN; -+ else -+ return; -+ -+ bcm_hwclock_set(mask, enable); -+} -+ -+static struct clk clk_hsspi = { -+ .set = hsspi_set, -+}; -+ -+ -+/* - * XTM clock - */ - static void xtm_set(struct clk *clk, int enable) -@@ -344,6 +364,8 @@ struct clk *clk_get(struct device *dev, - return &clk_usbd; - if (!strcmp(id, "spi")) - return &clk_spi; -+ if (!strcmp(id, "hsspi")) -+ return &clk_hsspi; - if (!strcmp(id, "xtm")) - return &clk_xtm; - if (!strcmp(id, "periph")) diff --git a/target/linux/brcm63xx/patches-3.10/307-MIPS-BCM63XX-add-HSSPI-register-definitions.patch b/target/linux/brcm63xx/patches-3.10/307-MIPS-BCM63XX-add-HSSPI-register-definitions.patch deleted file mode 100644 index 28334b160f..0000000000 --- a/target/linux/brcm63xx/patches-3.10/307-MIPS-BCM63XX-add-HSSPI-register-definitions.patch +++ /dev/null @@ -1,211 +0,0 @@ -From 70f970222bc1096689ae1bffeb9ed09a7c4bed07 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sat, 12 Nov 2011 12:19:55 +0100 -Subject: [PATCH 28/60] MIPS: BCM63XX: add HSSPI register definitions - -Signed-off-by: Jonas Gorski ---- - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++ - arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 47 +++++++++++++++++++++ - 2 files changed, 65 insertions(+), 0 deletions(-) - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -145,6 +145,7 @@ enum bcm63xx_regs_set { - RSET_UART1, - RSET_GPIO, - RSET_SPI, -+ RSET_HSSPI, - RSET_UDC0, - RSET_OHCI0, - RSET_OHCI_PRIV, -@@ -193,6 +194,7 @@ enum bcm63xx_regs_set { - #define RSET_ENETDMAS_SIZE(chans) (16 * (chans)) - #define RSET_ENETSW_SIZE 65536 - #define RSET_UART_SIZE 24 -+#define RSET_HSSPI_SIZE 1536 - #define RSET_UDC_SIZE 256 - #define RSET_OHCI_SIZE 256 - #define RSET_EHCI_SIZE 256 -@@ -265,6 +267,7 @@ enum bcm63xx_regs_set { - #define BCM_6328_UART1_BASE (0xb0000120) - #define BCM_6328_GPIO_BASE (0xb0000080) - #define BCM_6328_SPI_BASE (0xdeadbeef) -+#define BCM_6328_HSSPI_BASE (0xb0001000) - #define BCM_6328_UDC0_BASE (0xdeadbeef) - #define BCM_6328_USBDMA_BASE (0xb000c000) - #define BCM_6328_OHCI0_BASE (0xb0002600) -@@ -313,6 +316,7 @@ enum bcm63xx_regs_set { - #define BCM_6338_UART1_BASE (0xdeadbeef) - #define BCM_6338_GPIO_BASE (0xfffe0400) - #define BCM_6338_SPI_BASE (0xfffe0c00) -+#define BCM_6338_HSSPI_BASE (0xdeadbeef) - #define BCM_6338_UDC0_BASE (0xdeadbeef) - #define BCM_6338_USBDMA_BASE (0xfffe2400) - #define BCM_6338_OHCI0_BASE (0xdeadbeef) -@@ -360,6 +364,7 @@ enum bcm63xx_regs_set { - #define BCM_6345_UART1_BASE (0xdeadbeef) - #define BCM_6345_GPIO_BASE (0xfffe0400) - #define BCM_6345_SPI_BASE (0xdeadbeef) -+#define BCM_6345_HSSPI_BASE (0xdeadbeef) - #define BCM_6345_UDC0_BASE (0xdeadbeef) - #define BCM_6345_USBDMA_BASE (0xfffe2800) - #define BCM_6345_ENET0_BASE (0xfffe1800) -@@ -406,6 +411,7 @@ enum bcm63xx_regs_set { - #define BCM_6348_UART1_BASE (0xdeadbeef) - #define BCM_6348_GPIO_BASE (0xfffe0400) - #define BCM_6348_SPI_BASE (0xfffe0c00) -+#define BCM_6348_HSSPI_BASE (0xdeadbeef) - #define BCM_6348_UDC0_BASE (0xfffe1000) - #define BCM_6348_USBDMA_BASE (0xdeadbeef) - #define BCM_6348_OHCI0_BASE (0xfffe1b00) -@@ -451,6 +457,7 @@ enum bcm63xx_regs_set { - #define BCM_6358_UART1_BASE (0xfffe0120) - #define BCM_6358_GPIO_BASE (0xfffe0080) - #define BCM_6358_SPI_BASE (0xfffe0800) -+#define BCM_6358_HSSPI_BASE (0xdeadbeef) - #define BCM_6358_UDC0_BASE (0xfffe0800) - #define BCM_6358_USBDMA_BASE (0xdeadbeef) - #define BCM_6358_OHCI0_BASE (0xfffe1400) -@@ -553,6 +560,7 @@ enum bcm63xx_regs_set { - #define BCM_6368_UART1_BASE (0xb0000120) - #define BCM_6368_GPIO_BASE (0xb0000080) - #define BCM_6368_SPI_BASE (0xb0000800) -+#define BCM_6368_HSSPI_BASE (0xdeadbeef) - #define BCM_6368_UDC0_BASE (0xdeadbeef) - #define BCM_6368_USBDMA_BASE (0xb0004800) - #define BCM_6368_OHCI0_BASE (0xb0001600) -@@ -604,6 +612,7 @@ extern const unsigned long *bcm63xx_regs - __GEN_RSET_BASE(__cpu, UART1) \ - __GEN_RSET_BASE(__cpu, GPIO) \ - __GEN_RSET_BASE(__cpu, SPI) \ -+ __GEN_RSET_BASE(__cpu, HSSPI) \ - __GEN_RSET_BASE(__cpu, UDC0) \ - __GEN_RSET_BASE(__cpu, OHCI0) \ - __GEN_RSET_BASE(__cpu, OHCI_PRIV) \ -@@ -647,6 +656,7 @@ extern const unsigned long *bcm63xx_regs - [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \ - [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \ - [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \ -+ [RSET_HSSPI] = BCM_## __cpu ##_HSSPI_BASE, \ - [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \ - [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \ - [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \ -@@ -727,6 +737,7 @@ enum bcm63xx_irq { - IRQ_ENET0, - IRQ_ENET1, - IRQ_ENET_PHY, -+ IRQ_HSSPI, - IRQ_OHCI0, - IRQ_EHCI0, - IRQ_USBD, -@@ -815,6 +826,7 @@ enum bcm63xx_irq { - #define BCM_6328_ENET0_IRQ 0 - #define BCM_6328_ENET1_IRQ 0 - #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) -+#define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29) - #define BCM_6328_OHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 9) - #define BCM_6328_EHCI0_IRQ (BCM_6328_HIGH_IRQ_BASE + 10) - #define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4) -@@ -860,6 +872,7 @@ enum bcm63xx_irq { - #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) - #define BCM_6338_ENET1_IRQ 0 - #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -+#define BCM_6338_HSSPI_IRQ 0 - #define BCM_6338_OHCI0_IRQ 0 - #define BCM_6338_EHCI0_IRQ 0 - #define BCM_6338_USBD_IRQ 0 -@@ -898,6 +911,7 @@ enum bcm63xx_irq { - #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) - #define BCM_6345_ENET1_IRQ 0 - #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) -+#define BCM_6345_HSSPI_IRQ 0 - #define BCM_6345_OHCI0_IRQ 0 - #define BCM_6345_EHCI0_IRQ 0 - #define BCM_6345_USBD_IRQ 0 -@@ -936,6 +950,7 @@ enum bcm63xx_irq { - #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) - #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) - #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -+#define BCM_6348_HSSPI_IRQ 0 - #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) - #define BCM_6348_EHCI0_IRQ 0 - #define BCM_6348_USBD_IRQ 0 -@@ -974,6 +989,7 @@ enum bcm63xx_irq { - #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) - #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) - #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -+#define BCM_6358_HSSPI_IRQ 0 - #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) - #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) - #define BCM_6358_USBD_IRQ 0 -@@ -1086,6 +1102,7 @@ enum bcm63xx_irq { - #define BCM_6368_ENET0_IRQ 0 - #define BCM_6368_ENET1_IRQ 0 - #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15) -+#define BCM_6368_HSSPI_IRQ 0 - #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) - #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7) - #define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8) -@@ -1133,6 +1150,7 @@ extern const int *bcm63xx_irqs; - [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \ - [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \ - [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \ -+ [IRQ_HSSPI] = BCM_## __cpu ##_HSSPI_IRQ, \ - [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \ - [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \ - [IRQ_USBD] = BCM_## __cpu ##_USBD_IRQ, \ ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -1561,4 +1561,51 @@ - #define OTP_USER_BITS_6328_REG(i) (0x20 + (i) * 4) - #define OTP_6328_REG3_TP1_DISABLED BIT(9) - -+/************************************************************************* -+ * _REG relative to RSET_HSSPI -+ *************************************************************************/ -+ -+#define HSSPI_GLOBAL_CTRL_REG 0x0 -+#define GLOBAL_CTRL_CLK_POLARITY (1 << 17) -+#define GLOBAL_CTRL_CLK_GATE_SSOFF (1 << 16) -+ -+#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4 -+ -+#define HSSPI_INT_STATUS_REG 0x8 -+#define HSSPI_INT_STATUS_MASKED_REG 0xc -+#define HSSPI_INT_MASK_REG 0x10 -+ -+#define HSSPI_PING0_CMD_DONE (1 << 0) -+ -+#define HSSPI_INT_CLEAR_ALL 0xff001f1f -+ -+#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40) -+#define PINGPONG_CMD_COMMAND_MASK 0xf -+#define PINGPONG_COMMAND_NOOP 0 -+#define PINGPONG_COMMAND_START_NOW 1 -+#define PINGPONG_COMMAND_START_TRIGGER 2 -+#define PINGPONG_COMMAND_HALT 3 -+#define PINGPONG_COMMAND_FLUSH 4 -+#define PINGPONG_CMD_PROFILE_SHIFT 8 -+#define PINGPONG_CMD_SS_SHIFT 12 -+ -+#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40) -+ -+#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20) -+#define CLK_CTRL_ACCUM_RST_ON_LOOP (1 << 15) -+ -+#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20) -+#define SIGNAL_CTRL_LATCH_RISING (1 << 12) -+#define SIGNAL_CTRL_LAUNCH_RISING (1 << 13) -+#define SIGNAL_CTRL_ASYNC_INPUT_PATH (1 << 16) -+ -+#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20) -+#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8 -+#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12 -+#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16 -+#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18 -+#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24 -+ -+#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200) -+ - #endif /* BCM63XX_REGS_H_ */ diff --git a/target/linux/brcm63xx/patches-3.10/308-board_leds_naming.patch b/target/linux/brcm63xx/patches-3.10/308-board_leds_naming.patch index 0a4ea30e7e..0064066803 100644 --- a/target/linux/brcm63xx/patches-3.10/308-board_leds_naming.patch +++ b/target/linux/brcm63xx/patches-3.10/308-board_leds_naming.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -147,28 +147,28 @@ static struct board_info __initdata boar +@@ -148,28 +148,28 @@ static struct board_info __initdata boar .leds = { { @@ -34,7 +34,7 @@ .gpio = 1, .active_low = 1, } -@@ -188,28 +188,28 @@ static struct board_info __initdata boar +@@ -189,28 +189,28 @@ static struct board_info __initdata boar .leds = { { @@ -68,7 +68,7 @@ .gpio = 1, .active_low = 1, }, -@@ -248,29 +248,29 @@ static struct board_info __initdata boar +@@ -249,29 +249,29 @@ static struct board_info __initdata boar .leds = { { @@ -103,7 +103,7 @@ .gpio = 1, .active_low = 1, }, -@@ -309,28 +309,28 @@ static struct board_info __initdata boar +@@ -310,28 +310,28 @@ static struct board_info __initdata boar .leds = { { @@ -137,7 +137,7 @@ .gpio = 1, .active_low = 1, }, -@@ -363,28 +363,28 @@ static struct board_info __initdata boar +@@ -364,28 +364,28 @@ static struct board_info __initdata boar .leds = { { @@ -171,7 +171,7 @@ .gpio = 1, .active_low = 1, }, -@@ -431,28 +431,28 @@ static struct board_info __initdata boar +@@ -432,28 +432,28 @@ static struct board_info __initdata boar .leds = { { @@ -205,7 +205,7 @@ .gpio = 1, .active_low = 1, }, -@@ -584,27 +584,27 @@ static struct board_info __initdata boar +@@ -585,27 +585,27 @@ static struct board_info __initdata boar .leds = { { @@ -238,7 +238,7 @@ .gpio = 5, }, }, -@@ -636,22 +636,22 @@ static struct board_info __initdata boar +@@ -637,22 +637,22 @@ static struct board_info __initdata boar .leds = { { diff --git a/target/linux/brcm63xx/patches-3.10/309-cfe_version_mod.patch b/target/linux/brcm63xx/patches-3.10/309-cfe_version_mod.patch index 50cb14bca8..dfc33841ea 100644 --- a/target/linux/brcm63xx/patches-3.10/309-cfe_version_mod.patch +++ b/target/linux/brcm63xx/patches-3.10/309-cfe_version_mod.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -834,10 +834,20 @@ void __init board_prom_init(void) +@@ -835,10 +835,20 @@ void __init board_prom_init(void) /* dump cfe version */ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; diff --git a/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch b/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch index bc7225a6a6..3c4545d805 100644 --- a/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch +++ b/target/linux/brcm63xx/patches-3.10/403-6358-enet1-external-mii-clk.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -910,6 +910,8 @@ void __init board_prom_init(void) +@@ -911,6 +911,8 @@ void __init board_prom_init(void) if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G3_EXT_MII | GPIO_MODE_6348_G0_EXT_MII; diff --git a/target/linux/brcm63xx/patches-3.10/409-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch b/target/linux/brcm63xx/patches-3.10/409-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch deleted file mode 100644 index 7c0bd4860f..0000000000 --- a/target/linux/brcm63xx/patches-3.10/409-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 261ee140e75615351128eee497e6bbd76686784b Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sat, 12 Nov 2011 12:18:26 +0100 -Subject: [PATCH 51/72] MIPS: BCM63XX: add HS SPI platform device and register - it - -Signed-off-by: Jonas Gorski ---- - arch/mips/bcm63xx/Makefile | 4 +- - arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 + - arch/mips/bcm63xx/dev-hsspi.c | 57 ++++++++++++++++++++ - .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 20 +++++++ - 4 files changed, 81 insertions(+), 2 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-hsspi.c - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h - ---- a/arch/mips/bcm63xx/Makefile -+++ b/arch/mips/bcm63xx/Makefile -@@ -1,7 +1,8 @@ - obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ - setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ -- dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o -+ dev-hsspi.o dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o \ -+ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ -+ usb-common.o - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - - obj-y += boards/ ---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c -+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -26,6 +26,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -1003,6 +1004,7 @@ int __init board_register_devices(void) - pr_err(PFX "failed to register fallback SPROM\n"); - } - #endif -+ bcm63xx_hsspi_register(); - - bcm63xx_spi_register(); - ---- /dev/null -+++ b/arch/mips/bcm63xx/dev-hsspi.c -@@ -0,0 +1,60 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2012 Jonas Gorski -+ */ -+ -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+static struct resource spi_resources[] = { -+ { -+ .start = -1, /* filled at runtime */ -+ .end = -1, /* filled at runtime */ -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = -1, /* filled at runtime */ -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static struct bcm63xx_hsspi_pdata spi_pdata = { -+ .bus_num = 1, -+}; -+ -+static struct platform_device bcm63xx_hsspi_device = { -+ .name = "bcm63xx-hsspi", -+ .id = 0, -+ .num_resources = ARRAY_SIZE(spi_resources), -+ .resource = spi_resources, -+ .dev = { -+ .platform_data = &spi_pdata, -+ }, -+}; -+ -+int __init bcm63xx_hsspi_register(void) -+{ -+ -+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362()) -+ return -ENODEV; -+ -+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); -+ spi_resources[0].end = spi_resources[0].start; -+ spi_resources[0].end += RSET_HSSPI_SIZE - 1; -+ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); -+ -+ if (BCMCPU_IS_6328()) -+ spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; -+ else if (BCMCPU_IS_6362()) -+ spi_pdata.speed_hz = HSSPI_PLL_HZ_6362; -+ -+ return platform_device_register(&bcm63xx_hsspi_device); -+} ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h -@@ -0,0 +1,21 @@ -+#ifndef BCM63XX_DEV_HSSPI_H -+#define BCM63XX_DEV_HSSPI_H -+ -+#include -+#include -+#include -+ -+int __init bcm63xx_hsspi_register(void); -+ -+struct bcm63xx_hsspi_pdata { -+ int bus_num; -+ u32 speed_hz; -+}; -+ -+#define bcm_hsspi_readl(o) bcm_rset_readl(RSET_HSSPI, (o)) -+#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) -+ -+#define HSSPI_PLL_HZ_6328 133333333 -+#define HSSPI_PLL_HZ_6362 400000000 -+ -+#endif /* BCM63XX_DEV_HSSPI_H */ diff --git a/target/linux/brcm63xx/patches-3.10/410-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch b/target/linux/brcm63xx/patches-3.10/410-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch deleted file mode 100644 index 7a2d0dd448..0000000000 --- a/target/linux/brcm63xx/patches-3.10/410-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch +++ /dev/null @@ -1,481 +0,0 @@ -From 4b27423676485d05bcd6fc6f3809164fb8f9d22d Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sat, 12 Nov 2011 12:19:55 +0100 -Subject: [PATCH 30/60] SPI: MIPS: BCM63XX: Add HSSPI driver - -Add a driver for the High Speed SPI controller found on newer BCM63XX SoCs. - -Signed-off-by: Jonas Gorski ---- - .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 2 + - drivers/spi/Kconfig | 7 + - drivers/spi/Makefile | 1 + - drivers/spi/spi-bcm63xx-hsspi.c | 427 ++++++++++++++++++++ - 4 files changed, 437 insertions(+), 0 deletions(-) - create mode 100644 drivers/spi/spi-bcm63xx-hsspi.c - ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h -@@ -18,4 +18,6 @@ struct bcm63xx_hsspi_pdata { - #define HSSPI_PLL_HZ_6328 133333333 - #define HSSPI_PLL_HZ_6362 400000000 - -+#define HSSPI_BUFFER_LEN 512 -+ - #endif /* BCM63XX_DEV_HSSPI_H */ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -112,6 +112,13 @@ config SPI_BCM63XX - help - Enable support for the SPI controller on the Broadcom BCM63xx SoCs. - -+config SPI_BCM63XX_HSSPI -+ tristate "Broadcom BCM63XX HS SPI controller driver" -+ depends on BCM63XX -+ help -+ This enables support for the High Speed SPI controller present on -+ newer Broadcom BCM63XX SoCs. -+ - config SPI_BITBANG - tristate "Utilities for Bitbanging SPI masters" - help ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -16,6 +16,7 @@ obj-$(CONFIG_SPI_ATH79) += spi-ath79.o - obj-$(CONFIG_SPI_AU1550) += spi-au1550.o - obj-$(CONFIG_SPI_BCM2835) += spi-bcm2835.o - obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o -+obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o - obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o - obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o - obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o ---- /dev/null -+++ b/drivers/spi/spi-bcm63xx-hsspi.c -@@ -0,0 +1,427 @@ -+/* -+ * Broadcom BCM63XX High Speed SPI Controller driver -+ * -+ * Copyright 2000-2010 Broadcom Corporation -+ * Copyright 2012 Jonas Gorski -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#define HSSPI_OP_CODE_SHIFT 13 -+#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT) -+#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT) -+#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT) -+#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT) -+ -+#define HSSPI_MAX_PREPEND_LEN 15 -+ -+#define HSSPI_MAX_SYNC_CLOCK 30000000 -+ -+struct bcm63xx_hsspi { -+ struct completion done; -+ struct spi_transfer *curr_trans; -+ -+ struct platform_device *pdev; -+ struct clk *clk; -+ void __iomem *regs; -+ u8 __iomem *fifo; -+ -+ u32 speed_hz; -+ int irq; -+}; -+ -+static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, int hz, -+ int profile) -+{ -+ u32 reg; -+ -+ reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz)); -+ bcm_hsspi_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | reg, -+ HSSPI_PROFILE_CLK_CTRL_REG(profile)); -+ -+ reg = bcm_hsspi_readl(HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); -+ if (hz > HSSPI_MAX_SYNC_CLOCK) -+ reg |= SIGNAL_CTRL_ASYNC_INPUT_PATH; -+ else -+ reg &= ~SIGNAL_CTRL_ASYNC_INPUT_PATH; -+ bcm_hsspi_writel(reg, HSSPI_PROFILE_SIGNAL_CTRL_REG(profile)); -+} -+ -+static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, -+ struct spi_transfer *t1, -+ struct spi_transfer *t2) -+{ -+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); -+ u8 chip_select = spi->chip_select; -+ u16 opcode = 0; -+ int len, prepend_size = 0; -+ -+ init_completion(&bs->done); -+ -+ bs->curr_trans = t2 ? t2 : t1; -+ bcm63xx_hsspi_set_clk(bs, bs->curr_trans->speed_hz, chip_select); -+ -+ if (t2 && !t2->tx_buf) -+ prepend_size = t1->len; -+ -+ bcm_hsspi_writel(prepend_size << MODE_CTRL_PREPENDBYTE_CNT_SHIFT | -+ 2 << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT | -+ 2 << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT | 0xff, -+ HSSPI_PROFILE_MODE_CTRL_REG(chip_select)); -+ -+ if (t1->rx_buf && t1->tx_buf) -+ opcode = HSSPI_OP_READ_WRITE; -+ else if (t1->rx_buf || (t2 && t2->rx_buf)) -+ opcode = HSSPI_OP_READ; -+ else if (t1->tx_buf) -+ opcode = HSSPI_OP_WRITE; -+ -+ if (opcode == HSSPI_OP_READ && t2) -+ len = t2->len; -+ else -+ len = t1->len; -+ -+ if (t1->tx_buf) { -+ memcpy_toio(bs->fifo + 2, t1->tx_buf, t1->len); -+ if (t2 && t2->tx_buf) { -+ memcpy_toio(bs->fifo + 2 + t1->len, -+ t2->tx_buf, t2->len); -+ len += t2->len; -+ } -+ } -+ -+ opcode |= len; -+ memcpy_toio(bs->fifo, &opcode, sizeof(opcode)); -+ -+ /* enable interrupt */ -+ bcm_hsspi_writel(HSSPI_PING0_CMD_DONE, HSSPI_INT_MASK_REG); -+ -+ /* start the transfer */ -+ bcm_hsspi_writel(chip_select << PINGPONG_CMD_SS_SHIFT | -+ chip_select << PINGPONG_CMD_PROFILE_SHIFT | -+ PINGPONG_COMMAND_START_NOW, -+ HSSPI_PINGPONG_COMMAND_REG(0)); -+ -+ if (wait_for_completion_timeout(&bs->done, HZ) == 0) { -+ dev_err(&bs->pdev->dev, "transfer timed out!\n"); -+ return -ETIMEDOUT; -+ } -+ -+ return t1->len + (t2 ? t2->len : 0); -+} -+ -+static int bcm63xx_hsspi_setup(struct spi_device *spi) -+{ -+ u32 reg; -+ -+ if (spi->bits_per_word != 8) -+ return -EINVAL; -+ -+ if (spi->max_speed_hz == 0) -+ return -EINVAL; -+ -+ reg = bcm_hsspi_readl(HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); -+ reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING); -+ if (spi->mode & SPI_CPHA) -+ reg |= SIGNAL_CTRL_LAUNCH_RISING; -+ else -+ reg |= SIGNAL_CTRL_LATCH_RISING; -+ bcm_hsspi_writel(reg, HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); -+ -+ return 0; -+} -+ -+static int bcm63xx_hsspi_transfer_one(struct spi_master *master, -+ struct spi_message *msg) -+{ -+ struct spi_transfer *t, *prev = NULL; -+ struct spi_device *spi = msg->spi; -+ u32 reg; -+ int ret = -EINVAL; -+ int len = 0; -+ -+ /* check if we are able to make these transfers */ -+ list_for_each_entry(t, &msg->transfers, transfer_list) { -+ if (!t->tx_buf && !t->rx_buf) -+ goto out; -+ -+ if (t->speed_hz == 0) -+ t->speed_hz = spi->max_speed_hz; -+ -+ if (t->speed_hz > spi->max_speed_hz) -+ goto out; -+ -+ if (t->len > HSSPI_BUFFER_LEN) -+ goto out; -+ -+ /* -+ * This controller does not support keeping the chip select -+ * active between transfers. -+ * This logic currently supports combining: -+ * write then read with no cs_change (e.g. m25p80 RDSR) -+ * write then write with no cs_change (e.g. m25p80 PP) -+ */ -+ if (prev && prev->tx_buf && !prev->cs_change && !t->cs_change) { -+ /* -+ * reject if we have to combine two tx transfers and -+ * their combined length is bigger than the buffer -+ */ -+ if (prev->tx_buf && t->tx_buf && -+ (prev->len + t->len) > HSSPI_BUFFER_LEN) -+ goto out; -+ /* -+ * reject if we need write more than 15 bytes in read -+ * then write. -+ */ -+ if (prev->tx_buf && t->rx_buf && -+ prev->len > HSSPI_MAX_PREPEND_LEN) -+ goto out; -+ } -+ -+ } -+ -+ /* setup clock polarity */ -+ reg = bcm_hsspi_readl(HSSPI_GLOBAL_CTRL_REG); -+ reg &= ~GLOBAL_CTRL_CLK_POLARITY; -+ if (spi->mode & SPI_CPOL) -+ reg |= GLOBAL_CTRL_CLK_POLARITY; -+ bcm_hsspi_writel(reg, HSSPI_GLOBAL_CTRL_REG); -+ -+ list_for_each_entry(t, &msg->transfers, transfer_list) { -+ if (prev && prev->tx_buf && !prev->cs_change && !t->cs_change) { -+ /* combine write with following transfer */ -+ ret = bcm63xx_hsspi_do_txrx(msg->spi, prev, t); -+ if (ret < 0) -+ goto out; -+ -+ len += ret; -+ prev = NULL; -+ continue; -+ } -+ -+ /* write the previous pending transfer */ -+ if (prev != NULL) { -+ ret = bcm63xx_hsspi_do_txrx(msg->spi, prev, NULL); -+ if (ret < 0) -+ goto out; -+ -+ len += ret; -+ } -+ -+ prev = t; -+ } -+ -+ /* do last pending transfer */ -+ if (prev != NULL) { -+ ret = bcm63xx_hsspi_do_txrx(msg->spi, prev, NULL); -+ if (ret < 0) -+ goto out; -+ len += ret; -+ } -+ -+ msg->actual_length = len; -+ ret = 0; -+out: -+ msg->status = ret; -+ spi_finalize_current_message(master); -+ return 0; -+} -+ -+static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id) -+{ -+ struct spi_master *master = (struct spi_master *)dev_id; -+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); -+ -+ if (bcm_hsspi_readl(HSSPI_INT_STATUS_MASKED_REG) == 0) -+ return IRQ_NONE; -+ -+ bcm_hsspi_writel(HSSPI_INT_CLEAR_ALL, HSSPI_INT_STATUS_REG); -+ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); -+ -+ if (bs->curr_trans && bs->curr_trans->rx_buf) -+ memcpy_fromio(bs->curr_trans->rx_buf, bs->fifo, -+ bs->curr_trans->len); -+ complete(&bs->done); -+ -+ return IRQ_HANDLED; -+} -+ -+static int bcm63xx_hsspi_probe(struct platform_device *pdev) -+{ -+ -+ struct spi_master *master; -+ struct bcm63xx_hsspi *bs; -+ struct resource *res_mem; -+ void __iomem *regs; -+ struct device *dev = &pdev->dev; -+ struct bcm63xx_hsspi_pdata *pdata = pdev->dev.platform_data; -+ struct clk *clk; -+ int irq; -+ int ret; -+ -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) { -+ dev_err(dev, "no irq\n"); -+ return -ENXIO; -+ } -+ -+ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ regs = devm_request_and_ioremap(dev, res_mem); -+ if (!regs) { -+ dev_err(dev, "unable to ioremap regs\n"); -+ return -ENXIO; -+ } -+ -+ clk = clk_get(dev, "hsspi"); -+ -+ if (IS_ERR(clk)) { -+ ret = PTR_ERR(clk); -+ goto out_release; -+ } -+ -+ clk_prepare_enable(clk); -+ -+ master = spi_alloc_master(&pdev->dev, sizeof(*bs)); -+ if (!master) { -+ ret = -ENOMEM; -+ goto out_disable_clk; -+ } -+ -+ bs = spi_master_get_devdata(master); -+ bs->pdev = pdev; -+ bs->clk = clk; -+ bs->regs = regs; -+ -+ master->bus_num = pdata->bus_num; -+ master->num_chipselect = 8; -+ master->setup = bcm63xx_hsspi_setup; -+ master->transfer_one_message = bcm63xx_hsspi_transfer_one; -+ master->mode_bits = SPI_CPOL | SPI_CPHA; -+ -+ bs->speed_hz = pdata->speed_hz; -+ bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0)); -+ -+ platform_set_drvdata(pdev, master); -+ -+ bs->curr_trans = NULL; -+ -+ /* Initialize the hardware */ -+ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); -+ -+ /* clean up any pending interrupts */ -+ bcm_hsspi_writel(HSSPI_INT_CLEAR_ALL, HSSPI_INT_STATUS_REG); -+ -+ bcm_hsspi_writel(bcm_hsspi_readl(HSSPI_GLOBAL_CTRL_REG) | -+ GLOBAL_CTRL_CLK_GATE_SSOFF, -+ HSSPI_GLOBAL_CTRL_REG); -+ -+ ret = devm_request_irq(dev, irq, bcm63xx_hsspi_interrupt, IRQF_SHARED, -+ pdev->name, master); -+ -+ if (ret) -+ goto out_put_master; -+ -+ /* register and we are done */ -+ ret = spi_register_master(master); -+ if (ret) -+ goto out_free_irq; -+ -+ return 0; -+ -+out_free_irq: -+ devm_free_irq(dev, bs->irq, master); -+out_put_master: -+ spi_master_put(master); -+out_disable_clk: -+ clk_disable_unprepare(clk); -+ clk_put(clk); -+out_release: -+ devm_ioremap_release(dev, regs); -+ -+ return ret; -+} -+ -+ -+static int __exit bcm63xx_hsspi_remove(struct platform_device *pdev) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); -+ -+ spi_unregister_master(master); -+ -+ /* reset the hardware and block queue progress */ -+ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); -+ clk_disable_unprepare(bs->clk); -+ clk_put(bs->clk); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int bcm63xx_hsspi_suspend(struct platform_device *pdev, -+ pm_message_t mesg) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); -+ -+ spi_master_suspend(master); -+ clk_disable(bs->clk); -+ -+ return 0; -+} -+ -+static int bcm63xx_hsspi_resume(struct platform_device *pdev) -+{ -+ struct spi_master *master = platform_get_drvdata(pdev); -+ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); -+ -+ clk_enable(bs->clk); -+ spi_master_resume(master); -+ -+ return 0; -+} -+ -+static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = { -+ .suspend = bcm63xx_hsspi_suspend, -+ .resume = bcm63xx_hsspi_resume, -+}; -+ -+#define BCM63XX_HSSPI_PM_OPS (&bcm63xx_hsspi_pm_ops) -+#else -+#define BCM63XX_HSSPI_PM_OPS NULL -+#endif -+ -+ -+ -+static struct platform_driver bcm63xx_hsspi_driver = { -+ .driver = { -+ .name = "bcm63xx-hsspi", -+ .owner = THIS_MODULE, -+ .pm = BCM63XX_HSSPI_PM_OPS, -+ }, -+ .probe = bcm63xx_hsspi_probe, -+ .remove = __exit_p(bcm63xx_hsspi_remove), -+}; -+ -+module_platform_driver(bcm63xx_hsspi_driver); -+ -+MODULE_ALIAS("platform:bcm63xx_hsspi"); -+MODULE_DESCRIPTION("Broadcom BCM63xx HS SPI Controller driver"); -+MODULE_AUTHOR("Jonas Gorski "); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch index ddeb751041..9f4e25d18a 100644 --- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch +++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -68,16 +68,14 @@ Signed-off-by: Jonas Gorski switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { case STRAPBUS_6368_BOOT_SEL_NAND: return BCM63XX_FLASH_TYPE_NAND; -@@ -117,8 +143,13 @@ int __init bcm63xx_flash_register(void) +@@ -117,8 +143,11 @@ int __init bcm63xx_flash_register(void) return platform_device_register(&mtd_dev); case BCM63XX_FLASH_TYPE_SERIAL: - pr_warn("unsupported serial flash detected\n"); - return -ENODEV; -+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) { ++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) + bcm63xx_spi_flash_info[0].bus_num = 1; -+ bcm63xx_flash_data.max_transfer_len = HSSPI_BUFFER_LEN; -+ } + + return spi_register_board_info(bcm63xx_spi_flash_info, + ARRAY_SIZE(bcm63xx_spi_flash_info)); diff --git a/target/linux/brcm63xx/patches-3.10/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch b/target/linux/brcm63xx/patches-3.10/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch index 34c2ef928e..51d58b58e5 100644 --- a/target/linux/brcm63xx/patches-3.10/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch +++ b/target/linux/brcm63xx/patches-3.10/413-BCM63XX-allow-providing-fixup-data-in-board-data.patch @@ -36,7 +36,7 @@ Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); if (ssb_arch_register_fallback_sprom( -@@ -1042,5 +1045,9 @@ int __init board_register_devices(void) +@@ -1043,5 +1046,9 @@ int __init board_register_devices(void) platform_device_register(&bcm63xx_gpio_keys_device); } diff --git a/target/linux/brcm63xx/patches-3.10/415-MIPS-BCM63XX-store-the-flash-type-in-global-variable.patch b/target/linux/brcm63xx/patches-3.10/415-MIPS-BCM63XX-store-the-flash-type-in-global-variable.patch index 2d2533bddb..a6cc6a111f 100644 --- a/target/linux/brcm63xx/patches-3.10/415-MIPS-BCM63XX-store-the-flash-type-in-global-variable.patch +++ b/target/linux/brcm63xx/patches-3.10/415-MIPS-BCM63XX-store-the-flash-type-in-global-variable.patch @@ -97,7 +97,7 @@ Subject: [PATCH 38/59] MIPS: BCM63XX: store the flash type in global variable case BCM63XX_FLASH_TYPE_PARALLEL: /* read base address of boot chip select (0) */ val = bcm_mpi_readl(MPI_CSBASE_REG(0)); -@@ -155,7 +168,7 @@ int __init bcm63xx_flash_register(void) +@@ -153,7 +166,7 @@ int __init bcm63xx_flash_register(void) return -ENODEV; default: pr_err("flash detection failed for BCM%x: %d\n", diff --git a/target/linux/brcm63xx/patches-3.10/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch b/target/linux/brcm63xx/patches-3.10/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch index 8e2feb8bf6..5977a43b58 100644 --- a/target/linux/brcm63xx/patches-3.10/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch +++ b/target/linux/brcm63xx/patches-3.10/416-BCM63XX-add-a-fixup-for-ath9k-devices.patch @@ -15,7 +15,7 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices +++ b/arch/mips/bcm63xx/Makefile @@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-hsspi.o dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ - usb-common.o + pci-ath9k-fixup.o usb-common.o @@ -24,7 +24,7 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices obj-y += boards/ --- /dev/null +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c -@@ -0,0 +1,190 @@ +@@ -0,0 +1,192 @@ +/* + * Broadcom BCM63XX Ath9k EEPROM fixup helper. + * @@ -53,6 +53,8 @@ Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices +#include +#include + ++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) ++ +struct ath9k_fixup { + unsigned slot; + u8 mac[ETH_ALEN]; diff --git a/target/linux/brcm63xx/patches-3.10/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch b/target/linux/brcm63xx/patches-3.10/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch index ac37b42cf9..79b7d6c48a 100644 --- a/target/linux/brcm63xx/patches-3.10/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch +++ b/target/linux/brcm63xx/patches-3.10/418-MIPS-BCM63XX-pass-caldata-info-to-flash.patch @@ -11,7 +11,7 @@ Subject: [PATCH 69/80] MIPS: BCM63XX: pass caldata info to flash --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1017,7 +1017,7 @@ int __init board_register_devices(void) +@@ -1018,7 +1018,7 @@ int __init board_register_devices(void) if (board.num_spis) spi_register_board_info(board.spis, board.num_spis); diff --git a/target/linux/brcm63xx/patches-3.10/420-BCM63XX-add-endian-check-for-ath9k.patch b/target/linux/brcm63xx/patches-3.10/420-BCM63XX-add-endian-check-for-ath9k.patch index 9016d14827..a8947ba53c 100644 --- a/target/linux/brcm63xx/patches-3.10/420-BCM63XX-add-endian-check-for-ath9k.patch +++ b/target/linux/brcm63xx/patches-3.10/420-BCM63XX-add-endian-check-for-ath9k.patch @@ -21,7 +21,7 @@ /* --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c -@@ -172,12 +172,14 @@ static void ath9k_pci_fixup(struct pci_d +@@ -174,12 +174,14 @@ static void ath9k_pci_fixup(struct pci_d } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); @@ -39,7 +39,7 @@ return; --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1047,7 +1047,8 @@ int __init board_register_devices(void) +@@ -1048,7 +1048,8 @@ int __init board_register_devices(void) /* register any fixups */ for (i = 0; i < board.has_caldata; i++) diff --git a/target/linux/brcm63xx/patches-3.10/421-BCM63XX-add-led-pin-for-ath9k.patch b/target/linux/brcm63xx/patches-3.10/421-BCM63XX-add-led-pin-for-ath9k.patch index 6ef9d0f0d9..bf0adeb591 100644 --- a/target/linux/brcm63xx/patches-3.10/421-BCM63XX-add-led-pin-for-ath9k.patch +++ b/target/linux/brcm63xx/patches-3.10/421-BCM63XX-add-led-pin-for-ath9k.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1048,7 +1048,7 @@ int __init board_register_devices(void) +@@ -1049,7 +1049,7 @@ int __init board_register_devices(void) /* register any fixups */ for (i = 0; i < board.has_caldata; i++) pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset, @@ -11,7 +11,7 @@ } --- a/arch/mips/bcm63xx/pci-ath9k-fixup.c +++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c -@@ -173,13 +173,14 @@ static void ath9k_pci_fixup(struct pci_d +@@ -175,13 +175,14 @@ static void ath9k_pci_fixup(struct pci_d DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset, diff --git a/target/linux/brcm63xx/patches-3.10/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch b/target/linux/brcm63xx/patches-3.10/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch index 1d1bff57ec..062a871260 100644 --- a/target/linux/brcm63xx/patches-3.10/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch +++ b/target/linux/brcm63xx/patches-3.10/422-BCM63XX-add-a-fixup-for-rt2x00-devices.patch @@ -19,7 +19,7 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices +++ b/arch/mips/bcm63xx/Makefile @@ -2,7 +2,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-hsspi.o dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o \ dev-wdt.o dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o \ - pci-ath9k-fixup.o usb-common.o + pci-ath9k-fixup.o pci-rt2x00-fixup.o usb-common.o @@ -36,7 +36,7 @@ Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices #include #include -@@ -1046,9 +1047,19 @@ int __init board_register_devices(void) +@@ -1047,9 +1048,19 @@ int __init board_register_devices(void) } /* register any fixups */ diff --git a/target/linux/brcm63xx/patches-3.10/553-boards_probe_switch.patch b/target/linux/brcm63xx/patches-3.10/553-boards_probe_switch.patch index 0d28160279..b7943f776a 100644 --- a/target/linux/brcm63xx/patches-3.10/553-boards_probe_switch.patch +++ b/target/linux/brcm63xx/patches-3.10/553-boards_probe_switch.patch @@ -54,28 +54,14 @@ .force_speed_100 = 1, .force_duplex_full = 1, }, -@@ -1502,6 +1514,8 @@ static struct board_info __initdata boar +@@ -1542,6 +1554,12 @@ static struct board_info __initdata boar .use_internal_phy = 1, }, .enet1 = { + .has_phy = 1, + .phy_id = 0, - .force_speed_100 = 1, - .force_duplex_full = 1, - }, -@@ -1523,6 +1537,8 @@ static struct board_info __initdata boar - .use_internal_phy = 1, - }, - .enet1 = { + .has_phy = 1, + .phy_id = 0, - .force_speed_100 = 1, - .force_duplex_full = 1, - }, -@@ -1542,6 +1558,8 @@ static struct board_info __initdata boar - .use_internal_phy = 1, - }, - .enet1 = { + .has_phy = 1, + .phy_id = 0, .force_speed_100 = 1, diff --git a/target/linux/brcm63xx/patches-3.10/900-spi-bcm63xx-hsspi-make-it-compile-with-3.10.patch b/target/linux/brcm63xx/patches-3.10/900-spi-bcm63xx-hsspi-make-it-compile-with-3.10.patch new file mode 100644 index 0000000000..49c8dc3929 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/900-spi-bcm63xx-hsspi-make-it-compile-with-3.10.patch @@ -0,0 +1,21 @@ +From 69c15bfd4b9b78ab8f0dd9a2c0902bcc5d4f02e4 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 1 Dec 2013 13:07:35 +0100 +Subject: [PATCH] spi/bcm63xx-hsspi: make it compile with 3.10 + +--- + drivers/spi/spi-bcm63xx-hsspi.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/spi/spi-bcm63xx-hsspi.c ++++ b/drivers/spi/spi-bcm63xx-hsspi.c +@@ -375,8 +375,7 @@ static int bcm63xx_hsspi_probe(struct pl + master->setup = bcm63xx_hsspi_setup; + master->transfer_one_message = bcm63xx_hsspi_transfer_one; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; +- master->bits_per_word_mask = SPI_BPW_MASK(8); +- master->auto_runtime_pm = true; ++ master->bits_per_word_mask = BIT(8 - 1); + + platform_set_drvdata(pdev, master); +