From: Nicolin Chen Date: Thu, 17 Jul 2014 13:21:37 +0000 (+0800) Subject: ASoC: fsl_sai: Reset FIFOs after disabling TE/RE X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=eff952b733d4c1ff3a6b35accce940b223372978;p=openwrt%2Fstaging%2Fblogic.git ASoC: fsl_sai: Reset FIFOs after disabling TE/RE SAI will not clear their FIFOs after disabling TE/RE. Therfore, the driver should take care the task so as not to let useless data remain in the FIFO. Signed-off-by: Nicolin Chen Signed-off-by: Mark Brown --- diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index c5a0e8af8226..b10dbd835d5c 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -371,10 +371,13 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, /* Check if the opposite FRDE is also disabled */ if (!(tx ? rcsr & FSL_SAI_CSR_FRDE : tcsr & FSL_SAI_CSR_FRDE)) { + /* Disable both directions and reset their FIFOs */ regmap_update_bits(sai->regmap, FSL_SAI_TCSR, - FSL_SAI_CSR_TERE, 0); + FSL_SAI_CSR_TERE | FSL_SAI_CSR_FR, + FSL_SAI_CSR_FR); regmap_update_bits(sai->regmap, FSL_SAI_RCSR, - FSL_SAI_CSR_TERE, 0); + FSL_SAI_CSR_TERE | FSL_SAI_CSR_FR, + FSL_SAI_CSR_FR); } break; default: