From: Hauke Mehrtens Date: Sat, 25 Nov 2023 17:06:41 +0000 (+0100) Subject: mediatek: filogic: Fix GPIOs for Zbtlink ZBT-Z8102AX X-Git-Tag: v23.05.3~149 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=efdafcc9748973cd181100eda37a9bb0f61d7728;p=openwrt%2Fopenwrt.git mediatek: filogic: Fix GPIOs for Zbtlink ZBT-Z8102AX The PGIO configuration should be added for the ZBT-Z8102AX and not the ZBT-Z8103AX Fixes: c8c2f522625c ("mediatek: add support for Zbtlink ZBT-Z8102AX") Signed-off-by: Hauke Mehrtens (cherry picked from commit d99aed31a0e54f68cb26d2dfe814f51a3df31cc4) --- diff --git a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches index ff32a3650c..4cbec1ef07 100644 --- a/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches +++ b/target/linux/mediatek/filogic/base-files/etc/board.d/03_gpio_switches @@ -5,7 +5,7 @@ board_config_update board=$(board_name) case "$board" in -zbtlink,zbt-z8103ax) +zbtlink,zbt-z8102ax) ucidef_add_gpio_switch "5g1" "Power 1st modem" "5g1" "1" ucidef_add_gpio_switch "5g2" "Power 2nd modem" "5g2" "1" ucidef_add_gpio_switch "pcie" "Power PCIe port" "pcie" "1"