From: Chukun Pan <amadeus@jmu.edu.cn>
Date: Wed, 9 Jun 2021 15:22:50 +0000 (+0800)
Subject: ipq806x: Askey RT4230W REV6: enable onboard spi flash
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=eee41e33eca2f860724bceda3f36ea2e30149ef0;p=openwrt%2Fstaging%2Fnbd.git

ipq806x: Askey RT4230W REV6: enable onboard spi flash

There is a mr25h256 spi flash on this machine. From the mtd backup
of the stock firmware, this spi flash is empty.

[    3.652745] spi_qup 1a280000.spi: IN:block:16, fifo:64, OUT:block:16,
fifo:64
[    3.653925] spi-nor spi0.0: mr25h256 (32 Kbytes)

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
---

diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
index a15dee6aca..b07e7320a7 100644
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065-rt4230w-rev6.dts
@@ -96,6 +96,35 @@
 			input-disable;
 		};
 	};
+
+	spi_pins: spi_pins {
+		cs {
+			pins = "gpio20";
+			drive-strength = <12>;
+		};
+	};
+};
+
+&gsbi5 {
+	qcom,mode = <GSBI_PROT_SPI>;
+	status = "okay";
+
+	spi@1a280000 {
+		status = "okay";
+
+		pinctrl-0 = <&spi_pins>;
+		pinctrl-names = "default";
+
+		cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
+
+		flash@0 {
+			compatible = "everspin,mr25h256";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			spi-max-frequency = <40000000>;
+			reg = <0>;
+		};
+	};
 };
 
 &nand {