From: Birger Koblitz Date: Sun, 26 Sep 2021 15:37:25 +0000 (+0200) Subject: realtek: Improve MDIO bus probing for RTL9300 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=ee6f483a625d4e7c6198d422dab1cfddf1de040a;p=openwrt%2Fstaging%2Fxback.git realtek: Improve MDIO bus probing for RTL9300 Improve handling of multi-gig ports on the RTL9300 when probing the MDIO bus. Signed-off-by: Birger Koblitz --- diff --git a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c index dc783705f1..3049151c08 100644 --- a/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c +++ b/target/linux/realtek/files-5.10/drivers/net/dsa/rtl83xx/common.c @@ -2,6 +2,11 @@ #include #include +#include +#include +#include +#include +#include #include #include "rtl83xx.h" @@ -303,38 +308,32 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv) continue; // Check for the integrated SerDes of the RTL8380M first - if (of_property_read_bool(dn, "phy-is-integrated") - && priv->id == 0x8380 && pn >= 24) { + if (of_property_read_bool(dn, "phy-is-integrated") && priv->id == 0x8380 && pn >= 24) { pr_debug("----> FÓUND A SERDES\n"); priv->ports[pn].phy = PHY_RTL838X_SDS; continue; } - if (of_property_read_bool(dn, "phy-is-integrated") - && !of_property_read_bool(dn, "sfp")) { + if (of_property_read_bool(dn, "phy-is-integrated") && !of_property_read_bool(dn, "sfp")) { priv->ports[pn].phy = PHY_RTL8218B_INT; continue; } - if (!of_property_read_bool(dn, "phy-is-integrated") - && of_property_read_bool(dn, "sfp")) { + if (!of_property_read_bool(dn, "phy-is-integrated") && of_property_read_bool(dn, "sfp")) { priv->ports[pn].phy = PHY_RTL8214FC; continue; } - if (!of_property_read_bool(dn, "phy-is-integrated") - && !of_property_read_bool(dn, "sfp")) { + if (!of_property_read_bool(dn, "phy-is-integrated") && !of_property_read_bool(dn, "sfp")) { priv->ports[pn].phy = PHY_RTL8218B_EXT; continue; } } - // TODO: Do this needs to come from the .dts, at least the SerDes number + // TODO: Do this needs to come from the .dts if (priv->family_id == RTL9300_FAMILY_ID) { priv->ports[24].is2G5 = true; priv->ports[25].is2G5 = true; - priv->ports[24].sds_num = 1; - priv->ports[24].sds_num = 2; } /* Disable MAC polling the PHY so that we can start configuration */ @@ -344,7 +343,7 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv) if (priv->family_id == RTL8380_FAMILY_ID) { /* Enable SerDes NWAY and PHY control via SoC */ sw_w32_mask(BIT(7), BIT(15), RTL838X_SMI_GLB_CTRL); - } else { + } else if (priv->family_id == RTL8390_FAMILY_ID) { /* Disable PHY polling via SoC */ sw_w32_mask(BIT(7), 0, RTL839X_SMI_GLB_CTRL); } @@ -356,15 +355,6 @@ static int __init rtl83xx_mdio_probe(struct rtl838x_switch_priv *priv) rtl8380_sds_power(26, 1); } - // TODO: Only power on SerDes with external PHYs connected - if (priv->family_id == RTL9300_FAMILY_ID) { - pr_info("RTL9300 Powering on SerDes ports\n"); - rtl9300_sds_power(24, 1); - rtl9300_sds_power(25, 1); - rtl9300_sds_power(26, 1); - rtl9300_sds_power(27, 1); - } - pr_debug("%s done\n", __func__); return 0; }