From: Felix Fietkau Date: Sun, 6 Sep 2015 09:57:02 +0000 (+0000) Subject: uboot-ar71xx: fix gcc 5.2 compile errors X-Git-Tag: reboot~2128 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=edb5d7511bd76a091b1f52d757520cc2e1762590;p=openwrt%2Fstaging%2Fjogo.git uboot-ar71xx: fix gcc 5.2 compile errors Signed-off-by: Felix Fietkau SVN-Revision: 46797 --- diff --git a/package/boot/uboot-ar71xx/patches/030-no_examples.patch b/package/boot/uboot-ar71xx/patches/030-no_examples.patch new file mode 100644 index 0000000000..65e1289042 --- /dev/null +++ b/package/boot/uboot-ar71xx/patches/030-no_examples.patch @@ -0,0 +1,13 @@ +--- a/Makefile ++++ b/Makefile +@@ -139,9 +139,7 @@ endif + + # The "tools" are needed early, so put this first + # Don't include stuff already done in $(LIBS) +-SUBDIRS = tools \ +- examples/standalone \ +- examples/api ++SUBDIRS = tools + + .PHONY : $(SUBDIRS) + diff --git a/package/boot/uboot-ar71xx/patches/040-no_extern_inline.patch b/package/boot/uboot-ar71xx/patches/040-no_extern_inline.patch new file mode 100644 index 0000000000..5c01691380 --- /dev/null +++ b/package/boot/uboot-ar71xx/patches/040-no_extern_inline.patch @@ -0,0 +1,112 @@ +--- a/include/asm-mips/io.h ++++ b/include/asm-mips/io.h +@@ -118,12 +118,12 @@ static inline void set_io_port_base(unsi + * Change virtual addresses to physical addresses and vv. + * These are trivial on the 1:1 Linux/MIPS mapping + */ +-extern inline phys_addr_t virt_to_phys(volatile void * address) ++static inline phys_addr_t virt_to_phys(volatile void * address) + { + return CPHYSADDR(address); + } + +-extern inline void * phys_to_virt(unsigned long address) ++static inline void * phys_to_virt(unsigned long address) + { + return (void *)KSEG0ADDR(address); + } +@@ -131,12 +131,12 @@ extern inline void * phys_to_virt(unsign + /* + * IO bus memory addresses are also 1:1 with the physical address + */ +-extern inline unsigned long virt_to_bus(volatile void * address) ++static inline unsigned long virt_to_bus(volatile void * address) + { + return CPHYSADDR(address); + } + +-extern inline void * bus_to_virt(unsigned long address) ++static inline void * bus_to_virt(unsigned long address) + { + return (void *)KSEG0ADDR(address); + } +@@ -150,12 +150,12 @@ extern unsigned long isa_slot_offset; + extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags); + + #if 0 +-extern inline void *ioremap(unsigned long offset, unsigned long size) ++static inline void *ioremap(unsigned long offset, unsigned long size) + { + return __ioremap(offset, size, _CACHE_UNCACHED); + } + +-extern inline void *ioremap_nocache(unsigned long offset, unsigned long size) ++static inline void *ioremap_nocache(unsigned long offset, unsigned long size) + { + return __ioremap(offset, size, _CACHE_UNCACHED); + } +@@ -238,7 +238,7 @@ out: + */ + + #define __OUT1(s) \ +-extern inline void __out##s(unsigned int value, unsigned int port) { ++static inline void __out##s(unsigned int value, unsigned int port) { + + #define __OUT2(m) \ + __asm__ __volatile__ ("s" #m "\t%0,%1(%2)" +@@ -252,7 +252,7 @@ __OUT1(s##c_p) __OUT2(m) : : "r" (__iosw + SLOW_DOWN_IO; } + + #define __IN1(t,s) \ +-extern __inline__ t __in##s(unsigned int port) { t _v; ++static inline t __in##s(unsigned int port) { t _v; + + /* + * Required nops will be inserted by the assembler +@@ -267,7 +267,7 @@ __IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i + __IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return __ioswab##w(_v); } + + #define __INS1(s) \ +-extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) { ++static inline void __ins##s(unsigned int port, void * addr, unsigned long count) { + + #define __INS2(m) \ + if (count) \ +@@ -295,7 +295,7 @@ __INS1(s##c) __INS2(m) \ + : "$1");} + + #define __OUTS1(s) \ +-extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) { ++static inline void __outs##s(unsigned int port, const void * addr, unsigned long count) { + + #define __OUTS2(m) \ + if (count) \ +--- a/include/asm-mips/system.h ++++ b/include/asm-mips/system.h +@@ -23,7 +23,7 @@ + #include + #endif + +-extern __inline__ void ++static inline void + __sti(void) + { + __asm__ __volatile__( +@@ -47,7 +47,7 @@ __sti(void) + * R4000/R4400 need three nops, the R4600 two nops and the R10000 needs + * no nops at all. + */ +-extern __inline__ void ++static inline void + __cli(void) + { + __asm__ __volatile__( +@@ -208,7 +208,7 @@ do { \ + * For 32 and 64 bit operands we can take advantage of ll and sc. + * FIXME: This doesn't work for R3000 machines. + */ +-extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val) ++static inline unsigned long xchg_u32(volatile int * m, unsigned long val) + { + #ifdef CONFIG_CPU_HAS_LLSC + unsigned long dummy; diff --git a/package/boot/uboot-ar71xx/patches/041-no_weak_alias.patch b/package/boot/uboot-ar71xx/patches/041-no_weak_alias.patch new file mode 100644 index 0000000000..b6f18edff3 --- /dev/null +++ b/package/boot/uboot-ar71xx/patches/041-no_weak_alias.patch @@ -0,0 +1,12 @@ +--- a/common/main.c ++++ b/common/main.c +@@ -47,8 +47,7 @@ DECLARE_GLOBAL_DATA_PTR; + /* + * Board-specific Platform code can reimplement show_boot_progress () if needed + */ +-void inline __show_boot_progress (int val) {} +-void show_boot_progress (int val) __attribute__((weak, alias("__show_boot_progress"))); ++void __attribute__((weak)) show_boot_progress(int val) {} + + #if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY) + extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */