From: Rosen Penev <rosenp@gmail.com>
Date: Mon, 13 Nov 2023 20:20:51 +0000 (-0800)
Subject: qualcommax: convert to nvmem-layout
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=eadf2ead4e23de6708fc85a204366e8aa50792fa;p=openwrt%2Fstaging%2Fthess.git

qualcommax: convert to nvmem-layout

nvmem-cells is deprecated

Signed-off-by: Rosen Penev <rosenp@gmail.com>
---

diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
index 23b9121d5f..2bb2cce157 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi
@@ -151,28 +151,30 @@
 				reg = <0x800000 0x80000>;
 				read-only;
 
-				compatible = "nvmem-cells";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				macaddr_dp2: macaddr@6 {
-					reg = <0x6 0x6>;
-				};
-
-				macaddr_dp3: macaddr@c {
-					reg = <0xc 0x6>;
-				};
-
-				macaddr_dp4: macaddr@12 {
-					reg = <0x12 0x6>;
-				};
-
-				macaddr_dp5: macaddr@18 {
-					reg = <0x18 0x6>;
-				};
-
-				caldata_qca9889: caldata@4d000 {
-					reg = <0x33000 0x844>;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_dp2: macaddr@6 {
+						reg = <0x6 0x6>;
+					};
+
+					macaddr_dp3: macaddr@c {
+						reg = <0xc 0x6>;
+					};
+
+					macaddr_dp4: macaddr@12 {
+						reg = <0x12 0x6>;
+					};
+
+					macaddr_dp5: macaddr@18 {
+						reg = <0x18 0x6>;
+					};
+
+					caldata_qca9889: caldata@4d000 {
+						reg = <0x33000 0x844>;
+					};
 				};
 			};
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
index fbf5b41d85..0df16e9ad7 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts
@@ -280,32 +280,34 @@
 				reg = <0xf80000 0x80000>;
 				read-only;
 
-				compatible = "nvmem-cells";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				macaddr_dp1: macaddr@0 {
-					reg = <0x0 0x6>;
-				};
-
-				macaddr_dp2: macaddr@6 {
-					reg = <0x6 0x6>;
-				};
-
-				macaddr_dp3: macaddr@c {
-					reg = <0xc 0x6>;
-				};
-
-				macaddr_dp4: macaddr@12 {
-					reg = <0x12 0x6>;
-				};
-
-				macaddr_dp5: macaddr@18 {
-					reg = <0x18 0x6>;
-				};
-
-				caldata_qca9889: caldata@4d000 {
-					reg = <0x4d000 0x844>;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_dp1: macaddr@0 {
+						reg = <0x0 0x6>;
+					};
+
+					macaddr_dp2: macaddr@6 {
+						reg = <0x6 0x6>;
+					};
+
+					macaddr_dp3: macaddr@c {
+						reg = <0xc 0x6>;
+					};
+
+					macaddr_dp4: macaddr@12 {
+						reg = <0x12 0x6>;
+					};
+
+					macaddr_dp5: macaddr@18 {
+						reg = <0x18 0x6>;
+					};
+
+					caldata_qca9889: caldata@4d000 {
+						reg = <0x4d000 0x844>;
+					};
 				};
 			};
 
diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts
index 0a5bbb4c35..0949d19171 100644
--- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts
+++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts
@@ -441,34 +441,35 @@
 				reg = <0x1180000 0x0100000>;
 				read-only;
 
-				compatible = "nvmem-cells";
-				#address-cells = <1>;
-				#size-cells = <1>;
-
-				macaddr_dp1: macaddr@0 {
-					reg = <0x0 0x6>;
-				};
-
-				macaddr_dp2: macaddr@1 {
-					reg = <0x6 0x6>;
-				};
-
-				macaddr_dp3: macaddr@2 {
-					reg = <0xc 0x6>;
-				};
-
-				macaddr_dp4: macaddr@3 {
-					reg = <0x12 0x6>;
-				};
-
-				macaddr_dp5: macaddr@4 {
-					reg = <0x18 0x6>;
+				nvmem-layout {
+					compatible = "fixed-layout";
+					#address-cells = <1>;
+					#size-cells = <1>;
+
+					macaddr_dp1: macaddr@0 {
+						reg = <0x0 0x6>;
+					};
+
+					macaddr_dp2: macaddr@1 {
+						reg = <0x6 0x6>;
+					};
+
+					macaddr_dp3: macaddr@2 {
+						reg = <0xc 0x6>;
+					};
+
+					macaddr_dp4: macaddr@3 {
+						reg = <0x12 0x6>;
+					};
+
+					macaddr_dp5: macaddr@4 {
+						reg = <0x18 0x6>;
+					};
+
+					macaddr_dp6_syn: macaddr@5 {
+						reg = <0x1e 0x6>;
+					};
 				};
-
-				macaddr_dp6_syn: macaddr@5 {
-					reg = <0x1e 0x6>;
-				};
-
 			};
 
 			partition@1280000 {