From: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Date: Tue, 3 May 2016 06:59:24 +0000 (+0200)
Subject: igep00x0: Use the SRAM available for SPL.
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=e7fbcbc2566ab4bbcb07889a5791972ac49fa407;p=project%2Fbcm63xx%2Fu-boot.git

igep00x0: Use the SRAM available for SPL.

Move CONFIG_SPL_TEXT_BASE down to 0x40200000 and set CONFIG_SPL_MAX_SIZE
to (SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE), so that it's clear
what the limit is.

This will also help some compilers to fit all the code into the allocated
space.

Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
---

diff --git a/include/configs/omap3_igep00x0.h b/include/configs/omap3_igep00x0.h
index 5da50a5094..9bd891586c 100644
--- a/include/configs/omap3_igep00x0.h
+++ b/include/configs/omap3_igep00x0.h
@@ -19,6 +19,13 @@
 #include <configs/ti_omap3_common.h>
 #include <asm/mach-types.h>
 
+/* SRAM starts at 0x40200000 and ends at 0x4020FFFF (64KB) */
+#undef CONFIG_SPL_MAX_SIZE
+#undef CONFIG_SPL_TEXT_BASE
+
+#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - CONFIG_SPL_TEXT_BASE)
+#define CONFIG_SPL_TEXT_BASE		0x40200000
+
 /*
  * Display CPU and Board information
  */