From: Jonas Gorski Date: Sun, 30 Jun 2013 13:10:00 +0000 (+0000) Subject: bcm63xx: make smp kernels boot on older SoCs X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=e7d93889d79d7ae97c70fcbb164f60f81dc10f01;p=openwrt%2Fstaging%2Fblocktrron.git bcm63xx: make smp kernels boot on older SoCs Enhance BMIPS support so SMP kernels work on older chips. Signed-off-by: Jonas Gorski SVN-Revision: 37099 --- diff --git a/target/linux/brcm63xx/patches-3.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-3.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch deleted file mode 100644 index 63d385be4e..0000000000 --- a/target/linux/brcm63xx/patches-3.9/100-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:19 +0100 -Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay - -Knowledge of the clock setup delay should remain at the clock level (so -it can be clock specific and CPU specific). Add the 100 milliseconds -required clock delay for the USB host clock when it gets enabled. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/clk.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/arch/mips/bcm63xx/clk.c -+++ b/arch/mips/bcm63xx/clk.c -@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in - bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); - else if (BCMCPU_IS_6368()) - bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); -+ else -+ return; -+ -+ if (enable) -+ msleep(100); - } - - static struct clk clk_usbh = { diff --git a/target/linux/brcm63xx/patches-3.9/100-MIPS-bmips-fix-compilation-for-BMIPS5000.patch b/target/linux/brcm63xx/patches-3.9/100-MIPS-bmips-fix-compilation-for-BMIPS5000.patch new file mode 100644 index 0000000000..6f4763420b --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/100-MIPS-bmips-fix-compilation-for-BMIPS5000.patch @@ -0,0 +1,67 @@ +From d55975b74389b2cf1a38732062ff89303940f6e1 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 29 Jun 2013 11:46:56 +0200 +Subject: [PATCH 01/10] MIPS: bmips: fix compilation for BMIPS5000 + +Replace the macro names in strings with actual macro invocation. + +Fixes the following build error: + + CC arch/mips/kernel/smp-bmips.o +{standard input}: Assembler messages: +{standard input}:951: Error: Unrecognized opcode `_ssnop' +{standard input}:952: Error: Unrecognized opcode `_ssnop' +(...) +make[6]: *** [arch/mips/kernel/smp-bmips.o] Error 1 + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/bmips.h | 28 ++++++++++++++-------------- + 1 file changed, 14 insertions(+), 14 deletions(-) + +--- a/arch/mips/include/asm/bmips.h ++++ b/arch/mips/include/asm/bmips.h +@@ -70,15 +70,15 @@ static inline unsigned long bmips_read_z + ".set noreorder\n" + "cache %1, 0(%2)\n" + "sync\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" + "mfc0 %0, $28, 3\n" +- "_ssnop\n" ++ __stringify(___ssnop) "\n" + ".set pop\n" + : "=&r" (ret) + : "i" (Index_Load_Tag_S), "r" (ZSCM_REG_BASE + offset) +@@ -92,13 +92,13 @@ static inline void bmips_write_zscm_reg( + ".set push\n" + ".set noreorder\n" + "mtc0 %0, $28, 3\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" + "cache %1, 0(%2)\n" +- "_ssnop\n" +- "_ssnop\n" +- "_ssnop\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" ++ __stringify(___ssnop) "\n" + : /* no outputs */ + : "r" (data), + "i" (Index_Store_Tag_S), "r" (ZSCM_REG_BASE + offset) diff --git a/target/linux/brcm63xx/patches-3.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-3.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch deleted file mode 100644 index eaf75030f0..0000000000 --- a/target/linux/brcm63xx/patches-3.9/101-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:20 +0100 -Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to - clock code - -This patch adds the required 10 micro seconds delay to the USB device -clock enable operation. Put this where the correct clock knowledege is, -which is in the clock code, and remove this delay from the bcm63xx_udc -gadget driver where it was before. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/clk.c | 5 +++++ - drivers/usb/gadget/bcm63xx_udc.c | 1 - - 2 files changed, 5 insertions(+), 1 deletion(-) - ---- a/arch/mips/bcm63xx/clk.c -+++ b/arch/mips/bcm63xx/clk.c -@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in - bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); - else if (BCMCPU_IS_6368()) - bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); -+ else -+ return; -+ -+ if (enable) -+ udelay(10); - } - - static struct clk clk_usbd = { ---- a/drivers/usb/gadget/bcm63xx_udc.c -+++ b/drivers/usb/gadget/bcm63xx_udc.c -@@ -386,7 +386,6 @@ static inline void set_clocks(struct bcm - if (is_enabled) { - clk_enable(udc->usbh_clk); - clk_enable(udc->usbd_clk); -- udelay(10); - } else { - clk_disable(udc->usbd_clk); - clk_disable(udc->usbh_clk); diff --git a/target/linux/brcm63xx/patches-3.9/101-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch b/target/linux/brcm63xx/patches-3.9/101-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch new file mode 100644 index 0000000000..27c3b9eea5 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/101-MIPS-allow-asm-cpu.h-to-be-included-from-assembly.patch @@ -0,0 +1,31 @@ +From 520f4bf75026cc60ba47946331966fb670b39cb0 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 27 Jun 2013 21:32:41 +0200 +Subject: [PATCH 02/10] MIPS: allow asm/cpu.h to be included from assembly + +Add guards around the enum to allow including cpu.h from assembly. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/cpu.h | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/mips/include/asm/cpu.h ++++ b/arch/mips/include/asm/cpu.h +@@ -225,6 +225,8 @@ + + #define FPIR_IMP_NONE 0x0000 + ++#if !defined(__ASSEMBLY__) ++ + enum cpu_type_enum { + CPU_UNKNOWN, + +@@ -277,6 +279,7 @@ enum cpu_type_enum { + CPU_LAST + }; + ++#endif /* !__ASSEMBLY */ + + /* + * ISA Level encodings diff --git a/target/linux/brcm63xx/patches-3.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-3.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch deleted file mode 100644 index 4d00f0e763..0000000000 --- a/target/linux/brcm63xx/patches-3.9/102-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch +++ /dev/null @@ -1,151 +0,0 @@ -From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:21 +0100 -Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private - register - -This patch moves the code touching the USB private register in the -bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in -preparation for adding support for OHCI and EHCI host controllers which -will also touch the USB private register. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/Makefile | 2 +- - arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++ - .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++ - drivers/usb/gadget/bcm63xx_udc.c | 27 ++-------- - 4 files changed, 67 insertions(+), 24 deletions(-) - create mode 100644 arch/mips/bcm63xx/usb-common.c - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h - ---- a/arch/mips/bcm63xx/Makefile -+++ b/arch/mips/bcm63xx/Makefile -@@ -1,7 +1,7 @@ - obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ - setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-usbd.o -+ dev-usb-usbd.o usb-common.o - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - - obj-y += boards/ ---- /dev/null -+++ b/arch/mips/bcm63xx/usb-common.c -@@ -0,0 +1,53 @@ -+/* -+ * Broadcom BCM63xx common USB device configuration code -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2012 Kevin Cernekee -+ * Copyright (C) 2012 Broadcom Corporation -+ * -+ */ -+#include -+ -+#include -+#include -+#include -+#include -+ -+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) -+{ -+ u32 val; -+ -+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); -+ if (is_device) { -+ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); -+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -+ } else { -+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); -+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -+ } -+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); -+ -+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); -+ if (is_device) -+ val |= USBH_PRIV_SWAP_USBD_MASK; -+ else -+ val &= ~USBH_PRIV_SWAP_USBD_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); -+} -+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); -+ -+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) -+{ -+ u32 val; -+ -+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); -+ if (is_on) -+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -+ else -+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); -+} -+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h -@@ -0,0 +1,9 @@ -+#ifndef BCM63XX_USB_PRIV_H_ -+#define BCM63XX_USB_PRIV_H_ -+ -+#include -+ -+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); -+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); -+ -+#endif /* BCM63XX_USB_PRIV_H_ */ ---- a/drivers/usb/gadget/bcm63xx_udc.c -+++ b/drivers/usb/gadget/bcm63xx_udc.c -@@ -41,6 +41,7 @@ - #include - #include - #include -+#include - - #define DRV_MODULE_NAME "bcm63xx_udc" - -@@ -863,22 +864,7 @@ static void bcm63xx_select_phy_mode(stru - bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG); - } - -- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); -- if (is_device) { -- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); -- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -- } else { -- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); -- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -- } -- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); -- -- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); -- if (is_device) -- val |= USBH_PRIV_SWAP_USBD_MASK; -- else -- val &= ~USBH_PRIV_SWAP_USBD_MASK; -- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); -+ bcm63xx_usb_priv_select_phy_mode(portmask, is_device); - } - - /** -@@ -892,14 +878,9 @@ static void bcm63xx_select_phy_mode(stru - */ - static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on) - { -- u32 val, portmask = BIT(udc->pd->port_no); -+ u32 portmask = BIT(udc->pd->port_no); - -- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); -- if (is_on) -- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -- else -- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); -- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); -+ bcm63xx_usb_priv_select_pullup(portmask, is_on); - } - - /** diff --git a/target/linux/brcm63xx/patches-3.9/102-MIPS-bmips-add-macros-for-testing-the-current-bmips-.patch b/target/linux/brcm63xx/patches-3.9/102-MIPS-bmips-add-macros-for-testing-the-current-bmips-.patch new file mode 100644 index 0000000000..af38b35689 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/102-MIPS-bmips-add-macros-for-testing-the-current-bmips-.patch @@ -0,0 +1,36 @@ +From 971b8b3d5101b3bb868e63f3eb96fe69b7110c61 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 27 Jun 2013 12:40:15 +0200 +Subject: [PATCH 03/10] MIPS: bmips: add macros for testing the current bmips + CPU + +Makes it easy to make code conditionally compiled for supported CPUs +without directly relying on #ifdefs. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/bmips.h | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/arch/mips/include/asm/bmips.h ++++ b/arch/mips/include/asm/bmips.h +@@ -45,8 +45,19 @@ + #if !defined(__ASSEMBLY__) + + #include ++#include + #include + ++#define cpu_is_bmips32() (current_cpu_type() == CPU_BMIPS32) ++#define cpu_is_bmips3300() (IS_ENABLED(CONFIG_CPU_BMIPS3300) && \ ++ current_cpu_type() == CPU_BMIPS3300) ++#define cpu_is_bmips4350() (IS_ENABLED(CONFIG_CPU_BMIPS4350) && \ ++ current_cpu_type() == CPU_BMIPS4350) ++#define cpu_is_bmips4380() (IS_ENABLED(CONFIG_CPU_BMIPS4380) && \ ++ current_cpu_type() == CPU_BMIPS4380) ++#define cpu_is_bmips5000() (IS_ENABLED(CONFIG_CPU_BMIPS5000) && \ ++ current_cpu_type() == CPU_BMIPS5000) ++ + extern struct plat_smp_ops bmips_smp_ops; + extern char bmips_reset_nmi_vec; + extern char bmips_reset_nmi_vec_end; diff --git a/target/linux/brcm63xx/patches-3.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-3.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch deleted file mode 100644 index 40bbe083a7..0000000000 --- a/target/linux/brcm63xx/patches-3.9/103-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:22 +0100 -Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to - common USB code - -This patch updates the common USB code touching the USB private -registers with the specific bits to properly enable OHCI and EHCI -controllers on BCM63xx SoCs. As a result we now need to protect access -to Read Modify Write sequences using a spinlock because we cannot -guarantee that any of the exposed helper will not be called -concurrently. - -Signed-off-by: Maxime Bizon -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++ - .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 + - 2 files changed, 99 insertions(+) - ---- a/arch/mips/bcm63xx/usb-common.c -+++ b/arch/mips/bcm63xx/usb-common.c -@@ -5,10 +5,12 @@ - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * -+ * Copyright (C) 2008 Maxime Bizon - * Copyright (C) 2012 Kevin Cernekee - * Copyright (C) 2012 Broadcom Corporation - * - */ -+#include - #include - - #include -@@ -16,9 +18,14 @@ - #include - #include - -+static DEFINE_SPINLOCK(usb_priv_reg_lock); -+ - void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) - { - u32 val; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&usb_priv_reg_lock, flags); - - val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); - if (is_device) { -@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3 - else - val &= ~USBH_PRIV_SWAP_USBD_MASK; - bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); -+ -+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); - } - EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); - - void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) - { - u32 val; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&usb_priv_reg_lock, flags); - - val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); - if (is_on) -@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32 - else - val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); - bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); -+ -+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); - } - EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); -+ -+/* The following array represents the meaning of the DESC/DATA -+ * endian swapping with respect to the CPU configured endianness -+ * -+ * DATA ENDN mmio descriptor -+ * 0 0 BE invalid -+ * 0 1 BE LE -+ * 1 0 BE BE -+ * 1 1 BE invalid -+ * -+ * Since BCM63XX SoCs are configured to be in big-endian mode -+ * we want configuration at line 3. -+ */ -+void bcm63xx_usb_priv_ohci_cfg_set(void) -+{ -+ u32 reg; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&usb_priv_reg_lock, flags); -+ -+ if (BCMCPU_IS_6348()) -+ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); -+ else if (BCMCPU_IS_6358()) { -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); -+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; -+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); -+ /* -+ * The magic value comes for the original vendor BSP -+ * and is needed for USB to work. Datasheet does not -+ * help, so the magic value is used as-is. -+ */ -+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, -+ USBH_PRIV_TEST_6358_REG); -+ -+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); -+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; -+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); -+ -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); -+ reg |= USBH_PRIV_SETUP_IOC_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); -+ } -+ -+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); -+} -+ -+void bcm63xx_usb_priv_ehci_cfg_set(void) -+{ -+ u32 reg; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&usb_priv_reg_lock, flags); -+ -+ if (BCMCPU_IS_6358()) { -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); -+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; -+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); -+ -+ /* -+ * The magic value comes for the original vendor BSP -+ * and is needed for USB to work. Datasheet does not -+ * help, so the magic value is used as-is. -+ */ -+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, -+ USBH_PRIV_TEST_6358_REG); -+ -+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); -+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; -+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); -+ -+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); -+ reg |= USBH_PRIV_SETUP_IOC_MASK; -+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); -+ } -+ -+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); -+} ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h -@@ -5,5 +5,7 @@ - - void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); - void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); -+void bcm63xx_usb_priv_ohci_cfg_set(void); -+void bcm63xx_usb_priv_ehci_cfg_set(void); - - #endif /* BCM63XX_USB_PRIV_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/103-MIPS-bmips-change-compile-time-checks-to-runtime-che.patch b/target/linux/brcm63xx/patches-3.9/103-MIPS-bmips-change-compile-time-checks-to-runtime-che.patch new file mode 100644 index 0000000000..d55189529e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/103-MIPS-bmips-change-compile-time-checks-to-runtime-che.patch @@ -0,0 +1,482 @@ +From 12594762fcbec024cb424c9b77efb28402651667 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 27 Jun 2013 21:33:56 +0200 +Subject: [PATCH 04/10] MIPS: bmips: change compile time checks to runtime + checks + +Allow building for all bmips cpus at the same time by changing ifdefs +to checks for the cpu type, or adding appropriate checks to the +assembly. + +Signed-off-by: Jonas Gorski +--- + arch/mips/kernel/bmips_vec.S | 55 +++++++--- + arch/mips/kernel/smp-bmips.c | 241 ++++++++++++++++++++++-------------------- + 2 files changed, 172 insertions(+), 124 deletions(-) + +--- a/arch/mips/kernel/bmips_vec.S ++++ b/arch/mips/kernel/bmips_vec.S +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -89,12 +90,18 @@ NESTED(bmips_reset_nmi_vec, PT_SIZE, sp) + beqz k0, bmips_smp_entry + + #if defined(CONFIG_CPU_BMIPS5000) ++ mfc0 k0, CP0_PRID ++ li k1, PRID_IMP_BMIPS5000 ++ andi k0, 0xff00 ++ bne k0, k1, 1f ++ + /* if we're not on core 0, this must be the SMP boot signal */ + li k1, (3 << 25) + mfc0 k0, $22 + and k0, k1 + bnez k0, bmips_smp_entry +-#endif ++1: ++#endif /* CONFIG_CPU_BMIPS5000 */ + #endif /* CONFIG_SMP */ + + /* nope, it's just a regular NMI */ +@@ -137,7 +144,12 @@ bmips_smp_entry: + xori k0, 0x04 + mtc0 k0, CP0_CONFIG + ++ mfc0 k0, CP0_PRID ++ andi k0, 0xff00 + #if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) ++ li k1, PRID_IMP_BMIPS43XX ++ bne k0, k1, 2f ++ + /* initialize CPU1's local I-cache */ + li k0, 0x80000000 + li k1, 0x80010000 +@@ -148,14 +160,21 @@ bmips_smp_entry: + 1: cache Index_Store_Tag_I, 0(k0) + addiu k0, 16 + bne k0, k1, 1b +-#elif defined(CONFIG_CPU_BMIPS5000) ++ ++ b 3f ++2: ++#endif /* CONFIG_CPU_BMIPS4350 || CONFIG_CPU_BMIPS4380 */ ++#if defined(CONFIG_CPU_BMIPS5000) + /* set exception vector base */ ++ li k1, PRID_IMP_BMIPS5000 ++ bne k0, k1, 3f ++ + la k0, ebase + lw k0, 0(k0) + mtc0 k0, $15, 1 + BARRIER +-#endif +- ++#endif /* CONFIG_CPU_BMIPS5000 */ ++3: + /* jump back to kseg0 in case we need to remap the kseg1 area */ + la k0, 1f + jr k0 +@@ -221,8 +240,18 @@ END(bmips_smp_int_vec) + LEAF(bmips_enable_xks01) + + #if defined(CONFIG_XKS01) +- ++ mfc0 t0, CP0_PRID ++ andi t2, t0, 0xff00 + #if defined(CONFIG_CPU_BMIPS4380) ++ li t1, PRID_IMP_BMIPS43XX ++ bne t2, t1, 1f ++ ++ andi t0, 0xff ++ addiu t1, t0, -PRID_REV_BMIPS4380_HI ++ bgtz t1, 2f ++ addiu t0, -PRID_REV_BMIPS4380_LO ++ bltz t0, 2f ++ + mfc0 t0, $22, 3 + li t1, 0x1ff0 + li t2, (1 << 12) | (1 << 9) +@@ -231,7 +260,13 @@ LEAF(bmips_enable_xks01) + or t0, t2 + mtc0 t0, $22, 3 + BARRIER +-#elif defined(CONFIG_CPU_BMIPS5000) ++ b 2f ++1: ++#endif /* CONFIG_CPU_BMIPS4380 */ ++#if defined(CONFIG_CPU_BMIPS5000) ++ li t1, PRID_IMP_BMIPS5000 ++ bne t2, t1, 2f ++ + mfc0 t0, $22, 5 + li t1, 0x01ff + li t2, (1 << 8) | (1 << 5) +@@ -240,12 +275,8 @@ LEAF(bmips_enable_xks01) + or t0, t2 + mtc0 t0, $22, 5 + BARRIER +-#else +- +-#error Missing XKS01 setup +- +-#endif +- ++#endif /* CONFIG_CPU_BMIPS5000 */ ++2: + #endif /* defined(CONFIG_XKS01) */ + + jr ra +--- a/arch/mips/kernel/smp-bmips.c ++++ b/arch/mips/kernel/smp-bmips.c +@@ -49,8 +49,11 @@ cpumask_t bmips_booted_mask; + unsigned long bmips_smp_boot_sp; + unsigned long bmips_smp_boot_gp; + ++static void bmips43xx_send_ipi_single(int cpu, unsigned int action); ++static void bmips5000_send_ipi_single(int cpu, unsigned int action); + static void bmips_send_ipi_single(int cpu, unsigned int action); +-static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id); ++static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id); ++static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id); + + /* SW interrupts 0,1 are used for interprocessor signaling */ + #define IPI0_IRQ (MIPS_CPU_IRQ_BASE + 0) +@@ -65,48 +68,49 @@ static void __init bmips_smp_setup(void) + { + int i, cpu = 1, boot_cpu = 0; + +-#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) +- /* arbitration priority */ +- clear_c0_brcm_cmt_ctrl(0x30); +- +- /* NBK and weak order flags */ +- set_c0_brcm_config_0(0x30000); +- +- /* Find out if we are running on TP0 or TP1 */ +- boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31)); +- +- /* +- * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other thread +- * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output +- * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output +- * +- * If booting from TP1, leave the existing CMT interrupt routing +- * such that TP0 responds to SW1 and TP1 responds to SW0. +- */ +- if (boot_cpu == 0) +- change_c0_brcm_cmt_intr(0xf8018000, ++ if (cpu_is_bmips4350() || cpu_is_bmips4380()) { ++ /* arbitration priority */ ++ clear_c0_brcm_cmt_ctrl(0x30); ++ ++ /* NBK and weak order flags */ ++ set_c0_brcm_config_0(0x30000); ++ ++ /* Find out if we are running on TP0 or TP1 */ ++ boot_cpu = !!(read_c0_brcm_cmt_local() & (1 << 31)); ++ ++ /* ++ * MIPS interrupts 0,1 (SW INT 0,1) cross over to the other ++ * thread ++ * MIPS interrupt 2 (HW INT 0) is the CPU0 L1 controller output ++ * MIPS interrupt 3 (HW INT 1) is the CPU1 L1 controller output ++ * ++ * If booting from TP1, leave the existing CMT interrupt routing ++ * such that TP0 responds to SW1 and TP1 responds to SW0. ++ */ ++ if (boot_cpu == 0) ++ change_c0_brcm_cmt_intr(0xf8018000, + (0x02 << 27) | (0x03 << 15)); +- else +- change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27)); +- +- /* single core, 2 threads (2 pipelines) */ +- max_cpus = 2; +-#elif defined(CONFIG_CPU_BMIPS5000) +- /* enable raceless SW interrupts */ +- set_c0_brcm_config(0x03 << 22); +- +- /* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */ +- change_c0_brcm_mode(0x1f << 27, 0x02 << 27); ++ else ++ change_c0_brcm_cmt_intr(0xf8018000, (0x1d << 27)); + +- /* N cores, 2 threads per core */ +- max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1; +- +- /* clear any pending SW interrupts */ +- for (i = 0; i < max_cpus; i++) { +- write_c0_brcm_action(ACTION_CLR_IPI(i, 0)); +- write_c0_brcm_action(ACTION_CLR_IPI(i, 1)); ++ /* single core, 2 threads (2 pipelines) */ ++ max_cpus = 2; ++ } else if (cpu_is_bmips5000()) { ++ /* enable raceless SW interrupts */ ++ set_c0_brcm_config(0x03 << 22); ++ ++ /* route HW interrupt 0 to CPU0, HW interrupt 1 to CPU1 */ ++ change_c0_brcm_mode(0x1f << 27, 0x02 << 27); ++ ++ /* N cores, 2 threads per core */ ++ max_cpus = (((read_c0_brcm_config() >> 6) & 0x03) + 1) << 1; ++ ++ /* clear any pending SW interrupts */ ++ for (i = 0; i < max_cpus; i++) { ++ write_c0_brcm_action(ACTION_CLR_IPI(i, 0)); ++ write_c0_brcm_action(ACTION_CLR_IPI(i, 1)); ++ } + } +-#endif + + if (!bmips_smp_enabled) + max_cpus = 1; +@@ -134,6 +138,15 @@ static void __init bmips_smp_setup(void) + */ + static void bmips_prepare_cpus(unsigned int max_cpus) + { ++ irqreturn_t (*bmips_ipi_interrupt)(int irq, void *dev_id); ++ ++ if (cpu_is_bmips4350() || cpu_is_bmips4380()) ++ bmips_ipi_interrupt = bmips43xx_ipi_interrupt; ++ else if (cpu_is_bmips5000()) ++ bmips_ipi_interrupt = bmips5000_ipi_interrupt; ++ else ++ return; ++ + if (request_irq(IPI0_IRQ, bmips_ipi_interrupt, IRQF_PERCPU, + "smp_ipi0", NULL)) + panic("Can't request IPI0 interrupt\n"); +@@ -168,26 +181,26 @@ static void bmips_boot_secondary(int cpu + + pr_info("SMP: Booting CPU%d...\n", cpu); + +- if (cpumask_test_cpu(cpu, &bmips_booted_mask)) ++ if (cpumask_test_cpu(cpu, &bmips_booted_mask)) { + bmips_send_ipi_single(cpu, 0); +- else { +-#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) +- /* Reset slave TP1 if booting from TP0 */ +- if (cpu_logical_map(cpu) == 0) +- set_c0_brcm_cmt_ctrl(0x01); +-#elif defined(CONFIG_CPU_BMIPS5000) +- if (cpu & 0x01) +- write_c0_brcm_action(ACTION_BOOT_THREAD(cpu)); +- else { +- /* +- * core N thread 0 was already booted; just +- * pulse the NMI line +- */ +- bmips_write_zscm_reg(0x210, 0xc0000000); +- udelay(10); +- bmips_write_zscm_reg(0x210, 0x00); ++ } else { ++ if (cpu_is_bmips4350() || cpu_is_bmips4380()) { ++ /* Reset slave TP1 if booting from TP0 */ ++ if (cpu_logical_map(cpu) == 0) ++ set_c0_brcm_cmt_ctrl(0x01); ++ } else if (cpu_is_bmips5000()) { ++ if (cpu & 0x01) ++ write_c0_brcm_action(ACTION_BOOT_THREAD(cpu)); ++ else { ++ /* ++ * core N thread 0 was already booted; just ++ * pulse the NMI line ++ */ ++ bmips_write_zscm_reg(0x210, 0xc0000000); ++ udelay(10); ++ bmips_write_zscm_reg(0x210, 0x00); ++ } + } +-#endif + cpumask_set_cpu(cpu, &bmips_booted_mask); + } + } +@@ -199,20 +212,21 @@ static void bmips_init_secondary(void) + { + /* move NMI vector to kseg0, in case XKS01 is enabled */ + +-#if defined(CONFIG_CPU_BMIPS4350) || defined(CONFIG_CPU_BMIPS4380) +- void __iomem *cbr = BMIPS_GET_CBR(); +- unsigned long old_vec; +- +- old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1); +- __raw_writel(old_vec & ~0x20000000, cbr + BMIPS_RELO_VECTOR_CONTROL_1); +- +- clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0); +-#elif defined(CONFIG_CPU_BMIPS5000) +- write_c0_brcm_bootvec(read_c0_brcm_bootvec() & +- (smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000)); ++ if (cpu_is_bmips4350() || cpu_is_bmips4380()) { ++ void __iomem *cbr = BMIPS_GET_CBR(); ++ unsigned long old_vec; ++ ++ old_vec = __raw_readl(cbr + BMIPS_RELO_VECTOR_CONTROL_1); ++ __raw_writel(old_vec & ~0x20000000, ++ cbr + BMIPS_RELO_VECTOR_CONTROL_1); ++ ++ clear_c0_cause(smp_processor_id() ? C_SW1 : C_SW0); ++ } else if (cpu_is_bmips5000()) { ++ write_c0_brcm_bootvec(read_c0_brcm_bootvec() & ++ (smp_processor_id() & 0x01 ? ~0x20000000 : ~0x2000)); + +- write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0)); +-#endif ++ write_c0_brcm_action(ACTION_CLR_IPI(smp_processor_id(), 0)); ++ } + } + + /* +@@ -237,8 +251,6 @@ static void bmips_cpus_done(void) + { + } + +-#if defined(CONFIG_CPU_BMIPS5000) +- + /* + * BMIPS5000 raceless IPIs + * +@@ -247,12 +259,12 @@ static void bmips_cpus_done(void) + * IPI1 is used for SMP_CALL_FUNCTION + */ + +-static void bmips_send_ipi_single(int cpu, unsigned int action) ++static void bmips5000_send_ipi_single(int cpu, unsigned int action) + { + write_c0_brcm_action(ACTION_SET_IPI(cpu, action == SMP_CALL_FUNCTION)); + } + +-static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id) ++static irqreturn_t bmips5000_ipi_interrupt(int irq, void *dev_id) + { + int action = irq - IPI0_IRQ; + +@@ -266,8 +278,6 @@ static irqreturn_t bmips_ipi_interrupt(i + return IRQ_HANDLED; + } + +-#else +- + /* + * BMIPS43xx racey IPIs + * +@@ -281,7 +291,7 @@ static irqreturn_t bmips_ipi_interrupt(i + static DEFINE_SPINLOCK(ipi_lock); + static DEFINE_PER_CPU(int, ipi_action_mask); + +-static void bmips_send_ipi_single(int cpu, unsigned int action) ++static void bmips43xx_send_ipi_single(int cpu, unsigned int action) + { + unsigned long flags; + +@@ -292,7 +302,7 @@ static void bmips_send_ipi_single(int cp + spin_unlock_irqrestore(&ipi_lock, flags); + } + +-static irqreturn_t bmips_ipi_interrupt(int irq, void *dev_id) ++static irqreturn_t bmips43xx_ipi_interrupt(int irq, void *dev_id) + { + unsigned long flags; + int action, cpu = irq - IPI0_IRQ; +@@ -311,7 +321,13 @@ static irqreturn_t bmips_ipi_interrupt(i + return IRQ_HANDLED; + } + +-#endif /* BMIPS type */ ++static void bmips_send_ipi_single(int cpu, unsigned int action) ++{ ++ if (cpu_is_bmips4350() || cpu_is_bmips4380()) ++ bmips43xx_send_ipi_single(cpu, action); ++ else if (cpu_is_bmips5000()) ++ bmips5000_send_ipi_single(cpu, action); ++} + + static void bmips_send_ipi_mask(const struct cpumask *mask, + unsigned int action) +@@ -421,43 +437,44 @@ void __cpuinit bmips_ebase_setup(void) + + BUG_ON(ebase != CKSEG0); + +-#if defined(CONFIG_CPU_BMIPS4350) +- /* +- * BMIPS4350 cannot relocate the normal vectors, but it +- * can relocate the BEV=1 vectors. So CPU1 starts up at +- * the relocated BEV=1, IV=0 general exception vector @ +- * 0xa000_0380. +- * +- * set_uncached_handler() is used here because: +- * - CPU1 will run this from uncached space +- * - None of the cacheflush functions are set up yet +- */ +- set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0, +- &bmips_smp_int_vec, 0x80); +- __sync(); +- return; +-#elif defined(CONFIG_CPU_BMIPS4380) +- /* +- * 0x8000_0000: reset/NMI (initially in kseg1) +- * 0x8000_0400: normal vectors +- */ +- new_ebase = 0x80000400; +- cbr = BMIPS_GET_CBR(); +- __raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0); +- __raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1); +-#elif defined(CONFIG_CPU_BMIPS5000) +- /* +- * 0x8000_0000: reset/NMI (initially in kseg1) +- * 0x8000_1000: normal vectors +- */ +- new_ebase = 0x80001000; +- write_c0_brcm_bootvec(0xa0088008); +- write_c0_ebase(new_ebase); +- if (max_cpus > 2) +- bmips_write_zscm_reg(0xa0, 0xa008a008); +-#else +- return; +-#endif ++ if (cpu_is_bmips4350()) { ++ /* ++ * BMIPS4350 cannot relocate the normal vectors, but it ++ * can relocate the BEV=1 vectors. So CPU1 starts up at ++ * the relocated BEV=1, IV=0 general exception vector @ ++ * 0xa000_0380. ++ * ++ * set_uncached_handler() is used here because: ++ * - CPU1 will run this from uncached space ++ * - None of the cacheflush functions are set up yet ++ */ ++ set_uncached_handler(BMIPS_WARM_RESTART_VEC - CKSEG0, ++ &bmips_smp_int_vec, 0x80); ++ __sync(); ++ return; ++ } else if (cpu_is_bmips4380()) { ++ /* ++ * 0x8000_0000: reset/NMI (initially in kseg1) ++ * 0x8000_0400: normal vectors ++ */ ++ new_ebase = 0x80000400; ++ cbr = BMIPS_GET_CBR(); ++ __raw_writel(0x80080800, cbr + BMIPS_RELO_VECTOR_CONTROL_0); ++ __raw_writel(0xa0080800, cbr + BMIPS_RELO_VECTOR_CONTROL_1); ++ } else if (cpu_is_bmips5000()) { ++ /* ++ * 0x8000_0000: reset/NMI (initially in kseg1) ++ * 0x8000_1000: normal vectors ++ */ ++ new_ebase = 0x80001000; ++ write_c0_brcm_bootvec(0xa0088008); ++ write_c0_ebase(new_ebase); ++ if (max_cpus > 2) ++ bmips_write_zscm_reg(0xa0, 0xa008a008); ++ } else { ++ return; ++ } ++ + board_nmi_handler_setup = &bmips_nmi_handler_setup; + ebase = new_ebase; + } diff --git a/target/linux/brcm63xx/patches-3.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch deleted file mode 100644 index 81810c073a..0000000000 --- a/target/linux/brcm63xx/patches-3.9/104-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:23 +0100 -Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration - symbol - -This configuration symbol can be used by CPUs supporting the on-chip -OHCI controller, and ensures that all relevant OHCI-related -configuration options are correctly selected. So far, OHCI support is -available for the 6328, 6348, 6358 and 6358 SoCs. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/Kconfig | 15 ++++++++++----- - 1 file changed, 10 insertions(+), 5 deletions(-) - ---- a/arch/mips/bcm63xx/Kconfig -+++ b/arch/mips/bcm63xx/Kconfig -@@ -5,9 +5,16 @@ config BCM63XX_CPU_3368 - bool "support 3368 CPU" - select HW_HAS_PCI - -+config BCM63XX_OHCI -+ bool -+ select USB_ARCH_HAS_OHCI -+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD -+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD -+ - config BCM63XX_CPU_6328 - bool "support 6328 CPU" - select HW_HAS_PCI -+ select BCM63XX_OHCI - - config BCM63XX_CPU_6338 - bool "support 6338 CPU" -@@ -19,18 +26,22 @@ config BCM63XX_CPU_6345 - config BCM63XX_CPU_6348 - bool "support 6348 CPU" - select HW_HAS_PCI -+ select BCM63XX_OHCI - - config BCM63XX_CPU_6358 - bool "support 6358 CPU" - select HW_HAS_PCI -+ select BCM63XX_OHCI - - config BCM63XX_CPU_6362 - bool "support 6362 CPU" - select HW_HAS_PCI -+ select BCM63XX_OHCI - - config BCM63XX_CPU_6368 - bool "support 6368 CPU" - select HW_HAS_PCI -+ select BCM63XX_OHCI - endmenu - - source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-3.9/104-MIPS-bmips-merge-CPU-options-into-one-option.patch b/target/linux/brcm63xx/patches-3.9/104-MIPS-bmips-merge-CPU-options-into-one-option.patch new file mode 100644 index 0000000000..386c63c1ae --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/104-MIPS-bmips-merge-CPU-options-into-one-option.patch @@ -0,0 +1,126 @@ +From 1ecac776e6c652e3059d4f4d9dd8369e89ebef81 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 27 Jun 2013 23:57:20 +0200 +Subject: [PATCH 05/10] MIPS: bmips: merge CPU options into one option + +Instead of treating each flavour as an exclusive CPU to select, make +BMIPS the only option and let SYS_HAS_CPU_BMIPS* decide for which +flavours to include support. + +Run tested on BMIPS3300 and BMIPS4350, only build tested for BMIPS4380 +and BMISP5000. + +Signed-off-by: Jonas Gorski +--- + arch/mips/Kconfig | 77 +++++++++++++++++++++++++---------------------------- + 1 file changed, 36 insertions(+), 41 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -130,6 +130,7 @@ config BCM63XX + select DMA_NONCOHERENT + select IRQ_CPU + select SYS_HAS_CPU_MIPS32_R1 ++ select SYS_HAS_CPU_BMIPS + select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348 + select NR_CPUS_DEFAULT_2 + select SYS_SUPPORTS_32BIT_KERNEL +@@ -1454,41 +1455,21 @@ config CPU_CAVIUM_OCTEON + can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets. + Full details can be found at http://www.caviumnetworks.com. + +-config CPU_BMIPS3300 +- bool "BMIPS3300" +- depends on SYS_HAS_CPU_BMIPS3300 +- select CPU_BMIPS +- help +- Broadcom BMIPS3300 processors. +- +-config CPU_BMIPS4350 +- bool "BMIPS4350" +- depends on SYS_HAS_CPU_BMIPS4350 +- select CPU_BMIPS +- select SYS_SUPPORTS_SMP +- select SYS_SUPPORTS_HOTPLUG_CPU +- help +- Broadcom BMIPS4350 ("VIPER") processors. +- +-config CPU_BMIPS4380 +- bool "BMIPS4380" +- depends on SYS_HAS_CPU_BMIPS4380 +- select CPU_BMIPS +- select SYS_SUPPORTS_SMP +- select SYS_SUPPORTS_HOTPLUG_CPU +- help +- Broadcom BMIPS4380 processors. +- +-config CPU_BMIPS5000 +- bool "BMIPS5000" +- depends on SYS_HAS_CPU_BMIPS5000 +- select CPU_BMIPS +- select CPU_SUPPORTS_HIGHMEM +- select MIPS_CPU_SCACHE +- select SYS_SUPPORTS_SMP +- select SYS_SUPPORTS_HOTPLUG_CPU ++config CPU_BMIPS ++ bool "Broadcom BMIPS" ++ depends on SYS_HAS_CPU_BMIPS ++ select CPU_MIPS32 ++ select CPU_BMIPS3300 if SYS_HAS_CPU_BMIPS3300 ++ select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350 ++ select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4380 ++ select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000 ++ select CPU_SUPPORTS_32BIT_KERNEL ++ select DMA_NONCOHERENT ++ select IRQ_CPU ++ select SWAP_IO_SPACE ++ select WEAK_ORDERING + help +- Broadcom BMIPS5000 processors. ++ Support for BMIPS3300/4350/4380 and BMIPS5000 processors. + + config CPU_XLR + bool "Netlogic XLR SoC" +@@ -1569,14 +1550,25 @@ config CPU_LOONGSON1 + select CPU_SUPPORTS_32BIT_KERNEL + select CPU_SUPPORTS_HIGHMEM + +-config CPU_BMIPS ++config CPU_BMIPS3300 + bool +- select CPU_MIPS32 +- select CPU_SUPPORTS_32BIT_KERNEL +- select DMA_NONCOHERENT +- select IRQ_CPU +- select SWAP_IO_SPACE +- select WEAK_ORDERING ++ ++config CPU_BMIPS4350 ++ bool ++ select SYS_SUPPORTS_SMP ++ select SYS_SUPPORTS_HOTPLUG_CPU ++ ++config CPU_BMIPS4380 ++ bool ++ select SYS_SUPPORTS_SMP ++ select SYS_SUPPORTS_HOTPLUG_CPU ++ ++config CPU_BMIPS5000 ++ bool ++ select CPU_SUPPORTS_HIGHMEM ++ select MIPS_CPU_SCACHE ++ select SYS_SUPPORTS_SMP ++ select SYS_SUPPORTS_HOTPLUG_CPU + + config SYS_HAS_CPU_LOONGSON2E + bool +@@ -1650,6 +1642,9 @@ config SYS_HAS_CPU_SB1 + config SYS_HAS_CPU_CAVIUM_OCTEON + bool + ++config SYS_HAS_CPU_BMIPS ++ bool ++ + config SYS_HAS_CPU_BMIPS3300 + bool + diff --git a/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch deleted file mode 100644 index 732fe94cfd..0000000000 --- a/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:24 +0100 -Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI - controller - -Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be -driven by the ohci-platform generic driver by using specific power -on/off/suspend callback to manage clocks and hardware specific -configuration. - -Signed-off-by: Maxime Bizon -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/Makefile | 2 +- - arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++ - .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++ - 3 files changed, 101 insertions(+), 1 deletion(-) - create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h - ---- a/arch/mips/bcm63xx/Makefile -+++ b/arch/mips/bcm63xx/Makefile -@@ -1,7 +1,7 @@ - obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ - setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-usbd.o usb-common.o -+ dev-usb-ohci.o dev-usb-usbd.o usb-common.o - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - - obj-y += boards/ ---- /dev/null -+++ b/arch/mips/bcm63xx/dev-usb-ohci.c -@@ -0,0 +1,94 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2008 Maxime Bizon -+ * Copyright (C) 2013 Florian Fainelli -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static struct resource ohci_resources[] = { -+ { -+ .start = -1, /* filled at runtime */ -+ .end = -1, /* filled at runtime */ -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = -1, /* filled at runtime */ -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static u64 ohci_dmamask = DMA_BIT_MASK(32); -+ -+static struct clk *usb_host_clock; -+ -+static int bcm63xx_ohci_power_on(struct platform_device *pdev) -+{ -+ usb_host_clock = clk_get(&pdev->dev, "usbh"); -+ if (IS_ERR_OR_NULL(usb_host_clock)) -+ return -ENODEV; -+ -+ clk_prepare_enable(usb_host_clock); -+ -+ bcm63xx_usb_priv_ohci_cfg_set(); -+ -+ return 0; -+} -+ -+static void bcm63xx_ohci_power_off(struct platform_device *pdev) -+{ -+ if (!IS_ERR_OR_NULL(usb_host_clock)) { -+ clk_disable_unprepare(usb_host_clock); -+ clk_put(usb_host_clock); -+ } -+} -+ -+static struct usb_ohci_pdata bcm63xx_ohci_pdata = { -+ .big_endian_desc = 1, -+ .big_endian_mmio = 1, -+ .no_big_frame_no = 1, -+ .num_ports = 1, -+ .power_on = bcm63xx_ohci_power_on, -+ .power_off = bcm63xx_ohci_power_off, -+ .power_suspend = bcm63xx_ohci_power_off, -+}; -+ -+static struct platform_device bcm63xx_ohci_device = { -+ .name = "ohci-platform", -+ .id = -1, -+ .num_resources = ARRAY_SIZE(ohci_resources), -+ .resource = ohci_resources, -+ .dev = { -+ .platform_data = &bcm63xx_ohci_pdata, -+ .dma_mask = &ohci_dmamask, -+ .coherent_dma_mask = DMA_BIT_MASK(32), -+ }, -+}; -+ -+int __init bcm63xx_ohci_register(void) -+{ -+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) -+ return -ENODEV; -+ -+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); -+ ohci_resources[0].end = ohci_resources[0].start; -+ ohci_resources[0].end += RSET_OHCI_SIZE - 1; -+ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); -+ -+ return platform_device_register(&bcm63xx_ohci_device); -+} ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h -@@ -0,0 +1,6 @@ -+#ifndef BCM63XX_DEV_USB_OHCI_H_ -+#define BCM63XX_DEV_USB_OHCI_H_ -+ -+int bcm63xx_ohci_register(void); -+ -+#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-let-the-individual-SoCs-select-the-appr.patch b/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-let-the-individual-SoCs-select-the-appr.patch new file mode 100644 index 0000000000..cb09abcc2d --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/105-MIPS-BCM63XX-let-the-individual-SoCs-select-the-appr.patch @@ -0,0 +1,72 @@ +From 9d1e9d7abd2f2d067169fb0c62e34cf080bbd7a1 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 23 Jun 2013 12:25:49 +0200 +Subject: [PATCH 06/10] MIPS: BCM63XX: let the individual SoCs select the + appropriate CPUs + +Let each supported chip select the appropirate SYS_HAS_CPU_BMIPS* +option for its embedded processor, so support will be conditionally +included. + +Signed-off-by: Jonas Gorski + +fix bmips selection +--- + arch/mips/Kconfig | 1 - + arch/mips/bcm63xx/Kconfig | 8 ++++++++ + 2 files changed, 8 insertions(+), 1 deletion(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -131,7 +131,6 @@ config BCM63XX + select IRQ_CPU + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_BMIPS +- select SYS_HAS_CPU_BMIPS4350 if !BCM63XX_CPU_6338 && !BCM63XX_CPU_6345 && !BCM63XX_CPU_6348 + select NR_CPUS_DEFAULT_2 + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_BIG_ENDIAN +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -3,33 +3,41 @@ menu "CPU support" + + config BCM63XX_CPU_3368 + bool "support 3368 CPU" ++ select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + + config BCM63XX_CPU_6328 + bool "support 6328 CPU" ++ select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" ++ select SYS_HAS_CPU_BMIPS3300 + select HW_HAS_PCI + + config BCM63XX_CPU_6345 + bool "support 6345 CPU" ++ select SYS_HAS_CPU_BMIPS3300 + + config BCM63XX_CPU_6348 + bool "support 6348 CPU" ++ select SYS_HAS_CPU_BMIPS3300 + select HW_HAS_PCI + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" ++ select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" ++ select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" ++ select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + endmenu + diff --git a/target/linux/brcm63xx/patches-3.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch deleted file mode 100644 index 621e1f909d..0000000000 --- a/target/linux/brcm63xx/patches-3.9/106-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:25 +0100 -Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board - enables it - -BCM63XX-based boards can control the registration of the OHCI controller -by setting their has_ohci0 flag to 1. Handle this in the generic -code dealing with board registration and call the actual helper to -register the OHCI controller. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c -+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - -@@ -897,6 +898,9 @@ int __init board_register_devices(void) - if (board.has_usbd) - bcm63xx_usbd_register(&board.usbd); - -+ if (board.has_ohci0) -+ bcm63xx_ohci_register(); -+ - if (board.has_dsp) - bcm63xx_dsp_register(&board.dsp); - diff --git a/target/linux/brcm63xx/patches-3.9/106-MIPS-bmips-add-a-helper-function-for-registering-smp.patch b/target/linux/brcm63xx/patches-3.9/106-MIPS-bmips-add-a-helper-function-for-registering-smp.patch new file mode 100644 index 0000000000..ad357b6ab2 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/106-MIPS-bmips-add-a-helper-function-for-registering-smp.patch @@ -0,0 +1,42 @@ +From aa15ac91faccc3bf01a29670b1f9ae1945cea056 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 23 Jun 2013 14:04:51 +0200 +Subject: [PATCH 07/10] MIPS: bmips: add a helper function for registering smp + ops + +Add a helper similar to the generic register_XXX_smp_ops() for bmips. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/bmips.h | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/arch/mips/include/asm/bmips.h ++++ b/arch/mips/include/asm/bmips.h +@@ -47,6 +47,7 @@ + #include + #include + #include ++#include + + #define cpu_is_bmips32() (current_cpu_type() == CPU_BMIPS32) + #define cpu_is_bmips3300() (IS_ENABLED(CONFIG_CPU_BMIPS3300) && \ +@@ -59,6 +60,18 @@ + current_cpu_type() == CPU_BMIPS5000) + + extern struct plat_smp_ops bmips_smp_ops; ++ ++static inline int register_bmips_smp_ops(void) ++{ ++#ifdef CONFIG_CPU_BMIPS ++ register_smp_ops(&bmips_smp_ops); ++ ++ return 0; ++#else ++ return -ENODEV; ++#endif ++} ++ + extern char bmips_reset_nmi_vec; + extern char bmips_reset_nmi_vec_end; + extern char bmips_smp_movevec; diff --git a/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-always-register-bmips-smp-ops.patch b/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-always-register-bmips-smp-ops.patch new file mode 100644 index 0000000000..1ea52c478c --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-always-register-bmips-smp-ops.patch @@ -0,0 +1,26 @@ +From c489eace9492d1b8bedb314bdef169e719161bff Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 28 Jun 2013 00:08:16 +0200 +Subject: [PATCH 08/10] MIPS: BCM63XX: always register bmips smp ops + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/prom.c | 6 +++--- + 1 file changed, 3 insertions(+), 3 deletions(-) + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -59,10 +59,10 @@ void __init prom_init(void) + /* do low level board init */ + board_prom_init(); + +- if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) { +- /* set up SMP */ +- register_smp_ops(&bmips_smp_ops); ++ /* set up SMP */ ++ register_bmips_smp_ops(); + ++ if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) { + /* + * BCM6328 might not have its second CPU enabled, while BCM6358 + * needs special handling for its shared TLB, so disable SMP diff --git a/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch deleted file mode 100644 index a76252ed5c..0000000000 --- a/target/linux/brcm63xx/patches-3.9/107-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:26 +0100 -Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration - symbol - -This configuration symbol can be used by CPUs supporting the on-chip -EHCI controller, and ensures that all relevant EHCI-related -configuration options are selected. So far BCM6328, BCM6358 and BCM6368 -have an EHCI controller and do select this symbol. Update -drivers/usb/host/Kconfig with BCM63XX to update direct unmet -dependencies. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/Kconfig | 9 +++++++++ - drivers/usb/host/Kconfig | 5 +++-- - 2 files changed, 12 insertions(+), 2 deletions(-) - ---- a/arch/mips/bcm63xx/Kconfig -+++ b/arch/mips/bcm63xx/Kconfig -@@ -11,10 +11,17 @@ config BCM63XX_OHCI - select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD - select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD - -+config BCM63XX_EHCI -+ bool -+ select USB_ARCH_HAS_EHCI -+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD -+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD -+ - config BCM63XX_CPU_6328 - bool "support 6328 CPU" - select HW_HAS_PCI - select BCM63XX_OHCI -+ select BCM63XX_EHCI - - config BCM63XX_CPU_6338 - bool "support 6338 CPU" -@@ -32,16 +39,19 @@ config BCM63XX_CPU_6358 - bool "support 6358 CPU" - select HW_HAS_PCI - select BCM63XX_OHCI -+ select BCM63XX_EHCI - - config BCM63XX_CPU_6362 - bool "support 6362 CPU" - select HW_HAS_PCI - select BCM63XX_OHCI -+ select BCM63XX_EHCI - - config BCM63XX_CPU_6368 - bool "support 6368 CPU" - select HW_HAS_PCI - select BCM63XX_OHCI -+ select BCM63XX_EHCI - endmenu - - source "arch/mips/bcm63xx/boards/Kconfig" ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -115,14 +115,15 @@ config USB_EHCI_BIG_ENDIAN_MMIO - depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \ - ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ - PPC_MPC512x || CPU_CAVIUM_OCTEON || \ -- PMC_MSP || SPARC_LEON || MIPS_SEAD3) -+ PMC_MSP || SPARC_LEON || MIPS_SEAD3 || \ -+ BCM63XX) - default y - - config USB_EHCI_BIG_ENDIAN_DESC - bool - depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ - PPC_MPC512x || PMC_MSP || SPARC_LEON || \ -- MIPS_SEAD3) -+ MIPS_SEAD3 || BCM63XX) - default y - - config XPS_USB_HCD_XILINX diff --git a/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch deleted file mode 100644 index ef4ba17a4d..0000000000 --- a/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch +++ /dev/null @@ -1,136 +0,0 @@ -From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:27 +0100 -Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI - controller - -Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be -driven by the generic ehci-platform driver by using specific power -on/off/suspend callbacks to manage clocks and hardware specific -configuration. - -Signed-off-by: Maxime Bizon -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/Makefile | 2 +- - arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++ - .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++ - 3 files changed, 99 insertions(+), 1 deletion(-) - create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h - ---- a/arch/mips/bcm63xx/Makefile -+++ b/arch/mips/bcm63xx/Makefile -@@ -1,7 +1,7 @@ - obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ - setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ - dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ -- dev-usb-ohci.o dev-usb-usbd.o usb-common.o -+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - - obj-y += boards/ ---- /dev/null -+++ b/arch/mips/bcm63xx/dev-usb-ehci.c -@@ -0,0 +1,92 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2008 Maxime Bizon -+ * Copyright (C) 2013 Florian Fainelli -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+ -+static struct resource ehci_resources[] = { -+ { -+ .start = -1, /* filled at runtime */ -+ .end = -1, /* filled at runtime */ -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .start = -1, /* filled at runtime */ -+ .flags = IORESOURCE_IRQ, -+ }, -+}; -+ -+static u64 ehci_dmamask = DMA_BIT_MASK(32); -+ -+static struct clk *usb_host_clock; -+ -+static int bcm63xx_ehci_power_on(struct platform_device *pdev) -+{ -+ usb_host_clock = clk_get(&pdev->dev, "usbh"); -+ if (IS_ERR_OR_NULL(usb_host_clock)) -+ return -ENODEV; -+ -+ clk_prepare_enable(usb_host_clock); -+ -+ bcm63xx_usb_priv_ehci_cfg_set(); -+ -+ return 0; -+} -+ -+static void bcm63xx_ehci_power_off(struct platform_device *pdev) -+{ -+ if (!IS_ERR_OR_NULL(usb_host_clock)) { -+ clk_disable_unprepare(usb_host_clock); -+ clk_put(usb_host_clock); -+ } -+} -+ -+static struct usb_ehci_pdata bcm63xx_ehci_pdata = { -+ .big_endian_desc = 1, -+ .big_endian_mmio = 1, -+ .power_on = bcm63xx_ehci_power_on, -+ .power_off = bcm63xx_ehci_power_off, -+ .power_suspend = bcm63xx_ehci_power_off, -+}; -+ -+static struct platform_device bcm63xx_ehci_device = { -+ .name = "ehci-platform", -+ .id = -1, -+ .num_resources = ARRAY_SIZE(ehci_resources), -+ .resource = ehci_resources, -+ .dev = { -+ .platform_data = &bcm63xx_ehci_pdata, -+ .dma_mask = &ehci_dmamask, -+ .coherent_dma_mask = DMA_BIT_MASK(32), -+ }, -+}; -+ -+int __init bcm63xx_ehci_register(void) -+{ -+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) -+ return 0; -+ -+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); -+ ehci_resources[0].end = ehci_resources[0].start; -+ ehci_resources[0].end += RSET_EHCI_SIZE - 1; -+ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); -+ -+ return platform_device_register(&bcm63xx_ehci_device); -+} ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h -@@ -0,0 +1,6 @@ -+#ifndef BCM63XX_DEV_USB_EHCI_H_ -+#define BCM63XX_DEV_USB_EHCI_H_ -+ -+int bcm63xx_ehci_register(void); -+ -+#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-change-the-guard-to-a-BMIPS4350-check.patch b/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-change-the-guard-to-a-BMIPS4350-check.patch new file mode 100644 index 0000000000..75729858eb --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/108-MIPS-BCM63XX-change-the-guard-to-a-BMIPS4350-check.patch @@ -0,0 +1,21 @@ +From 3a862fd3cc4f477ad2232370abfceca1ec2145ae Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 28 Jun 2013 00:10:07 +0200 +Subject: [PATCH 09/10] MIPS: BCM63XX: change the guard to a BMIPS4350 check + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/prom.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -62,7 +62,7 @@ void __init prom_init(void) + /* set up SMP */ + register_bmips_smp_ops(); + +- if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) { ++ if (cpu_is_bmips4350()) { + /* + * BCM6328 might not have its second CPU enabled, while BCM6358 + * needs special handling for its shared TLB, so disable SMP diff --git a/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch b/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch new file mode 100644 index 0000000000..dbb2ae4e34 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-disable-SMP-also-on-BCM3368.patch @@ -0,0 +1,36 @@ +From 32d4b03c0aedb96022e86a67a560f6eaf488200a Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 28 Jun 2013 00:25:13 +0200 +Subject: [PATCH 10/10] MIPS: BCM63XX: disable SMP also on BCM3368 + +BCM3368 has the same shared TLB as BCM6358. + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/prom.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/arch/mips/bcm63xx/prom.c ++++ b/arch/mips/bcm63xx/prom.c +@@ -64,9 +64,9 @@ void __init prom_init(void) + + if (cpu_is_bmips4350()) { + /* +- * BCM6328 might not have its second CPU enabled, while BCM6358 +- * needs special handling for its shared TLB, so disable SMP +- * for now. ++ * BCM6328 might not have its second CPU enabled, while BCM3368 ++ * and BCM6358 need special handling for their shared TLB, so ++ * disable SMP for now. + */ + if (BCMCPU_IS_6328()) { + reg = bcm_readl(BCM_6328_OTP_BASE + +@@ -74,7 +74,7 @@ void __init prom_init(void) + + if (reg & OTP_6328_REG3_TP1_DISABLED) + bmips_smp_enabled = 0; +- } else if (BCMCPU_IS_6358()) { ++ } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) { + bmips_smp_enabled = 0; + } + diff --git a/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch deleted file mode 100644 index 3d1e7f58cc..0000000000 --- a/target/linux/brcm63xx/patches-3.9/109-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch +++ /dev/null @@ -1,36 +0,0 @@ -From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:28 +0100 -Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board - enables it - -BCM63XX-based board can control the registration of the EHCI controller -by setting their has_ehci0 flag to 1. Handle this in the generic -code dealing with board registration and call the actual helper to register -the EHCI controller. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c -+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -25,6 +25,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -898,6 +899,9 @@ int __init board_register_devices(void) - if (board.has_usbd) - bcm63xx_usbd_register(&board.usbd); - -+ if (board.has_ehci0) -+ bcm63xx_ehci_register(); -+ - if (board.has_ohci0) - bcm63xx_ohci_register(); - diff --git a/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch deleted file mode 100644 index 6d91129932..0000000000 --- a/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001 -From: Florian Fainelli -Date: Mon, 28 Jan 2013 20:06:30 +0100 -Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support - overcurrent - -This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it -does not support proper overcurrent reporting. - -Signed-off-by: Florian Fainelli ---- - arch/mips/bcm63xx/dev-usb-ehci.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/arch/mips/bcm63xx/dev-usb-ehci.c -+++ b/arch/mips/bcm63xx/dev-usb-ehci.c -@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc - static struct usb_ehci_pdata bcm63xx_ehci_pdata = { - .big_endian_desc = 1, - .big_endian_mmio = 1, -+ .ignore_oc = 1, - .power_on = bcm63xx_ehci_power_on, - .power_off = bcm63xx_ehci_power_off, - .power_suspend = bcm63xx_ehci_power_off, diff --git a/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch b/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch new file mode 100644 index 0000000000..63d385be4e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/110-MIPS-BCM63XX-add-USB-host-clock-enable-delay.patch @@ -0,0 +1,28 @@ +From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:19 +0100 +Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay + +Knowledge of the clock setup delay should remain at the clock level (so +it can be clock specific and CPU specific). Add the 100 milliseconds +required clock delay for the USB host clock when it gets enabled. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -177,6 +177,11 @@ static void usbh_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBH_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBH_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ msleep(100); + } + + static struct clk clk_usbh = { diff --git a/target/linux/brcm63xx/patches-3.9/111-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch b/target/linux/brcm63xx/patches-3.9/111-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch new file mode 100644 index 0000000000..eaf75030f0 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/111-MIPS-BCM63XX-add-USB-device-clock-enable-delay-to-cl.patch @@ -0,0 +1,41 @@ +From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:20 +0100 +Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to + clock code + +This patch adds the required 10 micro seconds delay to the USB device +clock enable operation. Put this where the correct clock knowledege is, +which is in the clock code, and remove this delay from the bcm63xx_udc +gadget driver where it was before. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/clk.c | 5 +++++ + drivers/usb/gadget/bcm63xx_udc.c | 1 - + 2 files changed, 5 insertions(+), 1 deletion(-) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -199,6 +199,11 @@ static void usbd_set(struct clk *clk, in + bcm_hwclock_set(CKCTL_6362_USBD_EN, enable); + else if (BCMCPU_IS_6368()) + bcm_hwclock_set(CKCTL_6368_USBD_EN, enable); ++ else ++ return; ++ ++ if (enable) ++ udelay(10); + } + + static struct clk clk_usbd = { +--- a/drivers/usb/gadget/bcm63xx_udc.c ++++ b/drivers/usb/gadget/bcm63xx_udc.c +@@ -386,7 +386,6 @@ static inline void set_clocks(struct bcm + if (is_enabled) { + clk_enable(udc->usbh_clk); + clk_enable(udc->usbd_clk); +- udelay(10); + } else { + clk_disable(udc->usbd_clk); + clk_disable(udc->usbh_clk); diff --git a/target/linux/brcm63xx/patches-3.9/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch b/target/linux/brcm63xx/patches-3.9/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch new file mode 100644 index 0000000000..4d00f0e763 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/112-MIPS-BCM63XX-move-code-touching-the-USB-private-regi.patch @@ -0,0 +1,151 @@ +From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:21 +0100 +Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private + register + +This patch moves the code touching the USB private register in the +bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in +preparation for adding support for OHCI and EHCI host controllers which +will also touch the USB private register. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++ + drivers/usb/gadget/bcm63xx_udc.c | 27 ++-------- + 4 files changed, 67 insertions(+), 24 deletions(-) + create mode 100644 arch/mips/bcm63xx/usb-common.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ +- dev-usb-usbd.o ++ dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -0,0 +1,53 @@ ++/* ++ * Broadcom BCM63xx common USB device configuration code ++ * ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2012 Kevin Cernekee ++ * Copyright (C) 2012 Broadcom Corporation ++ * ++ */ ++#include ++ ++#include ++#include ++#include ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_device) { ++ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } else { ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ } ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ if (is_device) ++ val |= USBH_PRIV_SWAP_USBD_MASK; ++ else ++ val &= ~USBH_PRIV_SWAP_USBD_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); ++ ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) ++{ ++ u32 val; ++ ++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); ++ if (is_on) ++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ else ++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); ++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++} ++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -0,0 +1,9 @@ ++#ifndef BCM63XX_USB_PRIV_H_ ++#define BCM63XX_USB_PRIV_H_ ++ ++#include ++ ++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); ++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++ ++#endif /* BCM63XX_USB_PRIV_H_ */ +--- a/drivers/usb/gadget/bcm63xx_udc.c ++++ b/drivers/usb/gadget/bcm63xx_udc.c +@@ -41,6 +41,7 @@ + #include + #include + #include ++#include + + #define DRV_MODULE_NAME "bcm63xx_udc" + +@@ -863,22 +864,7 @@ static void bcm63xx_select_phy_mode(stru + bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG); + } + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_device) { +- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } else { +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT); +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- } +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); +- +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); +- if (is_device) +- val |= USBH_PRIV_SWAP_USBD_MASK; +- else +- val &= ~USBH_PRIV_SWAP_USBD_MASK; +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ bcm63xx_usb_priv_select_phy_mode(portmask, is_device); + } + + /** +@@ -892,14 +878,9 @@ static void bcm63xx_select_phy_mode(stru + */ + static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on) + { +- u32 val, portmask = BIT(udc->pd->port_no); ++ u32 portmask = BIT(udc->pd->port_no); + +- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); +- if (is_on) +- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- else +- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); +- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ bcm63xx_usb_priv_select_pullup(portmask, is_on); + } + + /** diff --git a/target/linux/brcm63xx/patches-3.9/113-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch b/target/linux/brcm63xx/patches-3.9/113-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch new file mode 100644 index 0000000000..40bbe083a7 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/113-MIPS-BCM63XX-add-OHCI-EHCI-configuration-bits-to-com.patch @@ -0,0 +1,169 @@ +From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:22 +0100 +Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to + common USB code + +This patch updates the common USB code touching the USB private +registers with the specific bits to properly enable OHCI and EHCI +controllers on BCM63xx SoCs. As a result we now need to protect access +to Read Modify Write sequences using a spinlock because we cannot +guarantee that any of the exposed helper will not be called +concurrently. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 + + 2 files changed, 99 insertions(+) + +--- a/arch/mips/bcm63xx/usb-common.c ++++ b/arch/mips/bcm63xx/usb-common.c +@@ -5,10 +5,12 @@ + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * ++ * Copyright (C) 2008 Maxime Bizon + * Copyright (C) 2012 Kevin Cernekee + * Copyright (C) 2012 Broadcom Corporation + * + */ ++#include + #include + + #include +@@ -16,9 +18,14 @@ + #include + #include + ++static DEFINE_SPINLOCK(usb_priv_reg_lock); ++ + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_device) { +@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3 + else + val &= ~USBH_PRIV_SWAP_USBD_MASK; + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode); + + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on) + { + u32 val; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); + + val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG); + if (is_on) +@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32 + else + val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT); + bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG); ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); + } + EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup); ++ ++/* The following array represents the meaning of the DESC/DATA ++ * endian swapping with respect to the CPU configured endianness ++ * ++ * DATA ENDN mmio descriptor ++ * 0 0 BE invalid ++ * 0 1 BE LE ++ * 1 0 BE BE ++ * 1 1 BE invalid ++ * ++ * Since BCM63XX SoCs are configured to be in big-endian mode ++ * we want configuration at line 3. ++ */ ++void bcm63xx_usb_priv_ohci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6348()) ++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); ++ else if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} ++ ++void bcm63xx_usb_priv_ehci_cfg_set(void) ++{ ++ u32 reg; ++ unsigned long flags; ++ ++ spin_lock_irqsave(&usb_priv_reg_lock, flags); ++ ++ if (BCMCPU_IS_6358()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG); ++ ++ /* ++ * The magic value comes for the original vendor BSP ++ * and is needed for USB to work. Datasheet does not ++ * help, so the magic value is used as-is. ++ */ ++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, ++ USBH_PRIV_TEST_6358_REG); ++ ++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) { ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG); ++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK; ++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG); ++ ++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG); ++ reg |= USBH_PRIV_SETUP_IOC_MASK; ++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG); ++ } ++ ++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags); ++} +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h +@@ -5,5 +5,7 @@ + + void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device); + void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on); ++void bcm63xx_usb_priv_ohci_cfg_set(void); ++void bcm63xx_usb_priv_ehci_cfg_set(void); + + #endif /* BCM63XX_USB_PRIV_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/114-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.9/114-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch new file mode 100644 index 0000000000..03fa41c410 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/114-MIPS-BCM63XX-introduce-BCM63XX_OHCI-configuration-sy.patch @@ -0,0 +1,62 @@ +From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:23 +0100 +Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +OHCI controller, and ensures that all relevant OHCI-related +configuration options are correctly selected. So far, OHCI support is +available for the 6328, 6348, 6358 and 6358 SoCs. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 15 ++++++++++----- + 1 file changed, 10 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -6,10 +6,17 @@ config BCM63XX_CPU_3368 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + ++config BCM63XX_OHCI ++ bool ++ select USB_ARCH_HAS_OHCI ++ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD ++ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -24,21 +31,25 @@ config BCM63XX_CPU_6348 + bool "support 6348 CPU" + select SYS_HAS_CPU_BMIPS3300 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6358 + bool "support 6358 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI ++ select BCM63XX_OHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/patches-3.9/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch b/target/linux/brcm63xx/patches-3.9/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch new file mode 100644 index 0000000000..732fe94cfd --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/115-MIPS-BCM63XX-add-support-for-the-on-chip-OHCI-contro.patch @@ -0,0 +1,138 @@ +From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:24 +0100 +Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI + controller + +Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be +driven by the ohci-platform generic driver by using specific power +on/off/suspend callback to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++ + 3 files changed, 101 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ +- dev-usb-usbd.o usb-common.o ++ dev-usb-ohci.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ohci.c +@@ -0,0 +1,94 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ohci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ohci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ohci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ohci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ohci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ohci_pdata bcm63xx_ohci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .no_big_frame_no = 1, ++ .num_ports = 1, ++ .power_on = bcm63xx_ohci_power_on, ++ .power_off = bcm63xx_ohci_power_off, ++ .power_suspend = bcm63xx_ohci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ohci_device = { ++ .name = "ohci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ohci_resources), ++ .resource = ohci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ohci_pdata, ++ .dma_mask = &ohci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ohci_register(void) ++{ ++ if (BCMCPU_IS_6345() || BCMCPU_IS_6338()) ++ return -ENODEV; ++ ++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); ++ ohci_resources[0].end = ohci_resources[0].start; ++ ohci_resources[0].end += RSET_OHCI_SIZE - 1; ++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); ++ ++ return platform_device_register(&bcm63xx_ohci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_OHCI_H_ ++#define BCM63XX_DEV_USB_OHCI_H_ ++ ++int bcm63xx_ohci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.9/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch new file mode 100644 index 0000000000..621e1f909d --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/116-MIPS-BCM63XX-register-OHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:25 +0100 +Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board + enables it + +BCM63XX-based boards can control the registration of the OHCI controller +by setting their has_ohci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to +register the OHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -897,6 +898,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ohci0) ++ bcm63xx_ohci_register(); ++ + if (board.has_dsp) + bcm63xx_dsp_register(&board.dsp); + diff --git a/target/linux/brcm63xx/patches-3.9/117-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch b/target/linux/brcm63xx/patches-3.9/117-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch new file mode 100644 index 0000000000..97b8d6518a --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/117-MIPS-BCM63XX-introduce-BCM63XX_EHCI-configuration-sy.patch @@ -0,0 +1,82 @@ +From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:26 +0100 +Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration + symbol + +This configuration symbol can be used by CPUs supporting the on-chip +EHCI controller, and ensures that all relevant EHCI-related +configuration options are selected. So far BCM6328, BCM6358 and BCM6368 +have an EHCI controller and do select this symbol. Update +drivers/usb/host/Kconfig with BCM63XX to update direct unmet +dependencies. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Kconfig | 9 +++++++++ + drivers/usb/host/Kconfig | 5 +++-- + 2 files changed, 12 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/Kconfig ++++ b/arch/mips/bcm63xx/Kconfig +@@ -12,11 +12,18 @@ config BCM63XX_OHCI + select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD + select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD + ++config BCM63XX_EHCI ++ bool ++ select USB_ARCH_HAS_EHCI ++ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD ++ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD ++ + config BCM63XX_CPU_6328 + bool "support 6328 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6338 + bool "support 6338 CPU" +@@ -38,18 +45,21 @@ config BCM63XX_CPU_6358 + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6362 + bool "support 6362 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + + config BCM63XX_CPU_6368 + bool "support 6368 CPU" + select SYS_HAS_CPU_BMIPS4350 + select HW_HAS_PCI + select BCM63XX_OHCI ++ select BCM63XX_EHCI + endmenu + + source "arch/mips/bcm63xx/boards/Kconfig" +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -115,14 +115,15 @@ config USB_EHCI_BIG_ENDIAN_MMIO + depends on USB_EHCI_HCD && (PPC_CELLEB || PPC_PS3 || 440EPX || \ + ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ + PPC_MPC512x || CPU_CAVIUM_OCTEON || \ +- PMC_MSP || SPARC_LEON || MIPS_SEAD3) ++ PMC_MSP || SPARC_LEON || MIPS_SEAD3 || \ ++ BCM63XX) + default y + + config USB_EHCI_BIG_ENDIAN_DESC + bool + depends on USB_EHCI_HCD && (440EPX || ARCH_IXP4XX || XPS_USB_HCD_XILINX || \ + PPC_MPC512x || PMC_MSP || SPARC_LEON || \ +- MIPS_SEAD3) ++ MIPS_SEAD3 || BCM63XX) + default y + + config XPS_USB_HCD_XILINX diff --git a/target/linux/brcm63xx/patches-3.9/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch b/target/linux/brcm63xx/patches-3.9/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch new file mode 100644 index 0000000000..ef4ba17a4d --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/118-MIPS-BCM63XX-add-support-for-the-on-chip-EHCI-contro.patch @@ -0,0 +1,136 @@ +From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:27 +0100 +Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI + controller + +Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be +driven by the generic ehci-platform driver by using specific power +on/off/suspend callbacks to manage clocks and hardware specific +configuration. + +Signed-off-by: Maxime Bizon +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/Makefile | 2 +- + arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++ + .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++ + 3 files changed, 99 insertions(+), 1 deletion(-) + create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,7 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \ + setup.o timer.o dev-dsp.o dev-enet.o dev-flash.o \ + dev-pcmcia.o dev-rng.o dev-spi.o dev-uart.o dev-wdt.o \ +- dev-usb-ohci.o dev-usb-usbd.o usb-common.o ++ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -0,0 +1,92 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2008 Maxime Bizon ++ * Copyright (C) 2013 Florian Fainelli ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++ ++static struct resource ehci_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static u64 ehci_dmamask = DMA_BIT_MASK(32); ++ ++static struct clk *usb_host_clock; ++ ++static int bcm63xx_ehci_power_on(struct platform_device *pdev) ++{ ++ usb_host_clock = clk_get(&pdev->dev, "usbh"); ++ if (IS_ERR_OR_NULL(usb_host_clock)) ++ return -ENODEV; ++ ++ clk_prepare_enable(usb_host_clock); ++ ++ bcm63xx_usb_priv_ehci_cfg_set(); ++ ++ return 0; ++} ++ ++static void bcm63xx_ehci_power_off(struct platform_device *pdev) ++{ ++ if (!IS_ERR_OR_NULL(usb_host_clock)) { ++ clk_disable_unprepare(usb_host_clock); ++ clk_put(usb_host_clock); ++ } ++} ++ ++static struct usb_ehci_pdata bcm63xx_ehci_pdata = { ++ .big_endian_desc = 1, ++ .big_endian_mmio = 1, ++ .power_on = bcm63xx_ehci_power_on, ++ .power_off = bcm63xx_ehci_power_off, ++ .power_suspend = bcm63xx_ehci_power_off, ++}; ++ ++static struct platform_device bcm63xx_ehci_device = { ++ .name = "ehci-platform", ++ .id = -1, ++ .num_resources = ARRAY_SIZE(ehci_resources), ++ .resource = ehci_resources, ++ .dev = { ++ .platform_data = &bcm63xx_ehci_pdata, ++ .dma_mask = &ehci_dmamask, ++ .coherent_dma_mask = DMA_BIT_MASK(32), ++ }, ++}; ++ ++int __init bcm63xx_ehci_register(void) ++{ ++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368()) ++ return 0; ++ ++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); ++ ehci_resources[0].end = ehci_resources[0].start; ++ ehci_resources[0].end += RSET_EHCI_SIZE - 1; ++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); ++ ++ return platform_device_register(&bcm63xx_ehci_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +@@ -0,0 +1,6 @@ ++#ifndef BCM63XX_DEV_USB_EHCI_H_ ++#define BCM63XX_DEV_USB_EHCI_H_ ++ ++int bcm63xx_ehci_register(void); ++ ++#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/patches-3.9/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch b/target/linux/brcm63xx/patches-3.9/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch new file mode 100644 index 0000000000..3d1e7f58cc --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/119-MIPS-BCM63XX-register-EHCI-controller-if-board-enabl.patch @@ -0,0 +1,36 @@ +From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:28 +0100 +Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board + enables it + +BCM63XX-based board can control the registration of the EHCI controller +by setting their has_ehci0 flag to 1. Handle this in the generic +code dealing with board registration and call the actual helper to register +the EHCI controller. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -898,6 +899,9 @@ int __init board_register_devices(void) + if (board.has_usbd) + bcm63xx_usbd_register(&board.usbd); + ++ if (board.has_ehci0) ++ bcm63xx_ehci_register(); ++ + if (board.has_ohci0) + bcm63xx_ohci_register(); + diff --git a/target/linux/brcm63xx/patches-3.9/120-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch b/target/linux/brcm63xx/patches-3.9/120-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch new file mode 100644 index 0000000000..6d91129932 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.9/120-MIPS-BCM63XX-EHCI-controller-does-not-support-overcu.patch @@ -0,0 +1,24 @@ +From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001 +From: Florian Fainelli +Date: Mon, 28 Jan 2013 20:06:30 +0100 +Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support + overcurrent + +This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it +does not support proper overcurrent reporting. + +Signed-off-by: Florian Fainelli +--- + arch/mips/bcm63xx/dev-usb-ehci.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/mips/bcm63xx/dev-usb-ehci.c ++++ b/arch/mips/bcm63xx/dev-usb-ehci.c +@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc + static struct usb_ehci_pdata bcm63xx_ehci_pdata = { + .big_endian_desc = 1, + .big_endian_mmio = 1, ++ .ignore_oc = 1, + .power_on = bcm63xx_ehci_power_on, + .power_off = bcm63xx_ehci_power_off, + .power_suspend = bcm63xx_ehci_power_off,