From: Jonas Gorski Date: Sun, 27 May 2012 13:22:33 +0000 (+0000) Subject: bcm63xx: add support for the HSSPI controller X-Git-Tag: reboot~13817 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=e34018cc9e825ba01de83117b7cac85b6f0f0a33;p=openwrt%2Fstaging%2Fjogo.git bcm63xx: add support for the HSSPI controller Add support for the HSSPI controller found on bcm6328 and SPI attached flash. SVN-Revision: 31879 --- diff --git a/target/linux/brcm63xx/config-3.3 b/target/linux/brcm63xx/config-3.3 index c3e224d213..0de9fcdc09 100644 --- a/target/linux/brcm63xx/config-3.3 +++ b/target/linux/brcm63xx/config-3.3 @@ -126,6 +126,7 @@ CONFIG_SERIAL_BCM63XX=y CONFIG_SERIAL_BCM63XX_CONSOLE=y CONFIG_SPI=y # CONFIG_SPI_BCM63XX is not set +# CONFIG_SPI_BCM63XX_HSSPI is not set CONFIG_SPI_BITBANG=y CONFIG_SPI_GPIO=y CONFIG_SPI_MASTER=y diff --git a/target/linux/brcm63xx/patches-3.3/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch b/target/linux/brcm63xx/patches-3.3/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch new file mode 100644 index 0000000000..00dc9c90ee --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/201-SPI-Allow-specifying-the-parsers-for-SPI-flash.patch @@ -0,0 +1,38 @@ +From 3f650fc30aa0badf9d02842ce396cea3eef2eeaa Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Fri, 1 Jul 2011 23:16:47 +0200 +Subject: [PATCH 49/79] SPI: Allow specifying the parsers for SPI flash + +Signed-off-by: Jonas Gorski +--- + include/linux/spi/flash.h | 5 ++++- + 1 file changed, 4 insertions(+), 1 deletion(-) + +--- a/include/linux/spi/flash.h ++++ b/include/linux/spi/flash.h +@@ -2,7 +2,7 @@ + #define LINUX_SPI_FLASH_H + + struct mtd_partition; +- ++struct mtd_part_parser_data; + /** + * struct flash_platform_data: board-specific flash data + * @name: optional flash device name (eg, as used with mtdparts=) +@@ -10,6 +10,8 @@ struct mtd_partition; + * @nr_parts: number of mtd_partitions for static partitoning + * @type: optional flash device type (e.g. m25p80 vs m25p64), for use + * with chips that can't be queried for JEDEC or other IDs ++ * @part_probe_types: optional list of MTD parser names to use for ++ * partitioning + * + * Board init code (in arch/.../mach-xxx/board-yyy.c files) can + * provide information about SPI flash parts (such as DataFlash) to +@@ -25,6 +27,7 @@ struct flash_platform_data { + + char *type; + ++ const char **part_probe_types; + /* we'll likely add more ... use JEDEC IDs, etc */ + }; + diff --git a/target/linux/brcm63xx/patches-3.3/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch b/target/linux/brcm63xx/patches-3.3/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch new file mode 100644 index 0000000000..c8959ccaa6 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/202-MTD-DEVICES-m25p80-use-parsers-if-provided-in-flash-.patch @@ -0,0 +1,23 @@ +From c7c3c338cb25d7f55ddb3f6bfbf3572758ca3896 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 10 Nov 2011 16:53:08 +0100 +Subject: [PATCH 50/79] MTD: DEVICES: m25p80: use parsers if provided in flash + platform data + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/devices/m25p80.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -985,7 +985,8 @@ static int __devinit m25p_probe(struct s + /* partitions should match sector boundaries; and it may be good to + * use readonly partitions for writeprotected sectors (BP2..BP0). + */ +- return mtd_device_parse_register(&flash->mtd, NULL, &ppdata, ++ return mtd_device_parse_register(&flash->mtd, ++ data ? data->part_probe_types : NULL, &ppdata, + data ? data->parts : NULL, + data ? data->nr_parts : 0); + } diff --git a/target/linux/brcm63xx/patches-3.3/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch b/target/linux/brcm63xx/patches-3.3/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch new file mode 100644 index 0000000000..dcb881068e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/203-MTD-DEVICES-m25p80-add-support-for-limiting-reads.patch @@ -0,0 +1,92 @@ +From 5fb4e8d7287ac8fcb33aae8b1e9e22c5a3c392bd Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Thu, 10 Nov 2011 17:33:40 +0100 +Subject: [PATCH 51/79] MTD: DEVICES: m25p80: add support for limiting reads + +Signed-off-by: Jonas Gorski +--- + drivers/mtd/devices/m25p80.c | 29 +++++++++++++++++++++++++++-- + include/linux/spi/flash.h | 4 ++++ + 2 files changed, 31 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/devices/m25p80.c ++++ b/drivers/mtd/devices/m25p80.c +@@ -100,6 +100,7 @@ struct m25p { + u16 addr_width; + u8 erase_opcode; + u8 *command; ++ int max_transfer_len; + }; + + static inline struct m25p *mtd_to_m25p(struct mtd_info *mtd) +@@ -346,10 +347,9 @@ static int m25p80_erase(struct mtd_info + * Read an address range from the flash chip. The address range + * may be any size provided it is within the physical boundaries. + */ +-static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, ++static int __m25p80_read(struct m25p *flash, loff_t from, size_t len, + size_t *retlen, u_char *buf) + { +- struct m25p *flash = mtd_to_m25p(mtd); + struct spi_transfer t[2]; + struct spi_message m; + +@@ -408,6 +408,28 @@ static int m25p80_read(struct mtd_info * + return 0; + } + ++static int m25p80_read(struct mtd_info *mtd, loff_t from, size_t len, ++ size_t *retlen, u_char *buf) ++{ ++ struct m25p *flash = mtd_to_m25p(mtd); ++ size_t off; ++ size_t read_len = flash->max_transfer_len; ++ size_t part_len; ++ int ret = 0; ++ ++ if (!read_len) ++ return __m25p80_read(flash, from, len, retlen, buf); ++ ++ *retlen = 0; ++ ++ for (off = 0; off < len && !ret; off += read_len) { ++ ret = __m25p80_read(flash, from + off, min(len - off, read_len), ++ &part_len, buf + off); ++ *retlen += part_len; ++ } ++ ++ return ret; ++} + /* + * Write an address range to the flash chip. Data must be written in + * FLASH_PAGESIZE chunks. The address range may be any size provided +@@ -896,6 +918,9 @@ static int __devinit m25p_probe(struct s + return -ENOMEM; + } + ++ if (data) ++ flash->max_transfer_len = data->max_transfer_len; ++ + flash->spi = spi; + mutex_init(&flash->lock); + dev_set_drvdata(&spi->dev, flash); +--- a/include/linux/spi/flash.h ++++ b/include/linux/spi/flash.h +@@ -13,6 +13,8 @@ struct mtd_part_parser_data; + * @part_probe_types: optional list of MTD parser names to use for + * partitioning + * ++ * @max_transfer_len: option maximum read/write length limitation for ++ * SPI controllers not able to transfer any length commands. + * Board init code (in arch/.../mach-xxx/board-yyy.c files) can + * provide information about SPI flash parts (such as DataFlash) to + * help set up the device and its appropriate default partitioning. +@@ -28,6 +30,8 @@ struct flash_platform_data { + char *type; + + const char **part_probe_types; ++ ++ unsigned int max_transfer_len; + /* we'll likely add more ... use JEDEC IDs, etc */ + }; + diff --git a/target/linux/brcm63xx/patches-3.3/318-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch b/target/linux/brcm63xx/patches-3.3/318-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch new file mode 100644 index 0000000000..8a11f8266e --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/318-MIPS-BCM63XX-expose-the-HS-SPI-clock.patch @@ -0,0 +1,48 @@ +From 5aeb6273a610f8aab090b3499827177eb41311ba Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:19:09 +0100 +Subject: [PATCH 53/79] MIPS: BCM63XX: expose the HS SPI clock + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/clk.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/arch/mips/bcm63xx/clk.c ++++ b/arch/mips/bcm63xx/clk.c +@@ -194,6 +194,26 @@ static struct clk clk_spi = { + }; + + /* ++ * SPI clock ++ */ ++static void hsspi_set(struct clk *clk, int enable) ++{ ++ u32 mask; ++ ++ if (BCMCPU_IS_6328()) ++ mask = CKCTL_6328_HSSPI_EN; ++ else ++ return; ++ ++ bcm_hwclock_set(mask, enable); ++} ++ ++static struct clk clk_hsspi = { ++ .set = hsspi_set, ++}; ++ ++ ++/* + * XTM clock + */ + static void xtm_set(struct clk *clk, int enable) +@@ -286,6 +306,8 @@ struct clk *clk_get(struct device *dev, + return &clk_usbh; + if (!strcmp(id, "spi")) + return &clk_spi; ++ if (!strcmp(id, "hsspi")) ++ return &clk_hsspi; + if (!strcmp(id, "xtm")) + return &clk_xtm; + if (!strcmp(id, "periph")) diff --git a/target/linux/brcm63xx/patches-3.3/418-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch b/target/linux/brcm63xx/patches-3.3/418-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch new file mode 100644 index 0000000000..a5b5320363 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/418-MIPS-BCM63XX-add-HS-SPI-platform-device-and-register.patch @@ -0,0 +1,136 @@ +From a2b75f344cdc0f9e12c7909511d95b27be72c6b9 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:18:26 +0100 +Subject: [PATCH 52/79] MIPS: BCM63XX: add HS SPI platform device and register + it + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/Makefile | 5 +- + arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 + + arch/mips/bcm63xx/dev-hsspi.c | 58 ++++++++++++++++++++ + .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 26 +++++++++ + 4 files changed, 89 insertions(+), 2 deletions(-) + create mode 100644 arch/mips/bcm63xx/dev-hsspi.c + create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h + +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,7 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ +- dev-dsp.o dev-enet.o dev-flash.o dev-pcmcia.o dev-spi.o \ +- dev-trng.o dev-uart.o dev-usb-ehci.o dev-usb-ohci.o dev-wdt.o ++ dev-dsp.o dev-enet.o dev-flash.o dev-hsspi.o dev-pcmcia.o \ ++ dev-spi.o dev-trng.o dev-uart.o dev-usb-ehci.o \ ++ dev-usb-ohci.o dev-wdt.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -940,6 +941,7 @@ int __init board_register_devices(void) + pr_err(PFX "failed to register fallback SPROM\n"); + } + #endif ++ bcm63xx_hsspi_register(); + + bcm63xx_spi_register(); + +--- /dev/null ++++ b/arch/mips/bcm63xx/dev-hsspi.c +@@ -0,0 +1,58 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2009 Florian Fainelli ++ * Copyright (C) 2010 Tanguy Bouzeloc ++ */ ++ ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++static struct resource spi_resources[] = { ++ { ++ .start = -1, /* filled at runtime */ ++ .end = -1, /* filled at runtime */ ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = -1, /* filled at runtime */ ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct bcm63xx_hsspi_pdata spi_pdata = { ++ .bus_num = 0, ++}; ++ ++static struct platform_device bcm63xx_hsspi_device = { ++ .name = "bcm63xx-hsspi", ++ .id = 0, ++ .num_resources = ARRAY_SIZE(spi_resources), ++ .resource = spi_resources, ++ .dev = { ++ .platform_data = &spi_pdata, ++ }, ++}; ++ ++int __init bcm63xx_hsspi_register(void) ++{ ++ ++ if (!BCMCPU_IS_6328()) ++ return -ENODEV; ++ ++ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI); ++ spi_resources[0].end = spi_resources[0].start; ++ spi_resources[0].end += RSET_HSSPI_SIZE - 1; ++ spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI); ++ ++ spi_pdata.speed_hz = HSSPI_PLL_HZ_6328; ++ ++ return platform_device_register(&bcm63xx_hsspi_device); ++} +--- /dev/null ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h +@@ -0,0 +1,26 @@ ++#ifndef BCM63XX_DEV_HSSPI_H ++#define BCM63XX_DEV_HSSPI_H ++ ++#include ++#include ++#include ++ ++int __init bcm63xx_hsspi_register(void); ++ ++struct bcm63xx_hsspi_pdata { ++ int bus_num; ++ u32 speed_hz; ++}; ++ ++#define bcm_hsspi_readl(o) bcm_rset_readl(RSET_HSSPI, (o)) ++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o)) ++ ++#define HSSPI_PLL_HZ_6328 133333333 ++ ++#define HSSPI_OP_CODE_SHIFT 13 ++#define HSSPI_OP_SLEEP (0 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_READ_WRITE (1 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT) ++#define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT) ++ ++#endif /* BCM63XX_DEV_HSSPI_H */ diff --git a/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch b/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch new file mode 100644 index 0000000000..94c9eee603 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch @@ -0,0 +1,759 @@ +From 2982127b8a0127667cb5354e03987cd3baa84b8c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sat, 12 Nov 2011 12:19:55 +0100 +Subject: [PATCH 54/79] SPI: MIPS: BCM63XX: Add HS SPI driver + +Add a driver for the High Speed SPI controller found on newer BCM63XX SoCs. + +Signed-off-by: Jonas Gorski +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 + + .../include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h | 3 + + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 47 ++ + drivers/spi/Kconfig | 7 + + drivers/spi/Makefile | 1 + + drivers/spi/spi-bcm63xx-hsspi.c | 502 ++++++++++++++++++++ + 6 files changed, 578 insertions(+) + create mode 100644 drivers/spi/spi-bcm63xx-hsspi.c + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -116,6 +116,7 @@ enum bcm63xx_regs_set { + RSET_UART1, + RSET_GPIO, + RSET_SPI, ++ RSET_HSSPI, + RSET_UDC0, + RSET_OHCI0, + RSET_OHCI_PRIV, +@@ -161,6 +162,7 @@ enum bcm63xx_regs_set { + #define RSET_ENETDMAS_SIZE(chans) (16 * (chans)) + #define RSET_ENETSW_SIZE 65536 + #define RSET_UART_SIZE 24 ++#define RSET_HSSPI_SIZE 2048 + #define RSET_UDC_SIZE 256 + #define RSET_OHCI_SIZE 256 + #define RSET_EHCI_SIZE 256 +@@ -184,6 +186,7 @@ enum bcm63xx_regs_set { + #define BCM_6328_UART1_BASE (0xb0000120) + #define BCM_6328_GPIO_BASE (0xb0000080) + #define BCM_6328_SPI_BASE (0xdeadbeef) ++#define BCM_6328_HSSPI_BASE (0xb0001000) + #define BCM_6328_UDC0_BASE (0xdeadbeef) + #define BCM_6328_USBDMA_BASE (0xdeadbeef) + #define BCM_6328_OHCI0_BASE (0xdeadbeef) +@@ -229,6 +232,7 @@ enum bcm63xx_regs_set { + #define BCM_6338_UART1_BASE (0xdeadbeef) + #define BCM_6338_GPIO_BASE (0xfffe0400) + #define BCM_6338_SPI_BASE (0xfffe0c00) ++#define BCM_6338_HSSPI_BASE (0xdeadbeef) + #define BCM_6338_UDC0_BASE (0xdeadbeef) + #define BCM_6338_USBDMA_BASE (0xfffe2400) + #define BCM_6338_OHCI0_BASE (0xdeadbeef) +@@ -275,6 +279,7 @@ enum bcm63xx_regs_set { + #define BCM_6345_UART1_BASE (0xdeadbeef) + #define BCM_6345_GPIO_BASE (0xfffe0400) + #define BCM_6345_SPI_BASE (0xdeadbeef) ++#define BCM_6345_HSSPI_BASE (0xdeadbeef) + #define BCM_6345_UDC0_BASE (0xdeadbeef) + #define BCM_6345_USBDMA_BASE (0xfffe2800) + #define BCM_6345_ENET0_BASE (0xfffe1800) +@@ -320,6 +325,7 @@ enum bcm63xx_regs_set { + #define BCM_6348_UART1_BASE (0xdeadbeef) + #define BCM_6348_GPIO_BASE (0xfffe0400) + #define BCM_6348_SPI_BASE (0xfffe0c00) ++#define BCM_6348_HSSPI_BASE (0xdeadbeef) + #define BCM_6348_UDC0_BASE (0xfffe1000) + #define BCM_6348_OHCI0_BASE (0xfffe1b00) + #define BCM_6348_OHCI_PRIV_BASE (0xfffe1c00) +@@ -363,6 +369,7 @@ enum bcm63xx_regs_set { + #define BCM_6358_UART1_BASE (0xfffe0120) + #define BCM_6358_GPIO_BASE (0xfffe0080) + #define BCM_6358_SPI_BASE (0xfffe0800) ++#define BCM_6358_HSSPI_BASE (0xdeadbeef) + #define BCM_6358_UDC0_BASE (0xfffe0800) + #define BCM_6358_OHCI0_BASE (0xfffe1400) + #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) +@@ -407,6 +414,7 @@ enum bcm63xx_regs_set { + #define BCM_6368_UART1_BASE (0xb0000120) + #define BCM_6368_GPIO_BASE (0xb0000080) + #define BCM_6368_SPI_BASE (0xb0000800) ++#define BCM_6368_HSSPI_BASE (0xdeadbeef) + #define BCM_6368_UDC0_BASE (0xdeadbeef) + #define BCM_6368_OHCI0_BASE (0xb0001600) + #define BCM_6368_OHCI_PRIV_BASE (0xdeadbeef) +@@ -456,6 +464,7 @@ extern const unsigned long *bcm63xx_regs + __GEN_RSET_BASE(__cpu, UART1) \ + __GEN_RSET_BASE(__cpu, GPIO) \ + __GEN_RSET_BASE(__cpu, SPI) \ ++ __GEN_RSET_BASE(__cpu, HSSPI) \ + __GEN_RSET_BASE(__cpu, UDC0) \ + __GEN_RSET_BASE(__cpu, OHCI0) \ + __GEN_RSET_BASE(__cpu, OHCI_PRIV) \ +@@ -497,6 +506,7 @@ extern const unsigned long *bcm63xx_regs + [RSET_UART1] = BCM_## __cpu ##_UART1_BASE, \ + [RSET_GPIO] = BCM_## __cpu ##_GPIO_BASE, \ + [RSET_SPI] = BCM_## __cpu ##_SPI_BASE, \ ++ [RSET_HSSPI] = BCM_## __cpu ##_HSSPI_BASE, \ + [RSET_UDC0] = BCM_## __cpu ##_UDC0_BASE, \ + [RSET_OHCI0] = BCM_## __cpu ##_OHCI0_BASE, \ + [RSET_OHCI_PRIV] = BCM_## __cpu ##_OHCI_PRIV_BASE, \ +@@ -569,6 +579,7 @@ enum bcm63xx_irq { + IRQ_ENET0, + IRQ_ENET1, + IRQ_ENET_PHY, ++ IRQ_HSSPI, + IRQ_OHCI0, + IRQ_EHCI0, + IRQ_ENET0_RXDMA, +@@ -604,6 +615,7 @@ enum bcm63xx_irq { + #define BCM_6328_ENET0_IRQ 0 + #define BCM_6328_ENET1_IRQ 0 + #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29) + #define BCM_6328_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9) + #define BCM_6328_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) + #define BCM_6328_PCMCIA_IRQ 0 +@@ -642,6 +654,7 @@ enum bcm63xx_irq { + #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6338_ENET1_IRQ 0 + #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6338_HSSPI_IRQ 0 + #define BCM_6338_OHCI0_IRQ 0 + #define BCM_6338_EHCI0_IRQ 0 + #define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) +@@ -673,6 +686,7 @@ enum bcm63xx_irq { + #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6345_ENET1_IRQ 0 + #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) ++#define BCM_6345_HSSPI_IRQ 0 + #define BCM_6345_OHCI0_IRQ 0 + #define BCM_6345_EHCI0_IRQ 0 + #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1) +@@ -704,6 +718,7 @@ enum bcm63xx_irq { + #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) + #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6348_HSSPI_IRQ 0 + #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) + #define BCM_6348_EHCI0_IRQ 0 + #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20) +@@ -735,6 +750,7 @@ enum bcm63xx_irq { + #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) + #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) + #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) ++#define BCM_6358_HSSPI_IRQ 0 + #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) + #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) + #define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) +@@ -775,6 +791,7 @@ enum bcm63xx_irq { + #define BCM_6368_ENET0_IRQ 0 + #define BCM_6368_ENET1_IRQ 0 + #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15) ++#define BCM_6368_HSSPI_IRQ 0 + #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) + #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7) + #define BCM_6368_PCMCIA_IRQ 0 +@@ -815,6 +832,7 @@ extern const int *bcm63xx_irqs; + [IRQ_ENET0] = BCM_## __cpu ##_ENET0_IRQ, \ + [IRQ_ENET1] = BCM_## __cpu ##_ENET1_IRQ, \ + [IRQ_ENET_PHY] = BCM_## __cpu ##_ENET_PHY_IRQ, \ ++ [IRQ_HSSPI] = BCM_## __cpu ##_HSSPI_IRQ, \ + [IRQ_OHCI0] = BCM_## __cpu ##_OHCI0_IRQ, \ + [IRQ_EHCI0] = BCM_## __cpu ##_EHCI0_IRQ, \ + [IRQ_ENET0_RXDMA] = BCM_## __cpu ##_ENET0_RXDMA_IRQ, \ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h +@@ -23,4 +23,7 @@ struct bcm63xx_hsspi_pdata { + #define HSSPI_OP_WRITE (2 << HSSPI_OP_CODE_SHIFT) + #define HSSPI_OP_READ (3 << HSSPI_OP_CODE_SHIFT) + ++#define HS_SPI_CLOCK_DEF 40000000 ++#define HS_SPI_BUFFER_LEN 512 ++ + #endif /* BCM63XX_DEV_HSSPI_H */ +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -1276,4 +1276,51 @@ + + #define PCIE_DEVICE_OFFSET 0x8000 + ++/************************************************************************* ++ * _REG relative to RSET_HSSPI ++ *************************************************************************/ ++ ++#define HSSPI_GLOBAL_CTRL_REG 0x0 ++#define GLOBAL_CTRL_CLK_POLARITY BIT(17) ++#define GLOBAL_CTRL_CLK_GATE_SSOFF BIT(16) ++ ++#define HSSPI_GLOBAL_EXT_TRIGGER_REG 0x4 ++ ++#define HSSPI_INT_STATUS_REG 0x8 ++#define HSSPI_INT_STATUS_MASKED_REG 0xc ++#define HSSPI_INT_MASK_REG 0x10 ++ ++#define HSSPI_PING0_CMD_DONE BIT(0) ++ ++#define HSSPI_INT_CLEAR_ALL 0xff001f1f ++ ++#define HSSPI_PINGPONG_COMMAND_REG(x) (0x80 + (x) * 0x40) ++#define PINGPONG_CMD_COMMAND_MASK 0xf ++#define PINGPONG_COMMAND_NOOP 0 ++#define PINGPONG_COMMAND_START_NOW 1 ++#define PINGPONG_COMMAND_START_TRIGGER 2 ++#define PINGPONG_COMMAND_HALT 3 ++#define PINGPONG_COMMAND_FLUSH 4 ++#define PINGPONG_CMD_PROFILE_SHIFT 8 ++#define PINGPONG_CMD_SS_SHIFT 12 ++ ++#define HSSPI_PINGPONG_STATUS_REG(x) (0x84 + (x) * 0x40) ++ ++#define HSSPI_PROFILE_CLK_CTRL_REG(x) (0x100 + (x) * 0x20) ++#define CLK_CTRL_ACCUM_RST_ON_LOOP BIT(15) ++ ++#define HSSPI_PROFILE_SIGNAL_CTRL_REG(x) (0x104 + (x) * 0x20) ++#define SIGNAL_CTRL_LATCH_RISING BIT(12) ++#define SIGNAL_CTRL_LAUNCH_RISING BIT(13) ++#define SIGNAL_CTRL_ASYNC_INPUT_PATH BIT(16) ++ ++#define HSSPI_PROFILE_MODE_CTRL_REG(x) (0x108 + (x) * 0x20) ++#define MODE_CTRL_MULTIDATA_RD_STRT_SHIFT 8 ++#define MODE_CTRL_MULTIDATA_WR_STRT_SHIFT 12 ++#define MODE_CTRL_MULTIDATA_RD_SIZE_SHIFT 16 ++#define MODE_CTRL_MULTIDATA_WR_SIZE_SHIFT 18 ++#define MODE_CTRL_PREPENDBYTE_CNT_SHIFT 24 ++ ++#define HSSPI_FIFO_REG(x) (0x200 + (x) * 0x200) ++ + #endif /* BCM63XX_REGS_H_ */ +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -100,6 +100,13 @@ config SPI_BCM63XX + help + Enable support for the SPI controller on the Broadcom BCM63xx SoCs. + ++config SPI_BCM63XX_HSSPI ++ tristate "Broadcom BCM63XX HS SPI controller driver" ++ depends on BCM63XX ++ help ++ This enables support for the High Speed SPI controller present on ++ newer Broadcom BCM63XX SoCs. ++ + config SPI_BITBANG + tristate "Utilities for Bitbanging SPI masters" + help +--- a/drivers/spi/Makefile ++++ b/drivers/spi/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o + obj-$(CONFIG_SPI_ATH79) += spi-ath79.o + obj-$(CONFIG_SPI_AU1550) += spi-au1550.o + obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o ++obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o + obj-$(CONFIG_SPI_BFIN) += spi-bfin5xx.o + obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o + obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o +--- /dev/null ++++ b/drivers/spi/spi-bcm63xx-hsspi.c +@@ -0,0 +1,502 @@ ++/* ++ * Broadcom BCM63XX High Speed SPI Controller driver ++ * ++ * Copyright 2000-2010 Broadcom Corporation ++ * Copyright 2011 Jonas Gorski ++ * ++ * Licensed under the GNU/GPL. See COPYING for details. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++ ++#define PFX KBUILD_MODNAME ++ ++struct bcm63xx_hsspi { ++ spinlock_t lock; ++ int irq; ++ u8 stopping; ++ ++ struct list_head queue; ++ struct workqueue_struct *workqueue; ++ struct work_struct ws; ++ struct completion done; ++ ++ struct spi_transfer *curr_trans; ++ ++ struct platform_device *pdev; ++ void __iomem *regs; ++ struct clk *clk; ++ ++ /* Platform data */ ++ u32 speed_hz; ++ ++ /* data iomem */ ++ u8 __iomem *fifo; ++ ++ ++}; ++ ++static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs, int hz, ++ int profile) ++{ ++ int clock; ++ ++ clock = bs->speed_hz / hz; ++ if (bs->speed_hz % HS_SPI_CLOCK_DEF) ++ clock++; ++ ++ clock = 2048 / clock; ++ if (2048 % clock) ++ clock++; ++ ++ bcm_hsspi_writel(CLK_CTRL_ACCUM_RST_ON_LOOP | clock, ++ HSSPI_PROFILE_CLK_CTRL_REG(profile)); ++} ++ ++static int bcm63xx_hsspi_do_txrx(struct spi_device *spi, ++ struct spi_transfer *t1, ++ struct spi_transfer *t2) ++{ ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); ++ u8 chip_select = spi->chip_select; ++ u16 opcode = 0; ++ int prepend_size = 0; ++ ++ init_completion(&bs->done); ++ bs->curr_trans = t2 ? t2 : t1; ++ bcm63xx_hsspi_set_clk(bs, bs->curr_trans->speed_hz, chip_select); ++ ++ BUG_ON(t2 && !t1->tx_buf && t1->rx_buf && t2->tx_buf && !t2->rx_buf); ++ ++ if (t2 && !t2->tx_buf) ++ prepend_size = t1->len; ++ ++ bcm_hsspi_writel(prepend_size<rx_buf && t1->tx_buf) ++ opcode = HSSPI_OP_READ_WRITE; ++ else if (t1->rx_buf || (t2 && t2->rx_buf)) ++ opcode = HSSPI_OP_READ; ++ else if (t1->tx_buf) ++ opcode = HSSPI_OP_WRITE; ++ ++ BUG_ON(opcode == 0); ++ ++ if (opcode == HSSPI_OP_READ && t2) ++ opcode |= t2->len; ++ else ++ opcode |= t1->len; ++ ++ if (t1->tx_buf) { ++ memcpy_toio(bs->fifo + 2, t1->tx_buf, t1->len); ++ if (t2 && t2->tx_buf) { ++ memcpy_toio(bs->fifo + 2 + t1->len, ++ t2->tx_buf, t2->len); ++ opcode += t2->len; ++ } ++ } ++ ++ memcpy_toio(bs->fifo, &opcode, sizeof(opcode)); ++ ++ /* enable interrupt */ ++ bcm_hsspi_writel(HSSPI_PING0_CMD_DONE, HSSPI_INT_MASK_REG); ++ ++ /* start the transfer */ ++ bcm_hsspi_writel(chip_select << PINGPONG_CMD_SS_SHIFT | ++ chip_select << PINGPONG_CMD_PROFILE_SHIFT | ++ PINGPONG_COMMAND_START_NOW, ++ HSSPI_PINGPONG_COMMAND_REG(0)); ++ ++ wait_for_completion(&bs->done); ++ return t1->len + (t2 ? t2->len : 0); ++} ++static int bcm63xx_hsspi_setup(struct spi_device *spi) ++{ ++ struct bcm63xx_hsspi *bs; ++ u32 reg; ++ bs = spi_master_get_devdata(spi->master); ++ ++ if (bs->stopping) ++ return -ESHUTDOWN; ++ ++ if (!spi->bits_per_word) ++ spi->bits_per_word = 8; ++ ++ if (spi->bits_per_word != 8) ++ return -EINVAL; ++ ++ if (spi->max_speed_hz == 0) ++ return -EINVAL; ++ ++ reg = bcm_hsspi_readl(HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); ++ reg &= ~(SIGNAL_CTRL_LAUNCH_RISING | SIGNAL_CTRL_LATCH_RISING); ++ ++ if (spi->mode & SPI_CPHA) ++ reg |= SIGNAL_CTRL_LAUNCH_RISING; ++ else ++ reg |= SIGNAL_CTRL_LATCH_RISING; ++ ++ bcm_hsspi_writel(reg, HSSPI_PROFILE_SIGNAL_CTRL_REG(spi->chip_select)); ++ ++ return 0; ++} ++ ++ ++static int bcm63xx_hsspi_transfer(struct spi_device *spi, ++ struct spi_message *msg) ++{ ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(spi->master); ++ struct spi_transfer *t, *prev = NULL; ++ ++ if (unlikely(list_empty(&msg->transfers))) ++ return -EINVAL; ++ ++ if (bs->stopping) ++ return -ESHUTDOWN; ++ ++ list_for_each_entry(t, &msg->transfers, transfer_list) { ++ /* check transfer parameters */ ++ if (!t->tx_buf && !t->rx_buf) ++ return -EINVAL; ++ ++ if (t->speed_hz == 0) ++ t->speed_hz = spi->max_speed_hz; ++ ++ if (t->speed_hz > spi->max_speed_hz) ++ return -EINVAL; ++ ++ if (t->len > HS_SPI_BUFFER_LEN) ++ return -EINVAL; ++ ++ /* reject if we have to combine two tx transfers and their ++ * combined length is bigger than the buffer ++ */ ++ if (prev && !prev->cs_change && !t->cs_change && prev->tx_buf && ++ t->tx_buf && (prev->len + t->len) > HS_SPI_BUFFER_LEN) ++ return -EINVAL; ++ ++ prev = t; ++ } ++ ++ ++ msg->actual_length = 0; ++ ++#if 0 ++ /* disable interrupts for the SPI controller ++ using spin_lock_irqsave would disable all interrupts */ ++ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); ++#endif ++ spin_lock(&bs->lock); ++ list_add_tail(&msg->queue, &bs->queue); ++ queue_work(bs->workqueue, &bs->ws); ++ spin_unlock(&bs->lock); ++ ++#if 0 ++ bcm_hsspi_writel(HSSPI_PING0_CMD_DONE, HSSPI_INT_MASK_REG); ++#endif ++ return 0; ++} ++ ++static void bcm63xx_hsspi_do_work(struct work_struct *work) ++{ ++ struct bcm63xx_hsspi *bs = container_of(work, struct bcm63xx_hsspi, ++ ws); ++ struct spi_message *msg; ++ struct spi_transfer *prev = NULL; ++ struct spi_transfer *t; ++ u32 reg; ++ ++ int len = 0; ++ ++ spin_lock(&bs->lock); ++ msg = list_entry(bs->queue.next, struct spi_message, queue); ++ list_del(&msg->queue); ++ spin_unlock(&bs->lock); ++ ++ if (bs->stopping) { ++ msg->status = -ESHUTDOWN; ++ goto out; ++ } ++ ++ /* setup clock polarity */ ++ reg = bcm_hsspi_readl(HSSPI_GLOBAL_CTRL_REG); ++ reg &= ~GLOBAL_CTRL_CLK_POLARITY; ++ ++ if (msg->spi->mode & SPI_CPOL) ++ reg |= GLOBAL_CTRL_CLK_POLARITY; ++ ++ bcm_hsspi_writel(reg, HSSPI_GLOBAL_CTRL_REG); ++ ++ list_for_each_entry(t, &msg->transfers, transfer_list) { ++ /* ++ * This controller does not support keeping the chip select ++ * active between transfers. ++ * This logic currently supports combining: ++ * write then read with no cs_change (e.g. m25p80 RDSR) ++ * write then write with no cs_change (e.g. m25p80 PP) ++ */ ++ if (prev && prev->tx_buf && !prev->cs_change && !t->cs_change) { ++ /* combine write with following transfer */ ++ len += bcm63xx_hsspi_do_txrx(msg->spi, prev, t); ++ prev = NULL; ++ continue; ++ } ++ ++ /* write the previous pending transfer */ ++ if (prev != NULL) ++ len += bcm63xx_hsspi_do_txrx(msg->spi, prev, NULL); ++ ++ prev = t; ++ } ++ ++ /* do last pending transfer */ ++ if (prev != NULL) ++ len += bcm63xx_hsspi_do_txrx(msg->spi, prev, NULL); ++ ++ msg->status = 0; ++ msg->actual_length = len; ++out: ++ msg->complete(msg->context); ++} ++ ++static irqreturn_t bcm63xx_hsspi_interrupt(int irq, void *dev_id) ++{ ++ struct spi_master *master = (struct spi_master *)dev_id; ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ if (bcm_hsspi_readl(HSSPI_INT_STATUS_MASKED_REG) == 0) ++ return IRQ_NONE; ++ ++ bcm_hsspi_writel(HSSPI_INT_CLEAR_ALL, HSSPI_INT_STATUS_REG); ++ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); ++ ++ spin_lock(&bs->lock); ++ ++ if (bs->curr_trans && bs->curr_trans->rx_buf) ++ memcpy_fromio(bs->curr_trans->rx_buf, bs->fifo, ++ bs->curr_trans->len); ++ ++ complete(&bs->done); ++ spin_unlock(&bs->lock); ++ ++ return IRQ_HANDLED; ++} ++ ++ ++static void bcm63xx_hsspi_cleanup(struct spi_device *spi) ++{ ++ /* would free spi_controller memory here if any was allocated */ ++} ++ ++static int __devinit bcm63xx_hsspi_probe(struct platform_device *pdev) ++{ ++ ++ struct spi_master *master; ++ struct bcm63xx_hsspi *bs; ++ struct resource *res_mem; ++ struct device *dev = &pdev->dev; ++ struct bcm63xx_hsspi_pdata *pdata = pdev->dev.platform_data; ++ struct clk *clk; ++ int irq; ++ int ret; ++ ++ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res_mem) { ++ dev_err(dev, "no iomem\n"); ++ return -ENXIO; ++ } ++ ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) { ++ dev_err(dev, "no irq\n"); ++ return -ENXIO; ++ } ++ ++ clk = clk_get(dev, "hsspi"); ++ ++ if (IS_ERR(clk)) { ++ ret = PTR_ERR(clk); ++ goto out_release; ++ } ++ clk_enable(clk); ++ ++ master = spi_alloc_master(&pdev->dev, sizeof(*bs)); ++ if (!master) { ++ ret = -ENOMEM; ++ goto out_disable_clk; ++ } ++ ++ bs = spi_master_get_devdata(master); ++ init_completion(&bs->done); ++ bs->pdev = pdev; ++ bs->clk = clk; ++ ++ bs->regs = devm_request_and_ioremap(dev, res_mem); ++ if (!bs->regs) { ++ dev_err(dev, "unable to ioremap regs\n"); ++ ret = -ENOMEM; ++ goto out_put_master; ++ } ++ ++ master->bus_num = pdata->bus_num; ++ master->num_chipselect = 8; ++ master->setup = bcm63xx_hsspi_setup; ++ master->transfer = bcm63xx_hsspi_transfer; ++ master->cleanup = bcm63xx_hsspi_cleanup; ++ master->mode_bits = SPI_CPOL | SPI_CPHA; ++ ++ bs->speed_hz = pdata->speed_hz; ++ bs->fifo = (u8 *)(bs->regs + HSSPI_FIFO_REG(0)); ++ ++ platform_set_drvdata(pdev, master); ++ ++ spin_lock_init(&bs->lock); ++ INIT_LIST_HEAD(&bs->queue); ++ INIT_WORK(&bs->ws, bcm63xx_hsspi_do_work); ++ bs->workqueue = create_singlethread_workqueue(pdev->name); ++ bs->curr_trans = NULL; ++ ++ /* Initialize the hardware */ ++ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); ++ ++ bcm_hsspi_writel(bcm_hsspi_readl(HSSPI_GLOBAL_CTRL_REG) | ++ GLOBAL_CTRL_CLK_GATE_SSOFF, ++ HSSPI_GLOBAL_CTRL_REG); ++ ++ ret = request_irq(irq, bcm63xx_hsspi_interrupt, IRQF_SHARED, pdev->name, ++ master); ++ ++ if (ret) ++ goto out_destroy_workqueue; ++ ++ spin_lock(&bs->lock); ++ bs->irq = irq; ++ spin_unlock(&bs->lock); ++ ++ /* register and we are done */ ++ ret = spi_register_master(master); ++ if (ret) ++ goto out_free_irq; ++ ++ return 0; ++ ++out_free_irq: ++ free_irq(bs->irq, master); ++out_destroy_workqueue: ++ flush_workqueue(bs->workqueue); ++ destroy_workqueue(bs->workqueue); ++ iounmap(bs->regs); ++out_put_master: ++ spi_master_put(master); ++out_disable_clk: ++ clk_disable(clk); ++ clk_put(clk); ++out_release: ++ release_mem_region(res_mem->start, resource_size(res_mem)); ++ ++ return ret; ++} ++ ++ ++static int __exit bcm63xx_hsspi_remove(struct platform_device *pdev) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ struct spi_message *msg; ++ ++ cancel_work_sync(&bs->ws); ++ ++ /* reset the hardware and block queue progress */ ++ bcm_hsspi_writel(0, HSSPI_INT_MASK_REG); ++ ++ spin_lock(&bs->lock); ++ /* HW shutdown */ ++ bs->stopping = 1; ++ spin_unlock(&bs->lock); ++ ++ ++ /* Terminate remaining queued transfers */ ++ list_for_each_entry(msg, &bs->queue, queue) { ++ msg->status = -ESHUTDOWN; ++ msg->complete(msg->context); ++ } ++ ++ ++ free_irq(bs->irq, master); ++ flush_workqueue(bs->workqueue); ++ destroy_workqueue(bs->workqueue); ++ ++ clk_disable(bs->clk); ++ clk_put(bs->clk); ++ ++ spi_unregister_master(master); ++ return 0; ++} ++ ++#ifdef CONFIG_PM ++static int bcm63xx_hsspi_suspend(struct platform_device *pdev, ++ pm_message_t mesg) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ clk_disable(bs->clk); ++ ++ return 0; ++} ++ ++static int bcm63xx_hsspi_resume(struct platform_device *pdev) ++{ ++ struct spi_master *master = platform_get_drvdata(pdev); ++ struct bcm63xx_hsspi *bs = spi_master_get_devdata(master); ++ ++ clk_enable(bs->clk); ++ ++ return 0; ++} ++ ++static const struct dev_pm_ops bcm63xx_hsspi_pm_ops = { ++ .suspend = bcm63xx_hsspi_suspend, ++ .resume = bcm63xx_hsspi_resume, ++}; ++ ++#define BCM63XX_HSSPI_PM_OPS (&bcm63xx_hsspi_pm_ops) ++#else ++#define BCM63XX_HSSPI_PM_OPS NULL ++#endif ++ ++ ++ ++static struct platform_driver bcm63xx_hsspi_driver = { ++ .driver = { ++ .name = "bcm63xx-hsspi", ++ .owner = THIS_MODULE, ++ .pm = BCM63XX_HSSPI_PM_OPS, ++ }, ++ .probe = bcm63xx_hsspi_probe, ++ .remove = __exit_p(bcm63xx_hsspi_remove), ++}; ++ ++module_platform_driver(bcm63xx_hsspi_driver); ++ ++MODULE_ALIAS("platform:bcm63xx_hsspi"); ++MODULE_DESCRIPTION("Broadcom BCM63xx HS SPI Controller driver"); ++MODULE_AUTHOR("Jonas Gorski "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch new file mode 100644 index 0000000000..f83dbcffd7 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -0,0 +1,89 @@ +From a1e3ef9af3e3a7283ced5fd079ef7e8bc4e2deca Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 3 Jul 2011 15:00:38 +0200 +Subject: [PATCH 55/79] MIPS: BCM63XX: Register SPI flash if present + +Signed-off-by: Jonas Gorski +--- + arch/mips/bcm63xx/dev-flash.c | 29 +++++++++++++++++++-- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 + + 2 files changed, 28 insertions(+), 2 deletions(-) + +--- a/arch/mips/bcm63xx/dev-flash.c ++++ b/arch/mips/bcm63xx/dev-flash.c +@@ -15,9 +15,12 @@ + #include + #include + #include ++#include ++#include + + #include + #include ++#include + #include + #include + +@@ -54,12 +57,28 @@ static struct platform_device mtd_dev = + }, + }; + ++static struct flash_platform_data bcm63xx_flash_data = { ++ .part_probe_types = bcm63xx_part_types, ++}; ++ ++static struct spi_board_info bcm63xx_spi_flash_info[] = { ++ { ++ .bus_num = 0, ++ .chip_select = 0, ++ .mode = 0, ++ .max_speed_hz = 781000, ++ .modalias = "m25p80", ++ .platform_data = &bcm63xx_flash_data, ++ }, ++}; ++ + static int __init bcm63xx_detect_flash_type(void) + { + u32 val; + + switch (bcm63xx_get_cpu_id()) { + case BCM6328_CPU_ID: ++ bcm63xx_spi_flash_info[0].max_speed_hz = 40000000; + val = bcm_misc_readl(MISC_STRAPBUS_6328_REG); + if (val & STRAPBUS_6328_BOOT_SEL_SERIAL) + return BCM63XX_FLASH_TYPE_SERIAL; +@@ -78,6 +97,9 @@ static int __init bcm63xx_detect_flash_t + return BCM63XX_FLASH_TYPE_SERIAL; + case BCM6368_CPU_ID: + val = bcm_gpio_readl(GPIO_STRAPBUS_REG); ++ if (val & STRAPBUS_6368_SPI_CLK_FAST) ++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000; ++ + switch (val & STRAPBUS_6368_BOOT_SEL_MASK) { + case STRAPBUS_6368_BOOT_SEL_NAND: + return BCM63XX_FLASH_TYPE_NAND; +@@ -109,8 +131,11 @@ int __init bcm63xx_flash_register(void) + + return platform_device_register(&mtd_dev); + case BCM63XX_FLASH_TYPE_SERIAL: +- pr_warn("unsupported serial flash detected\n"); +- return -ENODEV; ++ if (BCMCPU_IS_6328()) ++ bcm63xx_flash_data.max_transfer_len = HS_SPI_BUFFER_LEN; ++ ++ return spi_register_board_info(bcm63xx_spi_flash_info, ++ ARRAY_SIZE(bcm63xx_spi_flash_info)); + case BCM63XX_FLASH_TYPE_NAND: + pr_warn("unsupported NAND flash detected\n"); + return -ENODEV; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -555,6 +555,7 @@ + #define GPIO_STRAPBUS_REG 0x40 + #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) + #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) ++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6) + #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 + #define STRAPBUS_6368_BOOT_SEL_NAND 0 + #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 diff --git a/target/linux/brcm63xx/patches-3.3/500-board-D4PW.patch b/target/linux/brcm63xx/patches-3.3/500-board-D4PW.patch index 5edd0f948a..383926a593 100644 --- a/target/linux/brcm63xx/patches-3.3/500-board-D4PW.patch +++ b/target/linux/brcm63xx/patches-3.3/500-board-D4PW.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -130,6 +130,55 @@ static struct board_info __initdata boar +@@ -131,6 +131,55 @@ static struct board_info __initdata boar }, }, }; @@ -56,7 +56,7 @@ #endif /* -@@ -638,6 +687,7 @@ static const struct board_info __initdat +@@ -639,6 +688,7 @@ static const struct board_info __initdat &board_DV201AMR, &board_96348gw_a, &board_rta1025w_16, diff --git a/target/linux/brcm63xx/patches-3.3/501-board-NB4.patch b/target/linux/brcm63xx/patches-3.3/501-board-NB4.patch index 03eee87c8f..9365efa7a6 100644 --- a/target/linux/brcm63xx/patches-3.3/501-board-NB4.patch +++ b/target/linux/brcm63xx/patches-3.3/501-board-NB4.patch @@ -10,7 +10,7 @@ #include #include #include -@@ -39,6 +42,12 @@ +@@ -40,6 +43,12 @@ #define CFE_OFFSET_64K 0x10000 #define CFE_OFFSET_128K 0x20000 @@ -23,7 +23,7 @@ static struct bcm963xx_nvram nvram; static unsigned int mac_addr_used; static struct board_info board; -@@ -665,6 +674,496 @@ static struct board_info __initdata boar +@@ -666,6 +675,496 @@ static struct board_info __initdata boar .has_ohci0 = 1, }; @@ -520,7 +520,7 @@ #endif /* -@@ -695,9 +1194,30 @@ static const struct board_info __initdat +@@ -696,9 +1195,30 @@ static const struct board_info __initdat &board_96358vw2, &board_AGPFS0, &board_DWVS0, @@ -551,7 +551,7 @@ /* * Register a sane SPROMv2 to make the on-board * bcm4318 WLAN work -@@ -853,6 +1373,9 @@ void __init board_prom_init(void) +@@ -854,6 +1374,9 @@ void __init board_prom_init(void) boardid_fixup(boot_addr); } diff --git a/target/linux/brcm63xx/patches-3.3/502-board-96338W2_E7T.patch b/target/linux/brcm63xx/patches-3.3/502-board-96338W2_E7T.patch index 472ab1178c..067b883d04 100644 --- a/target/linux/brcm63xx/patches-3.3/502-board-96338W2_E7T.patch +++ b/target/linux/brcm63xx/patches-3.3/502-board-96338W2_E7T.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -200,6 +200,38 @@ static struct board_info __initdata boar +@@ -201,6 +201,38 @@ static struct board_info __initdata boar .has_uart0 = 1, }; @@ -39,7 +39,7 @@ #endif /* -@@ -1173,6 +1205,7 @@ static const struct board_info __initdat +@@ -1174,6 +1206,7 @@ static const struct board_info __initdat #ifdef CONFIG_BCM63XX_CPU_6338 &board_96338gw, &board_96338w, diff --git a/target/linux/brcm63xx/patches-3.3/503-board-CPVA642.patch b/target/linux/brcm63xx/patches-3.3/503-board-CPVA642.patch index a9cca53a14..23b6268afd 100644 --- a/target/linux/brcm63xx/patches-3.3/503-board-CPVA642.patch +++ b/target/linux/brcm63xx/patches-3.3/503-board-CPVA642.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -663,6 +663,98 @@ static struct board_info __initdata boar +@@ -664,6 +664,98 @@ static struct board_info __initdata boar }, }; @@ -99,7 +99,7 @@ static struct board_info __initdata board_AGPFS0 = { .name = "AGPF-S0", .expected_cpu_id = 0x6358, -@@ -1226,6 +1318,7 @@ static const struct board_info __initdat +@@ -1227,6 +1319,7 @@ static const struct board_info __initdat &board_96358vw, &board_96358vw2, &board_AGPFS0, diff --git a/target/linux/brcm63xx/patches-3.3/504-board_dsl_274xb_rev_c.patch b/target/linux/brcm63xx/patches-3.3/504-board_dsl_274xb_rev_c.patch index ba10d15c2a..e11207b4f3 100644 --- a/target/linux/brcm63xx/patches-3.3/504-board_dsl_274xb_rev_c.patch +++ b/target/linux/brcm63xx/patches-3.3/504-board_dsl_274xb_rev_c.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -799,6 +799,59 @@ static struct board_info __initdata boar +@@ -800,6 +800,59 @@ static struct board_info __initdata boar .has_ohci0 = 1, }; @@ -60,7 +60,7 @@ struct spi_gpio_platform_data nb4_spi_gpio_data = { .sck = NB4_SPI_GPIO_CLK, .mosi = NB4_SPI_GPIO_MOSI, -@@ -1320,6 +1373,7 @@ static const struct board_info __initdat +@@ -1321,6 +1374,7 @@ static const struct board_info __initdat &board_AGPFS0, &board_CPVA642, &board_DWVS0, diff --git a/target/linux/brcm63xx/patches-3.3/505-board_spw500v.patch b/target/linux/brcm63xx/patches-3.3/505-board_spw500v.patch index 423dd8952e..8c2402677a 100644 --- a/target/linux/brcm63xx/patches-3.3/505-board_spw500v.patch +++ b/target/linux/brcm63xx/patches-3.3/505-board_spw500v.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -188,6 +188,67 @@ static struct board_info __initdata boar +@@ -189,6 +189,67 @@ static struct board_info __initdata boar }, }; @@ -68,7 +68,7 @@ #endif /* -@@ -1365,6 +1426,7 @@ static const struct board_info __initdat +@@ -1366,6 +1427,7 @@ static const struct board_info __initdat &board_96348gw_a, &board_rta1025w_16, &board_96348_D4PW, diff --git a/target/linux/brcm63xx/patches-3.3/506-board_gw6200_gw6000.patch b/target/linux/brcm63xx/patches-3.3/506-board_gw6200_gw6000.patch index 7da36d923f..d5bde815e6 100644 --- a/target/linux/brcm63xx/patches-3.3/506-board_gw6200_gw6000.patch +++ b/target/linux/brcm63xx/patches-3.3/506-board_gw6200_gw6000.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -535,6 +535,112 @@ static struct board_info __initdata boar +@@ -536,6 +536,112 @@ static struct board_info __initdata boar }, }; @@ -113,7 +113,7 @@ static struct board_info __initdata board_FAST2404 = { .name = "F@ST2404", .expected_cpu_id = 0x6348, -@@ -1419,6 +1525,8 @@ static const struct board_info __initdat +@@ -1420,6 +1526,8 @@ static const struct board_info __initdat #ifdef CONFIG_BCM63XX_CPU_6348 &board_96348r, &board_96348gw, diff --git a/target/linux/brcm63xx/patches-3.3/507-board-MAGIC.patch b/target/linux/brcm63xx/patches-3.3/507-board-MAGIC.patch index f30525b5b1..274afe12a4 100644 --- a/target/linux/brcm63xx/patches-3.3/507-board-MAGIC.patch +++ b/target/linux/brcm63xx/patches-3.3/507-board-MAGIC.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -249,6 +249,76 @@ static struct board_info __initdata boar +@@ -250,6 +250,76 @@ static struct board_info __initdata boar }, }; @@ -77,7 +77,7 @@ #endif /* -@@ -1535,6 +1605,7 @@ static const struct board_info __initdat +@@ -1536,6 +1606,7 @@ static const struct board_info __initdat &board_rta1025w_16, &board_96348_D4PW, &board_spw500v, diff --git a/target/linux/brcm63xx/patches-3.3/508-board_hw553.patch b/target/linux/brcm63xx/patches-3.3/508-board_hw553.patch index 43f6b73ad8..0f7fb3061d 100644 --- a/target/linux/brcm63xx/patches-3.3/508-board_hw553.patch +++ b/target/linux/brcm63xx/patches-3.3/508-board_hw553.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1578,6 +1578,81 @@ static struct board_info __initdata boar +@@ -1579,6 +1579,81 @@ static struct board_info __initdata boar .spis = nb4_spi_devices, .num_spis = ARRAY_SIZE(nb4_spi_devices), }; @@ -82,7 +82,7 @@ #endif /* -@@ -1620,6 +1695,7 @@ static const struct board_info __initdat +@@ -1621,6 +1696,7 @@ static const struct board_info __initdat &board_nb4_ser_r2, &board_nb4_fxc_r1, &board_nb4_fxc_r2, diff --git a/target/linux/brcm63xx/patches-3.3/509-board_rta1320_16m.patch b/target/linux/brcm63xx/patches-3.3/509-board_rta1320_16m.patch index 46067252e0..214d6e0b9f 100644 --- a/target/linux/brcm63xx/patches-3.3/509-board_rta1320_16m.patch +++ b/target/linux/brcm63xx/patches-3.3/509-board_rta1320_16m.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -363,6 +363,43 @@ static struct board_info __initdata boar +@@ -364,6 +364,43 @@ static struct board_info __initdata boar }, }, }; @@ -44,7 +44,7 @@ #endif /* -@@ -1663,6 +1700,7 @@ static const struct board_info __initdat +@@ -1664,6 +1701,7 @@ static const struct board_info __initdat &board_96338gw, &board_96338w, &board_96338w2_e7t, diff --git a/target/linux/brcm63xx/patches-3.3/510-board_spw303v.patch b/target/linux/brcm63xx/patches-3.3/510-board_spw303v.patch index 9bbde4b016..c68c678b9c 100644 --- a/target/linux/brcm63xx/patches-3.3/510-board_spw303v.patch +++ b/target/linux/brcm63xx/patches-3.3/510-board_spw303v.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1690,6 +1690,72 @@ static struct board_info __initdata boar +@@ -1691,6 +1691,72 @@ static struct board_info __initdata boar }, }, }; @@ -73,7 +73,7 @@ #endif /* -@@ -1734,6 +1800,7 @@ static const struct board_info __initdat +@@ -1735,6 +1801,7 @@ static const struct board_info __initdat &board_nb4_fxc_r1, &board_nb4_fxc_r2, &board_HW553, diff --git a/target/linux/brcm63xx/patches-3.3/511-board_V2500V.patch b/target/linux/brcm63xx/patches-3.3/511-board_V2500V.patch index c5898d2c58..e299cc6dba 100644 --- a/target/linux/brcm63xx/patches-3.3/511-board_V2500V.patch +++ b/target/linux/brcm63xx/patches-3.3/511-board_V2500V.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -319,6 +319,63 @@ static struct board_info __initdata boar +@@ -320,6 +320,63 @@ static struct board_info __initdata boar }, }; @@ -64,7 +64,7 @@ #endif /* -@@ -1785,6 +1842,7 @@ static const struct board_info __initdat +@@ -1786,6 +1843,7 @@ static const struct board_info __initdat &board_96348_D4PW, &board_spw500v, &board_96348sv, @@ -72,7 +72,7 @@ #endif #ifdef CONFIG_BCM63XX_CPU_6358 -@@ -1943,6 +2001,22 @@ void __init board_prom_init(void) +@@ -1944,6 +2002,22 @@ void __init board_prom_init(void) val &= MPI_CSBASE_BASE_MASK; } boot_addr = (u8 *)KSEG1ADDR(val); @@ -97,15 +97,15 @@ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; --- a/arch/mips/bcm63xx/dev-flash.c +++ b/arch/mips/bcm63xx/dev-flash.c -@@ -16,6 +16,7 @@ - #include - #include +@@ -18,6 +18,7 @@ + #include + #include +#include #include #include - #include -@@ -104,6 +105,13 @@ int __init bcm63xx_flash_register(void) + #include +@@ -126,6 +127,13 @@ int __init bcm63xx_flash_register(void) val = bcm_mpi_readl(MPI_CSBASE_REG(0)); val &= MPI_CSBASE_BASE_MASK; diff --git a/target/linux/brcm63xx/patches-3.3/512-board_BTV2110.patch b/target/linux/brcm63xx/patches-3.3/512-board_BTV2110.patch index 2577cde11c..647b9bf2dd 100644 --- a/target/linux/brcm63xx/patches-3.3/512-board_BTV2110.patch +++ b/target/linux/brcm63xx/patches-3.3/512-board_BTV2110.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -631,6 +631,62 @@ static struct board_info __initdata boar +@@ -632,6 +632,62 @@ static struct board_info __initdata boar }, }; @@ -63,7 +63,7 @@ static struct board_info __initdata board_96348gw = { .name = "96348GW", .expected_cpu_id = 0x6348, -@@ -1843,6 +1899,7 @@ static const struct board_info __initdat +@@ -1844,6 +1900,7 @@ static const struct board_info __initdat &board_spw500v, &board_96348sv, &board_V2500V_BB, diff --git a/target/linux/brcm63xx/patches-3.3/514-board_ct536_ct5621.patch b/target/linux/brcm63xx/patches-3.3/514-board_ct536_ct5621.patch index 119d5d4ae4..3f1a8475d1 100644 --- a/target/linux/brcm63xx/patches-3.3/514-board_ct536_ct5621.patch +++ b/target/linux/brcm63xx/patches-3.3/514-board_ct536_ct5621.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -687,6 +687,49 @@ static struct board_info __initdata boar +@@ -688,6 +688,49 @@ static struct board_info __initdata boar }; @@ -50,7 +50,7 @@ static struct board_info __initdata board_96348gw = { .name = "96348GW", .expected_cpu_id = 0x6348, -@@ -1900,6 +1943,7 @@ static const struct board_info __initdat +@@ -1901,6 +1944,7 @@ static const struct board_info __initdat &board_96348sv, &board_V2500V_BB, &board_V2110, diff --git a/target/linux/brcm63xx/patches-3.3/515-board_DWV-S0_fixes.patch b/target/linux/brcm63xx/patches-3.3/515-board_DWV-S0_fixes.patch index d10af1c7ec..4ab5353268 100644 --- a/target/linux/brcm63xx/patches-3.3/515-board_DWV-S0_fixes.patch +++ b/target/linux/brcm63xx/patches-3.3/515-board_DWV-S0_fixes.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1212,6 +1212,8 @@ static struct board_info __initdata boar +@@ -1213,6 +1213,8 @@ static struct board_info __initdata boar .name = "DWV-S0", .expected_cpu_id = 0x6358, @@ -9,7 +9,7 @@ .has_enet0 = 1, .has_enet1 = 1, .has_pci = 1, -@@ -1227,6 +1229,7 @@ static struct board_info __initdata boar +@@ -1228,6 +1230,7 @@ static struct board_info __initdata boar }, .has_ohci0 = 1, diff --git a/target/linux/brcm63xx/patches-3.3/516-board_96348A-122.patch b/target/linux/brcm63xx/patches-3.3/516-board_96348A-122.patch index 617d8393f2..9891b3f905 100644 --- a/target/linux/brcm63xx/patches-3.3/516-board_96348A-122.patch +++ b/target/linux/brcm63xx/patches-3.3/516-board_96348A-122.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -376,6 +376,67 @@ static struct board_info __initdata boar +@@ -377,6 +377,67 @@ static struct board_info __initdata boar }, }; @@ -68,7 +68,7 @@ #endif /* -@@ -1947,6 +2008,7 @@ static const struct board_info __initdat +@@ -1948,6 +2009,7 @@ static const struct board_info __initdat &board_V2500V_BB, &board_V2110, &board_ct536_ct5621, diff --git a/target/linux/brcm63xx/patches-3.3/517-RTA1205W_16_uart_fixes.patch b/target/linux/brcm63xx/patches-3.3/517-RTA1205W_16_uart_fixes.patch index 9edbdae077..121a664019 100644 --- a/target/linux/brcm63xx/patches-3.3/517-RTA1205W_16_uart_fixes.patch +++ b/target/linux/brcm63xx/patches-3.3/517-RTA1205W_16_uart_fixes.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -993,6 +993,7 @@ static struct board_info __initdata boar +@@ -994,6 +994,7 @@ static struct board_info __initdata boar .name = "RTA1025W_16", .expected_cpu_id = 0x6348, diff --git a/target/linux/brcm63xx/patches-3.3/519_board_CPVA502plus.patch b/target/linux/brcm63xx/patches-3.3/519_board_CPVA502plus.patch index dc7f17e1bc..094d9d7ea3 100644 --- a/target/linux/brcm63xx/patches-3.3/519_board_CPVA502plus.patch +++ b/target/linux/brcm63xx/patches-3.3/519_board_CPVA502plus.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -437,6 +437,42 @@ static struct board_info __initdata boar +@@ -438,6 +438,42 @@ static struct board_info __initdata boar }, }; @@ -43,7 +43,7 @@ #endif /* -@@ -2010,6 +2046,7 @@ static const struct board_info __initdat +@@ -2011,6 +2047,7 @@ static const struct board_info __initdat &board_V2110, &board_ct536_ct5621, &board_96348A_122, diff --git a/target/linux/brcm63xx/patches-3.3/520-bcm63xx-add-support-for-96368MVWG-board.patch b/target/linux/brcm63xx/patches-3.3/520-bcm63xx-add-support-for-96368MVWG-board.patch index 4b717bda08..bd8d524eca 100644 --- a/target/linux/brcm63xx/patches-3.3/520-bcm63xx-add-support-for-96368MVWG-board.patch +++ b/target/linux/brcm63xx/patches-3.3/520-bcm63xx-add-support-for-96368MVWG-board.patch @@ -10,7 +10,7 @@ Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -2016,6 +2016,80 @@ static struct board_info __initdata boar +@@ -2017,6 +2017,80 @@ static struct board_info __initdata boar #endif /* @@ -91,7 +91,7 @@ Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. * all boards */ static const struct board_info __initdata *bcm963xx_boards[] = { -@@ -2064,6 +2138,10 @@ static const struct board_info __initdat +@@ -2065,6 +2139,10 @@ static const struct board_info __initdat &board_HW553, &board_spw303v, #endif @@ -102,7 +102,7 @@ Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board. }; static void __init nb4_nvram_fixup(void) -@@ -2285,12 +2363,25 @@ void __init board_prom_init(void) +@@ -2286,12 +2364,25 @@ void __init board_prom_init(void) if (board.has_pci) { if (BCMCPU_IS_6348()) val |= GPIO_MODE_6348_G2_PCI; diff --git a/target/linux/brcm63xx/patches-3.3/521-bcm63xx-add-support-for-96368MVNgr-board.patch b/target/linux/brcm63xx/patches-3.3/521-bcm63xx-add-support-for-96368MVNgr-board.patch index c978be2615..7ccd10c7fa 100644 --- a/target/linux/brcm63xx/patches-3.3/521-bcm63xx-add-support-for-96368MVNgr-board.patch +++ b/target/linux/brcm63xx/patches-3.3/521-bcm63xx-add-support-for-96368MVNgr-board.patch @@ -9,7 +9,7 @@ Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board. --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -2087,6 +2087,72 @@ static struct board_info __initdata boar +@@ -2088,6 +2088,72 @@ static struct board_info __initdata boar .has_ohci0 = 1, .has_ehci0 = 1, }; @@ -82,7 +82,7 @@ Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board. #endif /* -@@ -2141,6 +2207,7 @@ static const struct board_info __initdat +@@ -2142,6 +2208,7 @@ static const struct board_info __initdat #ifdef CONFIG_BCM63XX_CPU_6368 &board_96368mvwg, diff --git a/target/linux/brcm63xx/patches-3.3/550-alice_gate2_leds.patch b/target/linux/brcm63xx/patches-3.3/550-alice_gate2_leds.patch index d45358cb22..e82d0562a9 100644 --- a/target/linux/brcm63xx/patches-3.3/550-alice_gate2_leds.patch +++ b/target/linux/brcm63xx/patches-3.3/550-alice_gate2_leds.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1304,6 +1304,99 @@ static struct board_info __initdata boar +@@ -1305,6 +1305,99 @@ static struct board_info __initdata boar .has_ohci0 = 1, .has_ehci0 = 1, diff --git a/target/linux/brcm63xx/patches-3.3/551-96348gw_a_leds.patch b/target/linux/brcm63xx/patches-3.3/551-96348gw_a_leds.patch index c815c4ddcc..287674f446 100644 --- a/target/linux/brcm63xx/patches-3.3/551-96348gw_a_leds.patch +++ b/target/linux/brcm63xx/patches-3.3/551-96348gw_a_leds.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -1084,6 +1084,19 @@ static struct board_info __initdata boar +@@ -1085,6 +1085,19 @@ static struct board_info __initdata boar }, .has_ohci0 = 1, diff --git a/target/linux/brcm63xx/patches-3.3/552-board_96348gw-10_reset_button.patch b/target/linux/brcm63xx/patches-3.3/552-board_96348gw-10_reset_button.patch index 6f3d68793f..e8bc47a51e 100644 --- a/target/linux/brcm63xx/patches-3.3/552-board_96348gw-10_reset_button.patch +++ b/target/linux/brcm63xx/patches-3.3/552-board_96348gw-10_reset_button.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -662,6 +662,17 @@ static struct board_info __initdata boar +@@ -663,6 +663,17 @@ static struct board_info __initdata boar .active_low = 1, }, }, diff --git a/target/linux/brcm63xx/patches-3.3/800-wl_exports.patch b/target/linux/brcm63xx/patches-3.3/800-wl_exports.patch index 49c52b33d5..2b4c97ee3c 100644 --- a/target/linux/brcm63xx/patches-3.3/800-wl_exports.patch +++ b/target/linux/brcm63xx/patches-3.3/800-wl_exports.patch @@ -8,7 +8,7 @@ #include #include #include -@@ -53,6 +54,13 @@ static unsigned int mac_addr_used; +@@ -54,6 +55,13 @@ static unsigned int mac_addr_used; static struct board_info board; /* @@ -22,7 +22,7 @@ * known 6338 boards */ #ifdef CONFIG_BCM63XX_CPU_6338 -@@ -2495,6 +2503,7 @@ void __init board_prom_init(void) +@@ -2496,6 +2504,7 @@ void __init board_prom_init(void) /* extract nvram data */ memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram)); diff --git a/target/linux/brcm63xx/patches-3.3/801-ssb_export_fallback_sprom.patch b/target/linux/brcm63xx/patches-3.3/801-ssb_export_fallback_sprom.patch index c2853b3147..5d68606c82 100644 --- a/target/linux/brcm63xx/patches-3.3/801-ssb_export_fallback_sprom.patch +++ b/target/linux/brcm63xx/patches-3.3/801-ssb_export_fallback_sprom.patch @@ -1,6 +1,6 @@ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c -@@ -2357,7 +2357,7 @@ static void __init nb4_nvram_fixup(void) +@@ -2358,7 +2358,7 @@ static void __init nb4_nvram_fixup(void) * bcm4318 WLAN work */ #ifdef CONFIG_SSB_PCIHOST @@ -9,7 +9,7 @@ .revision = 0x02, .board_rev = 0x17, .country_code = 0x0, -@@ -2377,6 +2377,7 @@ static struct ssb_sprom bcm63xx_sprom = +@@ -2378,6 +2378,7 @@ static struct ssb_sprom bcm63xx_sprom = .boardflags_lo = 0x2848, .boardflags_hi = 0x0000, };