From: Marek Vasut Date: Sun, 14 Jul 2019 07:22:57 +0000 (+0200) Subject: rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32() X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=dfd80943d5fae348c12674025d592cbe9b25efd1;p=project%2Fbcm63xx%2Fatf.git rcar_gen3: drivers: ddr-a: Replace {Read,Write}Reg_32() with mmio_{read,write}_32() Replace ad-hoc register accessors with generic ones, remove the ad-hoc implementation. No functional change. Signed-off-by: Marek Vasut Change-Id: I21446a00a38c6a39d6a48652c34f59814074e831 --- diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c index 516f6be2..e5976ead 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_d3.c @@ -16,329 +16,318 @@ #error "Don't have DDR initialize routine." #endif -static void WriteReg_32(uint32_t a, uint32_t v) -{ - (*(volatile uint32_t*)(uintptr_t)a) = v; -} - -static uint32_t ReadReg_32(uint32_t a) -{ - uint32_t w = (*(volatile uint32_t*)(uintptr_t)a); - return w; -} - static void init_ddr_d3_1866(void) { uint32_t RegVal_R2, RegVal_R3, RegVal_R5, RegVal_R6, RegVal_R7, RegVal_R12; - WriteReg_32(DBSC_DBSYSCNT0,0x00001234); - WriteReg_32(DBSC_DBKIND,0x00000007); - WriteReg_32(DBSC_DBMEMCONF00,0x0f030a01); - WriteReg_32(DBSC_DBPHYCONF0,0x00000001); - WriteReg_32(DBSC_DBTR0,0x0000000D); - WriteReg_32(DBSC_DBTR1,0x00000009); - WriteReg_32(DBSC_DBTR2,0x00000000); - WriteReg_32(DBSC_DBTR3,0x0000000D); - WriteReg_32(DBSC_DBTR4,0x000D000D); - WriteReg_32(DBSC_DBTR5,0x0000002D); - WriteReg_32(DBSC_DBTR6,0x00000020); - WriteReg_32(DBSC_DBTR7,0x00060006); - WriteReg_32(DBSC_DBTR8,0x00000021); - WriteReg_32(DBSC_DBTR9,0x00000007); - WriteReg_32(DBSC_DBTR10,0x0000000E); - WriteReg_32(DBSC_DBTR11,0x0000000C); - WriteReg_32(DBSC_DBTR12,0x00140014); - WriteReg_32(DBSC_DBTR13,0x000000F2); - WriteReg_32(DBSC_DBTR14,0x00170006); - WriteReg_32(DBSC_DBTR15,0x00060005); - WriteReg_32(DBSC_DBTR16,0x09210507); - WriteReg_32(DBSC_DBTR17,0x040E0000); - WriteReg_32(DBSC_DBTR18,0x00000200); - WriteReg_32(DBSC_DBTR19,0x012B004B); - WriteReg_32(DBSC_DBTR20,0x020000FB); - WriteReg_32(DBSC_DBTR21,0x00040004); - WriteReg_32(DBSC_DBBL,0x00000000); - WriteReg_32(DBSC_DBODT0,0x00000001); - WriteReg_32(DBSC_DBADJ0,0x00000001); - WriteReg_32(DBSC_DBSYSCONF1,0x00000002); - WriteReg_32(DBSC_DBDFICNT0,0x00000010); - WriteReg_32(DBSC_DBBCAMDIS,0x00000001); - WriteReg_32(DBSC_DBSCHRW1,0x00000046); - WriteReg_32(DBSC_SCFCTST0,0x0D020D04); - WriteReg_32(DBSC_SCFCTST1,0x0306040C); - - WriteReg_32(DBSC_DBPDLK0,0x0000A55A); - WriteReg_32(DBSC_DBCMD,0x01000001); - WriteReg_32(DBSC_DBCMD,0x08000000); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x80010000); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000008); - WriteReg_32(DBSC_DBPDRGD0,0x000B8000); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058A04); - WriteReg_32(DBSC_DBPDRGA0,0x00000091); - WriteReg_32(DBSC_DBPDRGD0,0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0,0x00000095); - WriteReg_32(DBSC_DBPDRGD0,0x0007BBAD); - WriteReg_32(DBSC_DBPDRGA0,0x00000099); - WriteReg_32(DBSC_DBPDRGD0,0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058A00); - WriteReg_32(DBSC_DBPDRGA0,0x00000021); - WriteReg_32(DBSC_DBPDRGD0,0x0024641E); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010073); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x0C058A00); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058A00); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000003); - WriteReg_32(DBSC_DBPDRGD0,0x0780C700); - WriteReg_32(DBSC_DBPDRGA0,0x00000007); - while ( (BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000004); - WriteReg_32(DBSC_DBPDRGD0,0x0A206F89); - WriteReg_32(DBSC_DBPDRGA0,0x00000022); - WriteReg_32(DBSC_DBPDRGD0,0x1000040B); - WriteReg_32(DBSC_DBPDRGA0,0x00000023); - WriteReg_32(DBSC_DBPDRGD0,0x35A00D77); - WriteReg_32(DBSC_DBPDRGA0,0x00000024); - WriteReg_32(DBSC_DBPDRGD0,0x2A8A2C28); - WriteReg_32(DBSC_DBPDRGA0,0x00000025); - WriteReg_32(DBSC_DBPDRGD0,0x30005E00); - WriteReg_32(DBSC_DBPDRGA0,0x00000026); - WriteReg_32(DBSC_DBPDRGD0,0x0014CB49); - WriteReg_32(DBSC_DBPDRGA0,0x00000027); - WriteReg_32(DBSC_DBPDRGD0,0x00000F14); - WriteReg_32(DBSC_DBPDRGA0,0x00000028); - WriteReg_32(DBSC_DBPDRGD0,0x00000046); - WriteReg_32(DBSC_DBPDRGA0,0x00000029); - WriteReg_32(DBSC_DBPDRGD0,0x000000A0); - WriteReg_32(DBSC_DBPDRGA0,0x0000002C); - WriteReg_32(DBSC_DBPDRGD0,0x81003047); - WriteReg_32(DBSC_DBPDRGA0,0x00000020); - WriteReg_32(DBSC_DBPDRGD0,0x00181884); - WriteReg_32(DBSC_DBPDRGA0,0x0000001A); - WriteReg_32(DBSC_DBPDRGD0,0x33C03C10); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x000000A7); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000A8); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000A9); - WriteReg_32(DBSC_DBPDRGD0,0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C7); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C8); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C9); - WriteReg_32(DBSC_DBPDRGD0,0x000D0D0D); - - WriteReg_32(DBSC_DBPDRGA0,0x0000000E); - RegVal_R2 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8) >> 0x1; + mmio_write_32(DBSC_DBSYSCNT0,0x00001234); + mmio_write_32(DBSC_DBKIND,0x00000007); + mmio_write_32(DBSC_DBMEMCONF00,0x0f030a01); + mmio_write_32(DBSC_DBPHYCONF0,0x00000001); + mmio_write_32(DBSC_DBTR0,0x0000000D); + mmio_write_32(DBSC_DBTR1,0x00000009); + mmio_write_32(DBSC_DBTR2,0x00000000); + mmio_write_32(DBSC_DBTR3,0x0000000D); + mmio_write_32(DBSC_DBTR4,0x000D000D); + mmio_write_32(DBSC_DBTR5,0x0000002D); + mmio_write_32(DBSC_DBTR6,0x00000020); + mmio_write_32(DBSC_DBTR7,0x00060006); + mmio_write_32(DBSC_DBTR8,0x00000021); + mmio_write_32(DBSC_DBTR9,0x00000007); + mmio_write_32(DBSC_DBTR10,0x0000000E); + mmio_write_32(DBSC_DBTR11,0x0000000C); + mmio_write_32(DBSC_DBTR12,0x00140014); + mmio_write_32(DBSC_DBTR13,0x000000F2); + mmio_write_32(DBSC_DBTR14,0x00170006); + mmio_write_32(DBSC_DBTR15,0x00060005); + mmio_write_32(DBSC_DBTR16,0x09210507); + mmio_write_32(DBSC_DBTR17,0x040E0000); + mmio_write_32(DBSC_DBTR18,0x00000200); + mmio_write_32(DBSC_DBTR19,0x012B004B); + mmio_write_32(DBSC_DBTR20,0x020000FB); + mmio_write_32(DBSC_DBTR21,0x00040004); + mmio_write_32(DBSC_DBBL,0x00000000); + mmio_write_32(DBSC_DBODT0,0x00000001); + mmio_write_32(DBSC_DBADJ0,0x00000001); + mmio_write_32(DBSC_DBSYSCONF1,0x00000002); + mmio_write_32(DBSC_DBDFICNT0,0x00000010); + mmio_write_32(DBSC_DBBCAMDIS,0x00000001); + mmio_write_32(DBSC_DBSCHRW1,0x00000046); + mmio_write_32(DBSC_SCFCTST0,0x0D020D04); + mmio_write_32(DBSC_SCFCTST1,0x0306040C); + + mmio_write_32(DBSC_DBPDLK0,0x0000A55A); + mmio_write_32(DBSC_DBCMD,0x01000001); + mmio_write_32(DBSC_DBCMD,0x08000000); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x80010000); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000008); + mmio_write_32(DBSC_DBPDRGD0,0x000B8000); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058A04); + mmio_write_32(DBSC_DBPDRGA0,0x00000091); + mmio_write_32(DBSC_DBPDRGD0,0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0,0x00000095); + mmio_write_32(DBSC_DBPDRGD0,0x0007BBAD); + mmio_write_32(DBSC_DBPDRGA0,0x00000099); + mmio_write_32(DBSC_DBPDRGD0,0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058A00); + mmio_write_32(DBSC_DBPDRGA0,0x00000021); + mmio_write_32(DBSC_DBPDRGD0,0x0024641E); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010073); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x0C058A00); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058A00); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000003); + mmio_write_32(DBSC_DBPDRGD0,0x0780C700); + mmio_write_32(DBSC_DBPDRGA0,0x00000007); + while ( (BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000004); + mmio_write_32(DBSC_DBPDRGD0,0x0A206F89); + mmio_write_32(DBSC_DBPDRGA0,0x00000022); + mmio_write_32(DBSC_DBPDRGD0,0x1000040B); + mmio_write_32(DBSC_DBPDRGA0,0x00000023); + mmio_write_32(DBSC_DBPDRGD0,0x35A00D77); + mmio_write_32(DBSC_DBPDRGA0,0x00000024); + mmio_write_32(DBSC_DBPDRGD0,0x2A8A2C28); + mmio_write_32(DBSC_DBPDRGA0,0x00000025); + mmio_write_32(DBSC_DBPDRGD0,0x30005E00); + mmio_write_32(DBSC_DBPDRGA0,0x00000026); + mmio_write_32(DBSC_DBPDRGD0,0x0014CB49); + mmio_write_32(DBSC_DBPDRGA0,0x00000027); + mmio_write_32(DBSC_DBPDRGD0,0x00000F14); + mmio_write_32(DBSC_DBPDRGA0,0x00000028); + mmio_write_32(DBSC_DBPDRGD0,0x00000046); + mmio_write_32(DBSC_DBPDRGA0,0x00000029); + mmio_write_32(DBSC_DBPDRGD0,0x000000A0); + mmio_write_32(DBSC_DBPDRGA0,0x0000002C); + mmio_write_32(DBSC_DBPDRGD0,0x81003047); + mmio_write_32(DBSC_DBPDRGA0,0x00000020); + mmio_write_32(DBSC_DBPDRGD0,0x00181884); + mmio_write_32(DBSC_DBPDRGA0,0x0000001A); + mmio_write_32(DBSC_DBPDRGD0,0x33C03C10); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x000000A7); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000A8); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000A9); + mmio_write_32(DBSC_DBPDRGD0,0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C7); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C8); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C9); + mmio_write_32(DBSC_DBPDRGD0,0x000D0D0D); + + mmio_write_32(DBSC_DBPDRGA0,0x0000000E); + RegVal_R2 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8) >> 0x1; RegVal_R3 = (RegVal_R2 << 16) + (RegVal_R2 << 8) + RegVal_R2; RegVal_R6 = (RegVal_R2 << 24) + (RegVal_R2 << 16) + (RegVal_R2 << 8) + RegVal_R2; - WriteReg_32(DBSC_DBPDRGA0,0x00000011); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R3); - WriteReg_32(DBSC_DBPDRGA0,0x00000012); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R3); - WriteReg_32(DBSC_DBPDRGA0,0x00000016); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000017); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000018); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000019); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010181); - WriteReg_32(DBSC_DBCMD,0x08000001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010601); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000011); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R3); + mmio_write_32(DBSC_DBPDRGA0,0x00000012); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R3); + mmio_write_32(DBSC_DBPDRGA0,0x00000016); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000017); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000018); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000019); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010181); + mmio_write_32(DBSC_DBCMD,0x08000001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010601); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i<2; i++) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; - WriteReg_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; + mmio_write_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); if ( RegVal_R6 > 0 ) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); } else { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); - - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); + + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); } } - WriteReg_32(DBSC_DBPDRGA0,0x00000005); - WriteReg_32(DBSC_DBPDRGD0,0xC1AA00C0); - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010801); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000005); - WriteReg_32(DBSC_DBPDRGD0,0xC1AA00D8); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x0001F001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x000000AF); - RegVal_R2 = ReadReg_32(DBSC_DBPDRGD0); - WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); - WriteReg_32(DBSC_DBPDRGA0,0x000000CF); - RegVal_R2 = ReadReg_32(DBSC_DBPDRGD0); - WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); - - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C000285); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C000285); - WriteReg_32(DBSC_DBPDRGA0,0x0000002C); - WriteReg_32(DBSC_DBPDRGD0,0x81003087); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010401); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000005); + mmio_write_32(DBSC_DBPDRGD0,0xC1AA00C0); + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010801); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000005); + mmio_write_32(DBSC_DBPDRGD0,0xC1AA00D8); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x0001F001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x000000AF); + RegVal_R2 = mmio_read_32(DBSC_DBPDRGD0); + mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); + mmio_write_32(DBSC_DBPDRGA0,0x000000CF); + RegVal_R2 = mmio_read_32(DBSC_DBPDRGD0); + mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); + + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C000285); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C000285); + mmio_write_32(DBSC_DBPDRGA0,0x0000002C); + mmio_write_32(DBSC_DBPDRGD0,0x81003087); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010401); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i < 2; i++) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); - RegVal_R5 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); + RegVal_R5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); RegVal_R12 = (RegVal_R5 >> 0x2); if ( RegVal_R12 < RegVal_R6 ) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); } else { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | (RegVal_R7 & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | (RegVal_R7 & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); } } - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00015001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000003); - WriteReg_32(DBSC_DBPDRGD0,0x0380C700); - WriteReg_32(DBSC_DBPDRGA0,0x00000007); - while ( (BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) != 0 ); - WriteReg_32(DBSC_DBPDRGA0,0x00000021); - WriteReg_32(DBSC_DBPDRGD0,0x0024643E); - - WriteReg_32(DBSC_DBBUS0CNF1,0x00000010); - WriteReg_32(DBSC_DBCALCNF,0x0100401B); - WriteReg_32(DBSC_DBRFCNF1,0x00080E23); - WriteReg_32(DBSC_DBRFCNF2,0x00010000); - WriteReg_32(DBSC_DBDFICUPDCNF,0x40100001); - WriteReg_32(DBSC_DBRFEN,0x00000001); - WriteReg_32(DBSC_DBACEN,0x00000001); - WriteReg_32(DBSC_DBPDLK0,0x00000000); - WriteReg_32(DBSC_DBSYSCNT0,0x00000000); + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00015001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000003); + mmio_write_32(DBSC_DBPDRGD0,0x0380C700); + mmio_write_32(DBSC_DBPDRGA0,0x00000007); + while ( (BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) != 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000021); + mmio_write_32(DBSC_DBPDRGD0,0x0024643E); + + mmio_write_32(DBSC_DBBUS0CNF1,0x00000010); + mmio_write_32(DBSC_DBCALCNF,0x0100401B); + mmio_write_32(DBSC_DBRFCNF1,0x00080E23); + mmio_write_32(DBSC_DBRFCNF2,0x00010000); + mmio_write_32(DBSC_DBDFICUPDCNF,0x40100001); + mmio_write_32(DBSC_DBRFEN,0x00000001); + mmio_write_32(DBSC_DBACEN,0x00000001); + mmio_write_32(DBSC_DBPDLK0,0x00000000); + mmio_write_32(DBSC_DBSYSCNT0,0x00000000); #ifdef ddr_qos_init_setting // only for non qos_init - WriteReg_32(DBSC_DBSYSCNT0,0x00001234); - WriteReg_32(DBSC_DBCAM0CNF1,0x00043218); - WriteReg_32(DBSC_DBCAM0CNF2,0x000000F4); - WriteReg_32(DBSC_DBSCHCNT0,0x000f0037); - WriteReg_32(DBSC_DBSCHSZ0,0x00000001); - WriteReg_32(DBSC_DBSCHRW0,0x22421111); - WriteReg_32(DBSC_SCFCTST2,0x012F1123); - WriteReg_32(DBSC_DBSCHQOS00,0x00000F00); - WriteReg_32(DBSC_DBSCHQOS01,0x00000B00); - WriteReg_32(DBSC_DBSCHQOS02,0x00000000); - WriteReg_32(DBSC_DBSCHQOS03,0x00000000); - WriteReg_32(DBSC_DBSCHQOS40,0x00000300); - WriteReg_32(DBSC_DBSCHQOS41,0x000002F0); - WriteReg_32(DBSC_DBSCHQOS42,0x00000200); - WriteReg_32(DBSC_DBSCHQOS43,0x00000100); - WriteReg_32(DBSC_DBSCHQOS90,0x00000300); - WriteReg_32(DBSC_DBSCHQOS91,0x000002F0); - WriteReg_32(DBSC_DBSCHQOS92,0x00000200); - WriteReg_32(DBSC_DBSCHQOS93,0x00000100); - WriteReg_32(DBSC_DBSCHQOS130,0x00000100); - WriteReg_32(DBSC_DBSCHQOS131,0x000000F0); - WriteReg_32(DBSC_DBSCHQOS132,0x000000A0); - WriteReg_32(DBSC_DBSCHQOS133,0x00000040); - WriteReg_32(DBSC_DBSCHQOS140,0x000000C0); - WriteReg_32(DBSC_DBSCHQOS141,0x000000B0); - WriteReg_32(DBSC_DBSCHQOS142,0x00000080); - WriteReg_32(DBSC_DBSCHQOS143,0x00000040); - WriteReg_32(DBSC_DBSCHQOS150,0x00000040); - WriteReg_32(DBSC_DBSCHQOS151,0x00000030); - WriteReg_32(DBSC_DBSCHQOS152,0x00000020); - WriteReg_32(DBSC_DBSCHQOS153,0x00000010); - WriteReg_32(0xE67F0018,0x00000001); - WriteReg_32(DBSC_DBSYSCNT0,0x00000000); + mmio_write_32(DBSC_DBSYSCNT0,0x00001234); + mmio_write_32(DBSC_DBCAM0CNF1,0x00043218); + mmio_write_32(DBSC_DBCAM0CNF2,0x000000F4); + mmio_write_32(DBSC_DBSCHCNT0,0x000f0037); + mmio_write_32(DBSC_DBSCHSZ0,0x00000001); + mmio_write_32(DBSC_DBSCHRW0,0x22421111); + mmio_write_32(DBSC_SCFCTST2,0x012F1123); + mmio_write_32(DBSC_DBSCHQOS00,0x00000F00); + mmio_write_32(DBSC_DBSCHQOS01,0x00000B00); + mmio_write_32(DBSC_DBSCHQOS02,0x00000000); + mmio_write_32(DBSC_DBSCHQOS03,0x00000000); + mmio_write_32(DBSC_DBSCHQOS40,0x00000300); + mmio_write_32(DBSC_DBSCHQOS41,0x000002F0); + mmio_write_32(DBSC_DBSCHQOS42,0x00000200); + mmio_write_32(DBSC_DBSCHQOS43,0x00000100); + mmio_write_32(DBSC_DBSCHQOS90,0x00000300); + mmio_write_32(DBSC_DBSCHQOS91,0x000002F0); + mmio_write_32(DBSC_DBSCHQOS92,0x00000200); + mmio_write_32(DBSC_DBSCHQOS93,0x00000100); + mmio_write_32(DBSC_DBSCHQOS130,0x00000100); + mmio_write_32(DBSC_DBSCHQOS131,0x000000F0); + mmio_write_32(DBSC_DBSCHQOS132,0x000000A0); + mmio_write_32(DBSC_DBSCHQOS133,0x00000040); + mmio_write_32(DBSC_DBSCHQOS140,0x000000C0); + mmio_write_32(DBSC_DBSCHQOS141,0x000000B0); + mmio_write_32(DBSC_DBSCHQOS142,0x00000080); + mmio_write_32(DBSC_DBSCHQOS143,0x00000040); + mmio_write_32(DBSC_DBSCHQOS150,0x00000040); + mmio_write_32(DBSC_DBSCHQOS151,0x00000030); + mmio_write_32(DBSC_DBSCHQOS152,0x00000020); + mmio_write_32(DBSC_DBSCHQOS153,0x00000010); + mmio_write_32(0xE67F0018,0x00000001); + mmio_write_32(DBSC_DBSYSCNT0,0x00000000); #endif } @@ -346,313 +335,313 @@ static void init_ddr_d3_1600(void) { uint32_t RegVal_R2, RegVal_R3, RegVal_R5, RegVal_R6, RegVal_R7, RegVal_R12; - WriteReg_32(DBSC_DBSYSCNT0,0x00001234); - WriteReg_32(DBSC_DBKIND,0x00000007); - WriteReg_32(DBSC_DBMEMCONF00,0x0f030a01); - WriteReg_32(DBSC_DBPHYCONF0,0x00000001); - WriteReg_32(DBSC_DBTR0,0x0000000B); - WriteReg_32(DBSC_DBTR1,0x00000008); - WriteReg_32(DBSC_DBTR2,0x00000000); - WriteReg_32(DBSC_DBTR3,0x0000000B); - WriteReg_32(DBSC_DBTR4,0x000B000B); - WriteReg_32(DBSC_DBTR5,0x00000027); - WriteReg_32(DBSC_DBTR6,0x0000001C); - WriteReg_32(DBSC_DBTR7,0x00060006); - WriteReg_32(DBSC_DBTR8,0x00000020); - WriteReg_32(DBSC_DBTR9,0x00000006); - WriteReg_32(DBSC_DBTR10,0x0000000C); - WriteReg_32(DBSC_DBTR11,0x0000000A); - WriteReg_32(DBSC_DBTR12,0x00120012); - WriteReg_32(DBSC_DBTR13,0x000000D0); - WriteReg_32(DBSC_DBTR14,0x00140005); - WriteReg_32(DBSC_DBTR15,0x00050004); - WriteReg_32(DBSC_DBTR16,0x071F0305); - WriteReg_32(DBSC_DBTR17,0x040C0000); - WriteReg_32(DBSC_DBTR18,0x00000200); - WriteReg_32(DBSC_DBTR19,0x01000040); - WriteReg_32(DBSC_DBTR20,0x020000D8); - WriteReg_32(DBSC_DBTR21,0x00040004); - WriteReg_32(DBSC_DBBL,0x00000000); - WriteReg_32(DBSC_DBODT0,0x00000001); - WriteReg_32(DBSC_DBADJ0,0x00000001); - WriteReg_32(DBSC_DBSYSCONF1,0x00000002); - WriteReg_32(DBSC_DBDFICNT0,0x00000010); - WriteReg_32(DBSC_DBBCAMDIS,0x00000001); - WriteReg_32(DBSC_DBSCHRW1,0x00000046); - WriteReg_32(DBSC_SCFCTST0,0x0D020C04); - WriteReg_32(DBSC_SCFCTST1,0x0305040C); - - WriteReg_32(DBSC_DBPDLK0,0x0000A55A); - WriteReg_32(DBSC_DBCMD,0x01000001); - WriteReg_32(DBSC_DBCMD,0x08000000); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x80010000); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000008); - WriteReg_32(DBSC_DBPDRGD0,0x000B8000); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058904); - WriteReg_32(DBSC_DBPDRGA0,0x00000091); - WriteReg_32(DBSC_DBPDRGD0,0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0,0x00000095); - WriteReg_32(DBSC_DBPDRGD0,0x0007BBAD); - WriteReg_32(DBSC_DBPDRGA0,0x00000099); - WriteReg_32(DBSC_DBPDRGD0,0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058900); - WriteReg_32(DBSC_DBPDRGA0,0x00000021); - WriteReg_32(DBSC_DBPDRGD0,0x0024641E); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010073); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x0C058900); - WriteReg_32(DBSC_DBPDRGA0,0x00000090); - WriteReg_32(DBSC_DBPDRGD0,0x04058900); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000003); - WriteReg_32(DBSC_DBPDRGD0,0x0780C700); - WriteReg_32(DBSC_DBPDRGA0,0x00000007); - while ( (BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000004); - WriteReg_32(DBSC_DBPDRGD0,0x08C05FF0); - WriteReg_32(DBSC_DBPDRGA0,0x00000022); - WriteReg_32(DBSC_DBPDRGD0,0x1000040B); - WriteReg_32(DBSC_DBPDRGA0,0x00000023); - WriteReg_32(DBSC_DBPDRGD0,0x2D9C0B66); - WriteReg_32(DBSC_DBPDRGA0,0x00000024); - WriteReg_32(DBSC_DBPDRGD0,0x2A88C400); - WriteReg_32(DBSC_DBPDRGA0,0x00000025); - WriteReg_32(DBSC_DBPDRGD0,0x30005200); - WriteReg_32(DBSC_DBPDRGA0,0x00000026); - WriteReg_32(DBSC_DBPDRGD0,0x0014A9C9); - WriteReg_32(DBSC_DBPDRGA0,0x00000027); - WriteReg_32(DBSC_DBPDRGD0,0x00000D70); - WriteReg_32(DBSC_DBPDRGA0,0x00000028); - WriteReg_32(DBSC_DBPDRGD0,0x00000046); - WriteReg_32(DBSC_DBPDRGA0,0x00000029); - WriteReg_32(DBSC_DBPDRGD0,0x00000098); - WriteReg_32(DBSC_DBPDRGA0,0x0000002C); - WriteReg_32(DBSC_DBPDRGD0,0x81003047); - WriteReg_32(DBSC_DBPDRGA0,0x00000020); - WriteReg_32(DBSC_DBPDRGD0,0x00181884); - WriteReg_32(DBSC_DBPDRGA0,0x0000001A); - WriteReg_32(DBSC_DBPDRGD0,0x33C03C10); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x000000A7); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000A8); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000A9); - WriteReg_32(DBSC_DBPDRGD0,0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C7); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C8); - WriteReg_32(DBSC_DBPDRGD0,0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0x000000C9); - WriteReg_32(DBSC_DBPDRGD0,0x000D0D0D); - - WriteReg_32(DBSC_DBPDRGA0,0x0000000E); - RegVal_R2 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8) >> 0x1; + mmio_write_32(DBSC_DBSYSCNT0,0x00001234); + mmio_write_32(DBSC_DBKIND,0x00000007); + mmio_write_32(DBSC_DBMEMCONF00,0x0f030a01); + mmio_write_32(DBSC_DBPHYCONF0,0x00000001); + mmio_write_32(DBSC_DBTR0,0x0000000B); + mmio_write_32(DBSC_DBTR1,0x00000008); + mmio_write_32(DBSC_DBTR2,0x00000000); + mmio_write_32(DBSC_DBTR3,0x0000000B); + mmio_write_32(DBSC_DBTR4,0x000B000B); + mmio_write_32(DBSC_DBTR5,0x00000027); + mmio_write_32(DBSC_DBTR6,0x0000001C); + mmio_write_32(DBSC_DBTR7,0x00060006); + mmio_write_32(DBSC_DBTR8,0x00000020); + mmio_write_32(DBSC_DBTR9,0x00000006); + mmio_write_32(DBSC_DBTR10,0x0000000C); + mmio_write_32(DBSC_DBTR11,0x0000000A); + mmio_write_32(DBSC_DBTR12,0x00120012); + mmio_write_32(DBSC_DBTR13,0x000000D0); + mmio_write_32(DBSC_DBTR14,0x00140005); + mmio_write_32(DBSC_DBTR15,0x00050004); + mmio_write_32(DBSC_DBTR16,0x071F0305); + mmio_write_32(DBSC_DBTR17,0x040C0000); + mmio_write_32(DBSC_DBTR18,0x00000200); + mmio_write_32(DBSC_DBTR19,0x01000040); + mmio_write_32(DBSC_DBTR20,0x020000D8); + mmio_write_32(DBSC_DBTR21,0x00040004); + mmio_write_32(DBSC_DBBL,0x00000000); + mmio_write_32(DBSC_DBODT0,0x00000001); + mmio_write_32(DBSC_DBADJ0,0x00000001); + mmio_write_32(DBSC_DBSYSCONF1,0x00000002); + mmio_write_32(DBSC_DBDFICNT0,0x00000010); + mmio_write_32(DBSC_DBBCAMDIS,0x00000001); + mmio_write_32(DBSC_DBSCHRW1,0x00000046); + mmio_write_32(DBSC_SCFCTST0,0x0D020C04); + mmio_write_32(DBSC_SCFCTST1,0x0305040C); + + mmio_write_32(DBSC_DBPDLK0,0x0000A55A); + mmio_write_32(DBSC_DBCMD,0x01000001); + mmio_write_32(DBSC_DBCMD,0x08000000); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x80010000); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000008); + mmio_write_32(DBSC_DBPDRGD0,0x000B8000); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058904); + mmio_write_32(DBSC_DBPDRGA0,0x00000091); + mmio_write_32(DBSC_DBPDRGD0,0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0,0x00000095); + mmio_write_32(DBSC_DBPDRGD0,0x0007BBAD); + mmio_write_32(DBSC_DBPDRGA0,0x00000099); + mmio_write_32(DBSC_DBPDRGD0,0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058900); + mmio_write_32(DBSC_DBPDRGA0,0x00000021); + mmio_write_32(DBSC_DBPDRGD0,0x0024641E); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010073); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x0C058900); + mmio_write_32(DBSC_DBPDRGA0,0x00000090); + mmio_write_32(DBSC_DBPDRGD0,0x04058900); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000003); + mmio_write_32(DBSC_DBPDRGD0,0x0780C700); + mmio_write_32(DBSC_DBPDRGA0,0x00000007); + while ( (BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000004); + mmio_write_32(DBSC_DBPDRGD0,0x08C05FF0); + mmio_write_32(DBSC_DBPDRGA0,0x00000022); + mmio_write_32(DBSC_DBPDRGD0,0x1000040B); + mmio_write_32(DBSC_DBPDRGA0,0x00000023); + mmio_write_32(DBSC_DBPDRGD0,0x2D9C0B66); + mmio_write_32(DBSC_DBPDRGA0,0x00000024); + mmio_write_32(DBSC_DBPDRGD0,0x2A88C400); + mmio_write_32(DBSC_DBPDRGA0,0x00000025); + mmio_write_32(DBSC_DBPDRGD0,0x30005200); + mmio_write_32(DBSC_DBPDRGA0,0x00000026); + mmio_write_32(DBSC_DBPDRGD0,0x0014A9C9); + mmio_write_32(DBSC_DBPDRGA0,0x00000027); + mmio_write_32(DBSC_DBPDRGD0,0x00000D70); + mmio_write_32(DBSC_DBPDRGA0,0x00000028); + mmio_write_32(DBSC_DBPDRGD0,0x00000046); + mmio_write_32(DBSC_DBPDRGA0,0x00000029); + mmio_write_32(DBSC_DBPDRGD0,0x00000098); + mmio_write_32(DBSC_DBPDRGA0,0x0000002C); + mmio_write_32(DBSC_DBPDRGD0,0x81003047); + mmio_write_32(DBSC_DBPDRGA0,0x00000020); + mmio_write_32(DBSC_DBPDRGD0,0x00181884); + mmio_write_32(DBSC_DBPDRGA0,0x0000001A); + mmio_write_32(DBSC_DBPDRGD0,0x33C03C10); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x000000A7); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000A8); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000A9); + mmio_write_32(DBSC_DBPDRGD0,0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C7); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C8); + mmio_write_32(DBSC_DBPDRGD0,0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0x000000C9); + mmio_write_32(DBSC_DBPDRGD0,0x000D0D0D); + + mmio_write_32(DBSC_DBPDRGA0,0x0000000E); + RegVal_R2 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8) >> 0x1; RegVal_R3 = (RegVal_R2 << 16) + (RegVal_R2 << 8) + RegVal_R2; RegVal_R6 = (RegVal_R2 << 24) + (RegVal_R2 << 16) + (RegVal_R2 << 8) + RegVal_R2; - WriteReg_32(DBSC_DBPDRGA0,0x00000011); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R3); - WriteReg_32(DBSC_DBPDRGA0,0x00000012); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R3); - WriteReg_32(DBSC_DBPDRGA0,0x00000016); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000017); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000018); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - WriteReg_32(DBSC_DBPDRGA0,0x00000019); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R6); - - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010181); - WriteReg_32(DBSC_DBCMD,0x08000001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010601); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000011); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R3); + mmio_write_32(DBSC_DBPDRGA0,0x00000012); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R3); + mmio_write_32(DBSC_DBPDRGA0,0x00000016); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000017); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000018); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x00000019); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R6); + + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010181); + mmio_write_32(DBSC_DBCMD,0x08000001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010601); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i<2; i++) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; - WriteReg_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; + mmio_write_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); if ( RegVal_R6 > 0 ) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); } else { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); - - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); + + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); } } - WriteReg_32(DBSC_DBPDRGA0,0x00000005); - WriteReg_32(DBSC_DBPDRGD0,0xC1AA00C0); - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010801); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000005); - WriteReg_32(DBSC_DBPDRGD0,0xC1AA00D8); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x0001F001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x000000AF); - RegVal_R2 = ReadReg_32(DBSC_DBPDRGD0); - WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); - WriteReg_32(DBSC_DBPDRGA0,0x000000CF); - RegVal_R2 = ReadReg_32(DBSC_DBPDRGD0); - WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); - - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C000285); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C000285); - WriteReg_32(DBSC_DBPDRGA0,0x0000002C); - WriteReg_32(DBSC_DBPDRGD0,0x81003087); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00010401); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000005); + mmio_write_32(DBSC_DBPDRGD0,0xC1AA00C0); + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010801); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000005); + mmio_write_32(DBSC_DBPDRGD0,0xC1AA00D8); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x0001F001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x000000AF); + RegVal_R2 = mmio_read_32(DBSC_DBPDRGD0); + mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); + mmio_write_32(DBSC_DBPDRGA0,0x000000CF); + RegVal_R2 = mmio_read_32(DBSC_DBPDRGD0); + mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R2 + 0x1) & 0x000000FF) | (RegVal_R2 & 0xFFFFFF00))); + + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C000285); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C000285); + mmio_write_32(DBSC_DBPDRGA0,0x0000002C); + mmio_write_32(DBSC_DBPDRGD0,0x81003087); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00010401); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i < 2; i++) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); - RegVal_R5 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0,0x000000B1 + i*0x20); + RegVal_R5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B4 + i*0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0,0x000000B3 + i*0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); RegVal_R12 = (RegVal_R5 >> 0x2); if ( RegVal_R12 < RegVal_R6 ) { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); } else { - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | (RegVal_R7 & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0,0x000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | (RegVal_R7 & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0,0x000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); } } - WriteReg_32(DBSC_DBPDRGA0,0x000000A0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x000000C0); - WriteReg_32(DBSC_DBPDRGD0,0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0x00000001); - WriteReg_32(DBSC_DBPDRGD0,0x00015001); - WriteReg_32(DBSC_DBPDRGA0,0x00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); - - WriteReg_32(DBSC_DBPDRGA0,0x00000003); - WriteReg_32(DBSC_DBPDRGD0,0x0380C700); - WriteReg_32(DBSC_DBPDRGA0,0x00000007); - while ( (BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) != 0 ); - WriteReg_32(DBSC_DBPDRGA0,0x00000021); - WriteReg_32(DBSC_DBPDRGD0,0x0024643E); - - WriteReg_32(DBSC_DBBUS0CNF1,0x00000010); - WriteReg_32(DBSC_DBCALCNF,0x0100401B); - WriteReg_32(DBSC_DBRFCNF1,0x00080C30); - WriteReg_32(DBSC_DBRFCNF2,0x00010000); - WriteReg_32(DBSC_DBDFICUPDCNF,0x40100001); - WriteReg_32(DBSC_DBRFEN,0x00000001); - WriteReg_32(DBSC_DBACEN,0x00000001); - WriteReg_32(DBSC_DBPDLK0,0x00000000); - WriteReg_32(DBSC_DBSYSCNT0,0x00000000); + mmio_write_32(DBSC_DBPDRGA0,0x000000A0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x000000C0); + mmio_write_32(DBSC_DBPDRGD0,0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0x00000001); + mmio_write_32(DBSC_DBPDRGD0,0x00015001); + mmio_write_32(DBSC_DBPDRGA0,0x00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); + + mmio_write_32(DBSC_DBPDRGA0,0x00000003); + mmio_write_32(DBSC_DBPDRGD0,0x0380C700); + mmio_write_32(DBSC_DBPDRGA0,0x00000007); + while ( (BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) != 0 ); + mmio_write_32(DBSC_DBPDRGA0,0x00000021); + mmio_write_32(DBSC_DBPDRGD0,0x0024643E); + + mmio_write_32(DBSC_DBBUS0CNF1,0x00000010); + mmio_write_32(DBSC_DBCALCNF,0x0100401B); + mmio_write_32(DBSC_DBRFCNF1,0x00080C30); + mmio_write_32(DBSC_DBRFCNF2,0x00010000); + mmio_write_32(DBSC_DBDFICUPDCNF,0x40100001); + mmio_write_32(DBSC_DBRFEN,0x00000001); + mmio_write_32(DBSC_DBACEN,0x00000001); + mmio_write_32(DBSC_DBPDLK0,0x00000000); + mmio_write_32(DBSC_DBSYSCNT0,0x00000000); #ifdef ddr_qos_init_setting // only for non qos_init - WriteReg_32(DBSC_DBSYSCNT0,0x00001234); - WriteReg_32(DBSC_DBCAM0CNF1,0x00043218); - WriteReg_32(DBSC_DBCAM0CNF2,0x000000F4); - WriteReg_32(DBSC_DBSCHCNT0,0x000f0037); - WriteReg_32(DBSC_DBSCHSZ0,0x00000001); - WriteReg_32(DBSC_DBSCHRW0,0x22421111); - WriteReg_32(DBSC_SCFCTST2,0x012F1123); - WriteReg_32(DBSC_DBSCHQOS00,0x00000F00); - WriteReg_32(DBSC_DBSCHQOS01,0x00000B00); - WriteReg_32(DBSC_DBSCHQOS02,0x00000000); - WriteReg_32(DBSC_DBSCHQOS03,0x00000000); - WriteReg_32(DBSC_DBSCHQOS40,0x00000300); - WriteReg_32(DBSC_DBSCHQOS41,0x000002F0); - WriteReg_32(DBSC_DBSCHQOS42,0x00000200); - WriteReg_32(DBSC_DBSCHQOS43,0x00000100); - WriteReg_32(DBSC_DBSCHQOS90,0x00000300); - WriteReg_32(DBSC_DBSCHQOS91,0x000002F0); - WriteReg_32(DBSC_DBSCHQOS92,0x00000200); - WriteReg_32(DBSC_DBSCHQOS93,0x00000100); - WriteReg_32(DBSC_DBSCHQOS130,0x00000100); - WriteReg_32(DBSC_DBSCHQOS131,0x000000F0); - WriteReg_32(DBSC_DBSCHQOS132,0x000000A0); - WriteReg_32(DBSC_DBSCHQOS133,0x00000040); - WriteReg_32(DBSC_DBSCHQOS140,0x000000C0); - WriteReg_32(DBSC_DBSCHQOS141,0x000000B0); - WriteReg_32(DBSC_DBSCHQOS142,0x00000080); - WriteReg_32(DBSC_DBSCHQOS143,0x00000040); - WriteReg_32(DBSC_DBSCHQOS150,0x00000040); - WriteReg_32(DBSC_DBSCHQOS151,0x00000030); - WriteReg_32(DBSC_DBSCHQOS152,0x00000020); - WriteReg_32(DBSC_DBSCHQOS153,0x00000010); - WriteReg_32(0xE67F0018,0x00000001); - WriteReg_32(DBSC_DBSYSCNT0,0x00000000); + mmio_write_32(DBSC_DBSYSCNT0,0x00001234); + mmio_write_32(DBSC_DBCAM0CNF1,0x00043218); + mmio_write_32(DBSC_DBCAM0CNF2,0x000000F4); + mmio_write_32(DBSC_DBSCHCNT0,0x000f0037); + mmio_write_32(DBSC_DBSCHSZ0,0x00000001); + mmio_write_32(DBSC_DBSCHRW0,0x22421111); + mmio_write_32(DBSC_SCFCTST2,0x012F1123); + mmio_write_32(DBSC_DBSCHQOS00,0x00000F00); + mmio_write_32(DBSC_DBSCHQOS01,0x00000B00); + mmio_write_32(DBSC_DBSCHQOS02,0x00000000); + mmio_write_32(DBSC_DBSCHQOS03,0x00000000); + mmio_write_32(DBSC_DBSCHQOS40,0x00000300); + mmio_write_32(DBSC_DBSCHQOS41,0x000002F0); + mmio_write_32(DBSC_DBSCHQOS42,0x00000200); + mmio_write_32(DBSC_DBSCHQOS43,0x00000100); + mmio_write_32(DBSC_DBSCHQOS90,0x00000300); + mmio_write_32(DBSC_DBSCHQOS91,0x000002F0); + mmio_write_32(DBSC_DBSCHQOS92,0x00000200); + mmio_write_32(DBSC_DBSCHQOS93,0x00000100); + mmio_write_32(DBSC_DBSCHQOS130,0x00000100); + mmio_write_32(DBSC_DBSCHQOS131,0x000000F0); + mmio_write_32(DBSC_DBSCHQOS132,0x000000A0); + mmio_write_32(DBSC_DBSCHQOS133,0x00000040); + mmio_write_32(DBSC_DBSCHQOS140,0x000000C0); + mmio_write_32(DBSC_DBSCHQOS141,0x000000B0); + mmio_write_32(DBSC_DBSCHQOS142,0x00000080); + mmio_write_32(DBSC_DBSCHQOS143,0x00000040); + mmio_write_32(DBSC_DBSCHQOS150,0x00000040); + mmio_write_32(DBSC_DBSCHQOS151,0x00000030); + mmio_write_32(DBSC_DBSCHQOS152,0x00000020); + mmio_write_32(DBSC_DBSCHQOS153,0x00000010); + mmio_write_32(0xE67F0018,0x00000001); + mmio_write_32(DBSC_DBSYSCNT0,0x00000000); #endif } diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c index 59919a49..8b25546d 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_e3.c @@ -4,6 +4,7 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include #include #include @@ -13,36 +14,11 @@ #include "../dram_sub_func.h" -/* rev.0.04 add variables */ /******************************************************************************* * variables ******************************************************************************/ uint32_t ddrBackup; -/* rev.0.03 add Prototypes */ -/******************************************************************************* - * Prototypes - ******************************************************************************/ -/* static uint32_t init_ddr(void); rev.0.04 */ -/* static uint32_t recovery_from_backup_mode(void); rev.0.04 */ -/* int32_t dram_update_boot_status(uint32_t status); rev.0.04 */ - -/* rev.0.03 add Comment */ -/******************************************************************************* - * register write/read function - ******************************************************************************/ -static void WriteReg_32(uint32_t a, uint32_t v) -{ - (*(volatile uint32_t*)(uintptr_t)a) = v; -} /* WriteReg_32 */ - -static uint32_t ReadReg_32(uint32_t a) -{ - uint32_t w = (*(volatile uint32_t*)(uintptr_t)a); - return w; -} /* ReadReg_32 */ - -/* rev.0.04 add Comment */ /******************************************************************************* * Initialize ddr ******************************************************************************/ @@ -62,7 +38,7 @@ uint32_t init_ddr(void) uint32_t byp_ctl; /* rev.0.08 */ - if ((ReadReg_32(0xFFF00044) & 0x000000FF) == 0x00000000) { + if ((mmio_read_32(0xFFF00044) & 0x000000FF) == 0x00000000) { pdqsr_ctl = 1; lcdl_ctl = 1; pdr_ctl = 1; /* rev.0.10 */ @@ -75,356 +51,356 @@ uint32_t init_ddr(void) } /* Judge the DDR bit rate (ddr_md : 0 = 1584Mbps, 1 = 1856Mbps) */ - ddr_md = (ReadReg_32(RST_MODEMR) >> 19) & BIT(0); + ddr_md = (mmio_read_32(RST_MODEMR) >> 19) & BIT(0); /* 1584Mbps setting */ if (ddr_md == 0) { /* CPG setting ===============================================*/ - WriteReg_32(CPG_CPGWPR, 0x5A5AFFFF); - WriteReg_32(CPG_CPGWPCR, 0xA5A50000); + mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF); + mmio_write_32(CPG_CPGWPCR, 0xA5A50000); - WriteReg_32(CPG_SRCR4, 0x20000000); + mmio_write_32(CPG_SRCR4, 0x20000000); - WriteReg_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */ - while ((BIT(11) & ReadReg_32(CPG_PLLECR)) == 0); + mmio_write_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */ + while ((BIT(11) & mmio_read_32(CPG_PLLECR)) == 0); - WriteReg_32(CPG_SRSTCLR4, 0x20000000); + mmio_write_32(CPG_SRSTCLR4, 0x20000000); - WriteReg_32(CPG_CPGWPCR, 0xA5A50001); + mmio_write_32(CPG_CPGWPCR, 0xA5A50001); /* CPG setting ===============================================*/ } /* ddr_md */ - WriteReg_32(DBSC_DBSYSCNT0, 0x00001234); - WriteReg_32(DBSC_DBKIND, 0x00000007); + mmio_write_32(DBSC_DBSYSCNT0, 0x00001234); + mmio_write_32(DBSC_DBKIND, 0x00000007); #if RCAR_DRAM_DDR3L_MEMCONF == 0 - WriteReg_32(DBSC_DBMEMCONF00, 0x0f030a02); /* 1GB */ + mmio_write_32(DBSC_DBMEMCONF00, 0x0f030a02); /* 1GB */ #else - WriteReg_32(DBSC_DBMEMCONF00, 0x10030a02); /* 2GB(default) */ + mmio_write_32(DBSC_DBMEMCONF00, 0x10030a02); /* 2GB(default) */ #endif #if RCAR_DRAM_DDR3L_MEMDUAL == 1 - RegVal_R2 = (ReadReg_32(0xE6790614)); - WriteReg_32(0xE6790614, RegVal_R2 | 0x00000003); /* MCS1_N/MODT1 are activated. */ + RegVal_R2 = (mmio_read_32(0xE6790614)); + mmio_write_32(0xE6790614, RegVal_R2 | 0x00000003); /* MCS1_N/MODT1 are activated. */ #endif - WriteReg_32(DBSC_DBPHYCONF0, 0x00000001); + mmio_write_32(DBSC_DBPHYCONF0, 0x00000001); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR0, 0x0000000B); - WriteReg_32(DBSC_DBTR1, 0x00000008); + mmio_write_32(DBSC_DBTR0, 0x0000000B); + mmio_write_32(DBSC_DBTR1, 0x00000008); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR0, 0x0000000D); - WriteReg_32(DBSC_DBTR1, 0x00000009); + mmio_write_32(DBSC_DBTR0, 0x0000000D); + mmio_write_32(DBSC_DBTR1, 0x00000009); } /* ddr_md */ - WriteReg_32(DBSC_DBTR2, 0x00000000); + mmio_write_32(DBSC_DBTR2, 0x00000000); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR3, 0x0000000B); - WriteReg_32(DBSC_DBTR4, 0x000B000B); - WriteReg_32(DBSC_DBTR5, 0x00000027); - WriteReg_32(DBSC_DBTR6, 0x0000001C); + mmio_write_32(DBSC_DBTR3, 0x0000000B); + mmio_write_32(DBSC_DBTR4, 0x000B000B); + mmio_write_32(DBSC_DBTR5, 0x00000027); + mmio_write_32(DBSC_DBTR6, 0x0000001C); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR3, 0x0000000D); - WriteReg_32(DBSC_DBTR4, 0x000D000D); - WriteReg_32(DBSC_DBTR5, 0x0000002D); - WriteReg_32(DBSC_DBTR6, 0x00000020); + mmio_write_32(DBSC_DBTR3, 0x0000000D); + mmio_write_32(DBSC_DBTR4, 0x000D000D); + mmio_write_32(DBSC_DBTR5, 0x0000002D); + mmio_write_32(DBSC_DBTR6, 0x00000020); } /* ddr_md */ - WriteReg_32(DBSC_DBTR7, 0x00060006); + mmio_write_32(DBSC_DBTR7, 0x00060006); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR8, 0x00000020); - WriteReg_32(DBSC_DBTR9, 0x00000006); - WriteReg_32(DBSC_DBTR10, 0x0000000C); - WriteReg_32(DBSC_DBTR11, 0x0000000A); - WriteReg_32(DBSC_DBTR12, 0x00120012); - WriteReg_32(DBSC_DBTR13, 0x000000CE); - WriteReg_32(DBSC_DBTR14, 0x00140005); - WriteReg_32(DBSC_DBTR15, 0x00050004); - WriteReg_32(DBSC_DBTR16, 0x071F0305); - WriteReg_32(DBSC_DBTR17, 0x040C0000); + mmio_write_32(DBSC_DBTR8, 0x00000020); + mmio_write_32(DBSC_DBTR9, 0x00000006); + mmio_write_32(DBSC_DBTR10, 0x0000000C); + mmio_write_32(DBSC_DBTR11, 0x0000000A); + mmio_write_32(DBSC_DBTR12, 0x00120012); + mmio_write_32(DBSC_DBTR13, 0x000000CE); + mmio_write_32(DBSC_DBTR14, 0x00140005); + mmio_write_32(DBSC_DBTR15, 0x00050004); + mmio_write_32(DBSC_DBTR16, 0x071F0305); + mmio_write_32(DBSC_DBTR17, 0x040C0000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR8, 0x00000021); - WriteReg_32(DBSC_DBTR9, 0x00000007); - WriteReg_32(DBSC_DBTR10, 0x0000000E); - WriteReg_32(DBSC_DBTR11, 0x0000000C); - WriteReg_32(DBSC_DBTR12, 0x00140014); - WriteReg_32(DBSC_DBTR13, 0x000000F2); - WriteReg_32(DBSC_DBTR14, 0x00170006); - WriteReg_32(DBSC_DBTR15, 0x00060005); - WriteReg_32(DBSC_DBTR16, 0x09210507); - WriteReg_32(DBSC_DBTR17, 0x040E0000); + mmio_write_32(DBSC_DBTR8, 0x00000021); + mmio_write_32(DBSC_DBTR9, 0x00000007); + mmio_write_32(DBSC_DBTR10, 0x0000000E); + mmio_write_32(DBSC_DBTR11, 0x0000000C); + mmio_write_32(DBSC_DBTR12, 0x00140014); + mmio_write_32(DBSC_DBTR13, 0x000000F2); + mmio_write_32(DBSC_DBTR14, 0x00170006); + mmio_write_32(DBSC_DBTR15, 0x00060005); + mmio_write_32(DBSC_DBTR16, 0x09210507); + mmio_write_32(DBSC_DBTR17, 0x040E0000); } /* ddr_md */ - WriteReg_32(DBSC_DBTR18, 0x00000200); + mmio_write_32(DBSC_DBTR18, 0x00000200); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR19, 0x01000040); - WriteReg_32(DBSC_DBTR20, 0x020000D6); + mmio_write_32(DBSC_DBTR19, 0x01000040); + mmio_write_32(DBSC_DBTR20, 0x020000D6); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR19, 0x0129004B); - WriteReg_32(DBSC_DBTR20, 0x020000FB); + mmio_write_32(DBSC_DBTR19, 0x0129004B); + mmio_write_32(DBSC_DBTR20, 0x020000FB); } /* ddr_md */ - WriteReg_32(DBSC_DBTR21, 0x00040004); - WriteReg_32(DBSC_DBBL, 0x00000000); - WriteReg_32(DBSC_DBODT0, 0x00000001); - WriteReg_32(DBSC_DBADJ0, 0x00000001); - WriteReg_32(DBSC_DBSYSCONF1, 0x00000002); - WriteReg_32(DBSC_DBDFICNT0, 0x00000010); - WriteReg_32(DBSC_DBBCAMDIS, 0x00000001); - WriteReg_32(DBSC_DBSCHRW1, 0x00000046); + mmio_write_32(DBSC_DBTR21, 0x00040004); + mmio_write_32(DBSC_DBBL, 0x00000000); + mmio_write_32(DBSC_DBODT0, 0x00000001); + mmio_write_32(DBSC_DBADJ0, 0x00000001); + mmio_write_32(DBSC_DBSYSCONF1, 0x00000002); + mmio_write_32(DBSC_DBDFICNT0, 0x00000010); + mmio_write_32(DBSC_DBBCAMDIS, 0x00000001); + mmio_write_32(DBSC_DBSCHRW1, 0x00000046); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_SCFCTST0, 0x0D050B03); - WriteReg_32(DBSC_SCFCTST1, 0x0306030C); + mmio_write_32(DBSC_SCFCTST0, 0x0D050B03); + mmio_write_32(DBSC_SCFCTST1, 0x0306030C); } else { /* 1856Mbps */ - WriteReg_32(DBSC_SCFCTST0, 0x0C050B03); - WriteReg_32(DBSC_SCFCTST1, 0x0305030C); + mmio_write_32(DBSC_SCFCTST0, 0x0C050B03); + mmio_write_32(DBSC_SCFCTST1, 0x0305030C); } /* ddr_md */ /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step0( INITBYP ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDLK0, 0x0000A55A); - WriteReg_32(DBSC_DBCMD, 0x01840001); - WriteReg_32(DBSC_DBCMD, 0x08840000); + mmio_write_32(DBSC_DBPDLK0, 0x0000A55A); + mmio_write_32(DBSC_DBCMD, 0x01840001); + mmio_write_32(DBSC_DBCMD, 0x08840000); NOTICE("BL2: [COLD_BOOT]\n"); /* rev.0.11 */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x80010000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x80010000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step1( ZCAL,PLLINIT,DCAL,PHYRST training ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000008); - WriteReg_32(DBSC_DBPDRGD0, 0x000B8000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); + mmio_write_32(DBSC_DBPDRGA0, 0x00000008); + mmio_write_32(DBSC_DBPDRGD0, 0x000B8000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058904); + mmio_write_32(DBSC_DBPDRGD0, 0x04058904); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058A04); + mmio_write_32(DBSC_DBPDRGD0, 0x04058A04); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000091); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000095); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BBAD); - WriteReg_32(DBSC_DBPDRGA0, 0x00000099); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); + mmio_write_32(DBSC_DBPDRGA0, 0x00000091); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000095); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BBAD); + mmio_write_32(DBSC_DBPDRGA0, 0x00000099); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058900); + mmio_write_32(DBSC_DBPDRGD0, 0x04058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x04058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000021); - WriteReg_32(DBSC_DBPDRGD0, 0x0024641E); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010073); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000021); + mmio_write_32(DBSC_DBPDRGD0, 0x0024641E); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010073); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step2( DRAMRST/DRAMINT training ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058900); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058900); + mmio_write_32(DBSC_DBPDRGD0, 0x04058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x04058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000003); + mmio_write_32(DBSC_DBPDRGA0, 0x00000003); if (byp_ctl == 1) { - WriteReg_32(DBSC_DBPDRGD0, 0x0780C720); + mmio_write_32(DBSC_DBPDRGD0, 0x0780C720); } else { - WriteReg_32(DBSC_DBPDRGD0, 0x0780C700); + mmio_write_32(DBSC_DBPDRGD0, 0x0780C700); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000007); - while ((BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000007); + while ((BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000004); + mmio_write_32(DBSC_DBPDRGA0, 0x00000004); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 792 / 125) - 400 + 0x08B00000); + mmio_write_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 792 / 125) - 400 + 0x08B00000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 928 / 125) - 400 + 0x0A300000); + mmio_write_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 928 / 125) - 400 + 0x0A300000); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000022); - WriteReg_32(DBSC_DBPDRGD0, 0x1000040B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000023); + mmio_write_32(DBSC_DBPDRGA0, 0x00000022); + mmio_write_32(DBSC_DBPDRGD0, 0x1000040B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000023); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2D9C0B66); + mmio_write_32(DBSC_DBPDRGD0, 0x2D9C0B66); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x35A00D77); + mmio_write_32(DBSC_DBPDRGD0, 0x35A00D77); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000024); + mmio_write_32(DBSC_DBPDRGA0, 0x00000024); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2A88B400); + mmio_write_32(DBSC_DBPDRGD0, 0x2A88B400); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2A8A2C28); + mmio_write_32(DBSC_DBPDRGD0, 0x2A8A2C28); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000025); + mmio_write_32(DBSC_DBPDRGA0, 0x00000025); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x30005200); + mmio_write_32(DBSC_DBPDRGD0, 0x30005200); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x30005E00); + mmio_write_32(DBSC_DBPDRGD0, 0x30005E00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000026); + mmio_write_32(DBSC_DBPDRGA0, 0x00000026); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0014A9C9); + mmio_write_32(DBSC_DBPDRGD0, 0x0014A9C9); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0014CB49); + mmio_write_32(DBSC_DBPDRGD0, 0x0014CB49); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000027); + mmio_write_32(DBSC_DBPDRGA0, 0x00000027); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x00000D70); + mmio_write_32(DBSC_DBPDRGD0, 0x00000D70); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x00000F14); + mmio_write_32(DBSC_DBPDRGD0, 0x00000F14); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000028); - WriteReg_32(DBSC_DBPDRGD0, 0x00000046); - WriteReg_32(DBSC_DBPDRGA0, 0x00000029); + mmio_write_32(DBSC_DBPDRGA0, 0x00000028); + mmio_write_32(DBSC_DBPDRGD0, 0x00000046); + mmio_write_32(DBSC_DBPDRGA0, 0x00000029); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ if (REFRESH_RATE > 3900) { - WriteReg_32(DBSC_DBPDRGD0, 0x00000018); /* [7]SRT=0 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000018); /* [7]SRT=0 */ } else { - WriteReg_32(DBSC_DBPDRGD0, 0x00000098); /* [7]SRT=1 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000098); /* [7]SRT=1 */ } } else { /* 1856Mbps */ if (REFRESH_RATE > 3900) { - WriteReg_32(DBSC_DBPDRGD0, 0x00000020); /* [7]SRT=0 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000020); /* [7]SRT=0 */ } else { - WriteReg_32(DBSC_DBPDRGD0, 0x000000A0); /* [7]SRT=1 */ + mmio_write_32(DBSC_DBPDRGD0, 0x000000A0); /* [7]SRT=1 */ } /* REFRESH_RATE */ } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x0000002C); - WriteReg_32(DBSC_DBPDRGD0, 0x81003047); - WriteReg_32(DBSC_DBPDRGA0, 0x00000020); - WriteReg_32(DBSC_DBPDRGD0, 0x00181884); - WriteReg_32(DBSC_DBPDRGA0, 0x0000001A); - WriteReg_32(DBSC_DBPDRGD0, 0x33C03C10); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); - - WriteReg_32(DBSC_DBPDRGA0, 0x000000A7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000107); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000108); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000109); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010181); - WriteReg_32(DBSC_DBCMD, 0x08840001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x0000002C); + mmio_write_32(DBSC_DBPDRGD0, 0x81003047); + mmio_write_32(DBSC_DBPDRGA0, 0x00000020); + mmio_write_32(DBSC_DBPDRGD0, 0x00181884); + mmio_write_32(DBSC_DBPDRGA0, 0x0000001A); + mmio_write_32(DBSC_DBPDRGD0, 0x33C03C10); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); + + mmio_write_32(DBSC_DBPDRGA0, 0x000000A7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000107); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000108); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000109); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010181); + mmio_write_32(DBSC_DBCMD, 0x08840001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step3( WL/QSG training ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010601); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010601); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; - WriteReg_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; + mmio_write_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); if (RegVal_R6 > 0) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R6); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R7); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R7); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); } /* RegVal_R6 */ } /* for i */ @@ -432,188 +408,188 @@ uint32_t init_ddr(void) /**************************************************************************** * Initial_Step4( WLADJ training ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000005); - WriteReg_32(DBSC_DBPDRGD0, 0xC1AA00C0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000005); + mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00C0); /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010801); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010801); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /**************************************************************************** * Initial_Step5(Read Data Bit Deskew) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000005); - WriteReg_32(DBSC_DBPDRGD0, 0xC1AA00D8); + mmio_write_32(DBSC_DBPDRGA0, 0x00000005); + mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00D8); /* rev.0.08 */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00011001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00011001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } /**************************************************************************** * Initial_Step6(Write Data Bit Deskew) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00012001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00012001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /**************************************************************************** * Initial_Step7(Read Data Eye Training) ***************************************************************************/ if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00014001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00014001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } /**************************************************************************** * Initial_Step8(Write Data Eye Training) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00018001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00018001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step3_2( DQS Gate Training ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x0000002C); - WriteReg_32(DBSC_DBPDRGD0, 0x81003087); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010401); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x0000002C); + mmio_write_32(DBSC_DBPDRGD0, 0x81003087); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010401); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - RegVal_R5 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + RegVal_R5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); RegVal_R12 = (RegVal_R5 >> 0x2); if (RegVal_R12 < RegVal_R6) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | (RegVal_R7 & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | (RegVal_R7 & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); } /* RegVal_R12 < RegVal_R6 */ } /* for i */ @@ -623,40 +599,40 @@ if (pdqsr_ctl == 1) { ***************************************************************************/ /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00015001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00015001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.08 */ if (lcdl_ctl == 1) { for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - dqsgd_0c = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - bdlcount_0c = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + dqsgd_0c = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + bdlcount_0c = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8); bdlcount_0c_div2 = (bdlcount_0c >> 1); bdlcount_0c_div4 = (bdlcount_0c >> 2); bdlcount_0c_div8 = (bdlcount_0c >> 3); @@ -672,159 +648,159 @@ if (pdqsr_ctl == 1) { if (dqsgd_0c > lcdl_judge1) { if (dqsgd_0c <= lcdl_judge2) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGD0, ((dqsgd_0c - bdlcount_0c_div8) | RegVal)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGD0, ((dqsgd_0c - bdlcount_0c_div8) | RegVal)); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - gatesl_0c = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGD0, (RegVal | (gatesl_0c + 1))); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + gatesl_0c = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGD0, (RegVal | (gatesl_0c + 1))); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rdqsd_0c = (RegVal & 0x0000FF00) >> 8; rdqsnd_0c = (RegVal & 0x00FF0000) >> 16; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, ((RegVal & 0xFF0000FF) | ((rdqsd_0c + bdlcount_0c_div4) << 8) | ((rdqsnd_0c + bdlcount_0c_div4) << 16))); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, ((RegVal & 0xFF0000FF) | ((rdqsd_0c + bdlcount_0c_div4) << 8) | ((rdqsnd_0c + bdlcount_0c_div4) << 16))); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rbd_0c[0] = (RegVal) &0x0000001f; rbd_0c[1] = (RegVal >> 8) & 0x0000001f; rbd_0c[2] = (RegVal >> 16) & 0x0000001f; rbd_0c[3] = (RegVal >> 24) & 0x0000001f; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); for (j = 0; j < 4; j++) { rbd_0c[j] = (rbd_0c[j] + bdlcount_0c_div4); if (rbd_0c[j] > 0x1F) rbd_0c[j] = 0x1F; RegVal = RegVal | (rbd_0c[j] << 8 * j); } - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rbd_0c[0] = (RegVal) &0x0000001f; rbd_0c[1] = (RegVal >> 8) & 0x0000001f; rbd_0c[2] = (RegVal >> 16) & 0x0000001f; rbd_0c[3] = (RegVal >> 24) & 0x0000001f; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); for (j = 0; j < 4; j++) { rbd_0c[j] = (rbd_0c[j] + bdlcount_0c_div4); if (rbd_0c[j] > 0x1F) rbd_0c[j] = 0x1F; RegVal = RegVal | (rbd_0c[j] << 8 * j); } - WriteReg_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGD0, RegVal); } } } - WriteReg_32(DBSC_DBPDRGA0, 0x00000002); - WriteReg_32(DBSC_DBPDRGD0, 0x07D81E37); + mmio_write_32(DBSC_DBPDRGA0, 0x00000002); + mmio_write_32(DBSC_DBPDRGD0, 0x07D81E37); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000003); + mmio_write_32(DBSC_DBPDRGA0, 0x00000003); if (byp_ctl == 1) { - WriteReg_32(DBSC_DBPDRGD0, 0x0380C720); + mmio_write_32(DBSC_DBPDRGD0, 0x0380C720); } else { - WriteReg_32(DBSC_DBPDRGD0, 0x0380C700); + mmio_write_32(DBSC_DBPDRGD0, 0x0380C700); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000007); - while ((BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) != 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000007); + while ((BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) != 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000021); - WriteReg_32(DBSC_DBPDRGD0, 0x0024643E); + mmio_write_32(DBSC_DBPDRGA0, 0x00000021); + mmio_write_32(DBSC_DBPDRGD0, 0x0024643E); - WriteReg_32(DBSC_DBBUS0CNF1, 0x00000010); - WriteReg_32(DBSC_DBCALCNF, (uint32_t)(64000000 / REFRESH_RATE) + 0x01000000); + mmio_write_32(DBSC_DBBUS0CNF1, 0x00000010); + mmio_write_32(DBSC_DBCALCNF, (uint32_t)(64000000 / REFRESH_RATE) + 0x01000000); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 99 / 125) + 0x00080000); + mmio_write_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 99 / 125) + 0x00080000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 116 / 125) + 0x00080000); + mmio_write_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 116 / 125) + 0x00080000); } /* ddr_md */ - WriteReg_32(DBSC_DBRFCNF2, 0x00010000); - WriteReg_32(DBSC_DBDFICUPDCNF, 0x40100001); - WriteReg_32(DBSC_DBRFEN, 0x00000001); - WriteReg_32(DBSC_DBACEN, 0x00000001); + mmio_write_32(DBSC_DBRFCNF2, 0x00010000); + mmio_write_32(DBSC_DBDFICUPDCNF, 0x40100001); + mmio_write_32(DBSC_DBRFEN, 0x00000001); + mmio_write_32(DBSC_DBACEN, 0x00000001); /* rev.0.08 */ if (pdqsr_ctl == 1) { - WriteReg_32(0xE67F0018, 0x00000001); - RegVal = ReadReg_32(0x40000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000000); - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(0xE67F0018, 0x00000001); + RegVal = mmio_read_32(0x40000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000000); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } /* rev.0.03 add Comment */ /**************************************************************************** * Initial_Step9( Initial End ) ***************************************************************************/ - WriteReg_32(DBSC_DBPDLK0, 0x00000000); - WriteReg_32(DBSC_DBSYSCNT0, 0x00000000); + mmio_write_32(DBSC_DBPDLK0, 0x00000000); + mmio_write_32(DBSC_DBSYSCNT0, 0x00000000); #ifdef ddr_qos_init_setting /* only for non qos_init */ - WriteReg_32(DBSC_DBSYSCNT0, 0x00001234); - WriteReg_32(DBSC_DBCAM0CNF1, 0x00043218); - WriteReg_32(DBSC_DBCAM0CNF2, 0x000000F4); - WriteReg_32(DBSC_DBSCHCNT0, 0x000f0037); - WriteReg_32(DBSC_DBSCHSZ0, 0x00000001); - WriteReg_32(DBSC_DBSCHRW0, 0x22421111); - WriteReg_32(DBSC_SCFCTST2, 0x012F1123); - WriteReg_32(DBSC_DBSCHQOS00, 0x00000F00); - WriteReg_32(DBSC_DBSCHQOS01, 0x00000B00); - WriteReg_32(DBSC_DBSCHQOS02, 0x00000000); - WriteReg_32(DBSC_DBSCHQOS03, 0x00000000); - WriteReg_32(DBSC_DBSCHQOS40, 0x00000300); - WriteReg_32(DBSC_DBSCHQOS41, 0x000002F0); - WriteReg_32(DBSC_DBSCHQOS42, 0x00000200); - WriteReg_32(DBSC_DBSCHQOS43, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS90, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS91, 0x000000F0); - WriteReg_32(DBSC_DBSCHQOS92, 0x000000A0); - WriteReg_32(DBSC_DBSCHQOS93, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS130, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS131, 0x000000F0); - WriteReg_32(DBSC_DBSCHQOS132, 0x000000A0); - WriteReg_32(DBSC_DBSCHQOS133, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS140, 0x000000C0); - WriteReg_32(DBSC_DBSCHQOS141, 0x000000B0); - WriteReg_32(DBSC_DBSCHQOS142, 0x00000080); - WriteReg_32(DBSC_DBSCHQOS143, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS150, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS151, 0x00000030); - WriteReg_32(DBSC_DBSCHQOS152, 0x00000020); - WriteReg_32(DBSC_DBSCHQOS153, 0x00000010); + mmio_write_32(DBSC_DBSYSCNT0, 0x00001234); + mmio_write_32(DBSC_DBCAM0CNF1, 0x00043218); + mmio_write_32(DBSC_DBCAM0CNF2, 0x000000F4); + mmio_write_32(DBSC_DBSCHCNT0, 0x000f0037); + mmio_write_32(DBSC_DBSCHSZ0, 0x00000001); + mmio_write_32(DBSC_DBSCHRW0, 0x22421111); + mmio_write_32(DBSC_SCFCTST2, 0x012F1123); + mmio_write_32(DBSC_DBSCHQOS00, 0x00000F00); + mmio_write_32(DBSC_DBSCHQOS01, 0x00000B00); + mmio_write_32(DBSC_DBSCHQOS02, 0x00000000); + mmio_write_32(DBSC_DBSCHQOS03, 0x00000000); + mmio_write_32(DBSC_DBSCHQOS40, 0x00000300); + mmio_write_32(DBSC_DBSCHQOS41, 0x000002F0); + mmio_write_32(DBSC_DBSCHQOS42, 0x00000200); + mmio_write_32(DBSC_DBSCHQOS43, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS90, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS91, 0x000000F0); + mmio_write_32(DBSC_DBSCHQOS92, 0x000000A0); + mmio_write_32(DBSC_DBSCHQOS93, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS130, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS131, 0x000000F0); + mmio_write_32(DBSC_DBSCHQOS132, 0x000000A0); + mmio_write_32(DBSC_DBSCHQOS133, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS140, 0x000000C0); + mmio_write_32(DBSC_DBSCHQOS141, 0x000000B0); + mmio_write_32(DBSC_DBSCHQOS142, 0x00000080); + mmio_write_32(DBSC_DBSCHQOS143, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS150, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS151, 0x00000030); + mmio_write_32(DBSC_DBSCHQOS152, 0x00000020); + mmio_write_32(DBSC_DBSCHQOS153, 0x00000010); /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(0xE67F0018, 0x00000001); + mmio_write_32(0xE67F0018, 0x00000001); } - WriteReg_32(DBSC_DBSYSCNT0, 0x00000000); + mmio_write_32(DBSC_DBSYSCNT0, 0x00000000); #endif return 1; /* rev.0.04 Restore the return code */ @@ -852,7 +828,7 @@ uint32_t recovery_from_backup_mode(void) uint32_t byp_ctl; /* rev.0.08 */ - if ((ReadReg_32(0xFFF00044) & 0x000000FF) == 0x00000000) { + if ((mmio_read_32(0xFFF00044) & 0x000000FF) == 0x00000000) { pdqsr_ctl = 1; lcdl_ctl = 1; pdr_ctl = 1; /* rev.0.10 */ @@ -865,267 +841,267 @@ uint32_t recovery_from_backup_mode(void) } /* Judge the DDR bit rate (ddr_md : 0 = 1584Mbps, 1 = 1856Mbps) */ - ddr_md = (ReadReg_32(RST_MODEMR) >> 19) & BIT(0); + ddr_md = (mmio_read_32(RST_MODEMR) >> 19) & BIT(0); /* 1584Mbps setting */ if (ddr_md == 0) { /* CPG setting ===============================================*/ - WriteReg_32(CPG_CPGWPR, 0x5A5AFFFF); - WriteReg_32(CPG_CPGWPCR, 0xA5A50000); + mmio_write_32(CPG_CPGWPR, 0x5A5AFFFF); + mmio_write_32(CPG_CPGWPCR, 0xA5A50000); - WriteReg_32(CPG_SRCR4, 0x20000000); + mmio_write_32(CPG_SRCR4, 0x20000000); - WriteReg_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */ - while ((BIT(11) & ReadReg_32(CPG_PLLECR)) == 0); + mmio_write_32(0xE61500DC, 0xe2200000); /* Change to 1584Mbps */ + while ((BIT(11) & mmio_read_32(CPG_PLLECR)) == 0); - WriteReg_32(CPG_SRSTCLR4, 0x20000000); + mmio_write_32(CPG_SRSTCLR4, 0x20000000); - WriteReg_32(CPG_CPGWPCR, 0xA5A50001); + mmio_write_32(CPG_CPGWPCR, 0xA5A50001); /* CPG setting ===============================================*/ } /* ddr_md */ - WriteReg_32(DBSC_DBSYSCNT0, 0x00001234); - WriteReg_32(DBSC_DBKIND, 0x00000007); + mmio_write_32(DBSC_DBSYSCNT0, 0x00001234); + mmio_write_32(DBSC_DBKIND, 0x00000007); #if RCAR_DRAM_DDR3L_MEMCONF == 0 - WriteReg_32(DBSC_DBMEMCONF00, 0x0f030a02); + mmio_write_32(DBSC_DBMEMCONF00, 0x0f030a02); #else - WriteReg_32(DBSC_DBMEMCONF00, 0x10030a02); + mmio_write_32(DBSC_DBMEMCONF00, 0x10030a02); #endif /* rev.0.08 */ #if RCAR_DRAM_DDR3L_MEMDUAL == 1 - RegVal_R2 = (ReadReg_32(0xE6790614)); - WriteReg_32(0xE6790614, RegVal_R2 | 0x00000003); /* MCS1_N/MODT1 are activated. */ + RegVal_R2 = (mmio_read_32(0xE6790614)); + mmio_write_32(0xE6790614, RegVal_R2 | 0x00000003); /* MCS1_N/MODT1 are activated. */ #endif - WriteReg_32(DBSC_DBPHYCONF0, 0x00000001); + mmio_write_32(DBSC_DBPHYCONF0, 0x00000001); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR0, 0x0000000B); - WriteReg_32(DBSC_DBTR1, 0x00000008); + mmio_write_32(DBSC_DBTR0, 0x0000000B); + mmio_write_32(DBSC_DBTR1, 0x00000008); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR0, 0x0000000D); - WriteReg_32(DBSC_DBTR1, 0x00000009); + mmio_write_32(DBSC_DBTR0, 0x0000000D); + mmio_write_32(DBSC_DBTR1, 0x00000009); } /* ddr_md */ - WriteReg_32(DBSC_DBTR2, 0x00000000); + mmio_write_32(DBSC_DBTR2, 0x00000000); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR3, 0x0000000B); - WriteReg_32(DBSC_DBTR4, 0x000B000B); - WriteReg_32(DBSC_DBTR5, 0x00000027); - WriteReg_32(DBSC_DBTR6, 0x0000001C); + mmio_write_32(DBSC_DBTR3, 0x0000000B); + mmio_write_32(DBSC_DBTR4, 0x000B000B); + mmio_write_32(DBSC_DBTR5, 0x00000027); + mmio_write_32(DBSC_DBTR6, 0x0000001C); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR3, 0x0000000D); - WriteReg_32(DBSC_DBTR4, 0x000D000D); - WriteReg_32(DBSC_DBTR5, 0x0000002D); - WriteReg_32(DBSC_DBTR6, 0x00000020); + mmio_write_32(DBSC_DBTR3, 0x0000000D); + mmio_write_32(DBSC_DBTR4, 0x000D000D); + mmio_write_32(DBSC_DBTR5, 0x0000002D); + mmio_write_32(DBSC_DBTR6, 0x00000020); } /* ddr_md */ - WriteReg_32(DBSC_DBTR7, 0x00060006); + mmio_write_32(DBSC_DBTR7, 0x00060006); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR8, 0x00000020); - WriteReg_32(DBSC_DBTR9, 0x00000006); - WriteReg_32(DBSC_DBTR10, 0x0000000C); - WriteReg_32(DBSC_DBTR11, 0x0000000A); - WriteReg_32(DBSC_DBTR12, 0x00120012); - WriteReg_32(DBSC_DBTR13, 0x000000CE); - WriteReg_32(DBSC_DBTR14, 0x00140005); - WriteReg_32(DBSC_DBTR15, 0x00050004); - WriteReg_32(DBSC_DBTR16, 0x071F0305); - WriteReg_32(DBSC_DBTR17, 0x040C0000); + mmio_write_32(DBSC_DBTR8, 0x00000020); + mmio_write_32(DBSC_DBTR9, 0x00000006); + mmio_write_32(DBSC_DBTR10, 0x0000000C); + mmio_write_32(DBSC_DBTR11, 0x0000000A); + mmio_write_32(DBSC_DBTR12, 0x00120012); + mmio_write_32(DBSC_DBTR13, 0x000000CE); + mmio_write_32(DBSC_DBTR14, 0x00140005); + mmio_write_32(DBSC_DBTR15, 0x00050004); + mmio_write_32(DBSC_DBTR16, 0x071F0305); + mmio_write_32(DBSC_DBTR17, 0x040C0000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR8, 0x00000021); - WriteReg_32(DBSC_DBTR9, 0x00000007); - WriteReg_32(DBSC_DBTR10, 0x0000000E); - WriteReg_32(DBSC_DBTR11, 0x0000000C); - WriteReg_32(DBSC_DBTR12, 0x00140014); - WriteReg_32(DBSC_DBTR13, 0x000000F2); - WriteReg_32(DBSC_DBTR14, 0x00170006); - WriteReg_32(DBSC_DBTR15, 0x00060005); - WriteReg_32(DBSC_DBTR16, 0x09210507); - WriteReg_32(DBSC_DBTR17, 0x040E0000); + mmio_write_32(DBSC_DBTR8, 0x00000021); + mmio_write_32(DBSC_DBTR9, 0x00000007); + mmio_write_32(DBSC_DBTR10, 0x0000000E); + mmio_write_32(DBSC_DBTR11, 0x0000000C); + mmio_write_32(DBSC_DBTR12, 0x00140014); + mmio_write_32(DBSC_DBTR13, 0x000000F2); + mmio_write_32(DBSC_DBTR14, 0x00170006); + mmio_write_32(DBSC_DBTR15, 0x00060005); + mmio_write_32(DBSC_DBTR16, 0x09210507); + mmio_write_32(DBSC_DBTR17, 0x040E0000); } /* ddr_md */ - WriteReg_32(DBSC_DBTR18, 0x00000200); + mmio_write_32(DBSC_DBTR18, 0x00000200); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBTR19, 0x01000040); - WriteReg_32(DBSC_DBTR20, 0x020000D6); + mmio_write_32(DBSC_DBTR19, 0x01000040); + mmio_write_32(DBSC_DBTR20, 0x020000D6); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBTR19, 0x0129004B); - WriteReg_32(DBSC_DBTR20, 0x020000FB); + mmio_write_32(DBSC_DBTR19, 0x0129004B); + mmio_write_32(DBSC_DBTR20, 0x020000FB); } /* ddr_md */ - WriteReg_32(DBSC_DBTR21, 0x00040004); - WriteReg_32(DBSC_DBBL, 0x00000000); - WriteReg_32(DBSC_DBODT0, 0x00000001); - WriteReg_32(DBSC_DBADJ0, 0x00000001); - WriteReg_32(DBSC_DBSYSCONF1, 0x00000002); - WriteReg_32(DBSC_DBDFICNT0, 0x00000010); - WriteReg_32(DBSC_DBBCAMDIS, 0x00000001); - WriteReg_32(DBSC_DBSCHRW1, 0x00000046); + mmio_write_32(DBSC_DBTR21, 0x00040004); + mmio_write_32(DBSC_DBBL, 0x00000000); + mmio_write_32(DBSC_DBODT0, 0x00000001); + mmio_write_32(DBSC_DBADJ0, 0x00000001); + mmio_write_32(DBSC_DBSYSCONF1, 0x00000002); + mmio_write_32(DBSC_DBDFICNT0, 0x00000010); + mmio_write_32(DBSC_DBBCAMDIS, 0x00000001); + mmio_write_32(DBSC_DBSCHRW1, 0x00000046); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_SCFCTST0, 0x0D050B03); - WriteReg_32(DBSC_SCFCTST1, 0x0306030C); + mmio_write_32(DBSC_SCFCTST0, 0x0D050B03); + mmio_write_32(DBSC_SCFCTST1, 0x0306030C); } else { /* 1856Mbps */ - WriteReg_32(DBSC_SCFCTST0, 0x0C050B03); - WriteReg_32(DBSC_SCFCTST1, 0x0305030C); + mmio_write_32(DBSC_SCFCTST0, 0x0C050B03); + mmio_write_32(DBSC_SCFCTST1, 0x0305030C); } /* ddr_md */ /**************************************************************************** * recovery_Step1(PHY setting 1) ***************************************************************************/ - WriteReg_32(DBSC_DBPDLK0, 0x0000A55A); - WriteReg_32(DBSC_DBCMD, 0x01840001); - WriteReg_32(DBSC_DBCMD, 0x0A840000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000008); /* DDR_PLLCR */ - WriteReg_32(DBSC_DBPDRGD0, 0x000B8000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000003); /* DDR_PGCR1 */ + mmio_write_32(DBSC_DBPDLK0, 0x0000A55A); + mmio_write_32(DBSC_DBCMD, 0x01840001); + mmio_write_32(DBSC_DBCMD, 0x0A840000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000008); /* DDR_PLLCR */ + mmio_write_32(DBSC_DBPDRGD0, 0x000B8000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000003); /* DDR_PGCR1 */ if (byp_ctl == 1) { - WriteReg_32(DBSC_DBPDRGD0, 0x0780C720); + mmio_write_32(DBSC_DBPDRGD0, 0x0780C720); } else { - WriteReg_32(DBSC_DBPDRGD0, 0x0780C700); + mmio_write_32(DBSC_DBPDRGD0, 0x0780C700); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000020); /* DDR_DXCCR */ - WriteReg_32(DBSC_DBPDRGD0, 0x00181884); - WriteReg_32(DBSC_DBPDRGA0, 0x0000001A); /* DDR_ACIOCR0 */ - WriteReg_32(DBSC_DBPDRGD0, 0x33C03C10); - WriteReg_32(DBSC_DBPDRGA0, 0x00000007); - while ((BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000020); /* DDR_DXCCR */ + mmio_write_32(DBSC_DBPDRGD0, 0x00181884); + mmio_write_32(DBSC_DBPDRGA0, 0x0000001A); /* DDR_ACIOCR0 */ + mmio_write_32(DBSC_DBPDRGD0, 0x33C03C10); + mmio_write_32(DBSC_DBPDRGA0, 0x00000007); + while ((BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000004); + mmio_write_32(DBSC_DBPDRGA0, 0x00000004); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 792 / 125) - 400 + 0x08B00000); + mmio_write_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 792 / 125) - 400 + 0x08B00000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 928 / 125) - 400 + 0x0A300000); + mmio_write_32(DBSC_DBPDRGD0, (uint32_t)(REFRESH_RATE * 928 / 125) - 400 + 0x0A300000); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000022); - WriteReg_32(DBSC_DBPDRGD0, 0x1000040B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000023); + mmio_write_32(DBSC_DBPDRGA0, 0x00000022); + mmio_write_32(DBSC_DBPDRGD0, 0x1000040B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000023); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2D9C0B66); + mmio_write_32(DBSC_DBPDRGD0, 0x2D9C0B66); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x35A00D77); + mmio_write_32(DBSC_DBPDRGD0, 0x35A00D77); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000024); + mmio_write_32(DBSC_DBPDRGA0, 0x00000024); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2A88B400); + mmio_write_32(DBSC_DBPDRGD0, 0x2A88B400); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x2A8A2C28); + mmio_write_32(DBSC_DBPDRGD0, 0x2A8A2C28); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000025); + mmio_write_32(DBSC_DBPDRGA0, 0x00000025); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x30005200); + mmio_write_32(DBSC_DBPDRGD0, 0x30005200); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x30005E00); + mmio_write_32(DBSC_DBPDRGD0, 0x30005E00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000026); + mmio_write_32(DBSC_DBPDRGA0, 0x00000026); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0014A9C9); + mmio_write_32(DBSC_DBPDRGD0, 0x0014A9C9); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0014CB49); + mmio_write_32(DBSC_DBPDRGD0, 0x0014CB49); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000027); + mmio_write_32(DBSC_DBPDRGA0, 0x00000027); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x00000D70); + mmio_write_32(DBSC_DBPDRGD0, 0x00000D70); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x00000F14); + mmio_write_32(DBSC_DBPDRGD0, 0x00000F14); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000028); - WriteReg_32(DBSC_DBPDRGD0, 0x00000046); - WriteReg_32(DBSC_DBPDRGA0, 0x00000029); + mmio_write_32(DBSC_DBPDRGA0, 0x00000028); + mmio_write_32(DBSC_DBPDRGD0, 0x00000046); + mmio_write_32(DBSC_DBPDRGA0, 0x00000029); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ if (REFRESH_RATE > 3900) { - WriteReg_32(DBSC_DBPDRGD0, 0x00000018); /* [7]SRT=0 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000018); /* [7]SRT=0 */ } else { - WriteReg_32(DBSC_DBPDRGD0, 0x00000098); /* [7]SRT=1 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000098); /* [7]SRT=1 */ } } else { /* 1856Mbps */ if (REFRESH_RATE > 3900) { - WriteReg_32(DBSC_DBPDRGD0, 0x00000020); /* [7]SRT=0 */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000020); /* [7]SRT=0 */ } else { - WriteReg_32(DBSC_DBPDRGD0, 0x000000A0); /* [7]SRT=1 */ + mmio_write_32(DBSC_DBPDRGD0, 0x000000A0); /* [7]SRT=1 */ } /* REFRESH_RATE */ } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x0000002C); - WriteReg_32(DBSC_DBPDRGD0, 0x81003047); - WriteReg_32(DBSC_DBPDRGA0, 0x00000091); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000095); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BBAD); - WriteReg_32(DBSC_DBPDRGA0, 0x00000099); - WriteReg_32(DBSC_DBPDRGD0, 0x0007BB6B); - WriteReg_32(DBSC_DBPDRGA0, 0x00000021); /* DDR_DSGCR */ - WriteReg_32(DBSC_DBPDRGD0, 0x0024641E); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); - - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x40010000); - - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); - - WriteReg_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */ - WriteReg_32(DBSC_DBPDRGD0, 0xC2C59AB5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */ - WriteReg_32(DBSC_DBPDRGD0, 0xC4285FBF); - WriteReg_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */ - WriteReg_32(DBSC_DBPDRGD0, 0xC2C59AB5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ + mmio_write_32(DBSC_DBPDRGA0, 0x0000002C); + mmio_write_32(DBSC_DBPDRGD0, 0x81003047); + mmio_write_32(DBSC_DBPDRGA0, 0x00000091); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000095); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BBAD); + mmio_write_32(DBSC_DBPDRGA0, 0x00000099); + mmio_write_32(DBSC_DBPDRGD0, 0x0007BB6B); + mmio_write_32(DBSC_DBPDRGA0, 0x00000021); /* DDR_DSGCR */ + mmio_write_32(DBSC_DBPDRGD0, 0x0024641E); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); + + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x40010000); + + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); + + mmio_write_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */ + mmio_write_32(DBSC_DBPDRGD0, 0xC2C59AB5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */ + mmio_write_32(DBSC_DBPDRGD0, 0xC4285FBF); + mmio_write_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */ + mmio_write_32(DBSC_DBPDRGD0, 0xC2C59AB5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058900); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058900); + mmio_write_32(DBSC_DBPDRGD0, 0x04058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x04058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x00050001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x00050001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* ddr backupmode end */ if (ddrBackup) { @@ -1139,352 +1115,352 @@ uint32_t recovery_from_backup_mode(void) return INITDRAM_ERR_I; } /* err */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */ - WriteReg_32(DBSC_DBPDRGD0, 0x02C59AB5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */ - WriteReg_32(DBSC_DBPDRGD0, 0x04285FBF); - WriteReg_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */ - WriteReg_32(DBSC_DBPDRGD0, 0x02C59AB5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000092); /* DDR_ZQ0DR */ + mmio_write_32(DBSC_DBPDRGD0, 0x02C59AB5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000096); /* DDR_ZQ1DR */ + mmio_write_32(DBSC_DBPDRGD0, 0x04285FBF); + mmio_write_32(DBSC_DBPDRGA0, 0x0000009A); /* DDR_ZQ2DR */ + mmio_write_32(DBSC_DBPDRGD0, 0x02C59AB5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x08000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x08000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x00000003); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x00000003); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x80010000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x80010000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x00010073); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x00010073); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058900); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x0C058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x0C058A00); } /* ddr_md */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ + mmio_write_32(DBSC_DBPDRGA0, 0x00000090); /* DDR_ZQCR */ /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058900); + mmio_write_32(DBSC_DBPDRGD0, 0x04058900); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBPDRGD0, 0x04058A00); + mmio_write_32(DBSC_DBPDRGD0, 0x04058A00); } /* ddr_md */ /* rev0.08 */ - WriteReg_32(DBSC_DBPDRGA0, 0x0000000C); - WriteReg_32(DBSC_DBPDRGD0, 0x18000040); + mmio_write_32(DBSC_DBPDRGA0, 0x0000000C); + mmio_write_32(DBSC_DBPDRGD0, 0x18000040); /**************************************************************************** * recovery_Step2(PHY setting 2) ***************************************************************************/ - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); - - WriteReg_32(DBSC_DBPDRGA0, 0x000000A7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E7); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E8); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E9); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000107); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000108); - WriteReg_32(DBSC_DBPDRGD0, 0x0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0, 0x00000109); - WriteReg_32(DBSC_DBPDRGD0, 0x000D0D0D); - - WriteReg_32(DBSC_DBCALCNF, (uint32_t)(64000000 / REFRESH_RATE) + 0x01000000); - WriteReg_32(DBSC_DBBUS0CNF1, 0x00000010); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); + + mmio_write_32(DBSC_DBPDRGA0, 0x000000A7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E7); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E8); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E9); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000107); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000108); + mmio_write_32(DBSC_DBPDRGD0, 0x0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0, 0x00000109); + mmio_write_32(DBSC_DBPDRGD0, 0x000D0D0D); + + mmio_write_32(DBSC_DBCALCNF, (uint32_t)(64000000 / REFRESH_RATE) + 0x01000000); + mmio_write_32(DBSC_DBBUS0CNF1, 0x00000010); /* Select setting value in bps */ if (ddr_md == 0) { /* 1584Mbps */ - WriteReg_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 99 / 125) + 0x00080000); + mmio_write_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 99 / 125) + 0x00080000); } else { /* 1856Mbps */ - WriteReg_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 116 / 125) + 0x00080000); + mmio_write_32(DBSC_DBRFCNF1, (uint32_t)(REFRESH_RATE * 116 / 125) + 0x00080000); } /* ddr_md */ - WriteReg_32(DBSC_DBRFCNF2, 0x00010000); - WriteReg_32(DBSC_DBRFEN, 0x00000001); - WriteReg_32(DBSC_DBCMD, 0x0A840001); - while ((BIT(0) & ReadReg_32(DBSC_DBWAIT)) != 0); + mmio_write_32(DBSC_DBRFCNF2, 0x00010000); + mmio_write_32(DBSC_DBRFEN, 0x00000001); + mmio_write_32(DBSC_DBCMD, 0x0A840001); + while ((BIT(0) & mmio_read_32(DBSC_DBWAIT)) != 0); - WriteReg_32(DBSC_DBCMD, 0x00000000); + mmio_write_32(DBSC_DBCMD, 0x00000000); - WriteReg_32(DBSC_DBCMD, 0x04840010); - while ((BIT(0) & ReadReg_32(DBSC_DBWAIT)) != 0); + mmio_write_32(DBSC_DBCMD, 0x04840010); + while ((BIT(0) & mmio_read_32(DBSC_DBWAIT)) != 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ - WriteReg_32(DBSC_DBPDRGD0, 0x00010701); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); /* DDR_PIR */ + mmio_write_32(DBSC_DBPDRGD0, 0x00010701); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); /* DDR_PGSR0 */ + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; - WriteReg_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8; + mmio_write_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); if (RegVal_R6 > 0) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R6); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R7); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | RegVal_R7); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + ((RegVal_R5) << 1)) & 0x000000FF)); } /* RegVal_R6 */ } /* for i */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000005); - WriteReg_32(DBSC_DBPDRGD0, 0xC1AA00C0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000005); + mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00C0); /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010801); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010801); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000005); - WriteReg_32(DBSC_DBPDRGD0, 0xC1AA00D8); + mmio_write_32(DBSC_DBPDRGA0, 0x00000005); + mmio_write_32(DBSC_DBPDRGD0, 0xC1AA00D8); /* rev.0.08 */ - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00011001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00011001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00012001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00012001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00014001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00014001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); if (pdqsr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00018001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); - - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C000285); - WriteReg_32(DBSC_DBPDRGA0, 0x0000002C); - WriteReg_32(DBSC_DBPDRGD0, 0x81003087); - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00010401); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00018001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); + + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C000285); + mmio_write_32(DBSC_DBPDRGA0, 0x0000002C); + mmio_write_32(DBSC_DBPDRGD0, 0x81003087); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00010401); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - RegVal_R5 = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + RegVal_R5 = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 0x8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B4 + i * 0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B3 + i * 0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); RegVal_R12 = (RegVal_R5 >> 0x2); if (RegVal_R12 < RegVal_R6) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R7 + 0x1) & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 - (RegVal_R12)) & 0x000000FF)); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | (RegVal_R7 & 0x00000007)); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | (RegVal_R7 & 0x00000007)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, RegVal_R2 | ((RegVal_R6 + (RegVal_R5) + ((RegVal_R5) >> 1) + (RegVal_R12)) & 0x000000FF)); } /* RegVal_R12 < RegVal_R6 */ } /* for i */ /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR always off */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000008); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000001); - WriteReg_32(DBSC_DBPDRGD0, 0x00015001); - WriteReg_32(DBSC_DBPDRGA0, 0x00000006); - while ((BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000001); + mmio_write_32(DBSC_DBPDRGD0, 0x00015001); + mmio_write_32(DBSC_DBPDRGA0, 0x00000006); + while ((BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0); /* rev.0.08 */ if (lcdl_ctl == 1) { for (i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - dqsgd_0c = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); - bdlcount_0c = ((ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + dqsgd_0c = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B1 + i * 0x20); + bdlcount_0c = ((mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8); bdlcount_0c_div2 = (bdlcount_0c >> 1); bdlcount_0c_div4 = (bdlcount_0c >> 2); bdlcount_0c_div8 = (bdlcount_0c >> 3); @@ -1500,147 +1476,147 @@ if (pdqsr_ctl == 1) { if (dqsgd_0c > lcdl_judge1) { if (dqsgd_0c <= lcdl_judge2) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGD0, ((dqsgd_0c - bdlcount_0c_div8) | RegVal)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGD0, ((dqsgd_0c - bdlcount_0c_div8) | RegVal)); } else { - WriteReg_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFF00); - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - gatesl_0c = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); - WriteReg_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); - WriteReg_32(DBSC_DBPDRGD0, (RegVal | (gatesl_0c + 1))); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B0 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFF00); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + gatesl_0c = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0x000000B2 + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xFFFFFFF8); + mmio_write_32(DBSC_DBPDRGD0, (RegVal | (gatesl_0c + 1))); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rdqsd_0c = (RegVal & 0x0000FF00) >> 8; rdqsnd_0c = (RegVal & 0x00FF0000) >> 16; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, ((RegVal & 0xFF0000FF) | ((rdqsd_0c + bdlcount_0c_div4) << 8) | ((rdqsnd_0c + bdlcount_0c_div4) << 16))); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AF + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, ((RegVal & 0xFF0000FF) | ((rdqsd_0c + bdlcount_0c_div4) << 8) | ((rdqsnd_0c + bdlcount_0c_div4) << 16))); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rbd_0c[0] = (RegVal) &0x0000001f; rbd_0c[1] = (RegVal >> 8) & 0x0000001f; rbd_0c[2] = (RegVal >> 16) & 0x0000001f; rbd_0c[3] = (RegVal >> 24) & 0x0000001f; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AA + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); for (j = 0; j < 4; j++) { rbd_0c[j] = (rbd_0c[j] + bdlcount_0c_div4); if (rbd_0c[j] > 0x1F) rbd_0c[j] = 0x1F; RegVal = RegVal | (rbd_0c[j] << 8 * j); } - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0)); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0)); rbd_0c[0] = (RegVal) &0x0000001f; rbd_0c[1] = (RegVal >> 8) & 0x0000001f; rbd_0c[2] = (RegVal >> 16) & 0x0000001f; rbd_0c[3] = (RegVal >> 24) & 0x0000001f; - WriteReg_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); - RegVal = (ReadReg_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); + mmio_write_32(DBSC_DBPDRGA0, 0x000000AB + i * 0x20); + RegVal = (mmio_read_32(DBSC_DBPDRGD0) & 0xE0E0E0E0); for (j = 0; j < 4; j++) { rbd_0c[j] = (rbd_0c[j] + bdlcount_0c_div4); if (rbd_0c[j] > 0x1F) rbd_0c[j] = 0x1F; RegVal = RegVal | (rbd_0c[j] << 8 * j); } - WriteReg_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGD0, RegVal); } } } - WriteReg_32(DBSC_DBPDRGA0, 0x00000002); - WriteReg_32(DBSC_DBPDRGD0, 0x07D81E37); + mmio_write_32(DBSC_DBPDRGA0, 0x00000002); + mmio_write_32(DBSC_DBPDRGD0, 0x07D81E37); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000003); + mmio_write_32(DBSC_DBPDRGA0, 0x00000003); if (byp_ctl == 1) { - WriteReg_32(DBSC_DBPDRGD0, 0x0380C720); + mmio_write_32(DBSC_DBPDRGD0, 0x0380C720); } else { - WriteReg_32(DBSC_DBPDRGD0, 0x0380C700); + mmio_write_32(DBSC_DBPDRGD0, 0x0380C700); } - WriteReg_32(DBSC_DBPDRGA0, 0x00000007); - while ((BIT(30) & ReadReg_32(DBSC_DBPDRGD0)) != 0); - WriteReg_32(DBSC_DBPDRGA0, 0x00000021); - WriteReg_32(DBSC_DBPDRGD0, 0x0024643E); + mmio_write_32(DBSC_DBPDRGA0, 0x00000007); + while ((BIT(30) & mmio_read_32(DBSC_DBPDRGD0)) != 0); + mmio_write_32(DBSC_DBPDRGA0, 0x00000021); + mmio_write_32(DBSC_DBPDRGD0, 0x0024643E); /**************************************************************************** * recovery_Step3(DBSC Setting 2) ***************************************************************************/ - WriteReg_32(DBSC_DBDFICUPDCNF, 0x40100001); - WriteReg_32(DBSC_DBACEN, 0x00000001); + mmio_write_32(DBSC_DBDFICUPDCNF, 0x40100001); + mmio_write_32(DBSC_DBACEN, 0x00000001); /* rev.0.08 */ if (pdqsr_ctl == 1) { - WriteReg_32(0xE67F0018, 0x00000001); - RegVal = ReadReg_32(0x40000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000000); - WriteReg_32(DBSC_DBPDRGD0, RegVal); - WriteReg_32(DBSC_DBPDRGA0, 0x000000A0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E0); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); - WriteReg_32(DBSC_DBPDRGA0, 0x00000100); - WriteReg_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(0xE67F0018, 0x00000001); + RegVal = mmio_read_32(0x40000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000000); + mmio_write_32(DBSC_DBPDRGD0, RegVal); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E0); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); + mmio_write_32(DBSC_DBPDRGA0, 0x00000100); + mmio_write_32(DBSC_DBPDRGD0, 0x7C0002C5); } /* PDR dynamic */ /* rev.0.10 */ if (pdr_ctl == 1) { - WriteReg_32(DBSC_DBPDRGA0, 0x000000A3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000C3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x000000E3); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); - WriteReg_32(DBSC_DBPDRGA0, 0x00000103); - WriteReg_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000A3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000C3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x000000E3); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); + mmio_write_32(DBSC_DBPDRGA0, 0x00000103); + mmio_write_32(DBSC_DBPDRGD0, 0x00000000); } - WriteReg_32(DBSC_DBPDLK0, 0x00000000); - WriteReg_32(DBSC_DBSYSCNT0, 0x00000000); + mmio_write_32(DBSC_DBPDLK0, 0x00000000); + mmio_write_32(DBSC_DBSYSCNT0, 0x00000000); #ifdef ddr_qos_init_setting /* only for non qos_init */ - WriteReg_32(DBSC_DBSYSCNT0, 0x00001234); - WriteReg_32(DBSC_DBCAM0CNF1, 0x00043218); - WriteReg_32(DBSC_DBCAM0CNF2, 0x000000F4); - WriteReg_32(DBSC_DBSCHCNT0, 0x000f0037); - WriteReg_32(DBSC_DBSCHSZ0, 0x00000001); - WriteReg_32(DBSC_DBSCHRW0, 0x22421111); - WriteReg_32(DBSC_SCFCTST2, 0x012F1123); - WriteReg_32(DBSC_DBSCHQOS00, 0x00000F00); - WriteReg_32(DBSC_DBSCHQOS01, 0x00000B00); - WriteReg_32(DBSC_DBSCHQOS02, 0x00000000); - WriteReg_32(DBSC_DBSCHQOS03, 0x00000000); - WriteReg_32(DBSC_DBSCHQOS40, 0x00000300); - WriteReg_32(DBSC_DBSCHQOS41, 0x000002F0); - WriteReg_32(DBSC_DBSCHQOS42, 0x00000200); - WriteReg_32(DBSC_DBSCHQOS43, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS90, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS91, 0x000000F0); - WriteReg_32(DBSC_DBSCHQOS92, 0x000000A0); - WriteReg_32(DBSC_DBSCHQOS93, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS130, 0x00000100); - WriteReg_32(DBSC_DBSCHQOS131, 0x000000F0); - WriteReg_32(DBSC_DBSCHQOS132, 0x000000A0); - WriteReg_32(DBSC_DBSCHQOS133, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS140, 0x000000C0); - WriteReg_32(DBSC_DBSCHQOS141, 0x000000B0); - WriteReg_32(DBSC_DBSCHQOS142, 0x00000080); - WriteReg_32(DBSC_DBSCHQOS143, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS150, 0x00000040); - WriteReg_32(DBSC_DBSCHQOS151, 0x00000030); - WriteReg_32(DBSC_DBSCHQOS152, 0x00000020); - WriteReg_32(DBSC_DBSCHQOS153, 0x00000010); + mmio_write_32(DBSC_DBSYSCNT0, 0x00001234); + mmio_write_32(DBSC_DBCAM0CNF1, 0x00043218); + mmio_write_32(DBSC_DBCAM0CNF2, 0x000000F4); + mmio_write_32(DBSC_DBSCHCNT0, 0x000f0037); + mmio_write_32(DBSC_DBSCHSZ0, 0x00000001); + mmio_write_32(DBSC_DBSCHRW0, 0x22421111); + mmio_write_32(DBSC_SCFCTST2, 0x012F1123); + mmio_write_32(DBSC_DBSCHQOS00, 0x00000F00); + mmio_write_32(DBSC_DBSCHQOS01, 0x00000B00); + mmio_write_32(DBSC_DBSCHQOS02, 0x00000000); + mmio_write_32(DBSC_DBSCHQOS03, 0x00000000); + mmio_write_32(DBSC_DBSCHQOS40, 0x00000300); + mmio_write_32(DBSC_DBSCHQOS41, 0x000002F0); + mmio_write_32(DBSC_DBSCHQOS42, 0x00000200); + mmio_write_32(DBSC_DBSCHQOS43, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS90, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS91, 0x000000F0); + mmio_write_32(DBSC_DBSCHQOS92, 0x000000A0); + mmio_write_32(DBSC_DBSCHQOS93, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS130, 0x00000100); + mmio_write_32(DBSC_DBSCHQOS131, 0x000000F0); + mmio_write_32(DBSC_DBSCHQOS132, 0x000000A0); + mmio_write_32(DBSC_DBSCHQOS133, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS140, 0x000000C0); + mmio_write_32(DBSC_DBSCHQOS141, 0x000000B0); + mmio_write_32(DBSC_DBSCHQOS142, 0x00000080); + mmio_write_32(DBSC_DBSCHQOS143, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS150, 0x00000040); + mmio_write_32(DBSC_DBSCHQOS151, 0x00000030); + mmio_write_32(DBSC_DBSCHQOS152, 0x00000020); + mmio_write_32(DBSC_DBSCHQOS153, 0x00000010); /* rev.0.08 */ if (pdqsr_ctl == 1){} else { - WriteReg_32(0xE67F0018, 0x00000001); + mmio_write_32(0xE67F0018, 0x00000001); } - WriteReg_32(DBSC_DBSYSCNT0, 0x00000000); + mmio_write_32(DBSC_DBSYSCNT0, 0x00000000); #endif return 1; diff --git a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c index 972b590a..2b088bb3 100644 --- a/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c +++ b/drivers/staging/renesas/rcar/ddr/ddr_a/ddr_init_v3m.c @@ -5,331 +5,321 @@ * SPDX-License-Identifier: BSD-3-Clause */ +#include #include #include #include "boot_init_dram.h" #include "boot_init_dram_regdef.h" -static void WriteReg_32(uintptr_t a, uint32_t v) -{ - *(volatile uint32_t*)a = v; -} - -static uint32_t ReadReg_32(uintptr_t a) -{ - uint32_t w = *(volatile uint32_t*)a; - return w; -} - static uint32_t init_ddr_v3m_1600(void) { // last modified 2016.12.16 uint32_t RegVal_R2, RegVal_R5, RegVal_R6, RegVal_R7, RegVal_R12; - WriteReg_32(DBSC_DBSYSCNT0,0x00001234); - WriteReg_32(DBSC_DBKIND,0x00000007); + mmio_write_32(DBSC_DBSYSCNT0,0x00001234); + mmio_write_32(DBSC_DBKIND,0x00000007); #if RCAR_DRAM_DDR3L_MEMCONF == 0 - WriteReg_32(DBSC_DBMEMCONF00,0x0f030a02); // 1GB: Eagle + mmio_write_32(DBSC_DBMEMCONF00,0x0f030a02); // 1GB: Eagle #else - WriteReg_32(DBSC_DBMEMCONF00,0x10030a02); // 2GB: V3MSK + mmio_write_32(DBSC_DBMEMCONF00,0x10030a02); // 2GB: V3MSK #endif - WriteReg_32(DBSC_DBPHYCONF0,0x00000001); - WriteReg_32(DBSC_DBTR0,0x0000000B); - WriteReg_32(DBSC_DBTR1,0x00000008); - WriteReg_32(DBSC_DBTR3,0x0000000B); - WriteReg_32(DBSC_DBTR4,0x000B000B); - WriteReg_32(DBSC_DBTR5,0x00000027); - WriteReg_32(DBSC_DBTR6,0x0000001C); - WriteReg_32(DBSC_DBTR7,0x00060006); - WriteReg_32(DBSC_DBTR8,0x00000020); - WriteReg_32(DBSC_DBTR9,0x00000006); - WriteReg_32(DBSC_DBTR10,0x0000000C); - WriteReg_32(DBSC_DBTR11,0x0000000B); - WriteReg_32(DBSC_DBTR12,0x00120012); - WriteReg_32(DBSC_DBTR13,0x01180118); - WriteReg_32(DBSC_DBTR14,0x00140005); - WriteReg_32(DBSC_DBTR15,0x00050004); - WriteReg_32(DBSC_DBTR16,0x071D0305); - WriteReg_32(DBSC_DBTR17,0x040C0010); - WriteReg_32(DBSC_DBTR18,0x00000200); - WriteReg_32(DBSC_DBTR19,0x01000040); - WriteReg_32(DBSC_DBTR20,0x02000120); - WriteReg_32(DBSC_DBTR21,0x00040004); - WriteReg_32(DBSC_DBBL,0x00000000); - WriteReg_32(DBSC_DBODT0,0x00000001); - WriteReg_32(DBSC_DBADJ0,0x00000001); - WriteReg_32(DBSC_DBCAM0CNF1,0x00082010); - WriteReg_32(DBSC_DBCAM0CNF2,0x00002000); - WriteReg_32(DBSC_DBSCHCNT0,0x080f003f); - WriteReg_32(DBSC_DBSCHCNT1,0x00001010); - WriteReg_32(DBSC_DBSCHSZ0,0x00000001); - WriteReg_32(DBSC_DBSCHRW0,0x00000200); - WriteReg_32(DBSC_DBSCHRW1,0x00000040); - WriteReg_32(DBSC_DBSCHQOS40,0x00000600); - WriteReg_32(DBSC_DBSCHQOS41,0x00000480); - WriteReg_32(DBSC_DBSCHQOS42,0x00000300); - WriteReg_32(DBSC_DBSCHQOS43,0x00000180); - WriteReg_32(DBSC_DBSCHQOS90,0x00000400); - WriteReg_32(DBSC_DBSCHQOS91,0x00000300); - WriteReg_32(DBSC_DBSCHQOS92,0x00000200); - WriteReg_32(DBSC_DBSCHQOS93,0x00000100); - WriteReg_32(DBSC_DBSCHQOS130,0x00000300); - WriteReg_32(DBSC_DBSCHQOS131,0x00000240); - WriteReg_32(DBSC_DBSCHQOS132,0x00000180); - WriteReg_32(DBSC_DBSCHQOS133,0x000000c0); - WriteReg_32(DBSC_DBSCHQOS140,0x00000200); - WriteReg_32(DBSC_DBSCHQOS141,0x00000180); - WriteReg_32(DBSC_DBSCHQOS142,0x00000100); - WriteReg_32(DBSC_DBSCHQOS143,0x00000080); - WriteReg_32(DBSC_DBSCHQOS150,0x00000100); - WriteReg_32(DBSC_DBSCHQOS151,0x000000c0); - WriteReg_32(DBSC_DBSCHQOS152,0x00000080); - WriteReg_32(DBSC_DBSCHQOS153,0x00000040); - WriteReg_32(DBSC_DBSYSCONF1,0x00000002); - WriteReg_32(DBSC_DBCAM0CNF1,0x00040C04); - WriteReg_32(DBSC_DBCAM0CNF2,0x000001c4); - WriteReg_32(DBSC_DBSCHSZ0,0x00000003); - WriteReg_32(DBSC_DBSCHRW1,0x001a0080); - WriteReg_32(DBSC_DBDFICNT0,0x00000010); + mmio_write_32(DBSC_DBPHYCONF0,0x00000001); + mmio_write_32(DBSC_DBTR0,0x0000000B); + mmio_write_32(DBSC_DBTR1,0x00000008); + mmio_write_32(DBSC_DBTR3,0x0000000B); + mmio_write_32(DBSC_DBTR4,0x000B000B); + mmio_write_32(DBSC_DBTR5,0x00000027); + mmio_write_32(DBSC_DBTR6,0x0000001C); + mmio_write_32(DBSC_DBTR7,0x00060006); + mmio_write_32(DBSC_DBTR8,0x00000020); + mmio_write_32(DBSC_DBTR9,0x00000006); + mmio_write_32(DBSC_DBTR10,0x0000000C); + mmio_write_32(DBSC_DBTR11,0x0000000B); + mmio_write_32(DBSC_DBTR12,0x00120012); + mmio_write_32(DBSC_DBTR13,0x01180118); + mmio_write_32(DBSC_DBTR14,0x00140005); + mmio_write_32(DBSC_DBTR15,0x00050004); + mmio_write_32(DBSC_DBTR16,0x071D0305); + mmio_write_32(DBSC_DBTR17,0x040C0010); + mmio_write_32(DBSC_DBTR18,0x00000200); + mmio_write_32(DBSC_DBTR19,0x01000040); + mmio_write_32(DBSC_DBTR20,0x02000120); + mmio_write_32(DBSC_DBTR21,0x00040004); + mmio_write_32(DBSC_DBBL,0x00000000); + mmio_write_32(DBSC_DBODT0,0x00000001); + mmio_write_32(DBSC_DBADJ0,0x00000001); + mmio_write_32(DBSC_DBCAM0CNF1,0x00082010); + mmio_write_32(DBSC_DBCAM0CNF2,0x00002000); + mmio_write_32(DBSC_DBSCHCNT0,0x080f003f); + mmio_write_32(DBSC_DBSCHCNT1,0x00001010); + mmio_write_32(DBSC_DBSCHSZ0,0x00000001); + mmio_write_32(DBSC_DBSCHRW0,0x00000200); + mmio_write_32(DBSC_DBSCHRW1,0x00000040); + mmio_write_32(DBSC_DBSCHQOS40,0x00000600); + mmio_write_32(DBSC_DBSCHQOS41,0x00000480); + mmio_write_32(DBSC_DBSCHQOS42,0x00000300); + mmio_write_32(DBSC_DBSCHQOS43,0x00000180); + mmio_write_32(DBSC_DBSCHQOS90,0x00000400); + mmio_write_32(DBSC_DBSCHQOS91,0x00000300); + mmio_write_32(DBSC_DBSCHQOS92,0x00000200); + mmio_write_32(DBSC_DBSCHQOS93,0x00000100); + mmio_write_32(DBSC_DBSCHQOS130,0x00000300); + mmio_write_32(DBSC_DBSCHQOS131,0x00000240); + mmio_write_32(DBSC_DBSCHQOS132,0x00000180); + mmio_write_32(DBSC_DBSCHQOS133,0x000000c0); + mmio_write_32(DBSC_DBSCHQOS140,0x00000200); + mmio_write_32(DBSC_DBSCHQOS141,0x00000180); + mmio_write_32(DBSC_DBSCHQOS142,0x00000100); + mmio_write_32(DBSC_DBSCHQOS143,0x00000080); + mmio_write_32(DBSC_DBSCHQOS150,0x00000100); + mmio_write_32(DBSC_DBSCHQOS151,0x000000c0); + mmio_write_32(DBSC_DBSCHQOS152,0x00000080); + mmio_write_32(DBSC_DBSCHQOS153,0x00000040); + mmio_write_32(DBSC_DBSYSCONF1,0x00000002); + mmio_write_32(DBSC_DBCAM0CNF1,0x00040C04); + mmio_write_32(DBSC_DBCAM0CNF2,0x000001c4); + mmio_write_32(DBSC_DBSCHSZ0,0x00000003); + mmio_write_32(DBSC_DBSCHRW1,0x001a0080); + mmio_write_32(DBSC_DBDFICNT0,0x00000010); - WriteReg_32(DBSC_DBPDLK0,0X0000A55A); - WriteReg_32(DBSC_DBCMD,0x01000001); - WriteReg_32(DBSC_DBCMD,0x08000000); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X80010000); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDLK0,0X0000A55A); + mmio_write_32(DBSC_DBCMD,0x01000001); + mmio_write_32(DBSC_DBCMD,0x08000000); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X80010000); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000008); - WriteReg_32(DBSC_DBPDRGD0,0X000B8000); - WriteReg_32(DBSC_DBPDRGA0,0X00000090); - WriteReg_32(DBSC_DBPDRGD0,0X04058904); - WriteReg_32(DBSC_DBPDRGA0,0X00000091); - WriteReg_32(DBSC_DBPDRGD0,0X0007BB6D); - WriteReg_32(DBSC_DBPDRGA0,0X00000095); - WriteReg_32(DBSC_DBPDRGD0,0X0007BB6B); - WriteReg_32(DBSC_DBPDRGA0,0X00000099); - WriteReg_32(DBSC_DBPDRGD0,0X0007BB6D); - WriteReg_32(DBSC_DBPDRGA0,0X00000090); - WriteReg_32(DBSC_DBPDRGD0,0X04058900); - WriteReg_32(DBSC_DBPDRGA0,0X00000021); - WriteReg_32(DBSC_DBPDRGD0,0X0024641E); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00010073); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000008); + mmio_write_32(DBSC_DBPDRGD0,0X000B8000); + mmio_write_32(DBSC_DBPDRGA0,0X00000090); + mmio_write_32(DBSC_DBPDRGD0,0X04058904); + mmio_write_32(DBSC_DBPDRGA0,0X00000091); + mmio_write_32(DBSC_DBPDRGD0,0X0007BB6D); + mmio_write_32(DBSC_DBPDRGA0,0X00000095); + mmio_write_32(DBSC_DBPDRGD0,0X0007BB6B); + mmio_write_32(DBSC_DBPDRGA0,0X00000099); + mmio_write_32(DBSC_DBPDRGD0,0X0007BB6D); + mmio_write_32(DBSC_DBPDRGA0,0X00000090); + mmio_write_32(DBSC_DBPDRGD0,0X04058900); + mmio_write_32(DBSC_DBPDRGA0,0X00000021); + mmio_write_32(DBSC_DBPDRGD0,0X0024641E); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00010073); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000090); - WriteReg_32(DBSC_DBPDRGD0,0X0C058900); - WriteReg_32(DBSC_DBPDRGA0,0X00000090); - WriteReg_32(DBSC_DBPDRGD0,0X04058900); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000090); + mmio_write_32(DBSC_DBPDRGD0,0X0C058900); + mmio_write_32(DBSC_DBPDRGA0,0X00000090); + mmio_write_32(DBSC_DBPDRGD0,0X04058900); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000003); - WriteReg_32(DBSC_DBPDRGD0,0X0780C700); - WriteReg_32(DBSC_DBPDRGA0,0X00000007); - while ( (BIT(30)& ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000003); + mmio_write_32(DBSC_DBPDRGD0,0X0780C700); + mmio_write_32(DBSC_DBPDRGA0,0X00000007); + while ( (BIT(30)& mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000004); - WriteReg_32(DBSC_DBPDRGD0,0X08C0C170); - WriteReg_32(DBSC_DBPDRGA0,0X00000022); - WriteReg_32(DBSC_DBPDRGD0,0X1000040B); - WriteReg_32(DBSC_DBPDRGA0,0X00000023); - WriteReg_32(DBSC_DBPDRGD0,0X2D9C0B66); - WriteReg_32(DBSC_DBPDRGA0,0X00000024); - WriteReg_32(DBSC_DBPDRGD0,0X2A88C400); - WriteReg_32(DBSC_DBPDRGA0,0X00000025); - WriteReg_32(DBSC_DBPDRGD0,0X30005200); - WriteReg_32(DBSC_DBPDRGA0,0X00000026); - WriteReg_32(DBSC_DBPDRGD0,0X0014A9C9); - WriteReg_32(DBSC_DBPDRGA0,0X00000027); - WriteReg_32(DBSC_DBPDRGD0,0X00000D70); - WriteReg_32(DBSC_DBPDRGA0,0X00000028); - WriteReg_32(DBSC_DBPDRGD0,0X00000004); - WriteReg_32(DBSC_DBPDRGA0,0X00000029); - WriteReg_32(DBSC_DBPDRGD0,0X00000018); - WriteReg_32(DBSC_DBPDRGA0,0X0000002C); - WriteReg_32(DBSC_DBPDRGD0,0X81003047); - WriteReg_32(DBSC_DBPDRGA0,0X00000020); - WriteReg_32(DBSC_DBPDRGD0,0X00181884); - WriteReg_32(DBSC_DBPDRGA0,0X0000001A); - WriteReg_32(DBSC_DBPDRGD0,0X13C03C10); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000004); + mmio_write_32(DBSC_DBPDRGD0,0X08C0C170); + mmio_write_32(DBSC_DBPDRGA0,0X00000022); + mmio_write_32(DBSC_DBPDRGD0,0X1000040B); + mmio_write_32(DBSC_DBPDRGA0,0X00000023); + mmio_write_32(DBSC_DBPDRGD0,0X2D9C0B66); + mmio_write_32(DBSC_DBPDRGA0,0X00000024); + mmio_write_32(DBSC_DBPDRGD0,0X2A88C400); + mmio_write_32(DBSC_DBPDRGA0,0X00000025); + mmio_write_32(DBSC_DBPDRGD0,0X30005200); + mmio_write_32(DBSC_DBPDRGA0,0X00000026); + mmio_write_32(DBSC_DBPDRGD0,0X0014A9C9); + mmio_write_32(DBSC_DBPDRGA0,0X00000027); + mmio_write_32(DBSC_DBPDRGD0,0X00000D70); + mmio_write_32(DBSC_DBPDRGA0,0X00000028); + mmio_write_32(DBSC_DBPDRGD0,0X00000004); + mmio_write_32(DBSC_DBPDRGA0,0X00000029); + mmio_write_32(DBSC_DBPDRGD0,0X00000018); + mmio_write_32(DBSC_DBPDRGA0,0X0000002C); + mmio_write_32(DBSC_DBPDRGD0,0X81003047); + mmio_write_32(DBSC_DBPDRGA0,0X00000020); + mmio_write_32(DBSC_DBPDRGD0,0X00181884); + mmio_write_32(DBSC_DBPDRGA0,0X0000001A); + mmio_write_32(DBSC_DBPDRGD0,0X13C03C10); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X000000A7); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000A8); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000A9); - WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000C7); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000C8); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000C9); - WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000E7); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000E8); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X000000E9); - WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X00000107); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X00000108); - WriteReg_32(DBSC_DBPDRGD0,0X0D0D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X00000109); - WriteReg_32(DBSC_DBPDRGD0,0X000D0D0D); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00010181); - WriteReg_32(DBSC_DBCMD,0x08000001); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X000000A7); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000A8); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000A9); + mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000C7); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000C8); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000C9); + mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000E7); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000E8); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X000000E9); + mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X00000107); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X00000108); + mmio_write_32(DBSC_DBPDRGD0,0X0D0D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X00000109); + mmio_write_32(DBSC_DBPDRGD0,0X000D0D0D); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00010181); + mmio_write_32(DBSC_DBCMD,0x08000001); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00010601); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00010601); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i<4; i++) { - WriteReg_32(DBSC_DBPDRGA0,0X000000B1 + i*0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00 ) >> 8; - WriteReg_32(DBSC_DBPDRGA0,0X000000B4 + i*0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF ) ; - WriteReg_32(DBSC_DBPDRGA0,0X000000B3 + i*0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007 ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B1 + i*0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00 ) >> 8; + mmio_write_32(DBSC_DBPDRGA0,0X000000B4 + i*0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B3 + i*0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007 ) ; if ( RegVal_R6 > 0 ) { - WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ; - WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,((RegVal_R7+1)&0X00000007) | RegVal_R2); - WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ; - WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); + mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,((RegVal_R7+1)&0X00000007) | RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R6); } else { - WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ; - WriteReg_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); + mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8 ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B2 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,RegVal_R2 | RegVal_R7); - WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ; - WriteReg_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); - WriteReg_32(DBSC_DBPDRGD0,(((RegVal_R5<<1) + RegVal_R6 ) & 0X000000FF )| RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00 ) ; + mmio_write_32(DBSC_DBPDRGA0,0X000000B0 + i*0x20); + mmio_write_32(DBSC_DBPDRGD0,(((RegVal_R5<<1) + RegVal_R6 ) & 0X000000FF )| RegVal_R2); } } - WriteReg_32(DBSC_DBPDRGA0,0X00000005); - WriteReg_32(DBSC_DBPDRGD0,0XC1AA00A0); - WriteReg_32(DBSC_DBPDRGA0,0X000000A0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X000000C0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X000000E0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X00000100); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00010801); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000005); + mmio_write_32(DBSC_DBPDRGD0,0XC1AA00A0); + mmio_write_32(DBSC_DBPDRGA0,0X000000A0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X000000C0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X000000E0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X00000100); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00010801); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000005); - WriteReg_32(DBSC_DBPDRGD0,0XC1AA00B8); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X0001F001); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000005); + mmio_write_32(DBSC_DBPDRGD0,0XC1AA00B8); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X0001F001); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X000000A0); - WriteReg_32(DBSC_DBPDRGD0,0X7C000285); - WriteReg_32(DBSC_DBPDRGA0,0X000000C0); - WriteReg_32(DBSC_DBPDRGD0,0X7C000285); - WriteReg_32(DBSC_DBPDRGA0,0X000000E0); - WriteReg_32(DBSC_DBPDRGD0,0X7C000285); - WriteReg_32(DBSC_DBPDRGA0,0X00000100); - WriteReg_32(DBSC_DBPDRGD0,0X7C000285); - WriteReg_32(DBSC_DBPDRGA0,0X0000002C); - WriteReg_32(DBSC_DBPDRGD0,0X81003087); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00010401); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X000000A0); + mmio_write_32(DBSC_DBPDRGD0,0X7C000285); + mmio_write_32(DBSC_DBPDRGA0,0X000000C0); + mmio_write_32(DBSC_DBPDRGD0,0X7C000285); + mmio_write_32(DBSC_DBPDRGA0,0X000000E0); + mmio_write_32(DBSC_DBPDRGD0,0X7C000285); + mmio_write_32(DBSC_DBPDRGA0,0X00000100); + mmio_write_32(DBSC_DBPDRGD0,0X7C000285); + mmio_write_32(DBSC_DBPDRGA0,0X0000002C); + mmio_write_32(DBSC_DBPDRGD0,0X81003087); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00010401); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); for (uint32_t i = 0; i < 4; i++) { - WriteReg_32(DBSC_DBPDRGA0, 0X000000B1 + i * 0x20); - RegVal_R5 = (ReadReg_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8; - WriteReg_32(DBSC_DBPDRGA0, 0X000000B4 + i * 0x20); - RegVal_R6 = (ReadReg_32(DBSC_DBPDRGD0) & 0x000000FF); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B1 + i * 0x20); + RegVal_R5 = (mmio_read_32(DBSC_DBPDRGD0) & 0x0000FF00) >> 8; + mmio_write_32(DBSC_DBPDRGA0, 0X000000B4 + i * 0x20); + RegVal_R6 = (mmio_read_32(DBSC_DBPDRGD0) & 0x000000FF); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B3 + i * 0x20); - RegVal_R7 = (ReadReg_32(DBSC_DBPDRGD0) & 0x00000007); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B3 + i * 0x20); + RegVal_R7 = (mmio_read_32(DBSC_DBPDRGD0) & 0x00000007); RegVal_R12 = (RegVal_R5 >> 2); if (RegVal_R6 - RegVal_R12 > 0) { - WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R7 + 1) & 0X00000007) | RegVal_R2); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R7 + 1) & 0X00000007) | RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R6 - RegVal_R12) & 0X000000FF) | RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R6 - RegVal_R12) & 0X000000FF) | RegVal_R2); } else { - WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFFF8); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, (RegVal_R7 & 0X00000007) | RegVal_R2); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); - RegVal_R2 = (ReadReg_32(DBSC_DBPDRGD0) & 0XFFFFFF00); - WriteReg_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); - WriteReg_32(DBSC_DBPDRGD0, ((RegVal_R6 + RegVal_R5 + (RegVal_R5 >> 1) + RegVal_R12) & 0X000000FF) | RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFFF8); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B2 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, (RegVal_R7 & 0X00000007) | RegVal_R2); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); + RegVal_R2 = (mmio_read_32(DBSC_DBPDRGD0) & 0XFFFFFF00); + mmio_write_32(DBSC_DBPDRGA0, 0X000000B0 + i * 0x20); + mmio_write_32(DBSC_DBPDRGD0, ((RegVal_R6 + RegVal_R5 + (RegVal_R5 >> 1) + RegVal_R12) & 0X000000FF) | RegVal_R2); } } - WriteReg_32(DBSC_DBPDRGA0,0X000000A0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X000000C0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X000000E0); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X00000100); - WriteReg_32(DBSC_DBPDRGD0,0X7C0002C5); - WriteReg_32(DBSC_DBPDRGA0,0X00000001); - WriteReg_32(DBSC_DBPDRGD0,0X00015001); - WriteReg_32(DBSC_DBPDRGA0,0X00000006); - while ( (BIT(0) & ReadReg_32(DBSC_DBPDRGD0)) == 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X000000A0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X000000C0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X000000E0); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X00000100); + mmio_write_32(DBSC_DBPDRGD0,0X7C0002C5); + mmio_write_32(DBSC_DBPDRGA0,0X00000001); + mmio_write_32(DBSC_DBPDRGD0,0X00015001); + mmio_write_32(DBSC_DBPDRGA0,0X00000006); + while ( (BIT(0) & mmio_read_32(DBSC_DBPDRGD0)) == 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000003); - WriteReg_32(DBSC_DBPDRGD0,0X0380C700); - WriteReg_32(DBSC_DBPDRGA0,0X00000007); - while ( (BIT(30)& ReadReg_32(DBSC_DBPDRGD0)) != 0 ); - WriteReg_32(DBSC_DBPDRGA0,0X00000021); - WriteReg_32(DBSC_DBPDRGD0,0X0024643E); + mmio_write_32(DBSC_DBPDRGA0,0X00000003); + mmio_write_32(DBSC_DBPDRGD0,0X0380C700); + mmio_write_32(DBSC_DBPDRGA0,0X00000007); + while ( (BIT(30)& mmio_read_32(DBSC_DBPDRGD0)) != 0 ); + mmio_write_32(DBSC_DBPDRGA0,0X00000021); + mmio_write_32(DBSC_DBPDRGD0,0X0024643E); - WriteReg_32(DBSC_DBBUS0CNF1,0x00000000); - WriteReg_32(DBSC_DBBUS0CNF0,0x00010001); - WriteReg_32(DBSC_DBCALCNF,0x0100200E); - WriteReg_32(DBSC_DBRFCNF1,0x00081860); - WriteReg_32(DBSC_DBRFCNF2,0x00010000); - WriteReg_32(DBSC_DBDFICUPDCNF,0x40100001); - WriteReg_32(DBSC_DBRFEN,0x00000001); - WriteReg_32(DBSC_DBACEN,0x00000001); - WriteReg_32(DBSC_DBPDLK0,0X00000000); - WriteReg_32(0xE67F0024, 0x00000001); - WriteReg_32(DBSC_DBSYSCNT0,0x00000000); + mmio_write_32(DBSC_DBBUS0CNF1,0x00000000); + mmio_write_32(DBSC_DBBUS0CNF0,0x00010001); + mmio_write_32(DBSC_DBCALCNF,0x0100200E); + mmio_write_32(DBSC_DBRFCNF1,0x00081860); + mmio_write_32(DBSC_DBRFCNF2,0x00010000); + mmio_write_32(DBSC_DBDFICUPDCNF,0x40100001); + mmio_write_32(DBSC_DBRFEN,0x00000001); + mmio_write_32(DBSC_DBACEN,0x00000001); + mmio_write_32(DBSC_DBPDLK0,0X00000000); + mmio_write_32(0xE67F0024, 0x00000001); + mmio_write_32(DBSC_DBSYSCNT0,0x00000000); return 1; }