From: Christian Lamparter Date: Wed, 20 Jul 2016 13:44:54 +0000 (+0200) Subject: apm821xx: add support for the Western Digital MyBook Live Series X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=dc7efaefb53d4671893add07934839eb8d44934d;p=openwrt%2Fstaging%2Fansuel.git apm821xx: add support for the Western Digital MyBook Live Series Hardware Highlights: This patch adds support for Western Digital MyBook Live Series: CPU: AMCC PowerPC UNKNOWN (PVR=12c41c83) at 800 MHz (PLB=200, OPB=100, EBC=100 MHz) 32 kB I-Cache 32 kB D-Cache, 256 kB L2-Cache, 32 kB OnChip Memory Board: Apollo-3G - APM82181 Board, 1*SATA DRAM: 256 MB (2x NT5TU64M16GG-AC) FLASH: 512 kB (SST 39VF040) Ethernet: 1xRGMII - 1 Gbit - Broadcom PHY BCM54610 WARNING: The serial port needs a TTL/RS-232 v3.3 level converter! The MyBook Live Duo additionally features a 1x USB 2.0 host port and can support a second hard-drive. This target produces two images for a target. 1. ext4 image The extracted/raw image can be directly installed on the internal HDD via "dd if=img.ext4 of=/dev/sdX". This can either be done in place with the stock MyBook Live firmware via ssh. Or by removing the HDD and writing the image with a different PC. The the compressed images are useful for sysupgrade. 2. recovery.tar image for TFTP and Serial. extract the recovery.tar to a TFTP server directory. On the MyBook Live (Duo) serial port - Hit Enter during u-boot and insert: # setenv serverip 192.168.1.254; setenv ipaddr 192.168.1.1; run net_self Where 192.168.1.254 is your TFTP server. Signed-off-by: Christian Lamparter --- diff --git a/target/linux/apm821xx/Makefile b/target/linux/apm821xx/Makefile index eb34a3b3dc..bd89c6b332 100644 --- a/target/linux/apm821xx/Makefile +++ b/target/linux/apm821xx/Makefile @@ -11,7 +11,7 @@ CPU_TYPE:=464fp FEATURES:=fpu dt gpio MAINTAINER:=Chris Blake , \ Christian Lamparter -SUBTARGETS:=nand +SUBTARGETS:=nand sata KERNEL_PATCHVER:=4.4 diff --git a/target/linux/apm821xx/base-files/etc/board.d/01_leds b/target/linux/apm821xx/base-files/etc/board.d/01_leds index d5f4cc9478..bcc7a9f101 100755 --- a/target/linux/apm821xx/base-files/etc/board.d/01_leds +++ b/target/linux/apm821xx/base-files/etc/board.d/01_leds @@ -16,6 +16,9 @@ mr24) ucidef_set_led_wlan "wlan4" "WLAN4" "mr24:green:wifi4" "phy0tpt" ;; +mbl) + ;; + *) ;; esac diff --git a/target/linux/apm821xx/base-files/etc/board.d/02_network b/target/linux/apm821xx/base-files/etc/board.d/02_network index 4d53b2f64a..9525d8c5f2 100755 --- a/target/linux/apm821xx/base-files/etc/board.d/02_network +++ b/target/linux/apm821xx/base-files/etc/board.d/02_network @@ -9,6 +9,7 @@ board_config_update board=$(apm821xx_board_name) case "$board" in +mbl | \ mr24) ucidef_set_interface_lan "eth0" ;; diff --git a/target/linux/apm821xx/base-files/etc/diag.sh b/target/linux/apm821xx/base-files/etc/diag.sh index 58301f836f..bea66eb14d 100755 --- a/target/linux/apm821xx/base-files/etc/diag.sh +++ b/target/linux/apm821xx/base-files/etc/diag.sh @@ -5,6 +5,10 @@ get_status_led() { case $(apm821xx_board_name) in + mbl) + status_led="mbl:green:power" + ;; + mr24) status_led="mr24:green:power" ;; diff --git a/target/linux/apm821xx/base-files/lib/apm821xx.sh b/target/linux/apm821xx/base-files/lib/apm821xx.sh index 82f85c56be..98e88cff6e 100755 --- a/target/linux/apm821xx/base-files/lib/apm821xx.sh +++ b/target/linux/apm821xx/base-files/lib/apm821xx.sh @@ -14,6 +14,10 @@ apm821xx_board_detect() { name="mr24" ;; + *"MyBook Live"*) + name="mbl" + ;; + *) name="unknown" ;; diff --git a/target/linux/apm821xx/base-files/lib/preinit/79_move_config b/target/linux/apm821xx/base-files/lib/preinit/79_move_config new file mode 100644 index 0000000000..7c651b8a13 --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/preinit/79_move_config @@ -0,0 +1,13 @@ +#!/bin/sh + +BOOTPART=/dev/sda1 + +move_config() { + if [ -b $BOOTPART ]; then + mkdir -p /boot + mount -t ext4 -o rw,noatime $BOOTPART /boot + [ -f /boot/sysupgrade.tgz ] && mv -f /boot/sysupgrade.tgz / + fi +} + +boot_hook_add preinit_mount_root move_config diff --git a/target/linux/apm821xx/base-files/lib/upgrade/platform.sh b/target/linux/apm821xx/base-files/lib/upgrade/platform.sh index ddf775f4ae..d5b0986dd5 100755 --- a/target/linux/apm821xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/apm821xx/base-files/lib/upgrade/platform.sh @@ -11,6 +11,11 @@ platform_check_image() { [ "$#" -gt 1 ] && return 1 case "$board" in + mbl) + mbl_do_platform_check $board "$1" + return $?; + ;; + mr24) merakinand_do_platform_check $board "$1" return $?; @@ -41,6 +46,10 @@ platform_do_upgrade() { local board=$(apm821xx_board_name) case "$board" in + mbl) + mbl_do_upgrade "$ARGV" + ;; + *) default_do_upgrade "$ARGV" ;; @@ -51,6 +60,10 @@ platform_copy_config() { local board=$(apm821xx_board_name) case "$board" in + mbl) + mbl_copy_config + ;; + *) ;; esac diff --git a/target/linux/apm821xx/base-files/lib/upgrade/wdbook.sh b/target/linux/apm821xx/base-files/lib/upgrade/wdbook.sh new file mode 100644 index 0000000000..d7347516cb --- /dev/null +++ b/target/linux/apm821xx/base-files/lib/upgrade/wdbook.sh @@ -0,0 +1,36 @@ +. /lib/functions.sh + +get_magic_at() { + local file="$1" + local pos="$2" + get_image "$file" | dd bs=1 count=2 skip="$pos" 2>/dev/null | hexdump -v -n 2 -e '1/1 "%02x"' +} + +mbl_do_platform_check() { + local board="$1" + local file="$2" + local magic + + magic=$(get_magic_at "$file" 510) + + [ "$magic" != "55aa" ] && { + echo "Failed to verify MBR boot signature." + return 1 + } + + return 0; +} + +mbl_do_upgrade() { + sync + get_image "$1" | dd of=/dev/sda bs=2M conv=fsync + sleep 1 +} + +mbl_copy_config() { + mkdir -p /boot + [ -f /boot/uImage ] || mount -t ext4 -o rw,noatime /dev/sda1 /boot + cp -af "$CONF_TAR" /boot/ + sync + umount /boot +} diff --git a/target/linux/apm821xx/config-4.4 b/target/linux/apm821xx/config-4.4 index 1e82e26692..804e7e852f 100644 --- a/target/linux/apm821xx/config-4.4 +++ b/target/linux/apm821xx/config-4.4 @@ -4,6 +4,7 @@ CONFIG_4xx=y CONFIG_4xx_SOC=y # CONFIG_ADVANCED_OPTIONS is not set CONFIG_APM821xx=y +# CONFIG_APOLLO3G is not set # CONFIG_ARCHES is not set CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y diff --git a/target/linux/apm821xx/dts/apollo3g-duo.dts b/target/linux/apm821xx/dts/apollo3g-duo.dts new file mode 100644 index 0000000000..874c469b2b --- /dev/null +++ b/target/linux/apm821xx/dts/apollo3g-duo.dts @@ -0,0 +1,18 @@ +/* + * Device Tree Source for AMCC Canyonlands (460EX) + * + * Copyright 2008 DENX Software Engineering, Stefan Roese + * (c) Copyright 2010 Western Digital Technologies, Inc. All Rights Reserved. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "apollo3g.dtsi" + +/ { + model = "MyBook Live Duo"; +}; diff --git a/target/linux/apm821xx/dts/apollo3g.dts b/target/linux/apm821xx/dts/apollo3g.dts new file mode 100644 index 0000000000..1b9f8267e4 --- /dev/null +++ b/target/linux/apm821xx/dts/apollo3g.dts @@ -0,0 +1,34 @@ +/* + * Copyright 2008 DENX Software Engineering, Stefan Roese + * (c) Copyright 2010 Western Digital Technologies, Inc. All Rights Reserved. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/dts-v1/; + +#include "apollo3g.dtsi" + +/ { + model = "MyBook Live"; +}; + +&SATA0 { + status = "disabled"; +}; + +&USBOTG0 { + status = "disabled"; +}; + +&gpio0 { + enable-usb { + status = "disabled"; + }; + + enable-port0 { + status = "disabled"; + }; +}; diff --git a/target/linux/apm821xx/dts/apollo3g.dtsi b/target/linux/apm821xx/dts/apollo3g.dtsi new file mode 100644 index 0000000000..bd15a8e22a --- /dev/null +++ b/target/linux/apm821xx/dts/apollo3g.dtsi @@ -0,0 +1,489 @@ +/* + * Copyright 2008 DENX Software Engineering, Stefan Roese + * (c) Copyright 2010 Western Digital Technologies, Inc. All Rights Reserved. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/ { + #address-cells = <2>; + #size-cells = <1>; + compatible = "amcc,apollo3g"; + dcr-parent = <&{/cpus/cpu@0}>; + + aliases { + ethernet0 = &EMAC0; + serial0 = &UART0; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,apm82181"; + reg = <0x00000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; + dcr-controller; + dcr-access-method = "native"; + next-level-cache = <&L2C0>; + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0x0c0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0x0d0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0x0e0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0x0f0 0x009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + OCM1: ocm@400040000 { + compatible = "ibm,ocm"; + status = "okay"; + cell-index = <1>; + /* configured in U-Boot */ + reg = <4 0x00040000 0x8000>; /* 32K */ + }; + + SDR0: sdr { + compatible = "ibm,sdr-460ex"; + dcr-reg = <0x00e 0x002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460ex"; + dcr-reg = <0x00c 0x002>; + }; + + CPM0: cpm { + compatible = "ibm,cpm"; + dcr-access-method = "native"; + dcr-reg = <0x160 0x003>; + unused-units = <0x00000100>; + idle-doze = <0x02000000>; + standby = <0xfeff791d>; + }; + + L2C0: l2c { + compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache"; + dcr-reg = <0x020 0x008 + 0x030 0x008>; + cache-line-size = <32>; + cache-size = <262144>; + interrupt-parent = <&UIC1>; + interrupts = <11 1>; + }; + + plb { + compatible = "ibm,plb-460ex", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; + dcr-reg = <0x010 0x002>; + }; + + CRYPTO: crypto@180000 { + compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; + reg = <4 0x00180000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x1d 0x4>; + }; + + PKA: pka@114000 { + device_type = "pka"; + compatible = "ppc4xx-pka", "amcc,ppc4xx-pka"; + reg = <0 0x00114000 0x4000>; + interrupt-parent = <&UIC0>; + interrupts = <0x14 0x2>; + }; + + HWRNG: trng@110000 { + compatible = "amcc,ppc460ex-rng", "ppc4xx-rng"; + reg = <4 0x00110000 0x50>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; + descriptor-memory = "ocm"; + dcr-reg = <0x180 0x062>; + num-tx-chans = <1>; + num-rx-chans = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 0x6 0x4 + /*RXEOB*/ 0x7 0x4 + /*SERR*/ 0x3 0x4 + /*TXDE*/ 0x4 0x4 + /*RXDE*/ 0x5 0x4 + /*TX0 COAL*/ 0x8 0x2 + /*TX1 COAL 0x9 0x2*/ + /*RX0 COAL*/ 0xc 0x2 + /*RX1 COAL 0xd 0x2*/ >; + }; + + AHBDMA: dma@bffd0800 { + compatible = "snps,dma-spear1340"; + reg = <4 0xbffd0800 0x400>; + interrupt-parent = <&UIC0>; + interrupts = <25 4>; + #dma-cells = <3>; + /* use autoconfiguration for the dma setup */ + }; + + SATA0: sata@bffd1000 { + compatible = "amcc,sata-460ex"; + reg = <4 0xbffd1000 0x800>; + interrupt-parent = <&UIC0>; + interrupts = <26 4>; + dmas = <&AHBDMA 0 0 1>; + dma-names = "sata-dma"; + }; + + SATA1: sata@bffd1800 { + compatible = "amcc,sata-460ex"; + reg = <4 0xbffd1800 0x800>; + interrupt-parent = <&UIC0>; + interrupts = <27 4>; + dmas = <&AHBDMA 1 0 2>; + dma-names = "sata-dma"; + }; + + + USBOTG0: usbotg@bff80000 { + compatible = "snps,dwc2"; + reg = <4 0xbff80000 0x10000>; + interrupt-parent = <&USBOTG0>; + interrupts = <0 1 2>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + dr_mode = "host"; + }; + + POB0: opb { + compatible = "ibm,opb-460ex", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0xb0000000 0x4 0xb0000000 0x50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460ex", "ibm,ebc"; + dcr-reg = <0x012 0x002>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + interrupts = <0x6 0x4>; + interrupt-parent = <&UIC1>; + /* ranges property are supplied by U-Boot */ + ranges = <0x0 0x0 0xfff80000 0x00080000 + 0x1 0x0 0x00000000 0x00000000 + 0x2 0x0 0x00000000 0x00000000>; + + /* Define device tree for Apollo3g NAS NOR flash + * The NOR doesn't work when "enable-button" GPIO + * is asserted. + */ + nor_flash@0,0 { + compatible = "amd,s29gl512n", "jedec-probe", "cfi-flash", "mtd-rom"; + bank-width = <1>; + reg = <0x00000000 0x00000000 0x00080000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + /* Part of bootrom - Don't use it without a jump */ + label = "free"; + reg = <0x00000000 0x0001e000>; + }; + partition@1 { + label = "env"; + reg = <0x0001e000 0x00002000>; + }; + partition@2 { + label = "uboot"; + reg = <0x00020000 0x00050000>; + }; + + }; + + ndfc@1,0 { + compatible = "ibm,ndfc"; + reg = <0x00000001 0x00000000 0x00002000>; + ccr = <0x00001000>; + bank-settings = <0x80002222>; + #address-cells = <1>; + #size-cells = <1>; + status = "disabled"; + + nand { + #address-cells = <1>; + #size-cells = <1>; + }; + }; + }; + + gpio0: gpio0@e0000000 { + compatible = "wd,mbl-gpio", "ti,74273"; + reg-names = "dat"; + reg = <0xe0000000 0x1>; + #gpio-cells = <2>; + gpio-controller; + + enable-phy { + /* toggle to reset EMAC PHY */ + gpio-hog; + line-name = "enable EMAC PHY"; + gpios = <0 1>; + output-low; + }; + + enable-button { + /* Defined in u-boot as: NOT_NOR + * "enables features other than NOR + * specifically, the buffer at CS2" + * (button). + * + * Note: This option is disabled as + * it prevents the system from being + * rebooted successfully. + */ + + gpio-hog; + line-name = "Enable Reset Button, disable NOR"; + gpios = <1 0>; + output-low; + }; + + enable-usb { + gpio-hog; + line-name = "Power USB Core"; + gpios = <2 1>; + output-low; + }; + + enable-port1 { + gpio-hog; + line-name = "Power Drive Port 1"; + gpios = <3 1>; + output-low; + }; + + enable-port0 { + gpio-hog; + line-name = "Power Drive Port 0"; + gpios = <7 1>; + output-low; + }; + }; + + gpio1: gpio1@e0100000 { + compatible = "wd,mbl-gpio", "ti,74244"; + reg-names = "dat"; + reg = <0xe0100000 0x1>; + #gpio-cells = <2>; + gpio-controller; + no-output; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <0xef600300 0x00000008>; + virtual-reg = <0xef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <0x1 0x4>; + }; + + gpio-leds { + compatible = "gpio-leds"; + power-red { + label = "mbl:red:power"; + gpios = <&gpio0 4 0>; + linux,default-trigger = "panic"; + }; + power-green { + label = "mbl:green:power"; + gpios = <&gpio0 5 0>; + linux,default-trigger = "default-on"; + }; + power-blue { + label = "mbl:blue:power"; + gpios = <&gpio0 6 0>; + linux,default-trigger = "cpu0"; + }; + }; + + gpio_keys_polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <60>; /* 3 * 20 = 60ms */ + autorepeat; + button@1 { + label = "Reset button"; + linux,code = <0x198>; /* KEY_RESTART */ + gpios = <&gpio1 2 1>; + }; + }; + + RGMII0: emac-rgmii@ef601500 { + compatible = "ibm,rgmii-405ex", "ibm,rgmii"; + reg = <0xef601500 0x00000008>; + has-mdio; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460ex", "ibm,tah"; + reg = <0xef601350 0x00000030>; + }; + + EMAC0: ethernet@ef600c00 { + device_type = "network"; + compatible = "ibm,emac-405ex", "ibm,emac4sync"; + interrupt-parent = <&EMAC0>; + interrupts = <0x0 0x1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = ; + reg = <0xef600c00 0x000000c4>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <9000>; + rx-fifo-size = <16384>; + tx-fifo-size = <2048>; + phy-mode = "rgmii"; + phy-map = <0x00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <0>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + }; + + ADMA: adma { + compatible = "amcc,apm82181-adma"; + device_type = "dma"; + #address-cells = <2>; + #size-cells = <1>; + + dma-4channel@1 { + compatible = "amcc,apm82181-dma-4channel"; + cell-index = <1>; + label = "plb_dma1"; + interrupt-parent = <&UIC0>; + interrupts = <0xd 0x4>; + pool_size = <0x4000>; + dcr-reg = <0x208 0x20f>; + }; + + dma-4channel@2 { + compatible = "amcc,apm82181-dma-4channel"; + cell-index = <2>; + label = "plb_dma2"; + interrupt-parent = <&UIC0>; + interrupts = <0xe 0x4>; + pool_size = <0x4000>; + dcr-reg = <0x210 0x217>; + }; + + dma-4channel@3 { + compatible = "amcc,apm82181-dma-4channel"; + cell-index = <3>; + label = "plb_dma3"; + interrupt-parent = <&UIC0>; + interrupts = <0xf 0x4>; + pool_size = <0x4000>; + dcr-reg = <0x218 0x21f>; + }; + }; + + DMA: plb_dma@400300200 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "amcc,dma"; + cell-index = <0>; + reg = <4 00300200 200>; + dcr-reg = <0x100 0x13f>; + interrupt-parent = <&UIC0>; + interrupts = <0>; + interrupt-map = < /* chan0 */ 0 &UIC0 12 4>; + + dma-4channel@0{ + compatible = "amcc,dma-4channel"; + cell-index = <0>; + label = "channel0"; + reg = <0x100 0x107>; + }; + }; + }; +}; diff --git a/target/linux/apm821xx/image/Makefile b/target/linux/apm821xx/image/Makefile index ba11bb22ee..9ba43d9db2 100644 --- a/target/linux/apm821xx/image/Makefile +++ b/target/linux/apm821xx/image/Makefile @@ -78,6 +78,87 @@ define Device/mr24 endef TARGET_DEVICES += mr24 -$(eval $(call BuildImage)) +endif + +ifeq ($(SUBTARGET),sata) + +### Image scripts for the WD My Book Live Series ### +define Build/boot-script + $(STAGING_DIR_HOST)/bin/mkimage -A powerpc -T script -C none -n "$(PROFILE) Boot Script" \ + -d mbl_boot.scr \ + $@.scr +endef + +define Build/boot-img + $(RM) -rf $@.bootdir + mkdir -p $@.bootdir/boot + + $(CP) $@.scr $@.bootdir/boot/boot.scr + $(CP) $@.dtb $@.bootdir/boot/$(DEVICE_DTB) + $(CP) $(word 1,$^) $@.bootdir/boot/uImage + + genext2fs --block-size $(BLOCKSIZE) --size-in-blocks $$((1024 * $(BOOT_SIZE))) --root $@.bootdir $@.boot + + # convert it to revision 1 - needed for u-boot ext2load + $(STAGING_DIR_HOST)/bin/tune2fs -O filetype $@.boot + $(STAGING_DIR_HOST)/bin/e2fsck -pDf $@.boot > /dev/null +endef + +define Build/hdd-img + ./mbl_gen_hdd_img.sh $@ $@.boot $(word 2,$^) + $(if $(CONFIG_TARGET_IMAGES_GZIP),gzip -9n -c $@ > $(BIN_DIR)/$(notdir $@).gz) +endef + +define Build/uRamdisk + $(call Image/mkfs/ext4) + gzip -9n -c $(KDIR)/root.ext4 > $(KDIR)/root.ext4.gz + $(STAGING_DIR_HOST)/bin/mkimage -A powerpc -T ramdisk -C gzip -n "$(PROFILE) rootfs" \ + -d $(KDIR)/root.ext4.gz \ + $@.uRamdisk +endef + +define Build/recovery-tar + sh ./mbl_gen_recovery_tar.sh \ + --profile $(DEVICE_PROFILE) \ + --dtb $@.dtb \ + --dtbname $(DEVICE_DTB) \ + --kernel $@ \ + --rootfs $@.uRamdisk \ + $@ +endef + +define Device/MyBookLiveDefault + IMAGE_SIZE := 48m + BLOCKSIZE := 1024 + DTB_SIZE := 16384 + KERNEL := kernel-bin | gzip | uImage gzip + BOOT_SIZE := 8 + IMAGES := rootfs.img recovery.tar + DEVICE_DTB := apollo3g.dtb + IMAGE/rootfs.img := boot-script | dtb | boot-img | hdd-img + IMAGE/recovery.tar := kernel-bin | dtb | uRamdisk | recovery-tar +endef + +define Device/MyBookLiveSingle +$(Device/MyBookLiveDefault) + DEVICE_TITLE := Western Digital My Book Live + DEVICE_DTS := apollo3g + DEVICE_PROFILE := apollo3g +endef + +TARGET_DEVICES += MyBookLiveSingle + +define Device/MyBookLiveDuo +$(Device/MyBookLiveDefault) + DEVICE_TITLE := Western Digital My Book Live Duo + DEVICE_PACKAGES := kmod-usb-dwc2 kmod-ledtrig-usbdev kmod-usb-storage kmod-fs-vfat wpad-mini + DEVICE_DTS := apollo3g-duo + DEVICE_PROFILE := ap2nc +endef + +TARGET_DEVICES += MyBookLiveDuo endif + +$(eval $(call BuildImage)) + diff --git a/target/linux/apm821xx/image/mbl_boot.scr b/target/linux/apm821xx/image/mbl_boot.scr new file mode 100644 index 0000000000..062dc2725a --- /dev/null +++ b/target/linux/apm821xx/image/mbl_boot.scr @@ -0,0 +1,6 @@ +setenv boot_args 'setenv bootargs root=/dev/sda2 rw rootfstype=ext4' +setenv load_part1 'sata init; ext2load sata 1:1 ${kernel_addr_r} /boot/uImage; ext2load sata 1:1 ${fdt_addr_r} /boot/apollo3g.dtb' +setenv load_part2 'sata init; ext2load sata 0:1 ${kernel_addr_r} /boot/uImage; ext2load sata 0:1 ${fdt_addr_r} /boot/apollo3g.dtb' +setenv load_sata 'if run load_part1; then echo Loaded part 1; elif run load_part2; then echo Loaded part 2; fi' +setenv boot_sata 'run load_sata; run boot_args addtty; bootm ${kernel_addr_r} - ${fdt_addr_r}' +run boot_sata diff --git a/target/linux/apm821xx/image/mbl_gen_hdd_img.sh b/target/linux/apm821xx/image/mbl_gen_hdd_img.sh new file mode 100755 index 0000000000..589dcf9150 --- /dev/null +++ b/target/linux/apm821xx/image/mbl_gen_hdd_img.sh @@ -0,0 +1,27 @@ +#!/usr/bin/env bash + +set -x +[ $# -eq 3 ] || { + echo "SYNTAX: $0 " + exit 1 +} + +OUTPUT="$1" +BOOTFS="$2" +ROOTFS="$3" +let "BOOTFSSIZE=(`stat -c%s "$2"` + 1048575) / 1048576" +let "ROOTFSSIZE=(`stat -c%s "$3"` + 1048575) / 1048576" + +head=4 +sect=63 + +set `ptgen -o $OUTPUT -h $head -s $sect -l 4096 -t 83 -p ${BOOTFSSIZE}M -t 83 -p ${ROOTFSSIZE}M` + +BOOTOFFSET="$(($1 / 512))" +BOOTSIZE="$(($2 / 512))" +ROOTFSOFFSET="$(($3 / 512))" +ROOTFSSIZE="$(($4 / 512))" + +dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc +dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc + diff --git a/target/linux/apm821xx/image/mbl_gen_recovery_tar.sh b/target/linux/apm821xx/image/mbl_gen_recovery_tar.sh new file mode 100644 index 0000000000..f871aefd8c --- /dev/null +++ b/target/linux/apm821xx/image/mbl_gen_recovery_tar.sh @@ -0,0 +1,92 @@ +#!/bin/sh + +# based on scripts/sysupgrade-nand.sh + +profile="" +dtb="" +dtbname="" +kernel="" +rootfs="" +outfile="" +err="" + +while [ "$1" ]; do + case "$1" in + "--profile") + profile="$2" + shift + shift + continue + ;; + "--dtb") + dtb="$2" + shift + shift + continue + ;; + "--dtbname") + dtbname="$2" + shift + shift + continue + ;; + "--kernel") + kernel="$2" + shift + shift + continue + ;; + "--rootfs") + rootfs="$2" + shift + shift + continue + ;; + *) + if [ ! "$outfile" ]; then + outfile=$1 + shift + continue + else + shift + continue + fi + ;; + esac +done + +if [ -z "$profile" -o ! -r "$dtb" -o ! -r "$kernel" -o ! -r "$rootfs" -o ! "$outfile" ]; then + echo "syntax: $0 [--profile profilename] [--dtb dtbimage] [--dtbname dtbname] [--kernel kernelimage] [--rootfs rootfs] out" + exit 1 +fi + +tmpdir="$( mktemp -d 2> /dev/null )" +if [ -z "$tmpdir" ]; then + # try OSX signature + tmpdir="$( mktemp -t 'roottmp' -d )" +fi + +if [ -z "$tmpdir" ]; then + exit 1 +fi + +mkdir -p "${tmpdir}/${profile}" +[ -z "${dtb}" ] || cp "${dtb}" "${tmpdir}/${profile}/${dtbname}" +[ -z "${rootfs}" ] || cp "${rootfs}" "${tmpdir}/${profile}/uRamdisk" +[ -z "${kernel}" ] || cp "${kernel}" "${tmpdir}/${profile}/uImage" + +mtime="" +if [ -n "$SOURCE_DATE_EPOCH" ]; then + mtime="--mtime=@${SOURCE_DATE_EPOCH}" +fi + +(cd "$tmpdir"; tar cvf ${profile}.tar ${profile} ${mtime}) +err="$?" +if [ -e "$tmpdir/${profile}.tar" ]; then + cp "$tmpdir/${profile}.tar" "$outfile" +else + err=2 +fi +rm -rf "$tmpdir" + +exit $err diff --git a/target/linux/apm821xx/patches-4.4/030-usb-dwc2-endian-fix.patch b/target/linux/apm821xx/patches-4.4/030-usb-dwc2-endian-fix.patch new file mode 100644 index 0000000000..9078b6c351 --- /dev/null +++ b/target/linux/apm821xx/patches-4.4/030-usb-dwc2-endian-fix.patch @@ -0,0 +1,95 @@ +From: Arnd Bergmann +Subject: [PATCH v4] usb: dwc2: fix regression on big-endian PowerPC/ARM systems +Date: Fri, 13 May 2016 15:52:27 +0200 +Message-Id: <1463147559-544140-1-git-send-email-arnd@arndb.de> + +A patch that went into Linux-4.4 to fix big-endian mode on a Lantiq +MIPS system unfortunately broke big-endian operation on PowerPC +APM82181 as reported by Christian Lamparter, and likely other +systems. + +It actually introduced multiple issues: + +- it broke big-endian ARM kernels: any machine that was working + correctly with a little-endian kernel is no longer using byteswaps + on big-endian kernels, which clearly breaks them. +- On PowerPC the same thing must be true: if it was working before, + using big-endian kernels is now broken. Unlike ARM, 32-bit PowerPC + usually uses big-endian kernels, so they are likely all broken. +- The barrier for dwc2_writel is on the wrong side of the __raw_writel(), + so the MMIO no longer synchronizes with DMA operations. +- On architectures that require specific CPU instructions for MMIO + access, using the __raw_ variant may turn this into a pointer + dereference that does not have the same effect as the readl/writel. + +This patch is a simple revert for all architectures other than MIPS, +in the hope that we can more easily backport it to fix the regression +on PowerPC and ARM systems without breaking the Lantiq system again. + +We should follow this up with a more elaborate change to add runtime +detection of endianness, to make sure it also works on all other +combinations of architectures and implementations of the usb-dwc2 +device. That patch however will be fairly large and not appropriate +for backports to stable kernels. + +Felipe suggested a different approach, using an endianness switching +register to always put the device into LE mode, but unfortunately +the dwc2 hardware does not provide a generic way to do that. Also, +I see no practical way of addressing the problem more generally by +patching architecture specific code on MIPS. + +Signed-off-by: Arnd Bergmann +Fixes: 95c8bc360944 ("usb: dwc2: Use platform endianness when accessing registers") +--- + drivers/usb/dwc2/core.h | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +diff --git a/drivers/usb/dwc2/core.h b/drivers/usb/dwc2/core.h +index 3c58d633ce80..dec0b21fc626 100644 +--- a/drivers/usb/dwc2/core.h ++++ b/drivers/usb/dwc2/core.h +@@ -64,6 +64,17 @@ + DWC2_TRACE_SCHEDULER_VB(pr_fmt("%s: SCH: " fmt), \ + dev_name(hsotg->dev), ##__VA_ARGS__) + ++#ifdef CONFIG_MIPS ++/* ++ * There are some MIPS machines that can run in either big-endian ++ * or little-endian mode and that use the dwc2 register without ++ * a byteswap in both ways. ++ * Unlike other architectures, MIPS apparently does not require a ++ * barrier before the __raw_writel() to synchronize with DMA but does ++ * require the barrier after the __raw_writel() to serialize a set of ++ * writes. This set of operations was added specifically for MIPS and ++ * should only be used there. ++ */ + static inline u32 dwc2_readl(const void __iomem *addr) + { + u32 value = __raw_readl(addr); +@@ -90,6 +101,22 @@ static inline void dwc2_writel(u32 value, void __iomem *addr) + pr_info("INFO:: wrote %08x to %p\n", value, addr); + #endif + } ++#else ++/* Normal architectures just use readl/write */ ++static inline u32 dwc2_readl(const void __iomem *addr) ++{ ++ return readl(addr); ++} ++ ++static inline void dwc2_writel(u32 value, void __iomem *addr) ++{ ++ writel(value, addr); ++ ++#ifdef DWC2_LOG_WRITES ++ pr_info("info:: wrote %08x to %p\n", value, addr); ++#endif ++} ++#endif + + /* Maximum number of Endpoints/HostChannels */ + #define MAX_EPS_CHANNELS 16 +-- +2.7.0 + + diff --git a/target/linux/apm821xx/patches-4.4/201-add-amcc-apollo3g-support.patch b/target/linux/apm821xx/patches-4.4/201-add-amcc-apollo3g-support.patch new file mode 100644 index 0000000000..8dc09243bf --- /dev/null +++ b/target/linux/apm821xx/patches-4.4/201-add-amcc-apollo3g-support.patch @@ -0,0 +1,30 @@ +--- a/arch/powerpc/platforms/44x/Kconfig 2016-05-21 23:02:29.933525903 +0200 ++++ b/arch/powerpc/platforms/44x/Kconfig 2016-05-21 23:06:50.843908233 +0200 +@@ -143,6 +143,17 @@ config CANYONLANDS + help + This option enables support for the AMCC PPC460EX evaluation board. + ++config APOLLO3G ++ bool "Apollo3G" ++ depends on 44x ++ default n ++ select PPC44x_SIMPLE ++ select APM821xx ++ select IBM_EMAC_RGMII ++ select 460EX ++ help ++ This option enables support for the AMCC Apollo 3G board. ++ + config GLACIER + bool "Glacier" + depends on 44x +--- a/arch/powerpc/platforms/44x/ppc44x_simple.c 2016-05-21 23:02:29.933525903 +0200 ++++ b/arch/powerpc/platforms/44x/ppc44x_simple.c 2016-05-21 23:06:01.130502053 +0200 +@@ -50,6 +50,7 @@ machine_device_initcall(ppc44x_simple, p + * board.c file for it rather than adding it to this list. + */ + static char *board[] __initdata = { ++ "amcc,apollo3g", + "amcc,arches", + "amcc,bamboo", + "apm,bluestone", diff --git a/target/linux/apm821xx/sata/config-default b/target/linux/apm821xx/sata/config-default new file mode 100644 index 0000000000..8b286fe159 --- /dev/null +++ b/target/linux/apm821xx/sata/config-default @@ -0,0 +1,44 @@ +# CONFIG_IKAREM is not set +CONFIG_APOLLO3G=y +CONFIG_EXT4_FS=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DW_DMAC_CORE=y +CONFIG_DW_DMAC=y +# CONFIG_SATA_DWC_OLD_DMA is not set +# CONFIG_DW_DMAC_PCI is not set +CONFIG_ATA=y +CONFIG_ATA_SFF=y +CONFIG_ATA_BMDMA=y +CONFIG_SATA_PMP=y +CONFIG_GENERIC_PHY=y +CONFIG_SATA_DWC=y +# CONFIG_SATA_DWC_DEBUG is not set +CONFIG_EXT4_FS=y +CONFIG_SCSI=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_74XX_MMIO=y +CONFIG_BLK_DEV_DM=y +CONFIG_BLK_DEV_DM_BUILTIN=y +CONFIG_BLK_DEV_MD=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_RAM_COUNT=16 +CONFIG_BLK_DEV_RAM_SIZE=4096 +CONFIG_MD=y +CONFIG_MD_AUTODETECT=y +# CONFIG_MD_LINEAR is not set +# CONFIG_MD_MULTIPATH is not set +CONFIG_MD_RAID0=y +CONFIG_MD_RAID1=y +# CONFIG_MD_RAID10 is not set +# CONFIG_MD_RAID456 is not set +CONFIG_BLK_DEV_RAM_SIZE=50331648 +CONFIG_PPC_EARLY_DEBUG=y +CONFIG_PPC_EARLY_DEBUG_44x=y +# CONFIG_PPC_EARLY_DEBUG_MEMCONS is not set +CONFIG_PPC_EARLY_DEBUG_44x_PHYSHIGH=0x4 +CONFIG_PPC_EARLY_DEBUG_44x_PHYSLOW=0xef600300 diff --git a/target/linux/apm821xx/sata/target.mk b/target/linux/apm821xx/sata/target.mk new file mode 100644 index 0000000000..60efb508d4 --- /dev/null +++ b/target/linux/apm821xx/sata/target.mk @@ -0,0 +1,13 @@ +BOARDNAME := Devices which boot from SATA (NAS) +FEATURES += ext4 usb +DEFAULT_PACKAGES += badblocks block-mount e2fsprogs \ + kmod-dm kmod-md-mod partx-utils + +define Target/Description + Build firmware images for APM82181 boards that boot from SATA. + For NAS like the MyBook Live Series. +endef + +$(eval $(call $(if $(CONFIG_TARGET_ROOTFS_EXT4FS),RequireCommand,Ignore),genext2fs, \ + Please install genext2fs. \ +))