From: Zoltan HERPAI Date: Fri, 22 Sep 2023 17:47:01 +0000 (+0200) Subject: sifiveu: remove upstreamed patches, refresh remaining ones X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d9a8747a3dd7608c1ace77a85fb38e43c497129c;p=openwrt%2Fstaging%2Fthess.git sifiveu: remove upstreamed patches, refresh remaining ones Upstreamed: 0002-riscv-sifive-unmatched-update-regulators-values.patch 0003-riscv-sifive-unmatched-define-PWM-LEDs.patch 0006-riscv-sbi-srst-support.patch Compile-tested: HiFive Unleashed / Unmatched Runtime-tested: HiFive Unleashed / Unmatched Signed-off-by: Zoltan HERPAI --- diff --git a/target/linux/sifiveu/patches-6.1/0002-riscv-sifive-unmatched-update-regulators-values.patch b/target/linux/sifiveu/patches-6.1/0002-riscv-sifive-unmatched-update-regulators-values.patch deleted file mode 100644 index ac316e9d9b..0000000000 --- a/target/linux/sifiveu/patches-6.1/0002-riscv-sifive-unmatched-update-regulators-values.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 657819ff477dd73cd71075609698aa57ba098d8c Mon Sep 17 00:00:00 2001 -From: David Abdurachmanov -Date: Wed, 15 Sep 2021 07:10:02 -0700 -Subject: [PATCH 2/7] riscv: sifive: unmatched: update regulators values - -These are the regulators values from the schematics for Rev3{A,B} boards. - -Note this is not fully correct as bcore1/bcore2 and bmem/bio are merged, but -it's only supported in v5.15 kernel. See: - -541ee8f640327f951e7039278057827322231ab0 ("regulator: da9063: Add support for -full-current mode.") - -This will be changed for v5.15 kernel based on the patch above. - -Signed-off-by: David Abdurachmanov ---- - .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 32 +++++++++++----------- - 1 file changed, 16 insertions(+), 16 deletions(-) - ---- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -@@ -73,16 +73,16 @@ - - regulators { - vdd_bcore1: bcore1 { -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <900000>; -+ regulator-min-microvolt = <1050000>; -+ regulator-max-microvolt = <1050000>; - regulator-min-microamp = <5000000>; - regulator-max-microamp = <5000000>; - regulator-always-on; - }; - - vdd_bcore2: bcore2 { -- regulator-min-microvolt = <900000>; -- regulator-max-microvolt = <900000>; -+ regulator-min-microvolt = <1050000>; -+ regulator-max-microvolt = <1050000>; - regulator-min-microamp = <5000000>; - regulator-max-microamp = <5000000>; - regulator-always-on; -@@ -137,48 +137,48 @@ - }; - - vdd_ldo3: ldo3 { -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-min-microamp = <200000>; - regulator-max-microamp = <200000>; - regulator-always-on; - }; - - vdd_ldo4: ldo4 { -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -+ regulator-min-microvolt = <2500000>; -+ regulator-max-microvolt = <2500000>; - regulator-min-microamp = <200000>; - regulator-max-microamp = <200000>; - regulator-always-on; - }; - - vdd_ldo5: ldo5 { -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-min-microamp = <100000>; - regulator-max-microamp = <100000>; - regulator-always-on; - }; - - vdd_ldo6: ldo6 { -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; - regulator-min-microamp = <200000>; - regulator-max-microamp = <200000>; - regulator-always-on; - }; - - vdd_ldo7: ldo7 { -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-min-microamp = <200000>; - regulator-max-microamp = <200000>; - regulator-always-on; - }; - - vdd_ldo8: ldo8 { -- regulator-min-microvolt = <1800000>; -- regulator-max-microvolt = <1800000>; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; - regulator-min-microamp = <200000>; - regulator-max-microamp = <200000>; - regulator-always-on; diff --git a/target/linux/sifiveu/patches-6.1/0003-riscv-sifive-unmatched-define-PWM-LEDs.patch b/target/linux/sifiveu/patches-6.1/0003-riscv-sifive-unmatched-define-PWM-LEDs.patch deleted file mode 100644 index 661e15905f..0000000000 --- a/target/linux/sifiveu/patches-6.1/0003-riscv-sifive-unmatched-define-PWM-LEDs.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 2c2d8ac8c124a2938c9326c14b2dffd46d76b4a8 Mon Sep 17 00:00:00 2001 -From: David Abdurachmanov -Date: Mon, 13 Sep 2021 02:15:37 -0700 -Subject: [PATCH 3/7] riscv: sifive: unmatched: define PWM LEDs - -Add D2 (RGB) and D12 (green) LEDs for SiFive Unmatched board. - -Signed-off-by: David Abdurachmanov ---- - .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 41 ++++++++++++++++++++++ - 1 file changed, 41 insertions(+) - ---- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -+++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -@@ -4,6 +4,8 @@ - #include "fu740-c000.dtsi" - #include - #include -+#include -+#include - - /* Clock frequency (in Hz) of the PCB crystal for rtcclk */ - #define RTCCLK_FREQ 1000000 -@@ -31,6 +33,45 @@ - soc { - }; - -+ pwmleds { -+ compatible = "pwm-leds"; -+ green-d12 { -+ label = "green:d12"; -+ color = ; -+ pwms = <&pwm0 0 7812500 PWM_POLARITY_INVERTED>; -+ active-low = <1>; -+ max-brightness = <255>; -+ linux,default-trigger = "none"; -+ }; -+ -+ green-d2 { -+ label = "green:d2"; -+ color = ; -+ pwms = <&pwm0 1 7812500 PWM_POLARITY_INVERTED>; -+ active-low = <1>; -+ max-brightness = <255>; -+ linux,default-trigger = "none"; -+ }; -+ -+ red-d2 { -+ label = "red:d2"; -+ color = ; -+ pwms = <&pwm0 2 7812500 PWM_POLARITY_INVERTED>; -+ active-low = <1>; -+ max-brightness = <255>; -+ linux,default-trigger = "none"; -+ }; -+ -+ blue-d2 { -+ label = "blue:d2"; -+ color = ; -+ pwms = <&pwm0 3 7812500 PWM_POLARITY_INVERTED>; -+ active-low = <1>; -+ max-brightness = <255>; -+ linux,default-trigger = "none"; -+ }; -+ }; -+ - hfclk: hfclk { - #clock-cells = <0>; - compatible = "fixed-clock"; diff --git a/target/linux/sifiveu/patches-6.1/0004-riscv-sifive-unmatched-add-gpio-poweroff-node.patch b/target/linux/sifiveu/patches-6.1/0004-riscv-sifive-unmatched-add-gpio-poweroff-node.patch index 6d09628cb3..07170d7c76 100644 --- a/target/linux/sifiveu/patches-6.1/0004-riscv-sifive-unmatched-add-gpio-poweroff-node.patch +++ b/target/linux/sifiveu/patches-6.1/0004-riscv-sifive-unmatched-add-gpio-poweroff-node.patch @@ -12,9 +12,9 @@ Signed-off-by: David Abdurachmanov --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -@@ -85,6 +85,11 @@ - clock-frequency = ; - clock-output-names = "rtcclk"; +@@ -86,6 +86,11 @@ + }; + }; }; + + gpio-poweroff { diff --git a/target/linux/sifiveu/patches-6.1/0005-riscv-sifive-unleashed-define-opp-table-cpufreq.patch b/target/linux/sifiveu/patches-6.1/0005-riscv-sifive-unleashed-define-opp-table-cpufreq.patch index c6b997dbbe..c4242c6f07 100644 --- a/target/linux/sifiveu/patches-6.1/0005-riscv-sifive-unleashed-define-opp-table-cpufreq.patch +++ b/target/linux/sifiveu/patches-6.1/0005-riscv-sifive-unleashed-define-opp-table-cpufreq.patch @@ -14,9 +14,9 @@ Signed-off-by: David Abdurachmanov --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig -@@ -566,6 +566,14 @@ config BUILTIN_DTB - depends on OF - default y if XIP_KERNEL +@@ -711,6 +711,14 @@ config PORTABLE + select OF + select MMU +menu "CPU Power Management" + @@ -35,7 +35,7 @@ Signed-off-by: David Abdurachmanov i-cache-size = <16384>; reg = <0>; riscv,isa = "rv64imac"; -+ clocks = <&prci PRCI_CLK_COREPLL>; ++ clocks = <&prci FU540_PRCI_CLK_COREPLL>; status = "disabled"; cpu0_intc: interrupt-controller { #interrupt-cells = <1>; @@ -43,7 +43,7 @@ Signed-off-by: David Abdurachmanov reg = <1>; riscv,isa = "rv64imafdc"; tlb-split; -+ clocks = <&prci PRCI_CLK_COREPLL>; ++ clocks = <&prci FU540_PRCI_CLK_COREPLL>; next-level-cache = <&l2cache>; cpu1_intc: interrupt-controller { #interrupt-cells = <1>; @@ -51,7 +51,7 @@ Signed-off-by: David Abdurachmanov reg = <2>; riscv,isa = "rv64imafdc"; tlb-split; -+ clocks = <&prci PRCI_CLK_COREPLL>; ++ clocks = <&prci FU540_PRCI_CLK_COREPLL>; next-level-cache = <&l2cache>; cpu2_intc: interrupt-controller { #interrupt-cells = <1>; @@ -59,7 +59,7 @@ Signed-off-by: David Abdurachmanov reg = <3>; riscv,isa = "rv64imafdc"; tlb-split; -+ clocks = <&prci PRCI_CLK_COREPLL>; ++ clocks = <&prci FU540_PRCI_CLK_COREPLL>; next-level-cache = <&l2cache>; cpu3_intc: interrupt-controller { #interrupt-cells = <1>; @@ -67,13 +67,13 @@ Signed-off-by: David Abdurachmanov reg = <4>; riscv,isa = "rv64imafdc"; tlb-split; -+ clocks = <&prci PRCI_CLK_COREPLL>; ++ clocks = <&prci FU540_PRCI_CLK_COREPLL>; next-level-cache = <&l2cache>; cpu4_intc: interrupt-controller { #interrupt-cells = <1>; --- a/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dts -@@ -84,6 +84,40 @@ +@@ -80,6 +80,40 @@ label = "d4"; }; }; diff --git a/target/linux/sifiveu/patches-6.1/0006-riscv-sbi-srst-support.patch b/target/linux/sifiveu/patches-6.1/0006-riscv-sbi-srst-support.patch deleted file mode 100644 index 409001bcfa..0000000000 --- a/target/linux/sifiveu/patches-6.1/0006-riscv-sbi-srst-support.patch +++ /dev/null @@ -1,301 +0,0 @@ -From mboxrd@z Thu Jan 1 00:00:00 1970 -Return-Path: -X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on - aws-us-west-2-korg-lkml-1.web.codeaurora.org -X-Spam-Level: -X-Spam-Status: No, score=-21.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, - DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, - INCLUDES_PATCH,MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,MSGID_FROM_MTA_HEADER, - SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable - autolearn_force=no version=3.4.0 -Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) - by smtp.lore.kernel.org (Postfix) with ESMTP id 9A34CC48BCD - for ; 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Wed, 9 Jun 2021 - 12:13:47 +0000 -From: Anup Patel -To: Palmer Dabbelt , - Palmer Dabbelt , - Paul Walmsley , Albert Ou -Cc: Atish Patra , - Alistair Francis , - Anup Patel , linux-riscv@lists.infradead.org, - linux-kernel@vger.kernel.org, Anup Patel -Subject: [PATCH v7 1/1] RISC-V: Use SBI SRST extension when available -Date: Wed, 9 Jun 2021 17:43:22 +0530 -Message-Id: <20210609121322.3058-2-anup.patel@wdc.com> -X-Mailer: git-send-email 2.25.1 -In-Reply-To: <20210609121322.3058-1-anup.patel@wdc.com> -References: <20210609121322.3058-1-anup.patel@wdc.com> -X-Originating-IP: [122.172.176.125] -X-ClientProxiedBy: MA1PR0101CA0036.INDPRD01.PROD.OUTLOOK.COM - (2603:1096:a00:22::22) To CO6PR04MB7812.namprd04.prod.outlook.com - (2603:10b6:303:138::6) -MIME-Version: 1.0 -X-MS-Exchange-MessageSentRepresentingType: 1 -Received: from wdc.com (122.172.176.125) by - MA1PR0101CA0036.INDPRD01.PROD.OUTLOOK.COM (2603:1096:a00:22::22) with - Microsoft SMTP Server (version=TLS1_2, - cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4219.21 via Frontend - Transport; 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charset="us-ascii" -Content-Transfer-Encoding: 7bit -Sender: "linux-riscv" -Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org - -The SBI SRST extension provides a standard way to poweroff and -reboot the system irrespective to whether Linux RISC-V S-mode -is running natively (HS-mode) or inside Guest/VM (VS-mode). - -The SBI SRST extension is available in the SBI v0.3 specification. -(Refer, https://github.com/riscv/riscv-sbi-doc/releases/tag/v0.3.0-rc1) - -This patch extends Linux RISC-V SBI implementation to detect -and use SBI SRST extension. - -Signed-off-by: Anup Patel -Reviewed-by: Atish Patra ---- - arch/riscv/include/asm/sbi.h | 24 ++++++++++++++++++++++++ - arch/riscv/kernel/sbi.c | 35 +++++++++++++++++++++++++++++++++++ - 2 files changed, 59 insertions(+) - ---- a/arch/riscv/include/asm/sbi.h -+++ b/arch/riscv/include/asm/sbi.h -@@ -27,6 +27,7 @@ enum sbi_ext_id { - SBI_EXT_IPI = 0x735049, - SBI_EXT_RFENCE = 0x52464E43, - SBI_EXT_HSM = 0x48534D, -+ SBI_EXT_SRST = 0x53525354, - }; - - enum sbi_ext_base_fid { -@@ -70,6 +71,21 @@ enum sbi_hsm_hart_status { - SBI_HSM_HART_STATUS_STOP_PENDING, - }; - -+enum sbi_ext_srst_fid { -+ SBI_EXT_SRST_RESET = 0, -+}; -+ -+enum sbi_srst_reset_type { -+ SBI_SRST_RESET_TYPE_SHUTDOWN = 0, -+ SBI_SRST_RESET_TYPE_COLD_REBOOT, -+ SBI_SRST_RESET_TYPE_WARM_REBOOT, -+}; -+ -+enum sbi_srst_reset_reason { -+ SBI_SRST_RESET_REASON_NONE = 0, -+ SBI_SRST_RESET_REASON_SYS_FAILURE, -+}; -+ - #define SBI_SPEC_VERSION_DEFAULT 0x1 - #define SBI_SPEC_VERSION_MAJOR_SHIFT 24 - #define SBI_SPEC_VERSION_MAJOR_MASK 0x7f -@@ -148,6 +164,14 @@ static inline unsigned long sbi_minor_ve - return sbi_spec_version & SBI_SPEC_VERSION_MINOR_MASK; - } - -+/* Make SBI version */ -+static inline unsigned long sbi_mk_version(unsigned long major, -+ unsigned long minor) -+{ -+ return ((major & SBI_SPEC_VERSION_MAJOR_MASK) << -+ SBI_SPEC_VERSION_MAJOR_SHIFT) | minor; -+} -+ - int sbi_err_map_linux_errno(int err); - #else /* CONFIG_RISCV_SBI */ - static inline int sbi_remote_fence_i(const unsigned long *hart_mask) { return -1; } ---- a/arch/riscv/kernel/sbi.c -+++ b/arch/riscv/kernel/sbi.c -@@ -7,6 +7,7 @@ - - #include - #include -+#include - #include - #include - -@@ -501,6 +502,32 @@ int sbi_remote_hfence_vvma_asid(const un - } - EXPORT_SYMBOL(sbi_remote_hfence_vvma_asid); - -+static void sbi_srst_reset(unsigned long type, unsigned long reason) -+{ -+ sbi_ecall(SBI_EXT_SRST, SBI_EXT_SRST_RESET, type, reason, -+ 0, 0, 0, 0); -+ pr_warn("%s: type=0x%lx reason=0x%lx failed\n", -+ __func__, type, reason); -+} -+ -+static int sbi_srst_reboot(struct notifier_block *this, -+ unsigned long mode, void *cmd) -+{ -+ sbi_srst_reset((mode == REBOOT_WARM || mode == REBOOT_SOFT) ? -+ SBI_SRST_RESET_TYPE_WARM_REBOOT : -+ SBI_SRST_RESET_TYPE_COLD_REBOOT, -+ SBI_SRST_RESET_REASON_NONE); -+ return NOTIFY_DONE; -+} -+ -+static struct notifier_block sbi_srst_reboot_nb; -+ -+static void sbi_srst_power_off(void) -+{ -+ sbi_srst_reset(SBI_SRST_RESET_TYPE_SHUTDOWN, -+ SBI_SRST_RESET_REASON_NONE); -+} -+ - /** - * sbi_probe_extension() - Check if an SBI extension ID is supported or not. - * @extid: The extension ID to be probed. -@@ -608,6 +635,14 @@ void __init sbi_init(void) - } else { - __sbi_rfence = __sbi_rfence_v01; - } -+ if ((sbi_spec_version >= sbi_mk_version(0, 3)) && -+ (sbi_probe_extension(SBI_EXT_SRST) > 0)) { -+ pr_info("SBI SRST extension detected\n"); -+ pm_power_off = sbi_srst_power_off; -+ sbi_srst_reboot_nb.notifier_call = sbi_srst_reboot; -+ sbi_srst_reboot_nb.priority = 192; -+ register_restart_handler(&sbi_srst_reboot_nb); -+ } - } else { - __sbi_set_timer = __sbi_set_timer_v01; - __sbi_send_ipi = __sbi_send_ipi_v01;