From: Gabor Juhos Date: Wed, 5 Sep 2012 20:08:43 +0000 (+0000) Subject: ramips: Add missing andmask to ramips_esw register read for recv_good value. X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d8b2fef763050c6d5900845729d770545f51fbc6;p=openwrt%2Fstaging%2Fdedeckeh.git ramips: Add missing andmask to ramips_esw register read for recv_good value. Add missing andmask to ramips_esw register read for recv_good value. Without the mask, recv_bad leaks into the recv_good packet count. Didn't notice the bug before since you don't usually get bad packets, so I only saw it when I was playing with overlength packets earlier... Signed-off-by: Tobias Diedrich SVN-Revision: 33322 --- diff --git a/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_esw.c b/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_esw.c index f01baa1709..798eb749bb 100644 --- a/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_esw.c +++ b/target/linux/ramips/files/drivers/net/ethernet/ramips/ramips_esw.c @@ -750,11 +750,13 @@ rt305x_esw_get_port_recv_badgood(struct switch_dev *dev, struct rt305x_esw *esw = container_of(dev, struct rt305x_esw, swdev); int idx = val->port_vlan; int shift = attr->id == RT305X_ESW_ATTR_PORT_RECV_GOOD ? 0 : 16; + u32 reg; if (idx < 0 || idx >= RT305X_ESW_NUM_LANWAN) return -EINVAL; - val->value.i = rt305x_esw_rr(esw, RT305X_ESW_REG_P0PC + 4*idx) >> shift; + reg = rt305x_esw_rr(esw, RT305X_ESW_REG_P0PC + 4*idx); + val->value.i = (reg >> shift) & 0xffff; return 0; }