From: Gabor Juhos Date: Fri, 10 Feb 2012 08:19:31 +0000 (+0000) Subject: ar71xx: merge files-3.2 to files X-Git-Tag: reboot~14952 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d72bde99cd03721fd5b04a1b365bd3f30d4277d9;p=openwrt%2Fstaging%2Fnoltari.git ar71xx: merge files-3.2 to files SVN-Revision: 30405 --- diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.c deleted file mode 100644 index 1b08254861..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.c +++ /dev/null @@ -1,141 +0,0 @@ -/* - * Atheros AP9X reference board PCI initialization - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include -#include - -#include "dev-ap9x-pci.h" -#include "pci-ath9k-fixup.h" -#include "pci.h" - -static struct ath9k_platform_data ap9x_wmac0_data = { - .led_pin = -1, -}; -static struct ath9k_platform_data ap9x_wmac1_data = { - .led_pin = -1, -}; -static char ap9x_wmac0_mac[6]; -static char ap9x_wmac1_mac[6]; - -__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.led_pin = pin; - break; - case 1: - ap9x_wmac1_data.led_pin = pin; - break; - } -} - -__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.gpio_mask = mask; - ap9x_wmac0_data.gpio_val = val; - break; - case 1: - ap9x_wmac1_data.gpio_mask = mask; - ap9x_wmac1_data.gpio_val = val; - break; - } -} - -__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, - int num_leds) -{ - switch (wmac) { - case 0: - ap9x_wmac0_data.leds = leds; - ap9x_wmac0_data.num_leds = num_leds; - break; - case 1: - ap9x_wmac1_data.leds = leds; - ap9x_wmac1_data.num_leds = num_leds; - break; - } -} - -static int ap91_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 0: - dev->dev.platform_data = &ap9x_wmac0_data; - break; - } - - return 0; -} - -__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr) -{ - if (cal_data) - memcpy(ap9x_wmac0_data.eeprom_data, cal_data, - sizeof(ap9x_wmac0_data.eeprom_data)); - - if (mac_addr) { - memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac)); - ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; - } - - ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init); - ath79_register_pci(); - - pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data); -} - -static int ap94_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &ap9x_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &ap9x_wmac1_data; - break; - } - - return 0; -} - -__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0) - memcpy(ap9x_wmac0_data.eeprom_data, cal_data0, - sizeof(ap9x_wmac0_data.eeprom_data)); - - if (cal_data1) - memcpy(ap9x_wmac1_data.eeprom_data, cal_data1, - sizeof(ap9x_wmac1_data.eeprom_data)); - - if (mac_addr0) { - memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac)); - ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; - } - - if (mac_addr1) { - memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac)); - ap9x_wmac1_data.macaddr = ap9x_wmac1_mac; - } - - ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init); - ath79_register_pci(); - - pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data); - pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data); -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.h deleted file mode 100644 index c7f1bb9ec2..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-ap9x-pci.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Atheros AP9X reference board PCI initialization - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_AP9X_PCI_H -#define _ATH79_DEV_AP9X_PCI_H - -struct gpio_led; - -#if defined(CONFIG_ATH79_DEV_AP9X_PCI) -void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin); -void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val); -void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, - int num_leds); - -void ap91_pci_init(u8 *cal_data, u8 *mac_addr); -void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1); - -#else -static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} -static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac, - u32 mask, u32 val) {} -static inline void ap9x_pci_setup_wmac_leds(unsigned wmac, - struct gpio_led *leds, - int num_leds) {} - -static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {} -static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) {} -#endif - -#endif /* _ATH79_DEV_AP9X_PCI_H */ - diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.c deleted file mode 100644 index 1764147386..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-dsa.h" - -static struct platform_device ar71xx_dsa_switch_device = { - .name = "dsa", - .id = 0, -}; - -void __init ath79_register_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d) -{ - int i; - - d->netdev = netdev; - for (i = 0; i < d->nr_chips; i++) - d->chip[i].mii_bus = miidev; - - ar71xx_dsa_switch_device.dev.platform_data = d; - platform_device_register(&ar71xx_dsa_switch_device); -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.h deleted file mode 100644 index 3730202e8d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-dsa.h +++ /dev/null @@ -1,21 +0,0 @@ -/* - * Atheros AR71xx DSA switch device support - * - * Copyright (C) 2008-2009 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_DSA_H -#define _ATH79_DEV_DSA_H - -#include - -void ath79_register_dsa(struct device *netdev, - struct device *miidev, - struct dsa_platform_data *d); - -#endif /* _ATH79_DEV_DSA_H */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.c deleted file mode 100644 index 27c8a40b60..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.c +++ /dev/null @@ -1,971 +0,0 @@ -/* - * Atheros AR71xx SoC platform devices - * - * Copyright (C) 2010-2011 Jaiganesh Narayanan - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Parts of this file are based on Atheros 2.6.15 BSP - * Parts of this file are based on Atheros 2.6.31 BSP - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include "common.h" -#include "dev-eth.h" - -unsigned char ath79_mac_base[ETH_ALEN] __initdata; - -static struct resource ath79_mdio0_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - } -}; - -static struct ag71xx_mdio_platform_data ath79_mdio0_data; - -struct platform_device ath79_mdio0_device = { - .name = "ag71xx-mdio", - .id = 0, - .resource = ath79_mdio0_resources, - .num_resources = ARRAY_SIZE(ath79_mdio0_resources), - .dev = { - .platform_data = &ath79_mdio0_data, - }, -}; - -static struct resource ath79_mdio1_resources[] = { - { - .name = "mdio_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - } -}; - -static struct ag71xx_mdio_platform_data ath79_mdio1_data; - -struct platform_device ath79_mdio1_device = { - .name = "ag71xx-mdio", - .id = 1, - .resource = ath79_mdio1_resources, - .num_resources = ARRAY_SIZE(ath79_mdio1_resources), - .dev = { - .platform_data = &ath79_mdio1_data, - }, -}; - -static void ath79_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) -{ - void __iomem *base; - u32 t; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - - t = __raw_readl(base + cfg_reg); - t &= ~(3 << shift); - t |= (2 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - __raw_writel(pll_val, base + pll_reg); - - t |= (3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - t &= ~(3 << shift); - __raw_writel(t, base + cfg_reg); - udelay(100); - - printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", - (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); - - iounmap(base); -} - -static void __init ath79_mii_ctrl_set_if(unsigned int reg, - unsigned int mii_if) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(AR71XX_MII_CTRL_IF_MASK); - t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); - __raw_writel(t, base + reg); - - iounmap(base); -} - -static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) -{ - void __iomem *base; - unsigned int mii_speed; - u32 t; - - switch (speed) { - case SPEED_10: - mii_speed = AR71XX_MII_CTRL_SPEED_10; - break; - case SPEED_100: - mii_speed = AR71XX_MII_CTRL_SPEED_100; - break; - case SPEED_1000: - mii_speed = AR71XX_MII_CTRL_SPEED_1000; - break; - default: - BUG(); - } - - base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); - - t = __raw_readl(base + reg); - t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT); - t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT; - __raw_writel(t, base + reg); - - iounmap(base); -} - -void __init ath79_register_mdio(unsigned int id, u32 phy_mask) -{ - struct platform_device *mdio_dev; - struct ag71xx_mdio_platform_data *mdio_data; - unsigned int max_id; - - if (ath79_soc == ATH79_SOC_AR9341 || - ath79_soc == ATH79_SOC_AR9342 || - ath79_soc == ATH79_SOC_AR9344) - max_id = 1; - else - max_id = 0; - - if (id > max_id) { - printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); - return; - } - - switch (ath79_soc) { - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - mdio_dev = &ath79_mdio1_device; - mdio_data = &ath79_mdio1_data; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 0) { - mdio_dev = &ath79_mdio0_device; - mdio_data = &ath79_mdio0_data; - } else { - mdio_dev = &ath79_mdio1_device; - mdio_data = &ath79_mdio1_data; - } - break; - - case ATH79_SOC_AR7242: - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, - AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, - AR71XX_ETH0_PLL_SHIFT); - /* fall through */ - default: - mdio_dev = &ath79_mdio0_device; - mdio_data = &ath79_mdio0_data; - break; - } - - mdio_data->phy_mask = phy_mask; - - switch (ath79_soc) { - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - mdio_data->is_ar7240 = 1; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 1) - mdio_data->is_ar7240 = 1; - break; - - default: - break; - } - - platform_device_register(mdio_dev); -} - -struct ath79_eth_pll_data ath79_eth0_pll_data; -struct ath79_eth_pll_data ath79_eth1_pll_data; - -static u32 ath79_get_eth_pll(unsigned int mac, int speed) -{ - struct ath79_eth_pll_data *pll_data; - u32 pll_val; - - switch (mac) { - case 0: - pll_data = &ath79_eth0_pll_data; - break; - case 1: - pll_data = &ath79_eth1_pll_data; - break; - default: - BUG(); - } - - switch (speed) { - case SPEED_10: - pll_val = pll_data->pll_10; - break; - case SPEED_100: - pll_val = pll_data->pll_100; - break; - case SPEED_1000: - pll_val = pll_data->pll_1000; - break; - default: - BUG(); - } - - return pll_val; -} - -static void ath79_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, - val, AR71XX_ETH0_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -} - -static void ath79_set_speed_ge1(int speed) -{ - u32 val = ath79_get_eth_pll(1, speed); - - ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, - val, AR71XX_ETH1_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -} - -static void ar724x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar724x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ar7242_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - void __iomem *base; - - base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); - __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); - iounmap(base); -} - -static void ar91xx_set_speed_ge0(int speed) -{ - u32 val = ath79_get_eth_pll(0, speed); - - ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH0_INT_CLOCK, - val, AR913X_ETH0_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); -} - -static void ar91xx_set_speed_ge1(int speed) -{ - u32 val = ath79_get_eth_pll(1, speed); - - ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH1_INT_CLOCK, - val, AR913X_ETH1_PLL_SHIFT); - ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); -} - -static void ar933x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar933x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ar934x_set_speed_ge0(int speed) -{ - /* TODO */ -} - -static void ar934x_set_speed_ge1(int speed) -{ - /* TODO */ -} - -static void ath79_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); -} - -static void ath79_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); -} - -static void ar724x_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); -} - -static void ar724x_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); -} - -static void ar91xx_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); -} - -static void ar91xx_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); -} - -static void ar933x_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); -} - -static void ar933x_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); -} - -static void ar934x_ddr_flush_ge0(void) -{ - ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0); -} - -static void ar934x_ddr_flush_ge1(void) -{ - ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1); -} - -static struct resource ath79_eth0_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE0_BASE, - .end = AR71XX_GE0_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = ATH79_CPU_IRQ_GE0, - .end = ATH79_CPU_IRQ_GE0, - }, -}; - -struct ag71xx_platform_data ath79_eth0_data = { - .reset_bit = AR71XX_RESET_GE0_MAC, -}; - -struct platform_device ath79_eth0_device = { - .name = "ag71xx", - .id = 0, - .resource = ath79_eth0_resources, - .num_resources = ARRAY_SIZE(ath79_eth0_resources), - .dev = { - .platform_data = &ath79_eth0_data, - }, -}; - -static struct resource ath79_eth1_resources[] = { - { - .name = "mac_base", - .flags = IORESOURCE_MEM, - .start = AR71XX_GE1_BASE, - .end = AR71XX_GE1_BASE + 0x200 - 1, - }, { - .name = "mac_irq", - .flags = IORESOURCE_IRQ, - .start = ATH79_CPU_IRQ_GE1, - .end = ATH79_CPU_IRQ_GE1, - }, -}; - -struct ag71xx_platform_data ath79_eth1_data = { - .reset_bit = AR71XX_RESET_GE1_MAC, -}; - -struct platform_device ath79_eth1_device = { - .name = "ag71xx", - .id = 1, - .resource = ath79_eth1_resources, - .num_resources = ARRAY_SIZE(ath79_eth1_resources), - .dev = { - .platform_data = &ath79_eth1_data, - }, -}; - -struct ag71xx_switch_platform_data ath79_switch_data; - -#define AR71XX_PLL_VAL_1000 0x00110000 -#define AR71XX_PLL_VAL_100 0x00001099 -#define AR71XX_PLL_VAL_10 0x00991099 - -#define AR724X_PLL_VAL_1000 0x00110000 -#define AR724X_PLL_VAL_100 0x00001099 -#define AR724X_PLL_VAL_10 0x00991099 - -#define AR7242_PLL_VAL_1000 0x16000000 -#define AR7242_PLL_VAL_100 0x00000101 -#define AR7242_PLL_VAL_10 0x00001616 - -#define AR913X_PLL_VAL_1000 0x1a000000 -#define AR913X_PLL_VAL_100 0x13000a44 -#define AR913X_PLL_VAL_10 0x00441099 - -#define AR933X_PLL_VAL_1000 0x00110000 -#define AR933X_PLL_VAL_100 0x00001099 -#define AR933X_PLL_VAL_10 0x00991099 - -#define AR934X_PLL_VAL_1000 0x00110000 -#define AR934X_PLL_VAL_100 0x00001099 -#define AR934X_PLL_VAL_10 0x00991099 - -static void __init ath79_init_eth_pll_data(unsigned int id) -{ - struct ath79_eth_pll_data *pll_data; - u32 pll_10, pll_100, pll_1000; - - switch (id) { - case 0: - pll_data = &ath79_eth0_pll_data; - break; - case 1: - pll_data = &ath79_eth1_pll_data; - break; - default: - BUG(); - } - - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - pll_10 = AR71XX_PLL_VAL_10; - pll_100 = AR71XX_PLL_VAL_100; - pll_1000 = AR71XX_PLL_VAL_1000; - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - pll_10 = AR724X_PLL_VAL_10; - pll_100 = AR724X_PLL_VAL_100; - pll_1000 = AR724X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR7242: - pll_10 = AR7242_PLL_VAL_10; - pll_100 = AR7242_PLL_VAL_100; - pll_1000 = AR7242_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - pll_10 = AR913X_PLL_VAL_10; - pll_100 = AR913X_PLL_VAL_100; - pll_1000 = AR913X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - pll_10 = AR933X_PLL_VAL_10; - pll_100 = AR933X_PLL_VAL_100; - pll_1000 = AR933X_PLL_VAL_1000; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - pll_10 = AR934X_PLL_VAL_10; - pll_100 = AR934X_PLL_VAL_100; - pll_1000 = AR934X_PLL_VAL_1000; - break; - - default: - BUG(); - } - - if (!pll_data->pll_10) - pll_data->pll_10 = pll_10; - - if (!pll_data->pll_100) - pll_data->pll_100 = pll_100; - - if (!pll_data->pll_1000) - pll_data->pll_1000 = pll_1000; -} - -static int __init ath79_setup_phy_if_mode(unsigned int id, - struct ag71xx_platform_data *pdata) -{ - unsigned int mii_if; - - switch (id) { - case 0: - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - mii_if = AR71XX_MII0_CTRL_IF_MII; - break; - case PHY_INTERFACE_MODE_GMII: - mii_if = AR71XX_MII0_CTRL_IF_GMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = AR71XX_MII0_CTRL_IF_RGMII; - break; - case PHY_INTERFACE_MODE_RMII: - mii_if = AR71XX_MII0_CTRL_IF_RMII; - break; - default: - return -EINVAL; - } - ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII0_CTRL, mii_if); - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; - break; - - case ATH79_SOC_AR7242: - /* FIXME */ - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - case PHY_INTERFACE_MODE_RMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - case 1: - switch (ath79_soc) { - case ATH79_SOC_AR7130: - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - case ATH79_SOC_AR9130: - case ATH79_SOC_AR9132: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_RMII: - mii_if = AR71XX_MII1_CTRL_IF_RMII; - break; - case PHY_INTERFACE_MODE_RGMII: - mii_if = AR71XX_MII1_CTRL_IF_RGMII; - break; - default: - return -EINVAL; - } - ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII1_CTRL, mii_if); - break; - - case ATH79_SOC_AR7240: - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; - break; - - case ATH79_SOC_AR7242: - /* FIXME */ - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_MII: - case PHY_INTERFACE_MODE_GMII: - break; - default: - return -EINVAL; - } - break; - - default: - BUG(); - } - break; - } - - return 0; -} - -static int ath79_eth_instance __initdata; -void __init ath79_register_eth(unsigned int id) -{ - struct platform_device *pdev; - struct ag71xx_platform_data *pdata; - int err; - - if (id > 1) { - printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); - return; - } - - ath79_init_eth_pll_data(id); - - if (id == 0) - pdev = &ath79_eth0_device; - else - pdev = &ath79_eth1_device; - - pdata = pdev->dev.platform_data; - - err = ath79_setup_phy_if_mode(id, pdata); - if (err) { - printk(KERN_ERR - "ar71xx: invalid PHY interface mode for GE%u\n", id); - return; - } - - switch (ath79_soc) { - case ATH79_SOC_AR7130: - if (id == 0) { - pdata->ddr_flush = ath79_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_ge0; - } else { - pdata->ddr_flush = ath79_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_ge1; - } - break; - - case ATH79_SOC_AR7141: - case ATH79_SOC_AR7161: - if (id == 0) { - pdata->ddr_flush = ath79_ddr_flush_ge0; - pdata->set_speed = ath79_set_speed_ge0; - } else { - pdata->ddr_flush = ath79_ddr_flush_ge1; - pdata->set_speed = ath79_set_speed_ge1; - } - pdata->has_gbit = 1; - break; - - case ATH79_SOC_AR7242: - if (id == 0) { - pdata->reset_bit |= AR724X_RESET_GE0_MDIO | - AR71XX_RESET_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ar7242_set_speed_ge0; - } else { - pdata->reset_bit |= AR724X_RESET_GE1_MDIO | - AR71XX_RESET_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ar724x_set_speed_ge1; - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR7241: - if (id == 0) - pdata->reset_bit |= AR724X_RESET_GE0_MDIO; - else - pdata->reset_bit |= AR724X_RESET_GE1_MDIO; - /* fall through */ - case ATH79_SOC_AR7240: - if (id == 0) { - pdata->reset_bit |= AR71XX_RESET_GE0_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge0; - pdata->set_speed = ar724x_set_speed_ge0; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit |= AR71XX_RESET_GE1_PHY; - pdata->ddr_flush = ar724x_ddr_flush_ge1; - pdata->set_speed = ar724x_set_speed_ge1; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ath79_switch_data; - } - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - if (ath79_soc == ATH79_SOC_AR7240) - pdata->is_ar7240 = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR9130: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - break; - - case ATH79_SOC_AR9132: - if (id == 0) { - pdata->ddr_flush = ar91xx_ddr_flush_ge0; - pdata->set_speed = ar91xx_set_speed_ge0; - } else { - pdata->ddr_flush = ar91xx_ddr_flush_ge1; - pdata->set_speed = ar91xx_set_speed_ge1; - } - pdata->is_ar91xx = 1; - pdata->has_gbit = 1; - break; - - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - if (id == 0) { - pdata->reset_bit = AR933X_RESET_GE0_MAC | - AR933X_RESET_GE0_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge0; - pdata->set_speed = ar933x_set_speed_ge0; - - pdata->phy_mask = BIT(4); - } else { - pdata->reset_bit = AR933X_RESET_GE1_MAC | - AR933X_RESET_GE1_MDIO; - pdata->ddr_flush = ar933x_ddr_flush_ge1; - pdata->set_speed = ar933x_set_speed_ge1; - - pdata->speed = SPEED_1000; - pdata->duplex = DUPLEX_FULL; - pdata->switch_data = &ath79_switch_data; - } - - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 0) { - pdata->reset_bit = AR934X_RESET_GE0_MAC | - AR934X_RESET_GE0_MDIO; - pdata->ddr_flush =ar934x_ddr_flush_ge0; - pdata->set_speed = ar934x_set_speed_ge0; - } else { - pdata->reset_bit = AR934X_RESET_GE1_MAC | - AR934X_RESET_GE1_MDIO; - pdata->ddr_flush = ar934x_ddr_flush_ge1; - pdata->set_speed = ar934x_set_speed_ge1; - - pdata->switch_data = &ath79_switch_data; - } - - pdata->has_gbit = 1; - pdata->is_ar724x = 1; - - if (!pdata->fifo_cfg1) - pdata->fifo_cfg1 = 0x0010ffff; - if (!pdata->fifo_cfg2) - pdata->fifo_cfg2 = 0x015500aa; - if (!pdata->fifo_cfg3) - pdata->fifo_cfg3 = 0x01f00140; - break; - - default: - BUG(); - } - - switch (pdata->phy_if_mode) { - case PHY_INTERFACE_MODE_GMII: - case PHY_INTERFACE_MODE_RGMII: - if (!pdata->has_gbit) { - printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", - id); - return; - } - /* fallthrough */ - default: - break; - } - - if (!is_valid_ether_addr(pdata->mac_addr)) { - random_ether_addr(pdata->mac_addr); - printk(KERN_DEBUG - "ar71xx: using random MAC address for eth%d\n", - ath79_eth_instance); - } - - if (pdata->mii_bus_dev == NULL) { - switch (ath79_soc) { - case ATH79_SOC_AR9341: - case ATH79_SOC_AR9342: - case ATH79_SOC_AR9344: - if (id == 0) - pdata->mii_bus_dev = &ath79_mdio0_device.dev; - else - pdata->mii_bus_dev = &ath79_mdio1_device.dev; - break; - - case ATH79_SOC_AR7241: - case ATH79_SOC_AR9330: - case ATH79_SOC_AR9331: - pdata->mii_bus_dev = &ath79_mdio1_device.dev; - break; - - default: - pdata->mii_bus_dev = &ath79_mdio0_device.dev; - break; - } - } - - /* Reset the device */ - ath79_device_reset_set(pdata->reset_bit); - mdelay(100); - - ath79_device_reset_clear(pdata->reset_bit); - mdelay(100); - - platform_device_register(pdev); - ath79_eth_instance++; -} - -void __init ath79_set_mac_base(unsigned char *mac) -{ - memcpy(ath79_mac_base, mac, ETH_ALEN); -} - -void __init ath79_parse_mac_addr(char *mac_str) -{ - u8 tmp[ETH_ALEN]; - int t; - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); - - if (t != ETH_ALEN) - t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", - &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); - - if (t == ETH_ALEN) - ath79_set_mac_base(tmp); - else - printk(KERN_DEBUG "ar71xx: failed to parse mac address " - "\"%s\"\n", mac_str); -} - -static int __init ath79_ethaddr_setup(char *str) -{ - ath79_parse_mac_addr(str); - return 1; -} -__setup("ethaddr=", ath79_ethaddr_setup); - -static int __init ath79_kmac_setup(char *str) -{ - ath79_parse_mac_addr(str); - return 1; -} -__setup("kmac=", ath79_kmac_setup); - -void __init ath79_init_mac(unsigned char *dst, const unsigned char *src, - int offset) -{ - int t; - - if (!is_valid_ether_addr(src)) { - memset(dst, '\0', ETH_ALEN); - return; - } - - t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); - t += offset; - - dst[0] = src[0]; - dst[1] = src[1]; - dst[2] = src[2]; - dst[3] = (t >> 16) & 0xff; - dst[4] = (t >> 8) & 0xff; - dst[5] = t & 0xff; -} - -void __init ath79_init_local_mac(unsigned char *dst, const unsigned char *src) -{ - int i; - - if (!is_valid_ether_addr(src)) { - memset(dst, '\0', ETH_ALEN); - return; - } - - for (i = 0; i < ETH_ALEN; i++) - dst[i] = src[i]; - dst[0] |= 0x02; -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.h deleted file mode 100644 index 4c010ef74e..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-eth.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Atheros AR71xx SoC device definitions - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_ETH_H -#define _ATH79_DEV_ETH_H - -#include - -struct platform_device; - -extern unsigned char ath79_mac_base[] __initdata; -void ath79_parse_mac_addr(char *mac_str); -void ath79_init_mac(unsigned char *dst, const unsigned char *src, - int offset); -void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); - -struct ath79_eth_pll_data { - u32 pll_10; - u32 pll_100; - u32 pll_1000; -}; - -extern struct ath79_eth_pll_data ath79_eth0_pll_data; -extern struct ath79_eth_pll_data ath79_eth1_pll_data; - -extern struct ag71xx_platform_data ath79_eth0_data; -extern struct ag71xx_platform_data ath79_eth1_data; -extern struct platform_device ath79_eth0_device; -extern struct platform_device ath79_eth1_device; -void ath79_register_eth(unsigned int id); - -extern struct ag71xx_switch_platform_data ath79_switch_data; - -extern struct platform_device ath79_mdio0_device; -extern struct platform_device ath79_mdio1_device; -void ath79_register_mdio(unsigned int id, u32 phy_mask); - -#endif /* _ATH79_DEV_ETH_H */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.c deleted file mode 100644 index 9ac19d83ae..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include "dev-spi.h" -#include "dev-m25p80.h" - -static struct ath79_spi_controller_data ath79_spi0_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, -}; - -static struct ath79_spi_controller_data ath79_spi1_cdata = -{ - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - -static struct spi_board_info ath79_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ath79_spi0_cdata, - }, - { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ath79_spi1_cdata, - } -}; - -static struct ath79_spi_platform_data ath79_spi_data; - -void __init ath79_register_m25p80(struct flash_platform_data *pdata) -{ - ath79_spi_data.bus_num = 0; - ath79_spi_data.num_chipselect = 1; - ath79_spi_info[0].platform_data = pdata; - ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); -} - -static struct flash_platform_data *multi_pdata; - -static struct mtd_info *concat_devs[2] = { NULL, NULL }; -static struct work_struct mtd_concat_work; - -static void mtd_concat_add_work(struct work_struct *work) -{ - struct mtd_info *mtd; - - mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); - - mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts); -} - -static void mtd_concat_add(struct mtd_info *mtd) -{ - static bool registered = false; - - if (registered) - return; - - if (!strcmp(mtd->name, "spi0.0")) - concat_devs[0] = mtd; - else if (!strcmp(mtd->name, "spi0.1")) - concat_devs[1] = mtd; - else - return; - - if (!concat_devs[0] || !concat_devs[1]) - return; - - registered = true; - INIT_WORK(&mtd_concat_work, mtd_concat_add_work); - schedule_work(&mtd_concat_work); -} - -static void mtd_concat_remove(struct mtd_info *mtd) -{ -} - -static void add_mtd_concat_notifier(void) -{ - static struct mtd_notifier not = { - .add = mtd_concat_add, - .remove = mtd_concat_remove, - }; - - register_mtd_user(¬); -} - - -void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) -{ - multi_pdata = pdata; - add_mtd_concat_notifier(); - ath79_spi_data.bus_num = 0; - ath79_spi_data.num_chipselect = 2; - ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.h deleted file mode 100644 index 637b41a7d8..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/dev-m25p80.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_DEV_M25P80_H -#define _ATH79_DEV_M25P80_H - -#include - -void ath79_register_m25p80(struct flash_platform_data *pdata) __init; -void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; - -#endif /* _ATH79_DEV_M25P80_H */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-ap96.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-ap96.c deleted file mode 100644 index f7315a7493..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-ap96.c +++ /dev/null @@ -1,153 +0,0 @@ -/* - * ALFA Network AP96 board support - * - * Copyright (C) 2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-spi.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define ALFA_AP96_GPIO_PCIE_RESET 2 -#define ALFA_AP96_GPIO_SIM_DETECT 3 -#define ALFA_AP96_GPIO_MICROSD_CD 4 -#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 - -#define ALFA_AP96_GPIO_BUTTON_RESET 11 - -#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_AP96_GPIO_BUTTON_RESET, - .active_low = 1, - } -}; - -static int alfa_ap96_mmc_get_cd(struct device *dev) -{ - return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD); -} - -static struct mmc_spi_platform_data alfa_ap96_mmc_data = { - .get_cd = alfa_ap96_mmc_get_cd, - .caps = MMC_CAP_NEEDS_POLL, - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct ath79_spi_controller_data ap96_spi0_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 0, -}; - -static struct ath79_spi_controller_data ap96_spi1_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 1, -}; - -static struct ath79_spi_controller_data ap96_spi2_cdata = { - .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, - .cs_line = 2, -}; - -static struct spi_board_info alfa_ap96_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .controller_data = &ap96_spi0_cdata - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &alfa_ap96_mmc_data, - .controller_data = &ap96_spi1_cdata - }, { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 6250000, - .modalias = "rtc-pcf2123", - .controller_data = &ap96_spi2_cdata - }, -}; - -static struct ath79_spi_platform_data alfa_ap96_spi_data = { - .bus_num = 0, - .num_chipselect = 3, -}; - -static void __init alfa_ap96_gpio_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); - gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); - gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); - gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); - gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); -} - -#define ALFA_AP96_WAN_PHYMASK BIT(4) -#define ALFA_AP96_LAN_PHYMASK BIT(5) -#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) - -static void __init alfa_ap96_init(void) -{ - alfa_ap96_gpio_setup(); - - ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; - ath79_eth1_pll_data.pll_1000 = 0x110000; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; - ath79_eth1_pll_data.pll_1000 = 0x110000; - - ath79_register_eth(1); - - ath79_register_pci(); - ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, - ARRAY_SIZE(alfa_ap96_spi_info)); - - ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_ap96_gpio_keys), - alfa_ap96_gpio_keys); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", - alfa_ap96_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-nx.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-nx.c deleted file mode 100644 index d37e63fe12..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-alfa-nx.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * ALFA Network N2/N5 board support - * - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define ALFA_NX_GPIO_LED_2 17 -#define ALFA_NX_GPIO_LED_3 16 -#define ALFA_NX_GPIO_LED_5 12 -#define ALFA_NX_GPIO_LED_6 8 -#define ALFA_NX_GPIO_LED_7 6 -#define ALFA_NX_GPIO_LED_8 7 - -#define ALFA_NX_GPIO_BTN_RESET 11 - -#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) - -#define ALFA_NX_MAC0_OFFSET 0 -#define ALFA_NX_MAC1_OFFSET 6 -#define ALFA_NX_CALDATA_OFFSET 0x1000 - -static struct mtd_partition alfa_nx_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x600000, - }, { - .name = "kernel", - .offset = 0x650000, - .size = 0x190000, - }, { - .name = "nvram", - .offset = 0x7e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x780000, - } -}; - -static struct flash_platform_data alfa_nx_flash_data = { - .parts = alfa_nx_partitions, - .nr_parts = ARRAY_SIZE(alfa_nx_partitions), -}; - -static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALFA_NX_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led alfa_nx_leds_gpio[] __initdata = { - { - .name = "alfa:green:led_2", - .gpio = ALFA_NX_GPIO_LED_2, - .active_low = 1, - }, { - .name = "alfa:green:led_3", - .gpio = ALFA_NX_GPIO_LED_3, - .active_low = 1, - }, { - .name = "alfa:red:led_5", - .gpio = ALFA_NX_GPIO_LED_5, - .active_low = 1, - }, { - .name = "alfa:amber:led_6", - .gpio = ALFA_NX_GPIO_LED_6, - .active_low = 1, - }, { - .name = "alfa:green:led_7", - .gpio = ALFA_NX_GPIO_LED_7, - .active_low = 1, - }, { - .name = "alfa:green:led_8", - .gpio = ALFA_NX_GPIO_LED_8, - .active_low = 1, - } -}; - -static void __init alfa_nx_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(&alfa_nx_flash_data); - - ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), - alfa_nx_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(alfa_nx_gpio_keys), - alfa_nx_gpio_keys); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, - art + ALFA_NX_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, - art + ALFA_NX_MAC1_OFFSET, 0); - - /* WAN port */ - ath79_register_eth(0); - /* LAN port */ - ath79_register_eth(1); - - ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); -} - -MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", - alfa_nx_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-all0258n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-all0258n.c deleted file mode 100644 index fa3cefb64c..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-all0258n.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * Allnet ALL0258N support - * - * Copyright (C) 2011 Daniel Golle - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -/* found via /sys/gpio/... try and error */ -#define ALL0258N_GPIO_BTN_RESET 1 -#define ALL0258N_GPIO_LED_RSSIHIGH 13 -#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 -#define ALL0258N_GPIO_LED_RSSILOW 14 - -/* defaults taken from others machs */ -#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) - -/* showed up in the original firmware's bootlog */ -#define ALL0258N_SEC_PHYMASK BIT(3) - -/* - * from U-Boot bootargs of original firmware: - * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),320k(custom),1024k(kernel),4928k(rootfs),1536k(failsafe),64k(ART) - * we use a more OpenWrt-friendly layout now: - * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),896k(kernel),5376k(rootfs),1536k(failsafe),64k(ART) - */ -static struct mtd_partition all0258n_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x050000, - .size = 0x0E0000, - }, { - .name = "rootfs", - .offset = 0x130000, - .size = 0x540000, - }, { - .name = "failsafe", - .offset = 0x670000, - .size = 0x180000, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x620000, - }, { - .name = "art", - .offset = 0x7F0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data all0258n_flash_data = { - .parts = all0258n_partitions, - .nr_parts = ARRAY_SIZE(all0258n_partitions), -}; - -static struct gpio_led all0258n_leds_gpio[] __initdata = { - { - .name = "all0258n:green:rssihigh", - .gpio = ALL0258N_GPIO_LED_RSSIHIGH, - .active_low = 1, - }, { - .name = "all0258n:yellow:rssimedium", - .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, - .active_low = 1, - }, { - .name = "all0258n:red:rssilow", - .gpio = ALL0258N_GPIO_LED_RSSILOW, - .active_low = 1, - } -}; - -static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, - .gpio = ALL0258N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init all0258n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); - u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); - - ath79_register_m25p80(&all0258n_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), - all0258n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(all0258n_gpio_keys), - all0258n_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - - ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", - all0258n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap113.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap113.c deleted file mode 100644 index 178815cf91..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap113.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Atheros AP113 board support - * - * Copyright (C) 2011 Florian Fainelli - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "pci.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define AP113_GPIO_LED_USB 0 -#define AP113_GPIO_LED_STATUS 1 -#define AP113_GPIO_LED_ST 11 - -#define AP113_GPIO_BTN_JUMPSTART 12 - -#define AP113_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP113_KEYS_DEBOUNCE_INTERVAL (3 * AP113_KEYS_POLL_INTERVAL) - -static struct mtd_partition ap113_parts[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, - { - .name = "rootfs", - .offset = 0x010000, - .size = 0x300000, - }, - { - .name = "uImage", - .offset = 0x300000, - .size = 0x3e0000, - }, - { - .name = "NVRAM", - .offset = 0x3e0000, - .size = 0x010000, - }, - { - .name = "ART", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, -}; -#define ap113_nr_parts ARRAY_SIZE(ap113_parts) - -static struct flash_platform_data ap113_flash_data = { - .parts = ap113_parts, - .nr_parts = ap113_nr_parts, -}; - -static struct gpio_led ap113_leds_gpio[] __initdata = { - { - .name = "ap113:green:usb", - .gpio = AP113_GPIO_LED_USB, - .active_low = 1, - }, - { - .name = "ap113:green:status", - .gpio = AP113_GPIO_LED_STATUS, - .active_low = 1, - }, - { - .name = "ap113:green:st", - .gpio = AP113_GPIO_LED_ST, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap113_gpio_keys[] __initdata = { - { - .desc = "jumpstart button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP113_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP113_GPIO_BTN_JUMPSTART, - .active_low = 1, - }, -}; - -static void __init ap113_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(&ap113_flash_data); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap113_gpio_keys), - ap113_gpio_keys); - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio), - ap113_leds_gpio); - - ath79_register_pci(); - - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_AP113, "AP113", "Atheros AP113", - ap113_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap83.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap83.c deleted file mode 100644 index 8519a9d9a6..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap83.c +++ /dev/null @@ -1,275 +0,0 @@ -/* - * Atheros AP83 board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define AP83_GPIO_LED_WLAN 6 -#define AP83_GPIO_LED_POWER 14 -#define AP83_GPIO_LED_JUMPSTART 15 -#define AP83_GPIO_BTN_JUMPSTART 12 -#define AP83_GPIO_BTN_RESET 21 - -#define AP83_050_GPIO_VSC7385_CS 1 -#define AP83_050_GPIO_VSC7385_MISO 3 -#define AP83_050_GPIO_VSC7385_MOSI 16 -#define AP83_050_GPIO_VSC7385_SCK 17 - -#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) - -static struct mtd_partition ap83_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x060000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x1a0000, - .size = 0x650000, - }, { - .name = "art", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x060000, - .size = 0x790000, - } -}; - -static struct physmap_flash_data ap83_flash_data = { - .width = 2, - .parts = ap83_flash_partitions, - .nr_parts = ARRAY_SIZE(ap83_flash_partitions), -}; - -static struct resource ap83_flash_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_flash_device = { - .name = "ar91xx-flash", - .id = -1, - .resource = ap83_flash_resources, - .num_resources = ARRAY_SIZE(ap83_flash_resources), - .dev = { - .platform_data = &ap83_flash_data, - } -}; - -static struct gpio_led ap83_leds_gpio[] __initdata = { - { - .name = "ap83:green:jumpstart", - .gpio = AP83_GPIO_LED_JUMPSTART, - .active_low = 0, - }, { - .name = "ap83:green:power", - .gpio = AP83_GPIO_LED_POWER, - .active_low = 0, - }, { - .name = "ap83:green:wlan", - .gpio = AP83_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button ap83_gpio_keys[] __initdata = { - { - .desc = "soft_reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "jumpstart", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP83_GPIO_BTN_JUMPSTART, - .active_low = 1, - } -}; - -static struct resource ap83_040_spi_resources[] = { - [0] = { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device ap83_040_spi_device = { - .name = "ap83-spi", - .id = 0, - .resource = ap83_040_spi_resources, - .num_resources = ARRAY_SIZE(ap83_040_spi_resources), -}; - -static struct spi_gpio_platform_data ap83_050_spi_data = { - .miso = AP83_050_GPIO_VSC7385_MISO, - .mosi = AP83_050_GPIO_VSC7385_MOSI, - .sck = AP83_050_GPIO_VSC7385_SCK, - .num_chipselect = 1, -}; - -static struct platform_device ap83_050_spi_device = { - .name = "spi_gpio", - .id = 0, - .dev = { - .platform_data = &ap83_050_spi_data, - } -}; - -static void ap83_vsc7385_reset(void) -{ - ath79_device_reset_set(AR71XX_RESET_GE1_PHY); - udelay(10); - ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); - mdelay(50); -} - -static struct vsc7385_platform_data ap83_vsc7385_data = { - .reset = ap83_vsc7385_reset, - .ucode_name = "vsc7385_ucode_ap83.bin", - .mac_cfg = { - .tx_ipg = 6, - .bit2 = 0, - .clk_sel = 3, - }, -}; - -static struct spi_board_info ap83_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "spi-vsc7385", - .platform_data = &ap83_vsc7385_data, - .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, - } -}; - -static void __init ap83_generic_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0xfffffffe); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = 0x1; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_eth1_pll_data.pll_1000 = 0x1f000000; - - ath79_register_eth(1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), - ap83_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap83_gpio_keys), - ap83_gpio_keys); - - ath79_register_usb(); - - ath79_register_wmac(eeprom, NULL); - - platform_device_register(&ap83_flash_device); - - spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); -} - -static void ap83_040_flash_lock(struct platform_device *pdev) -{ - ath79_flash_acquire(); -} - -static void ap83_040_flash_unlock(struct platform_device *pdev) -{ - ath79_flash_release(); -} - -static void __init ap83_040_setup(void) -{ - ap83_flash_data.lock = ap83_040_flash_lock; - ap83_flash_data.unlock = ap83_040_flash_unlock; - ap83_generic_setup(); - platform_device_register(&ap83_040_spi_device); -} - -static void __init ap83_050_setup(void) -{ - ap83_generic_setup(); - platform_device_register(&ap83_050_spi_device); -} - -static void __init ap83_setup(void) -{ - u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); - unsigned int board_version; - - board_version = (unsigned int)(board_id[0] - '0'); - board_version += ((unsigned int)(board_id[1] - '0')) * 10; - - switch (board_version) { - case 40: - ap83_040_setup(); - break; - case 50: - ap83_050_setup(); - break; - default: - printk(KERN_WARNING "AP83-%03u board is not yet supported\n", - board_version); - } -} - -MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap96.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap96.c deleted file mode 100644 index 9ab36cc1cb..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ap96.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Atheros AP96 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2012 Gabor Juhos - * Copyright (C) 2010 Atheros Communications - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define AP96_GPIO_LED_12_GREEN 0 -#define AP96_GPIO_LED_3_GREEN 1 -#define AP96_GPIO_LED_2_GREEN 2 -#define AP96_GPIO_LED_WPS_GREEN 4 -#define AP96_GPIO_LED_5_GREEN 5 -#define AP96_GPIO_LED_4_ORANGE 6 - -/* Reset button - next to the power connector */ -#define AP96_GPIO_BTN_RESET 3 -/* WPS button - next to a led on right */ -#define AP96_GPIO_BTN_WPS 8 - -#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) - -#define AP96_WMAC0_MAC_OFFSET 0x120c -#define AP96_WMAC1_MAC_OFFSET 0x520c -#define AP96_CALDATA0_OFFSET 0x1000 -#define AP96_CALDATA1_OFFSET 0x5000 - -static struct mtd_partition ap96_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "env", - .offset = 0x030000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x040000, - .size = 0x600000, - }, { - .name = "uImage", - .offset = 0x640000, - .size = 0x1b0000, - }, { - .name = "caldata", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data ap96_flash_data = { - .parts = ap96_partitions, - .nr_parts = ARRAY_SIZE(ap96_partitions), -}; - -/* - * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 - * below (from left to right on the board). Led 1 seems to be on whenever the - * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; - * others are green. - * - * In addition, there is one led next to a button on the right side for WPS. - */ -static struct gpio_led ap96_leds_gpio[] __initdata = { - { - .name = "ap96:green:led2", - .gpio = AP96_GPIO_LED_2_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led3", - .gpio = AP96_GPIO_LED_3_GREEN, - .active_low = 1, - }, { - .name = "ap96:orange:led4", - .gpio = AP96_GPIO_LED_4_ORANGE, - .active_low = 1, - }, { - .name = "ap96:green:led5", - .gpio = AP96_GPIO_LED_5_GREEN, - .active_low = 1, - }, { - .name = "ap96:green:led12", - .gpio = AP96_GPIO_LED_12_GREEN, - .active_low = 1, - }, { /* next to a button on right */ - .name = "ap96:green:wps", - .gpio = AP96_GPIO_LED_WPS_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button ap96_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, - .gpio = AP96_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -#define AP96_WAN_PHYMASK 0x10 -#define AP96_LAN_PHYMASK 0x0f - -static void __init ap96_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - - ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; - - ath79_eth1_pll_data.pll_1000 = 0x1f000000; - - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_m25p80(&ap96_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), - ap96_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ap96_gpio_keys), - ap96_gpio_keys); - - ap94_pci_init(art + AP96_CALDATA0_OFFSET, - art + AP96_WMAC0_MAC_OFFSET, - art + AP96_CALDATA1_OFFSET, - art + AP96_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-aw-nr580.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-aw-nr580.c deleted file mode 100644 index 281129b787..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-aw-nr580.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * AzureWave AW-NR580 board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "machtypes.h" -#include "pci.h" - -#define AW_NR580_GPIO_LED_READY_RED 0 -#define AW_NR580_GPIO_LED_WLAN 1 -#define AW_NR580_GPIO_LED_READY_GREEN 2 -#define AW_NR580_GPIO_LED_WPS_GREEN 4 -#define AW_NR580_GPIO_LED_WPS_AMBER 5 - -#define AW_NR580_GPIO_BTN_WPS 3 -#define AW_NR580_GPIO_BTN_RESET 11 - -#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ -#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) - -static struct gpio_led aw_nr580_leds_gpio[] __initdata = { - { - .name = "aw-nr580:red:ready", - .gpio = AW_NR580_GPIO_LED_READY_RED, - .active_low = 0, - }, { - .name = "aw-nr580:green:ready", - .gpio = AW_NR580_GPIO_LED_READY_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:green:wps", - .gpio = AW_NR580_GPIO_LED_WPS_GREEN, - .active_low = 0, - }, { - .name = "aw-nr580:amber:wps", - .gpio = AW_NR580_GPIO_LED_WPS_AMBER, - .active_low = 0, - }, { - .name = "aw-nr580:green:wlan", - .gpio = AW_NR580_GPIO_LED_WLAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, - .gpio = AW_NR580_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static const char *aw_nr580_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data aw_nr580_flash_data = { - .part_probes = aw_nr580_part_probes, -}; - -static void __init aw_nr580_setup(void) -{ - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - - ath79_register_pci(); - - ath79_register_m25p80(&aw_nr580_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), - aw_nr580_leds_gpio); - - ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, - ARRAY_SIZE(aw_nr580_gpio_keys), - aw_nr580_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", - aw_nr580_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c deleted file mode 100644 index 931a7292e2..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-600-a1.c +++ /dev/null @@ -1,194 +0,0 @@ -/* - * D-Link DIR-600 rev. A1 board support - * - * Copyright (C) 2010-2012 Gabor Juhos - * Copyright (C) 2012 Vadim Girlin - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "nvram.h" - -#define DIR_600_A1_GPIO_LED_WPS 0 -#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 -#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 -#define DIR_600_A1_GPIO_LED_LAN1 13 -#define DIR_600_A1_GPIO_LED_LAN2 14 -#define DIR_600_A1_GPIO_LED_LAN3 15 -#define DIR_600_A1_GPIO_LED_LAN4 16 -#define DIR_600_A1_GPIO_LED_WAN_AMBER 7 -#define DIR_600_A1_GPIO_LED_WAN_GREEN 17 - -#define DIR_600_A1_GPIO_BTN_RESET 8 -#define DIR_600_A1_GPIO_BTN_WPS 12 - -#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) - -#define DIR_600_A1_NVRAM_ADDR 0x1f030000 -#define DIR_600_A1_NVRAM_SIZE 0x10000 - -static struct mtd_partition dir_600_a1_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "nvram", - .offset = 0x030000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x040000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x120000, - .size = 0x2c0000, - }, { - .name = "mac", - .offset = 0x3e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x3a0000, - } -}; - -static struct flash_platform_data dir_600_a1_flash_data = { - .parts = dir_600_a1_partitions, - .nr_parts = ARRAY_SIZE(dir_600_a1_partitions), -}; - -static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { - { - .name = "d-link:green:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, - }, { - .name = "d-link:amber:power", - .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, - }, { - .name = "d-link:amber:wan", - .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER, - }, { - .name = "d-link:green:wan", - .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN, - .active_low = 1, - }, { - .name = "d-link:green:lan1", - .gpio = DIR_600_A1_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "d-link:green:lan2", - .gpio = DIR_600_A1_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "d-link:green:lan3", - .gpio = DIR_600_A1_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "d-link:green:lan4", - .gpio = DIR_600_A1_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR_600_A1_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_600_A1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init dir_600_a1_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac_buff[6]; - u8 *mac = NULL; - - if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, - "lan_mac=", mac_buff) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); - mac = mac_buff; - } - - ath79_register_m25p80(&dir_600_a1_flash_data); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), - dir_600_a1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_600_a1_gpio_keys), - dir_600_a1_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", - dir_600_a1_setup); - -static void __init dir_615_e4_setup(void) -{ - dir_600_a1_setup(); - ap9x_pci_setup_wmac_led_pin(0, 1); -} - -MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4", - dir_615_e4_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-615-c1.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-615-c1.c deleted file mode 100644 index b15fc6814c..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-615-c1.c +++ /dev/null @@ -1,171 +0,0 @@ -/* - * D-Link DIR-615 rev C1 board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ -#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ -#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ -#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ -#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ - -/* buttons may need refinement */ - -#define DIR_615C1_GPIO_BTN_WPS 12 -#define DIR_615C1_GPIO_BTN_RESET 21 - -#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) - -#define DIR_615C1_CONFIG_ADDR 0x1f020000 -#define DIR_615C1_CONFIG_SIZE 0x10000 - -static struct mtd_partition dir_615c1_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x020000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x030000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x110000, - .size = 0x2e0000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x030000, - .size = 0x3c0000, - } -}; - -static struct flash_platform_data dir_615c1_flash_data = { - .parts = dir_615c1_partitions, - .nr_parts = ARRAY_SIZE(dir_615c1_partitions), -}; - -static struct gpio_led dir_615c1_leds_gpio[] __initdata = { - { - .name = "d-link:orange:status", - .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "d-link:green:wan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, - .active_low = 1, - }, { - .name = "d-link:green:wancpu", - .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, - .active_low = 1, - }, { - .name = "d-link:green:wlan", - .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, - .active_low = 1, - }, { - .name = "d-link:green:status", - .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, - .active_low = 1, - }, { - .name = "d-link:orange:wan", - .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, - .active_low = 1, - } - -}; - -static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR_615C1_GPIO_BTN_WPS, - } -}; - -#define DIR_615C1_LAN_PHYMASK BIT(0) -#define DIR_615C1_WAN_PHYMASK BIT(4) -#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ - DIR_615C1_WAN_PHYMASK)) - -static void __init dir_615c1_setup(void) -{ - const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ath79_register_mdio(0, DIR_615C1_MDIO_MASK); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&dir_615c1_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), - dir_615c1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir_615c1_gpio_keys), - dir_615c1_gpio_keys); - - ath79_register_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", - dir_615c1_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-825-b1.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-825-b1.c deleted file mode 100644 index ab973ebfb8..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-dir-825-b1.c +++ /dev/null @@ -1,208 +0,0 @@ -/* - * D-Link DIR-825 rev. B1 board support - * - * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. - * - * based on mach-wndr3700.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define DIR825B1_GPIO_LED_BLUE_USB 0 -#define DIR825B1_GPIO_LED_ORANGE_POWER 1 -#define DIR825B1_GPIO_LED_BLUE_POWER 2 -#define DIR825B1_GPIO_LED_BLUE_WPS 4 -#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 -#define DIR825B1_GPIO_LED_BLUE_PLANET 11 - -#define DIR825B1_GPIO_BTN_RESET 3 -#define DIR825B1_GPIO_BTN_WPS 8 - -#define DIR825B1_GPIO_RTL8366_SDA 5 -#define DIR825B1_GPIO_RTL8366_SCK 7 - -#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) - -#define DIR825B1_CAL_LOCATION_0 0x1f661000 -#define DIR825B1_CAL_LOCATION_1 0x1f665000 - -#define DIR825B1_MAC_LOCATION_0 0x1f66ffa0 -#define DIR825B1_MAC_LOCATION_1 0x1f66ffb4 - -static struct mtd_partition dir825b1_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x610000, - }, { - .name = "caldata", - .offset = 0x660000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "unknown", - .offset = 0x670000, - .size = 0x190000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data dir825b1_flash_data = { - .parts = dir825b1_partitions, - .nr_parts = ARRAY_SIZE(dir825b1_partitions), -}; - -static struct gpio_led dir825b1_leds_gpio[] __initdata = { - { - .name = "d-link:blue:usb", - .gpio = DIR825B1_GPIO_LED_BLUE_USB, - .active_low = 1, - }, { - .name = "d-link:orange:power", - .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, - .active_low = 1, - }, { - .name = "d-link:blue:power", - .gpio = DIR825B1_GPIO_LED_BLUE_POWER, - .active_low = 1, - }, { - .name = "d-link:blue:wps", - .gpio = DIR825B1_GPIO_LED_BLUE_WPS, - .active_low = 1, - }, { - .name = "d-link:orange:planet", - .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, - .active_low = 1, - }, { - .name = "d-link:blue:planet", - .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, - .active_low = 1, - } -}; - -static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, - .gpio = DIR825B1_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { - { .reg = 0x06, .val = 0x0108 }, -}; - -static struct rtl8366_platform_data dir825b1_rtl8366s_data = { - .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, - .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, - .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), - .initvals = dir825b1_rtl8366s_initvals, -}; - -static struct platform_device dir825b1_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &dir825b1_rtl8366s_data, - } -}; - -static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr) -{ - int ret; - u8 *src = (u8 *)KSEG1ADDR(src_addr); - - ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &dest[0], &dest[1], &dest[2], - &dest[3], &dest[4], &dest[5]); - - if (ret != ETH_ALEN) - memset(dest, 0, ETH_ALEN); -} - -static void __init dir825b1_setup(void) -{ - u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; - - dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0); - dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); - ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x11110000; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); - ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - ath79_eth1_pll_data.pll_1000 = 0x11110000; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&dir825b1_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), - dir825b1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(dir825b1_gpio_keys), - dir825b1_gpio_keys); - - ath79_register_usb(); - - platform_device_register(&dir825b1_rtl8366s_device); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1, - (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2); -} - -MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", - dir825b1_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-eap7660d.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-eap7660d.c deleted file mode 100644 index cbd201994d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-eap7660d.c +++ /dev/null @@ -1,179 +0,0 @@ -/* - * Senao EAP7660D board support - * - * Copyright (C) 2010 Daniel Golle - * Copyright (C) 2008 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "pci.h" - -#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ -#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) - -#define EAP7660D_GPIO_DS4 7 -#define EAP7660D_GPIO_DS5 2 -#define EAP7660D_GPIO_DS7 0 -#define EAP7660D_GPIO_DS8 4 -#define EAP7660D_GPIO_SW1 3 -#define EAP7660D_GPIO_SW3 8 -#define EAP7660D_PHYMASK BIT(20) -#define EAP7660D_BOARDCONFIG 0x1F7F0000 -#define EAP7660D_GBIC_MAC_OFFSET 0x1000 -#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 -#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 -#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 -#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 - -#ifdef CONFIG_PCI -static struct ath5k_platform_data eap7660d_wmac0_data; -static struct ath5k_platform_data eap7660d_wmac1_data; -static char eap7660d_wmac0_mac[6]; -static char eap7660d_wmac1_mac[6]; -static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; -static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; - -static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) -{ - switch (PCI_SLOT(dev->devfn)) { - case 17: - dev->dev.platform_data = &eap7660d_wmac0_data; - break; - - case 18: - dev->dev.platform_data = &eap7660d_wmac1_data; - break; - } - - return 0; -} - -void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ - if (cal_data0 && *cal_data0 == 0xa55a) { - memcpy(eap7660d_wmac0_eeprom, cal_data0, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; - } - - if (cal_data1 && *cal_data1 == 0xa55a) { - memcpy(eap7660d_wmac1_eeprom, cal_data1, - ATH5K_PLAT_EEP_MAX_WORDS); - eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; - } - - if (mac_addr0) { - memcpy(eap7660d_wmac0_mac, mac_addr0, - sizeof(eap7660d_wmac0_mac)); - eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; - } - - if (mac_addr1) { - memcpy(eap7660d_wmac1_mac, mac_addr1, - sizeof(eap7660d_wmac1_mac)); - eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; - } - - ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init); - ath79_register_pci(); -} -#else -static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, - u8 *cal_data1, u8 *mac_addr1) -{ -} -#endif /* CONFIG_PCI */ - -static struct gpio_led eap7660d_leds_gpio[] __initdata = { - { - .name = "eap7660d:green:ds8", - .gpio = EAP7660D_GPIO_DS8, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds5", - .gpio = EAP7660D_GPIO_DS5, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds7", - .gpio = EAP7660D_GPIO_DS7, - .active_low = 0, - }, - { - .name = "eap7660d:green:ds4", - .gpio = EAP7660D_GPIO_DS4, - .active_low = 0, - } -}; - -static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW1, - .active_low = 1, - }, - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, - .gpio = EAP7660D_GPIO_SW3, - .active_low = 1, - } -}; - -static const char *eap7660d_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data eap7660d_flash_data = { - .part_probes = eap7660d_part_probes, -}; - -static void __init eap7660d_setup(void) -{ - u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); - - ath79_register_mdio(0, ~EAP7660D_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, - boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = EAP7660D_PHYMASK; - ath79_register_eth(0); - ath79_register_m25p80(&eap7660d_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), - eap7660d_leds_gpio); - ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, - ARRAY_SIZE(eap7660d_gpio_keys), - eap7660d_gpio_keys); - eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC0_MAC_OFFSET, - boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, - boardconfig + EAP7660D_WMAC1_MAC_OFFSET); -}; - -MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", - eap7660d_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-hornet-ub.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-hornet-ub.c deleted file mode 100644 index 45dc0f618c..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-hornet-ub.c +++ /dev/null @@ -1,136 +0,0 @@ -/* - * ALFA NETWORKS Hornet-UB board support - * - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define HORNET_UB_GPIO_LED_WLAN 0 -#define HORNET_UB_GPIO_LED_USB 1 -#define HORNET_UB_GPIO_LED_LAN 13 -#define HORNET_UB_GPIO_LED_WAN 17 -#define HORNET_UB_GPIO_LED_WPS 27 - -#define HORNET_UB_GPIO_BTN_RESET 11 -#define HORNET_UB_GPIO_BTN_WPS 12 - -#define HORNET_UB_GPIO_USB_POWER 26 - -#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ -#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) - -#define HORNET_UB_MAC0_OFFSET 0x0000 -#define HORNET_UB_MAC1_OFFSET 0x0006 -#define HORNET_UB_CALDATA_OFFSET 0x1000 - -static struct gpio_led hornet_ub_leds_gpio[] __initdata = { - { - .name = "alfa:blue:lan", - .gpio = HORNET_UB_GPIO_LED_LAN, - .active_low = 0, - }, - { - .name = "alfa:blue:usb", - .gpio = HORNET_UB_GPIO_LED_USB, - .active_low = 0, - }, - { - .name = "alfa:blue:wan", - .gpio = HORNET_UB_GPIO_LED_WAN, - .active_low = 1, - }, - { - .name = "alfa:blue:wlan", - .gpio = HORNET_UB_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "alfa:blue:wps", - .gpio = HORNET_UB_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { - { - .desc = "WPS button", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_WPS, - .active_low = 1, - }, - { - .desc = "Reset button", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, - .gpio = HORNET_UB_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init hornet_ub_gpio_setup(void) -{ - u32 t; - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; - ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); - - gpio_request(HORNET_UB_GPIO_USB_POWER, "USB power"); - gpio_direction_output(HORNET_UB_GPIO_USB_POWER, 1); -} - -static void __init hornet_ub_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - hornet_ub_gpio_setup(); - - ath79_register_m25p80(NULL); - ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), - hornet_ub_leds_gpio); - ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, - ARRAY_SIZE(hornet_ub_gpio_keys), - hornet_ub_gpio_keys); - - ath79_init_mac(ath79_eth1_data.mac_addr, - art + HORNET_UB_MAC0_OFFSET, 0); - ath79_init_mac(ath79_eth0_data.mac_addr, - art + HORNET_UB_MAC1_OFFSET, 0); - - ath79_register_mdio(0, 0x0); - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORKS Hornet-UB", - hornet_ub_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ja76pf.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ja76pf.c deleted file mode 100644 index 46c12c1be3..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ja76pf.c +++ /dev/null @@ -1,114 +0,0 @@ -/* - * jjPlus JA76PF board support - */ - -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) - -#define JA76PF_GPIO_I2C_SCL 0 -#define JA76PF_GPIO_I2C_SDA 1 -#define JA76PF_GPIO_LED_1 5 -#define JA76PF_GPIO_LED_2 4 -#define JA76PF_GPIO_LED_3 3 -#define JA76PF_GPIO_BTN_RESET 11 - -static struct gpio_led ja76pf_leds_gpio[] __initdata = { - { - .name = "ja76pf:green:led1", - .gpio = JA76PF_GPIO_LED_1, - .active_low = 1, - }, { - .name = "ja76pf:green:led2", - .gpio = JA76PF_GPIO_LED_2, - .active_low = 1, - }, { - .name = "ja76pf:green:led3", - .gpio = JA76PF_GPIO_LED_3, - .active_low = 1, - } -}; - -static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, - .gpio = JA76PF_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { - .sda_pin = JA76PF_GPIO_I2C_SDA, - .scl_pin = JA76PF_GPIO_I2C_SCL, -}; - -static struct platform_device ja76pf_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &ja76pf_i2c_gpio_data, - } -}; - -static const char *ja76pf_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ja76pf_flash_data = { - .part_probes = ja76pf_part_probes, -}; - -#define JA76PF_WAN_PHYMASK (1 << 4) -#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) -#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) - -static void __init ja76pf_init(void) -{ - ath79_register_m25p80(&ja76pf_flash_data); - - ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - platform_device_register(&ja76pf_i2c_gpio_device); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), - ja76pf_leds_gpio); - - ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ja76pf_gpio_keys), - ja76pf_gpio_keys); - - ath79_register_usb(); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-jwap003.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-jwap003.c deleted file mode 100644 index a3c93ccd90..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-jwap003.c +++ /dev/null @@ -1,95 +0,0 @@ -/* - * jjPlus JWAP003 board support - * - */ - -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ -#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) - -#define JWAP003_GPIO_WPS 11 -#define JWAP003_GPIO_I2C_SCL 0 -#define JWAP003_GPIO_I2C_SDA 1 - -static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, - .gpio = JWAP003_GPIO_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { - .sda_pin = JWAP003_GPIO_I2C_SDA, - .scl_pin = JWAP003_GPIO_I2C_SCL, -}; - -static struct platform_device jwap003_i2c_gpio_device = { - .name = "i2c-gpio", - .id = 0, - .dev = { - .platform_data = &jwap003_i2c_gpio_data, - } -}; - -static const char *jwap003_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data jwap003_flash_data = { - .part_probes = jwap003_part_probes, -}; - -#define JWAP003_WAN_PHYMASK BIT(0) -#define JWAP003_LAN_PHYMASK BIT(4) - -static void __init jwap003_init(void) -{ - ath79_register_m25p80(&jwap003_flash_data); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - platform_device_register(&jwap003_i2c_gpio_device); - - ath79_register_usb(); - - ath79_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, - ARRAY_SIZE(jwap003_gpio_keys), - jwap003_gpio_keys); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w04nu.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w04nu.c deleted file mode 100644 index c2460ce33c..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w04nu.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Planex MZK-W04NU board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MZK_W04NU_GPIO_LED_USB 0 -#define MZK_W04NU_GPIO_LED_STATUS 1 -#define MZK_W04NU_GPIO_LED_WPS 3 -#define MZK_W04NU_GPIO_LED_WLAN 6 -#define MZK_W04NU_GPIO_LED_AP 15 -#define MZK_W04NU_GPIO_LED_ROUTER 16 - -#define MZK_W04NU_GPIO_BTN_APROUTER 5 -#define MZK_W04NU_GPIO_BTN_WPS 12 -#define MZK_W04NU_GPIO_BTN_RESET 21 - -#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) - -static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W04NU_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W04NU_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W04NU_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:usb", - .gpio = MZK_W04NU_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "planex:green:ap", - .gpio = MZK_W04NU_GPIO_LED_AP, - .active_low = 1, - }, { - .name = "planex:green:router", - .gpio = MZK_W04NU_GPIO_LED_ROUTER, - .active_low = 1, - } -}; - -static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W04NU_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W04NU_WAN_PHYMASK BIT(4) -#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) - -static void __init mzk_w04nu_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, MZK_W04NU_MDIO_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), - mzk_w04nu_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w04nu_gpio_keys), - mzk_w04nu_gpio_keys); - ath79_register_usb(); - - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", - mzk_w04nu_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w300nh.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w300nh.c deleted file mode 100644 index 8c40365283..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-mzk-w300nh.c +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Planex MZK-W300NH board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define MZK_W300NH_GPIO_LED_STATUS 1 -#define MZK_W300NH_GPIO_LED_WPS 3 -#define MZK_W300NH_GPIO_LED_WLAN 6 -#define MZK_W300NH_GPIO_LED_AP_GREEN 15 -#define MZK_W300NH_GPIO_LED_AP_AMBER 16 - -#define MZK_W300NH_GPIO_BTN_APROUTER 5 -#define MZK_W300NH_GPIO_BTN_WPS 12 -#define MZK_W300NH_GPIO_BTN_RESET 21 - -#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) - -static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { - { - .name = "planex:green:status", - .gpio = MZK_W300NH_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "planex:blue:wps", - .gpio = MZK_W300NH_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "planex:green:wlan", - .gpio = MZK_W300NH_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "planex:green:aprouter", - .gpio = MZK_W300NH_GPIO_LED_AP_GREEN, - }, { - .name = "planex:amber:aprouter", - .gpio = MZK_W300NH_GPIO_LED_AP_AMBER, - } -}; - -static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "aprouter", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = MZK_W300NH_GPIO_BTN_APROUTER, - .active_low = 0, - } -}; - -#define MZK_W300NH_WAN_PHYMASK BIT(4) -#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) - -static void __init mzk_w300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, MZK_W300NH_MDIO_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), - mzk_w300nh_leds_gpio); - - ath79_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(mzk_w300nh_gpio_keys), - mzk_w300nh_gpio_keys); - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", - mzk_w300nh_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-nbg460n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-nbg460n.c deleted file mode 100644 index 8aa7331d43..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-nbg460n.c +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Zyxel NBG 460N/550N/550NH board support - * - * Copyright (C) 2010 Michael Kurz - * - * based on mach-tl-wr1043nd.c - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -/* LEDs */ -#define NBG460N_GPIO_LED_WPS 3 -#define NBG460N_GPIO_LED_WAN 6 -#define NBG460N_GPIO_LED_POWER 14 -#define NBG460N_GPIO_LED_WLAN 15 - -/* Buttons */ -#define NBG460N_GPIO_BTN_WPS 12 -#define NBG460N_GPIO_BTN_RESET 21 - -#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) - -/* RTC chip PCF8563 I2C interface */ -#define NBG460N_GPIO_PCF8563_SDA 8 -#define NBG460N_GPIO_PCF8563_SCK 7 - -/* Switch configuration I2C interface */ -#define NBG460N_GPIO_RTL8366_SDA 16 -#define NBG460N_GPIO_RTL8366_SCK 18 - -static struct mtd_partition nbg460n_partitions[] = { - { - .name = "Bootbase", - .offset = 0, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "U-Boot Config", - .offset = 0x010000, - .size = 0x030000, - }, { - .name = "U-Boot", - .offset = 0x040000, - .size = 0x030000, - }, { - .name = "linux", - .offset = 0x070000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x150000, - .size = 0x2a0000, - }, { - .name = "CalibData", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x070000, - .size = 0x380000, - } -}; - -static struct flash_platform_data nbg460n_flash_data = { - .parts = nbg460n_partitions, - .nr_parts = ARRAY_SIZE(nbg460n_partitions), -}; - -static struct gpio_led nbg460n_leds_gpio[] __initdata = { - { - .name = "nbg460n:green:power", - .gpio = NBG460N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - }, { - .name = "nbg460n:green:wps", - .gpio = NBG460N_GPIO_LED_WPS, - .active_low = 0, - }, { - .name = "nbg460n:green:wlan", - .gpio = NBG460N_GPIO_LED_WLAN, - .active_low = 0, - }, { - /* Not really for controlling the LED, - when set low the LED blinks uncontrollable */ - .name = "nbg460n:green:wan", - .gpio = NBG460N_GPIO_LED_WAN, - .active_low = 0, - } -}; - -static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, - .gpio = NBG460N_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { - .sda_pin = NBG460N_GPIO_PCF8563_SDA, - .scl_pin = NBG460N_GPIO_PCF8563_SCK, - .udelay = 10, -}; - -static struct platform_device nbg460n_i2c_device = { - .name = "i2c-gpio", - .id = -1, - .num_resources = 0, - .resource = NULL, - .dev = { - .platform_data = &nbg460n_i2c_device_platdata, - }, -}; - -static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { - { - I2C_BOARD_INFO("pcf8563", 0x51), - }, -}; - -static void __devinit nbg460n_i2c_init(void) -{ - /* The gpio interface */ - platform_device_register(&nbg460n_i2c_device); - /* I2C devices */ - i2c_register_board_info(0, nbg460n_i2c_devs, - ARRAY_SIZE(nbg460n_i2c_devs)); -} - - -static struct rtl8366_platform_data nbg460n_rtl8366s_data = { - .gpio_sda = NBG460N_GPIO_RTL8366_SDA, - .gpio_sck = NBG460N_GPIO_RTL8366_SCK, -}; - -static struct platform_device nbg460n_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &nbg460n_rtl8366s_data, - } -}; - -static void __init nbg460n_setup(void) -{ - /* end of bootloader sector contains mac address */ - u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); - /* last sector contains wlan calib data */ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - /* LAN Port */ - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - /* WAN Port */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - ath79_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - /* register the switch phy */ - platform_device_register(&nbg460n_rtl8366s_device); - - /* register flash */ - ath79_register_m25p80(&nbg460n_flash_data); - - ath79_register_wmac(eeprom, mac); - - /* register RTC chip */ - nbg460n_i2c_init(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), - nbg460n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(nbg460n_gpio_keys), - nbg460n_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", - nbg460n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-om2p.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-om2p.c deleted file mode 100644 index 519640ac9a..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-om2p.c +++ /dev/null @@ -1,116 +0,0 @@ -/* - * OpenMesh OM2P support - * - * Copyright (C) 2011 Marek Lindner - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include - -#include -#include - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define OM2P_GPIO_LED_POWER 0 -#define OM2P_GPIO_LED_GREEN 13 -#define OM2P_GPIO_LED_RED 14 -#define OM2P_GPIO_LED_YELLOW 15 -#define OM2P_GPIO_LED_LAN 16 -#define OM2P_GPIO_LED_WAN 17 -#define OM2P_GPIO_BTN_RESET 11 - -#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ -#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) - -#define OM2P_WAN_PHYMASK BIT(4) - -static struct flash_platform_data om2p_flash_data = { - .type = "s25sl12800", - .name = "ar7240-nor0", -}; - -static struct gpio_led om2p_leds_gpio[] __initdata = { - { - .name = "om2p:blue:power", - .gpio = OM2P_GPIO_LED_POWER, - .active_low = 1, - }, { - .name = "om2p:red:wifi", - .gpio = OM2P_GPIO_LED_RED, - .active_low = 1, - }, { - .name = "om2p:yellow:wifi", - .gpio = OM2P_GPIO_LED_YELLOW, - .active_low = 1, - }, { - .name = "om2p:green:wifi", - .gpio = OM2P_GPIO_LED_GREEN, - .active_low = 1, - }, { - .name = "om2p:blue:lan", - .gpio = OM2P_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "om2p:blue:wan", - .gpio = OM2P_GPIO_LED_WAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button om2p_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, - .gpio = OM2P_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init om2p_setup(void) -{ - u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); - u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); - u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(&om2p_flash_data); - - ath79_register_mdio(0, ~OM2P_WAN_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ap91_pci_init(ee, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), - om2p_leds_gpio); - - ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, - ARRAY_SIZE(om2p_gpio_keys), - om2p_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb42.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb42.c deleted file mode 100644 index 3a350e90a1..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb42.c +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Atheros PB42 board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) - -#define PB42_GPIO_BTN_SW4 8 -#define PB42_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb42_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB42_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static const char *pb42_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data pb42_flash_data = { - .part_probes = pb42_part_probes, -}; - -#define PB42_WAN_PHYMASK BIT(20) -#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) -#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) - -static void __init pb42_init(void) -{ - ath79_register_m25p80(&pb42_flash_data); - - ath79_register_mdio(0, ~PB42_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb42_gpio_keys), - pb42_gpio_keys); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb92.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb92.c deleted file mode 100644 index ff01f72869..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-pb92.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * Atheros PB92 board support - * - * Copyright (C) 2010 Felix Fietkau - * Copyright (C) 2008-2009 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -static struct mtd_partition pb92_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x2b0000, - }, { - .name = "uImage", - .offset = 0x300000, - .size = 0x0e0000, - }, { - .name = "ART", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data pb92_flash_data = { - .parts = pb92_partitions, - .nr_parts = ARRAY_SIZE(pb92_partitions), -}; - -#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ -#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) - -#define PB92_GPIO_BTN_SW4 8 -#define PB92_GPIO_BTN_SW5 3 - -static struct gpio_keys_button pb92_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW4, - .active_low = 1, - }, { - .desc = "sw5", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, - .gpio = PB92_GPIO_BTN_SW5, - .active_low = 1, - } -}; - -static void __init pb92_init(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); - - ath79_register_m25p80(&pb92_flash_data); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - - ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, - ARRAY_SIZE(pb92_gpio_keys), - pb92_gpio_keys); - - ath79_register_usb(); - - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb4xx.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb4xx.c deleted file mode 100644 index 24a4e7c3ca..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb4xx.c +++ /dev/null @@ -1,406 +0,0 @@ -/* - * MikroTik RouterBOARD 4xx series support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define RB4XX_GPIO_USER_LED 4 -#define RB4XX_GPIO_RESET_SWITCH 7 - -#define RB4XX_GPIO_CPLD_BASE 32 -#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) -#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) -#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) -#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) -#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) - -#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) - -static struct gpio_led rb4xx_leds_gpio[] __initdata = { - { - .name = "rb4xx:yellow:user", - .gpio = RB4XX_GPIO_USER_LED, - .active_low = 0, - }, { - .name = "rb4xx:green:led1", - .gpio = RB4XX_GPIO_CPLD_LED1, - .active_low = 1, - }, { - .name = "rb4xx:green:led2", - .gpio = RB4XX_GPIO_CPLD_LED2, - .active_low = 1, - }, { - .name = "rb4xx:green:led3", - .gpio = RB4XX_GPIO_CPLD_LED3, - .active_low = 1, - }, { - .name = "rb4xx:green:led4", - .gpio = RB4XX_GPIO_CPLD_LED4, - .active_low = 1, - }, { - .name = "rb4xx:green:led5", - .gpio = RB4XX_GPIO_CPLD_LED5, - .active_low = 0, - }, -}; - -static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { - { - .desc = "reset_switch", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, - .gpio = RB4XX_GPIO_RESET_SWITCH, - .active_low = 1, - } -}; - -static struct platform_device rb4xx_nand_device = { - .name = "rb4xx-nand", - .id = -1, -}; - -static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = { - { - .slot = 17, - .pin = 1, - .irq = ATH79_PCI_IRQ(2), - }, { - .slot = 18, - .pin = 1, - .irq = ATH79_PCI_IRQ(0), - }, { - .slot = 18, - .pin = 2, - .irq = ATH79_PCI_IRQ(1), - }, { - .slot = 19, - .pin = 1, - .irq = ATH79_PCI_IRQ(1), - }, { - .slot = 19, - .pin = 1, - .irq = ATH79_PCI_IRQ(2), - } -}; - -static struct mtd_partition rb4xx_partitions[] = { - { - .name = "routerboot", - .offset = 0, - .size = 0x0b000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "hard_config", - .offset = 0x0b000, - .size = 0x01000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "bios", - .offset = 0x0d000, - .size = 0x02000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "soft_config", - .offset = 0x0f000, - .size = 0x01000, - } -}; - -static struct flash_platform_data rb4xx_flash_data = { - .type = "pm25lv512", - .parts = rb4xx_partitions, - .nr_parts = ARRAY_SIZE(rb4xx_partitions), -}; - -static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { - .gpio_base = RB4XX_GPIO_CPLD_BASE, -}; - -static struct mmc_spi_platform_data rb4xx_mmc_data = { - .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, -}; - -static struct spi_board_info rb4xx_spi_info[] = { - { - .bus_num = 0, - .chip_select = 0, - .max_speed_hz = 25000000, - .modalias = "m25p80", - .platform_data = &rb4xx_flash_data, - }, { - .bus_num = 0, - .chip_select = 1, - .max_speed_hz = 25000000, - .modalias = "spi-rb4xx-cpld", - .platform_data = &rb4xx_cpld_data, - } -}; - -static struct spi_board_info rb4xx_microsd_info[] = { - { - .bus_num = 0, - .chip_select = 2, - .max_speed_hz = 25000000, - .modalias = "mmc_spi", - .platform_data = &rb4xx_mmc_data, - } -}; - - -static struct resource rb4xx_spi_resources[] = { - { - .start = AR71XX_SPI_BASE, - .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device rb4xx_spi_device = { - .name = "rb4xx-spi", - .id = -1, - .resource = rb4xx_spi_resources, - .num_resources = ARRAY_SIZE(rb4xx_spi_resources), -}; - -static void __init rb4xx_generic_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rb4xx_gpio_keys), - rb4xx_gpio_keys); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); -} - -static void __init rb411_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ath79_register_mdio(0, 0xfffffffc); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x00000003; - - ath79_register_eth(0); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", - rb411_setup); - -static void __init rb411u_setup(void) -{ - rb411_setup(); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", - rb411u_setup); - -#define RB433_LAN_PHYMASK BIT(0) -#define RB433_WAN_PHYMASK BIT(4) -#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) - -static void __init rb433_setup(void) -{ - rb4xx_generic_setup(); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); - - ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", - rb433_setup); - -static void __init rb433u_setup(void) -{ - rb433_setup(); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", - rb433u_setup); - -#define RB450_LAN_PHYMASK BIT(0) -#define RB450_WAN_PHYMASK BIT(4) -#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) - -static void __init rb450_generic_setup(int gige) -{ - rb4xx_generic_setup(); - ath79_register_mdio(0, ~RB450_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); - ath79_eth0_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); - ath79_eth1_data.phy_if_mode = (gige) ? - PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK; - - ath79_register_eth(1); - ath79_register_eth(0); -} - -static void __init rb450_setup(void) -{ - rb450_generic_setup(0); -} - -MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450", - rb450_setup); - -static void __init rb450g_setup(void) -{ - rb450_generic_setup(1); - spi_register_board_info(rb4xx_microsd_info, - ARRAY_SIZE(rb4xx_microsd_info)); -} - -MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", - rb450g_setup); - -static void __init rb493_setup(void) -{ - rb4xx_generic_setup(); - - ath79_register_mdio(0, 0x3fffff00); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x00000001; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", - rb493_setup); - -#define RB493G_GPIO_MDIO_MDC 7 -#define RB493G_GPIO_MDIO_DATA 8 - -#define RB493G_MDIO_PHYMASK BIT(0) - -static struct mdio_gpio_platform_data rb493g_mdio_data = { - .mdc = RB493G_GPIO_MDIO_MDC, - .mdio = RB493G_GPIO_MDIO_DATA, - - .phy_mask = ~RB493G_MDIO_PHYMASK, -}; - -static struct platform_device rb493g_mdio_device = { - .name = "mdio-gpio", - .id = -1, - .dev = { - .platform_data = &rb493g_mdio_data, - }, -}; - -static void __init rb493g_setup(void) -{ - ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | - AR71XX_GPIO_FUNC_SPI_CS2_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), - rb4xx_leds_gpio); - - spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); - platform_device_register(&rb4xx_spi_device); - platform_device_register(&rb4xx_nand_device); - - ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; - ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - platform_device_register(&rb493g_mdio_device); - - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_usb(); - - ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", - rb493g_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb750.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb750.c deleted file mode 100644 index 976617bb36..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rb750.c +++ /dev/null @@ -1,154 +0,0 @@ -/* - * MikroTik RouterBOARD 750 support - * - * Copyright (C) 2010-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "machtypes.h" - -static struct rb750_led_data rb750_leds[] = { - { - .name = "rb750:green:act", - .mask = RB750_LED_ACT, - .active_low = 1, - }, { - .name = "rb750:green:port1", - .mask = RB750_LED_PORT5, - .active_low = 1, - }, { - .name = "rb750:green:port2", - .mask = RB750_LED_PORT4, - .active_low = 1, - }, { - .name = "rb750:green:port3", - .mask = RB750_LED_PORT3, - .active_low = 1, - }, { - .name = "rb750:green:port4", - .mask = RB750_LED_PORT2, - .active_low = 1, - }, { - .name = "rb750:green:port5", - .mask = RB750_LED_PORT1, - .active_low = 1, - } -}; - -static struct rb750_led_platform_data rb750_leds_data = { - .num_leds = ARRAY_SIZE(rb750_leds), - .leds = rb750_leds, -}; - -static struct platform_device rb750_leds_device = { - .name = "leds-rb750", - .dev = { - .platform_data = &rb750_leds_data, - } -}; - -static struct platform_device rb750_nand_device = { - .name = "rb750-nand", - .id = -1, -}; - -int rb750_latch_change(u32 mask_clr, u32 mask_set) -{ - static DEFINE_SPINLOCK(lock); - static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; - static u32 latch_oe; - static u32 latch_clr; - unsigned long flags; - u32 t; - int ret = 0; - - spin_lock_irqsave(&lock, flags); - - if ((mask_clr & BIT(31)) != 0 && - (latch_set & RB750_LVC573_LE) == 0) { - goto unlock; - } - - latch_set = (latch_set | mask_set) & ~mask_clr; - latch_clr = (latch_clr | mask_clr) & ~mask_set; - - if (latch_oe == 0) - latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE); - - if (likely(latch_set & RB750_LVC573_LE)) { - void __iomem *base = ath79_gpio_base; - - t = __raw_readl(base + AR71XX_GPIO_REG_OE); - t |= mask_clr | latch_oe | mask_set; - - __raw_writel(t, base + AR71XX_GPIO_REG_OE); - __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); - __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); - } else if (mask_clr & RB750_LVC573_LE) { - void __iomem *base = ath79_gpio_base; - - latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); - __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); - /* flush write */ - __raw_readl(base + AR71XX_GPIO_REG_CLEAR); - } - - ret = 1; - -unlock: - spin_unlock_irqrestore(&lock, flags); - return ret; -} -EXPORT_SYMBOL_GPL(rb750_latch_change); - -void rb750_nand_pins_enable(void) -{ - ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, - AR724X_GPIO_FUNC_SPI_EN); -} -EXPORT_SYMBOL_GPL(rb750_nand_pins_enable); - -void rb750_nand_pins_disable(void) -{ - ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN, - AR724X_GPIO_FUNC_JTAG_DISABLE); -} -EXPORT_SYMBOL_GPL(rb750_nand_pins_disable); - -static void __init rb750_setup(void) -{ - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - platform_device_register(&rb750_leds_device); - platform_device_register(&rb750_nand_device); -} - -MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", - rb750_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rw2458n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rw2458n.c deleted file mode 100644 index 28d9de4f3e..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-rw2458n.c +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Redwave RW2458N support - * - * Copyright (C) 2011-2012 Cezary Jackiewicz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define RW2458N_GPIO_LED_D3 1 -#define RW2458N_GPIO_LED_D4 0 -#define RW2458N_GPIO_LED_D5 11 -#define RW2458N_GPIO_LED_D6 7 -#define RW2458N_GPIO_BTN_RESET 12 - -#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) - -static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, - .gpio = RW2458N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -#define RW2458N_WAN_PHYMASK BIT(4) - -static struct gpio_led rw2458n_leds_gpio[] __initdata = { - { - .name = "rw2458n:green:d3", - .gpio = RW2458N_GPIO_LED_D3, - .active_low = 1, - }, { - .name = "rw2458n:green:d4", - .gpio = RW2458N_GPIO_LED_D4, - .active_low = 1, - }, { - .name = "rw2458n:green:d5", - .gpio = RW2458N_GPIO_LED_D5, - .active_low = 1, - }, { - .name = "rw2458n:green:d6", - .gpio = RW2458N_GPIO_LED_D6, - .active_low = 1, - } -}; - -static const char *rw2458n_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data rw2458n_flash_data = { - .part_probes = rw2458n_part_probes, -}; - -static void __init rw2458n_setup(void) -{ - u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&rw2458n_flash_data); - - ath79_register_mdio(0, ~RW2458N_WAN_PHYMASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); - - ath79_register_eth(0); - ath79_register_eth(1); - - ap91_pci_init(ee, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), - rw2458n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(rw2458n_gpio_keys), - rw2458n_gpio_keys); - ath79_register_usb(); -} - -MIPS_MACHINE(ATH79_MACH_RW2458N, "RW2458N", "Redwave RW2458N", - rw2458n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-632brp.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-632brp.c deleted file mode 100644 index de2d2a5376..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-632brp.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * TrendNET TEW-632BRP board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" -#include "nvram.h" - -#define TEW_632BRP_GPIO_LED_STATUS 1 -#define TEW_632BRP_GPIO_LED_WPS 3 -#define TEW_632BRP_GPIO_LED_WLAN 6 -#define TEW_632BRP_GPIO_BTN_WPS 12 -#define TEW_632BRP_GPIO_BTN_RESET 21 - -#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) - -#define TEW_632BRP_CONFIG_ADDR 0x1f020000 -#define TEW_632BRP_CONFIG_SIZE 0x10000 - -static struct mtd_partition tew_632brp_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x020000, - .size = 0x010000, - }, { - .name = "kernel", - .offset = 0x030000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x110000, - .size = 0x2e0000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x030000, - .size = 0x3c0000, - } -}; - -static struct flash_platform_data tew_632brp_flash_data = { - .parts = tew_632brp_partitions, - .nr_parts = ARRAY_SIZE(tew_632brp_partitions), -}; - -static struct gpio_led tew_632brp_leds_gpio[] __initdata = { - { - .name = "tew-632brp:green:status", - .gpio = TEW_632BRP_GPIO_LED_STATUS, - .active_low = 1, - }, { - .name = "tew-632brp:blue:wps", - .gpio = TEW_632BRP_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "tew-632brp:green:wlan", - .gpio = TEW_632BRP_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW_632BRP_GPIO_BTN_WPS, - } -}; - -#define TEW_632BRP_LAN_PHYMASK BIT(0) -#define TEW_632BRP_WAN_PHYMASK BIT(4) -#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ - TEW_632BRP_WAN_PHYMASK)) - -static void __init tew_632brp_setup(void) -{ - const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - u8 *wlan_mac = NULL; - - if (ath79_nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, - "lan_mac=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - wlan_mac = mac; - } - - ath79_register_mdio(0, TEW_632BRP_MDIO_MASK); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&tew_632brp_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), - tew_632brp_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew_632brp_gpio_keys), - tew_632brp_gpio_keys); - - ath79_register_wmac(eeprom, wlan_mac); -} - -MIPS_MACHINE(ATH79_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", - tew_632brp_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-673gru.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-673gru.c deleted file mode 100644 index 71f2ec00e4..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tew-673gru.c +++ /dev/null @@ -1,217 +0,0 @@ -/* - * TRENDnet TEW-673GRU board support - * - * Copyright (C) 2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include -#include - -#include - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TEW673GRU_GPIO_LCD_SCK 0 -#define TEW673GRU_GPIO_LCD_MOSI 1 -#define TEW673GRU_GPIO_LCD_MISO 2 -#define TEW673GRU_GPIO_LCD_CS 6 - -#define TEW673GRU_GPIO_LED_WPS 9 - -#define TEW673GRU_GPIO_BTN_RESET 3 -#define TEW673GRU_GPIO_BTN_WPS 8 - -#define TEW673GRU_GPIO_RTL8366_SDA 5 -#define TEW673GRU_GPIO_RTL8366_SCK 7 - -#define TEW673GRU_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TEW673GRU_KEYS_DEBOUNCE_INTERVAL (3 * TEW673GRU_KEYS_POLL_INTERVAL) - -#define TEW673GRU_CAL_LOCATION_0 0x1f661000 -#define TEW673GRU_CAL_LOCATION_1 0x1f665000 - -#define TEW673GRU_MAC_LOCATION_0 0x1f66ffa0 -#define TEW673GRU_MAC_LOCATION_1 0x1f66ffb4 - -static struct mtd_partition tew673gru_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "config", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x610000, - }, { - .name = "caldata", - .offset = 0x660000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "unknown", - .offset = 0x670000, - .size = 0x190000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data tew673gru_flash_data = { - .parts = tew673gru_partitions, - .nr_parts = ARRAY_SIZE(tew673gru_partitions), -}; - -static struct gpio_led tew673gru_leds_gpio[] __initdata = { - { - .name = "trendnet:blue:wps", - .gpio = TEW673GRU_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tew673gru_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW673GRU_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, - .gpio = TEW673GRU_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static struct rtl8366_initval tew673gru_rtl8366s_initvals[] = { - { .reg = 0x06, .val = 0x0108 }, -}; - -static struct rtl8366_platform_data tew673gru_rtl8366s_data = { - .gpio_sda = TEW673GRU_GPIO_RTL8366_SDA, - .gpio_sck = TEW673GRU_GPIO_RTL8366_SCK, - .num_initvals = ARRAY_SIZE(tew673gru_rtl8366s_initvals), - .initvals = tew673gru_rtl8366s_initvals, -}; - -static struct platform_device tew673gru_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tew673gru_rtl8366s_data, - } -}; - -static struct spi_board_info tew673gru_spi_info[] = { - { - .bus_num = 1, - .chip_select = 0, - .max_speed_hz = 400000, - .modalias = "spidev", - .mode = SPI_MODE_2, - .controller_data = (void *) TEW673GRU_GPIO_LCD_CS, - }, -}; - -static struct spi_gpio_platform_data tew673gru_spi_data = { - .sck = TEW673GRU_GPIO_LCD_SCK, - .miso = TEW673GRU_GPIO_LCD_MISO, - .mosi = TEW673GRU_GPIO_LCD_MOSI, - .num_chipselect = 1, -}; - -static struct platform_device tew673gru_spi_device = { - .name = "spi_gpio", - .id = 1, - .dev = { - .platform_data = &tew673gru_spi_data, - }, -}; - -static void tew673gru_read_ascii_mac(u8 *dest, unsigned int src_addr) -{ - int ret; - u8 *src = (u8 *)KSEG1ADDR(src_addr); - - ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &dest[0], &dest[1], &dest[2], - &dest[3], &dest[4], &dest[5]); - - if (ret != ETH_ALEN) memset(dest, 0, ETH_ALEN); -} - -static void __init tew673gru_setup(void) -{ - u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; - - tew673gru_read_ascii_mac(mac1, TEW673GRU_MAC_LOCATION_0); - tew673gru_read_ascii_mac(mac2, TEW673GRU_MAC_LOCATION_1); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); - ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x11110000; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); - ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - ath79_eth1_pll_data.pll_1000 = 0x11110000; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&tew673gru_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio), - tew673gru_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tew673gru_gpio_keys), - tew673gru_gpio_keys); - - ath79_register_usb(); - - platform_device_register(&tew673gru_rtl8366s_device); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - ap94_pci_init((u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0), mac1, - (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_1), mac2); - - spi_register_board_info(tew673gru_spi_info, - ARRAY_SIZE(tew673gru_spi_info)); - platform_device_register(&tew673gru_spi_device); -} - -MIPS_MACHINE(ATH79_MACH_TEW_673GRU, "TEW-673GRU", "TRENDnet TEW-673GRU", - tew673gru_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr11u.c deleted file mode 100644 index 7846b4f18d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr11u.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * TP-LINK TL-MR11U board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_MR11U_GPIO_LED_3G 27 -#define TL_MR11U_GPIO_LED_WLAN 26 -#define TL_MR11U_GPIO_LED_LAN 17 - -#define TL_MR11U_GPIO_BTN_WPS 20 -#define TL_MR11U_GPIO_BTN_RESET 11 - -#define TL_MR11U_GPIO_USB_POWER 8 - -#define TL_MR11U_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR11U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR11U_KEYS_POLL_INTERVAL) - -static const char *tl_mr11u_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr11u_flash_data = { - .part_probes = tl_mr11u_part_probes, -}; - -static struct gpio_led tl_mr11u_leds_gpio[] __initdata = { - { - .name = "tp-link:green:3g", - .gpio = TL_MR11U_GPIO_LED_3G, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_MR11U_GPIO_LED_WLAN, - .active_low = 1, - }, - { - .name = "tp-link:green:lan", - .gpio = TL_MR11U_GPIO_LED_LAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_mr11u_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR11U_GPIO_BTN_WPS, - .active_low = 0, - }, - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR11U_GPIO_BTN_RESET, - .active_low = 0, - } -}; - -static void __init tl_mr11u_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_mr11u_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), - tl_mr11u_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr11u_gpio_keys), - tl_mr11u_gpio_keys); - - gpio_request(TL_MR11U_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_MR11U_GPIO_USB_POWER, 1); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR11U, "TL-MR11U", "TP-LINK TL-MR11U", - tl_mr11u_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3020.c deleted file mode 100644 index 9732d5cd56..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3020.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * TP-LINK TL-MR3020 board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_MR3020_GPIO_LED_3G 27 -#define TL_MR3020_GPIO_LED_WLAN 0 -#define TL_MR3020_GPIO_LED_LAN 17 -#define TL_MR3020_GPIO_LED_WPS 26 - -#define TL_MR3020_GPIO_BTN_WPS 11 -#define TL_MR3020_GPIO_BTN_SW1 18 -#define TL_MR3020_GPIO_BTN_SW2 20 - -#define TL_MR3020_GPIO_USB_POWER 8 - -#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) - -static const char *tl_mr3020_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3020_flash_data = { - .part_probes = tl_mr3020_part_probes, -}; - -static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { - { - .name = "tp-link:green:3g", - .gpio = TL_MR3020_GPIO_LED_3G, - .active_low = 1, - }, - { - .name = "tp-link:green:wlan", - .gpio = TL_MR3020_GPIO_LED_WLAN, - .active_low = 0, - }, - { - .name = "tp-link:green:lan", - .gpio = TL_MR3020_GPIO_LED_LAN, - .active_low = 1, - }, - { - .name = "tp-link:green:wps", - .gpio = TL_MR3020_GPIO_LED_WPS, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { - { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_WPS, - .active_low = 0, - }, - { - .desc = "sw1", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW1, - .active_low = 0, - }, - { - .desc = "sw2", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3020_GPIO_BTN_SW2, - .active_low = 0, - } -}; - -static void __init tl_mr3020_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_mr3020_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), - tl_mr3020_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3020_gpio_keys), - tl_mr3020_gpio_keys); - - gpio_request(TL_MR3020_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_MR3020_GPIO_USB_POWER, 1); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020", - tl_mr3020_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3x20.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3x20.c deleted file mode 100644 index 35515a9b4b..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-mr3x20.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * TP-LINK TL-MR3220/3420 board support - * - * Copyright (C) 2010-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TL_MR3X20_GPIO_LED_QSS 0 -#define TL_MR3X20_GPIO_LED_SYSTEM 1 -#define TL_MR3X20_GPIO_LED_3G 8 - -#define TL_MR3X20_GPIO_BTN_RESET 11 -#define TL_MR3X20_GPIO_BTN_QSS 12 - -#define TL_MR3X20_GPIO_USB_POWER 6 - -#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) - -static const char *tl_mr3x20_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_mr3x20_flash_data = { - .part_probes = tl_mr3x20_part_probes, -}; - -static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_MR3X20_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_MR3X20_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:3g", - .gpio = TL_MR3X20_GPIO_LED_3G, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_MR3X20_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_ap99_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_mr3x20_flash_data); - - ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_mr3x20_gpio_keys), - tl_mr3x20_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - /* WAN port */ - ath79_register_eth(0); - - ap91_pci_init(ee, mac); -} - -static void __init tl_mr3x20_usb_setup(void) -{ - /* enable power for the USB port */ - gpio_request(TL_MR3X20_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_MR3X20_GPIO_USB_POWER, 1); - - ath79_register_usb(); -} - -static void __init tl_mr3220_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 1); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", - tl_mr3220_setup); - -static void __init tl_mr3420_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 0); - tl_mr3x20_usb_setup(); -} - -MIPS_MACHINE(ATH79_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", - tl_mr3420_setup); - -static void __init tl_wr841n_v7_setup(void) -{ - tl_ap99_setup(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, - tl_mr3x20_leds_gpio); - ap9x_pci_setup_wmac_led_pin(0, 0); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V7, "TL-WR841N-v7", - "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd-v2.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd-v2.c deleted file mode 100644 index b4fb2a9f91..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd-v2.c +++ /dev/null @@ -1,104 +0,0 @@ -/* - * TP-LINK TL-WA901N/ND v2 board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * Copyright (C) 2010 Pieter Hollants - * Copyright (C) 2011 Jonathan Bennett - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WA901ND_V2_GPIO_LED_QSS 4 -#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 -#define TL_WA901ND_V2_GPIO_LED_WLAN 9 - -#define TL_WA901ND_V2_GPIO_BTN_RESET 3 -#define TL_WA901ND_V2_GPIO_BTN_QSS 7 - -#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_v2_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_v2_flash_data = { - .part_probes = tl_wa901nd_v2_part_probes, -}; - -static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_V2_GPIO_LED_QSS, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wa901nd_v2_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x00001000; - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | - AR71XX_RESET_GE0_PHY; - ath79_register_eth(0); - - ath79_register_m25p80(&tl_wa901nd_v2_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), - tl_wa901nd_v2_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), - tl_wa901nd_v2_gpio_keys); - - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", - "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd.c deleted file mode 100644 index 2f4e0c047d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wa901nd.c +++ /dev/null @@ -1,109 +0,0 @@ -/* - * TP-LINK TL-WA901N/ND v1 board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * Copyright (C) 2010 Pieter Hollants - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define TL_WA901ND_GPIO_LED_QSS 0 -#define TL_WA901ND_GPIO_LED_SYSTEM 1 -#define TL_WA901ND_GPIO_LED_LAN 13 - -#define TL_WA901ND_GPIO_BTN_RESET 11 -#define TL_WA901ND_GPIO_BTN_QSS 12 - -#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) - -static const char *tl_wa901nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wa901nd_flash_data = { - .part_probes = tl_wa901nd_part_probes, -}; - -static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan", - .gpio = TL_WA901ND_GPIO_LED_LAN, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WA901ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WA901ND_GPIO_LED_QSS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WA901ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wa901nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - /* - * ath79_eth0 would be the WAN port, but is not connected on - * the TL-WA901ND. ath79_eth1 connects to the internal switch chip, - * however we have a single LAN port only. - */ - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - - ath79_register_m25p80(&tl_wa901nd_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), - tl_wa901nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wa901nd_gpio_keys), - tl_wa901nd_gpio_keys); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", - tl_wa901nd_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr1043nd.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr1043nd.c deleted file mode 100644 index e789b402b8..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr1043nd.c +++ /dev/null @@ -1,128 +0,0 @@ -/* - * TP-LINK TL-WR1043N/ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR1043ND_GPIO_LED_USB 1 -#define TL_WR1043ND_GPIO_LED_SYSTEM 2 -#define TL_WR1043ND_GPIO_LED_QSS 5 -#define TL_WR1043ND_GPIO_LED_WLAN 9 - -#define TL_WR1043ND_GPIO_BTN_RESET 3 -#define TL_WR1043ND_GPIO_BTN_QSS 7 - -#define TL_WR1043ND_GPIO_RTL8366_SDA 18 -#define TL_WR1043ND_GPIO_RTL8366_SCK 19 - -#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr1043nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr1043nd_flash_data = { - .part_probes = tl_wr1043nd_part_probes, -}; - -static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR1043ND_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR1043ND_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR1043ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR1043ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { - .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, - .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, -}; - -static struct platform_device tl_wr1043nd_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr1043nd_rtl8366rb_data, - } -}; - -static void __init tl_wr1043nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x1a000000; - - ath79_register_eth(0); - - ath79_register_usb(); - - ath79_register_m25p80(&tl_wr1043nd_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), - tl_wr1043nd_leds_gpio); - - platform_device_register(&tl_wr1043nd_rtl8366rb_device); - - ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr1043nd_gpio_keys), - tl_wr1043nd_gpio_keys); - - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", - tl_wr1043nd_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr2543n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr2543n.c deleted file mode 100644 index bb00b72e7d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr2543n.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * TP-LINK TL-WR2543N/ND board support - * - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define TL_WR2543N_GPIO_LED_WPS 0 -#define TL_WR2543N_GPIO_LED_USB 8 - -#define TL_WR2543N_GPIO_BTN_RESET 11 -#define TL_WR2543N_GPIO_BTN_WPS 12 - -#define TL_WR2543N_GPIO_RTL8367_SDA 1 -#define TL_WR2543N_GPIO_RTL8367_SCK 6 - -#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) - -static const char *tl_wr2543n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr2543n_flash_data = { - .part_probes = tl_wr2543n_part_probes, - .max_read_len = 64, -}; - -static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { - { - .name = "tp-link:green:usb", - .gpio = TL_WR2543N_GPIO_LED_USB, - .active_low = 1, - }, { - .name = "tp-link:green:wps", - .gpio = TL_WR2543N_GPIO_LED_WPS, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR2543N_GPIO_BTN_WPS, - } -}; - -static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { - .mode = RTL8367_EXTIF_MODE_RGMII, - .txdelay = 1, - .rxdelay = 0, - .ability = { - .force_mode = 1, - .txpause = 1, - .rxpause = 1, - .link = 1, - .duplex = 1, - .speed = RTL8367_PORT_SPEED_1000, - }, -}; - -static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { - .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, - .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, - .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, -}; - -static struct platform_device tl_wr2543n_rtl8367_device = { - .name = RTL8367_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &tl_wr2543n_rtl8367_data, - } -}; - -static void __init tl_wr2543n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr2543n_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), - tl_wr2543n_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr2543n_gpio_keys), - tl_wr2543n_gpio_keys); - ath79_register_usb(); - ap91_pci_init(eeprom, mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); - ath79_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_pll_data.pll_1000 = 0x1a000000; - - ath79_register_eth(0); - - platform_device_register(&tl_wr2543n_rtl8367_device); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", - tl_wr2543n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr703n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr703n.c deleted file mode 100644 index badc35af15..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr703n.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * TP-LINK TL-WR703N board support - * - * Copyright (C) 2011 dongyuqi <729650915@qq.com> - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR703N_GPIO_LED_SYSTEM 27 -#define TL_WR703N_GPIO_BTN_RESET 11 - -#define TL_WR703N_GPIO_USB_POWER 8 - -#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) - -static const char *tl_wr703n_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr703n_flash_data = { - .part_probes = tl_wr703n_part_probes, -}; - -static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { - { - .name = "tp-link:blue:system", - .gpio = TL_WR703N_GPIO_LED_SYSTEM, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR703N_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static void __init tl_wr703n_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr703n_flash_data); - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), - tl_wr703n_leds_gpio); - ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr703n_gpio_keys), - tl_wr703n_gpio_keys); - - gpio_request(TL_WR703N_GPIO_USB_POWER, "USB power"); - gpio_direction_output(TL_WR703N_GPIO_USB_POWER, 1); - ath79_register_usb(); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", - tl_wr703n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd-v4.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd-v4.c deleted file mode 100644 index b8ccdfd60e..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd-v4.c +++ /dev/null @@ -1,149 +0,0 @@ -/* - * TP-LINK TL-WR741ND v4 board support - * - * Copyright (C) 2011-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR741NDV4_GPIO_BTN_RESET 11 -#define TL_WR741NDV4_GPIO_BTN_WPS 26 - -#define TL_WR741NDV4_GPIO_LED_WLAN 0 -#define TL_WR741NDV4_GPIO_LED_QSS 1 -#define TL_WR741NDV4_GPIO_LED_WAN 13 -#define TL_WR741NDV4_GPIO_LED_LAN1 14 -#define TL_WR741NDV4_GPIO_LED_LAN2 15 -#define TL_WR741NDV4_GPIO_LED_LAN3 16 -#define TL_WR741NDV4_GPIO_LED_LAN4 17 - -#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 - -#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) - -static const char *tl_wr741ndv4_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741ndv4_flash_data = { - .part_probes = tl_wr741ndv4_part_probes, -}; - -static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741NDV4_GPIO_LED_LAN1, - .active_low = 0, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741NDV4_GPIO_LED_LAN2, - .active_low = 0, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741NDV4_GPIO_LED_LAN3, - .active_low = 0, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741NDV4_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741NDV4_GPIO_LED_QSS, - .active_low = 0, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741NDV4_GPIO_LED_WAN, - .active_low = 0, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR741NDV4_GPIO_LED_WLAN, - .active_low = 0, - }, -}; - -static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "WPS", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741NDV4_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init tl_wr741ndv4_gmac_setup(void) -{ - void __iomem *base; - u32 t; - - base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); - - t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); - t |= (AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); - __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); - - iounmap(base); -} - -static void __init tl_wr741ndv4_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - tl_wr741ndv4_gmac_setup(); - - ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), - tl_wr741ndv4_leds_gpio); - - ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741ndv4_gpio_keys), - tl_wr741ndv4_gpio_keys); - - ath79_register_m25p80(&tl_wr741ndv4_flash_data); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - ath79_register_eth(1); - ath79_register_eth(0); - - ath79_register_wmac(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", - "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd.c deleted file mode 100644 index 5931654bbd..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr741nd.c +++ /dev/null @@ -1,130 +0,0 @@ -/* - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define TL_WR741ND_GPIO_LED_QSS 0 -#define TL_WR741ND_GPIO_LED_SYSTEM 1 -#define TL_WR741ND_GPIO_LED_LAN1 13 -#define TL_WR741ND_GPIO_LED_LAN2 14 -#define TL_WR741ND_GPIO_LED_LAN3 15 -#define TL_WR741ND_GPIO_LED_LAN4 16 -#define TL_WR741ND_GPIO_LED_WAN 17 - -#define TL_WR741ND_GPIO_BTN_RESET 11 -#define TL_WR741ND_GPIO_BTN_QSS 12 - -#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr741nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr741nd_flash_data = { - .part_probes = tl_wr741nd_part_probes, -}; - -static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:lan1", - .gpio = TL_WR741ND_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "tp-link:green:lan2", - .gpio = TL_WR741ND_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "tp-link:green:lan3", - .gpio = TL_WR741ND_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "tp-link:green:lan4", - .gpio = TL_WR741ND_GPIO_LED_LAN4, - .active_low = 1, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR741ND_GPIO_LED_QSS, - .active_low = 1, - }, { - .name = "tp-link:green:system", - .gpio = TL_WR741ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:green:wan", - .gpio = TL_WR741ND_GPIO_LED_WAN, - .active_low = 1, - }, -}; - -static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR741ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static void __init tl_wr741nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_m25p80(&tl_wr741nd_flash_data); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), - tl_wr741nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr741nd_gpio_keys), - tl_wr741nd_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - - /* WAN port */ - ath79_register_eth(0); - - ap9x_pci_setup_wmac_led_pin(0, 1); - ap91_pci_init(ee, mac); -} -MIPS_MACHINE(ATH79_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", - tl_wr741nd_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr841n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr841n.c deleted file mode 100644 index 11f853f057..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr841n.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * TP-LINK TL-WR841N/ND v1 board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include - -#include "dev-dsa.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" -#include "pci.h" - -#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 -#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 -#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 - -#define TL_WR841ND_V1_GPIO_BTN_RESET 3 -#define TL_WR841ND_V1_GPIO_BTN_QSS 7 - -#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ - (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) - -static struct mtd_partition tl_wr841n_v1_partitions[] = { - { - .name = "redboot", - .offset = 0, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x020000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x160000, - .size = 0x280000, - }, { - .name = "config", - .offset = 0x3e0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x020000, - .size = 0x3c0000, - } -}; - -static struct flash_platform_data tl_wr841n_v1_flash_data = { - .parts = tl_wr841n_v1_partitions, - .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), -}; - -static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, - } -}; - -static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr841n_v1_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr841n_v1_dsa_chip, -}; - -static void __init tl_wr841n_v1_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, - &tl_wr841n_v1_dsa_data); - - ath79_register_m25p80(&tl_wr841n_v1_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), - tl_wr841n_v1_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr841n_v1_gpio_keys), - tl_wr841n_v1_gpio_keys); - ath79_register_pci(); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", - tl_wr841n_v1_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr941nd.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr941nd.c deleted file mode 100644 index 1ddeec730e..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-tl-wr941nd.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * TP-LINK TL-WR941ND board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include - -#include "dev-dsa.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define TL_WR941ND_GPIO_LED_SYSTEM 2 -#define TL_WR941ND_GPIO_LED_QSS_RED 4 -#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 -#define TL_WR941ND_GPIO_LED_WLAN 9 - -#define TL_WR941ND_GPIO_BTN_RESET 3 -#define TL_WR941ND_GPIO_BTN_QSS 7 - -#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ -#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) - -static const char *tl_wr941nd_part_probes[] = { - "tp-link", - NULL, -}; - -static struct flash_platform_data tl_wr941nd_flash_data = { - .part_probes = tl_wr941nd_part_probes, -}; - -static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { - { - .name = "tp-link:green:system", - .gpio = TL_WR941ND_GPIO_LED_SYSTEM, - .active_low = 1, - }, { - .name = "tp-link:red:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_RED, - }, { - .name = "tp-link:green:qss", - .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, - }, { - .name = "tp-link:green:wlan", - .gpio = TL_WR941ND_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "qss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, - .gpio = TL_WR941ND_GPIO_BTN_QSS, - .active_low = 1, - } -}; - -static struct dsa_chip_data tl_wr941nd_dsa_chip = { - .port_names[0] = "wan", - .port_names[1] = "lan1", - .port_names[2] = "lan2", - .port_names[3] = "lan3", - .port_names[4] = "lan4", - .port_names[5] = "cpu", -}; - -static struct dsa_platform_data tl_wr941nd_dsa_data = { - .nr_chips = 1, - .chip = &tl_wr941nd_dsa_chip, -}; - -static void __init tl_wr941nd_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, - &tl_wr941nd_dsa_data); - - ath79_register_m25p80(&tl_wr941nd_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), - tl_wr941nd_leds_gpio); - - ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, - ARRAY_SIZE(tl_wr941nd_gpio_keys), - tl_wr941nd_gpio_keys); - ath79_register_wmac(eeprom, mac); -} - -MIPS_MACHINE(ATH79_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", - tl_wr941nd_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ubnt.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ubnt.c deleted file mode 100644 index e49ac23fd1..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-ubnt.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * Ubiquiti RouterStation support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * Copyright (C) 2008 Ubiquiti - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define UBNT_RS_GPIO_LED_RF 2 -#define UBNT_RS_GPIO_SW4 8 - -#define UBNT_LS_SR71_GPIO_LED_D25 0 -#define UBNT_LS_SR71_GPIO_LED_D26 1 -#define UBNT_LS_SR71_GPIO_LED_D24 2 -#define UBNT_LS_SR71_GPIO_LED_D23 4 -#define UBNT_LS_SR71_GPIO_LED_D22 5 -#define UBNT_LS_SR71_GPIO_LED_D27 6 -#define UBNT_LS_SR71_GPIO_LED_D28 7 - -#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ -#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) - -static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { - { - .name = "ubnt:green:rf", - .gpio = UBNT_RS_GPIO_LED_RF, - .active_low = 0, - } -}; - -static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { - { - .name = "ubnt:green:d22", - .gpio = UBNT_LS_SR71_GPIO_LED_D22, - .active_low = 0, - }, { - .name = "ubnt:green:d23", - .gpio = UBNT_LS_SR71_GPIO_LED_D23, - .active_low = 0, - }, { - .name = "ubnt:green:d24", - .gpio = UBNT_LS_SR71_GPIO_LED_D24, - .active_low = 0, - }, { - .name = "ubnt:red:d25", - .gpio = UBNT_LS_SR71_GPIO_LED_D25, - .active_low = 0, - }, { - .name = "ubnt:red:d26", - .gpio = UBNT_LS_SR71_GPIO_LED_D26, - .active_low = 0, - }, { - .name = "ubnt:green:d27", - .gpio = UBNT_LS_SR71_GPIO_LED_D27, - .active_low = 0, - }, { - .name = "ubnt:green:d28", - .gpio = UBNT_LS_SR71_GPIO_LED_D28, - .active_low = 0, - } -}; - -static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { - { - .desc = "sw4", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, - .gpio = UBNT_RS_GPIO_SW4, - .active_low = 1, - } -}; - -static const char *ubnt_part_probes[] = { - "RedBoot", - NULL, -}; - -static struct flash_platform_data ubnt_flash_data = { - .part_probes = ubnt_part_probes, -}; - -static void __init ubnt_generic_setup(void) -{ - ath79_register_m25p80(&ubnt_flash_data); - - ath79_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, - ARRAY_SIZE(ubnt_gpio_keys), - ubnt_gpio_keys); - ath79_register_pci(); -} - -#define UBNT_RS_WAN_PHYMASK BIT(20) -#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) - -static void __init ubnt_rs_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; - - /* - * There is Secondary MAC address duplicate problem with some - * UBNT HW batches. Do not increase Secondary MAC address by 1 - * but do workaround with 'Locally Administrated' bit. - */ - ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.speed = SPEED_100; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", - ubnt_rs_setup); - -#define UBNT_RSPRO_WAN_PHYMASK BIT(4) -#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) - -static void __init ubnt_rspro_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | - UBNT_RSPRO_LAN_PHYMASK)); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; - - /* - * There is Secondary MAC address duplicate problem with some - * UBNT HW batches. Do not increase Secondary MAC address by 1 - * but do workaround with 'Locally Administrated' bit. - */ - ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; - ath79_eth1_data.speed = SPEED_1000; - ath79_eth1_data.duplex = DUPLEX_FULL; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), - ubnt_rs_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", - ubnt_rspro_setup); - -static void __init ubnt_lsx_setup(void) -{ - ubnt_generic_setup(); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); - -#define UBNT_LSSR71_PHY_MASK BIT(1) - -static void __init ubnt_lssr71_setup(void) -{ - ubnt_generic_setup(); - - ath79_register_mdio(0, ~UBNT_LSSR71_PHY_MASK); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; - - ath79_register_eth(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), - ubnt_ls_sr71_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", - ubnt_lssr71_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-whr-hp-g300n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-whr-hp-g300n.c deleted file mode 100644 index 3e3924b877..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-whr-hp-g300n.c +++ /dev/null @@ -1,198 +0,0 @@ -/* - * Buffalo WHR-HP-G300N board support - * - * based on ... - * - * TP-LINK TL-WR741ND board support - * - * Copyright (C) 2009-2010 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include - -#include "common.h" -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WHRHPG300N_GPIO_LED_SECURITY 0 -#define WHRHPG300N_GPIO_LED_DIAG 1 -#define WHRHPG300N_GPIO_LED_ROUTER 6 - -#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 -#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 -#define WHRHPG300N_GPIO_BTN_RESET 11 -#define WHRHPG300N_GPIO_BTN_AOSS 12 -#define WHRHPG300N_GPIO_LED_LAN1 13 -#define WHRHPG300N_GPIO_LED_LAN2 14 -#define WHRHPG300N_GPIO_LED_LAN3 15 -#define WHRHPG300N_GPIO_LED_LAN4 16 -#define WHRHPG300N_GPIO_LED_WAN 17 - -#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) - -#define WHRHPG300N_MAC_OFFSET 0x20c - -static struct mtd_partition whrhpg300n_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x03e000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x03e000, - .size = 0x002000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x040000, - .size = 0x0e0000, - }, { - .name = "rootfs", - .offset = 0x120000, - .size = 0x2c0000, - }, { - .name = "user_property", - .offset = 0x3e0000, - .size = 0x010000, - }, { - .name = "ART", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x3a0000, - } -}; - -static struct flash_platform_data whrhpg300n_flash_data = { - .parts = whrhpg300n_partitions, - .nr_parts = ARRAY_SIZE(whrhpg300n_partitions), -}; - -static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WHRHPG300N_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WHRHPG300N_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WHRHPG300N_GPIO_LED_ROUTER, - .active_low = 1, - }, { - .name = "buffalo:green:wan", - .gpio = WHRHPG300N_GPIO_LED_WAN, - .active_low = 1, - }, { - .name = "buffalo:green:lan1", - .gpio = WHRHPG300N_GPIO_LED_LAN1, - .active_low = 1, - }, { - .name = "buffalo:green:lan2", - .gpio = WHRHPG300N_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "buffalo:green:lan3", - .gpio = WHRHPG300N_GPIO_LED_LAN3, - .active_low = 1, - }, { - .name = "buffalo:green:lan4", - .gpio = WHRHPG300N_GPIO_LED_LAN4, - .active_low = 1, - } -}; - -static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .gpio = WHRHPG300N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss/wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .gpio = WHRHPG300N_GPIO_BTN_AOSS, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_2, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_3, - .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, - .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, - .active_low = 1, - } -}; - -static void __init whrhpg300n_setup(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); - - ath79_register_m25p80(&whrhpg300n_flash_data); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), - whrhpg300n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(whrhpg300n_gpio_keys), - whrhpg300n_gpio_keys); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN ports */ - ath79_register_eth(1); - /* WAN port */ - ath79_register_eth(0); - - ap9x_pci_setup_wmac_led_pin(0, 1); - - ap91_pci_init(ee, mac); -} - -MIPS_MACHINE(ATH79_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", - whrhpg300n_setup); - -MIPS_MACHINE(ATH79_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", - whrhpg300n_setup); - -MIPS_MACHINE(ATH79_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", - whrhpg300n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wndr3700.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wndr3700.c deleted file mode 100644 index fccf1c6633..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wndr3700.c +++ /dev/null @@ -1,172 +0,0 @@ -/* - * Netgear WNDR3700 board support - * - * Copyright (C) 2009 Marco Porsch - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WNDR3700_GPIO_LED_WPS_ORANGE 0 -#define WNDR3700_GPIO_LED_POWER_ORANGE 1 -#define WNDR3700_GPIO_LED_POWER_GREEN 2 -#define WNDR3700_GPIO_LED_WPS_GREEN 4 -#define WNDR3700_GPIO_LED_WAN_GREEN 6 - -#define WNDR3700_GPIO_BTN_WPS 3 -#define WNDR3700_GPIO_BTN_RESET 8 -#define WNDR3700_GPIO_BTN_WIFI 11 - -#define WNDR3700_GPIO_RTL8366_SDA 5 -#define WNDR3700_GPIO_RTL8366_SCK 7 - -#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) - -#define WNDR3700_ETH0_MAC_OFFSET 0 -#define WNDR3700_ETH1_MAC_OFFSET 0x6 - -#define WNDR3700_WMAC0_MAC_OFFSET 0 -#define WNDR3700_WMAC1_MAC_OFFSET 0xc -#define WNDR3700_CALDATA0_OFFSET 0x1000 -#define WNDR3700_CALDATA1_OFFSET 0x5000 - -static struct gpio_led wndr3700_leds_gpio[] __initdata = { - { - .name = "wndr3700:green:power", - .gpio = WNDR3700_GPIO_LED_POWER_GREEN, - .active_low = 1, - }, { - .name = "wndr3700:orange:power", - .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, - .active_low = 1, - }, { - .name = "wndr3700:green:wps", - .gpio = WNDR3700_GPIO_LED_WPS_GREEN, - .active_low = 1, - }, { - .name = "wndr3700:orange:wps", - .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, - .active_low = 1, - }, { - .name = "wndr3700:green:wan", - .gpio = WNDR3700_GPIO_LED_WAN_GREEN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WPS, - .active_low = 1, - }, { - .desc = "wifi", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNDR3700_GPIO_BTN_WIFI, - .active_low = 1, - } -}; - -static struct rtl8366_platform_data wndr3700_rtl8366s_data = { - .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, - .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, -}; - -static struct platform_device wndr3700_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wndr3700_rtl8366s_data, - } -}; - -static void __init wndr3700_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - - /* - * The eth0 and wmac0 interfaces share the same MAC address which - * can lead to problems if operated unbridged. Set the locally - * administered bit on the eth0 MAC to make it unique. - */ - ath79_init_local_mac(ath79_eth0_data.mac_addr, - art + WNDR3700_ETH0_MAC_OFFSET); - ath79_eth0_pll_data.pll_1000 = 0x11110000; - ath79_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, - art + WNDR3700_ETH1_MAC_OFFSET, 0); - ath79_eth1_pll_data.pll_1000 = 0x11110000; - ath79_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - - ath79_register_m25p80(NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), - wndr3700_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wndr3700_gpio_keys), - wndr3700_gpio_keys); - - platform_device_register(&wndr3700_rtl8366s_device); - platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); - - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_led_pin(1, 5); - - /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ - ap9x_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); - - /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ - ap9x_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); - - ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, - art + WNDR3700_WMAC0_MAC_OFFSET, - art + WNDR3700_CALDATA1_OFFSET, - art + WNDR3700_WMAC1_MAC_OFFSET); -} - -MIPS_MACHINE(ATH79_MACH_WNDR3700, "WNDR3700", - "NETGEAR WNDR3700/WNDR3800/WNDRMAC", - wndr3700_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wnr2000.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wnr2000.c deleted file mode 100644 index bd86db386a..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wnr2000.c +++ /dev/null @@ -1,145 +0,0 @@ -/* - * NETGEAR WNR2000 board support - * - * Copyright (C) 2008-2009 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * Copyright (C) 2008-2009 Andy Boyett - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WNR2000_GPIO_LED_PWR_GREEN 14 -#define WNR2000_GPIO_LED_PWR_AMBER 7 -#define WNR2000_GPIO_LED_WPS 4 -#define WNR2000_GPIO_LED_WLAN 6 -#define WNR2000_GPIO_BTN_RESET 21 -#define WNR2000_GPIO_BTN_WPS 8 - -#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) - -static struct mtd_partition wnr2000_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x240000, - }, { - .name = "user-config", - .offset = 0x290000, - .size = 0x010000, - }, { - .name = "uImage", - .offset = 0x2a0000, - .size = 0x120000, - }, { - .name = "language_table", - .offset = 0x3c0000, - .size = 0x020000, - }, { - .name = "rootfs_checksum", - .offset = 0x3e0000, - .size = 0x010000, - }, { - .name = "art", - .offset = 0x3f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - } -}; - -static struct flash_platform_data wnr2000_flash_data = { - .parts = wnr2000_partitions, - .nr_parts = ARRAY_SIZE(wnr2000_partitions), -}; - -static struct gpio_led wnr2000_leds_gpio[] __initdata = { - { - .name = "wnr2000:green:power", - .gpio = WNR2000_GPIO_LED_PWR_GREEN, - .active_low = 1, - }, { - .name = "wnr2000:amber:power", - .gpio = WNR2000_GPIO_LED_PWR_AMBER, - .active_low = 1, - }, { - .name = "wnr2000:green:wps", - .gpio = WNR2000_GPIO_LED_WPS, - .active_low = 1, - }, { - .name = "wnr2000:blue:wlan", - .gpio = WNR2000_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_RESET, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, - .gpio = WNR2000_GPIO_BTN_WPS, - } -}; - -static void __init wnr2000_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.has_ar8216 = 1; - - ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wnr2000_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), - wnr2000_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wnr2000_gpio_keys), - wnr2000_gpio_keys); - - ath79_register_wmac(eeprom, NULL); -} - -MIPS_MACHINE(ATH79_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wp543.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wp543.c deleted file mode 100644 index 148cd7c7f2..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wp543.c +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Compex WP543/WPJ543 board support - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define WP543_GPIO_SW6 2 -#define WP543_GPIO_LED_1 3 -#define WP543_GPIO_LED_2 4 -#define WP543_GPIO_LED_WLAN 5 -#define WP543_GPIO_LED_CONN 6 -#define WP543_GPIO_LED_DIAG 7 -#define WP543_GPIO_SW4 8 - -#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) - -static struct gpio_led wp543_leds_gpio[] __initdata = { - { - .name = "wp543:green:led1", - .gpio = WP543_GPIO_LED_1, - .active_low = 1, - }, { - .name = "wp543:green:led2", - .gpio = WP543_GPIO_LED_2, - .active_low = 1, - }, { - .name = "wp543:green:wlan", - .gpio = WP543_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wp543:green:conn", - .gpio = WP543_GPIO_LED_CONN, - .active_low = 1, - }, { - .name = "wp543:green:diag", - .gpio = WP543_GPIO_LED_DIAG, - .active_low = 1, - } -}; - -static struct gpio_keys_button wp543_gpio_keys[] __initdata = { - { - .desc = "sw6", - .type = EV_KEY, - .code = BTN_0, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW6, - }, { - .desc = "sw4", - .type = EV_KEY, - .code = BTN_1, - .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, - .gpio = WP543_GPIO_SW4, - } -}; - -static const char *wp543_part_probes[] = { - "MyLoader", - NULL, -}; - -static struct flash_platform_data wp543_flash_data = { - .part_probes = wp543_part_probes, -}; - -static void __init wp543_setup(void) -{ - ath79_register_m25p80(&wp543_flash_data); - - ath79_register_mdio(0, 0xfffffff0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; - ath79_eth0_data.phy_mask = 0x0f; - ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | - AR71XX_RESET_GE0_PHY; - ath79_register_eth(0); - - ath79_register_usb(); - ath79_register_pci(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), - wp543_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wp543_gpio_keys), - wp543_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WP543, "WP543", "Compex WP543", wp543_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wpe72.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wpe72.c deleted file mode 100644 index 114d6233c3..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wpe72.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Compex WPE72 board support - * - * Copyright (C) 2012 Johnathan Boyce - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" -#include "pci.h" - -#define WPE72_GPIO_RESET 12 -#define WPE72_GPIO_LED_DIAG 13 -#define WPE72_GPIO_LED_1 14 -#define WPE72_GPIO_LED_2 15 -#define WPE72_GPIO_LED_3 16 -#define WPE72_GPIO_LED_4 17 - -#define WPE72_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WPE72_KEYS_DEBOUNCE_INTERVAL (3 * WPE72_KEYS_POLL_INTERVAL) - -static struct gpio_led wpe72_leds_gpio[] __initdata = { - { - .name = "wpe72:green:led1", - .gpio = WPE72_GPIO_LED_1, - .active_low = 1, - }, { - .name = "wpe72:green:led2", - .gpio = WPE72_GPIO_LED_2, - .active_low = 1, - }, { - .name = "wpe72:green:led3", - .gpio = WPE72_GPIO_LED_3, - .active_low = 1, - }, { - .name = "wpe72:green:led4", - .gpio = WPE72_GPIO_LED_4, - .active_low = 1, - }, { - .name = "wpe72:green:diag", - .gpio = WPE72_GPIO_LED_DIAG, - .active_low = 1, - } -}; - -static struct gpio_keys_button wpe72_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WPE72_KEYS_DEBOUNCE_INTERVAL, - .gpio = WPE72_GPIO_RESET, - } -}; - -static const char *wpe72_part_probes[] = { - "MyLoader", - NULL, -}; - -static struct flash_platform_data wpe72_flash_data = { - .part_probes = wpe72_part_probes, -}; - -static void __init wpe72_setup(void) -{ - ath79_register_m25p80(&wpe72_flash_data); - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - ath79_register_pci(); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wpe72_leds_gpio), - wpe72_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WPE72_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wpe72_gpio_keys), - wpe72_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WPE72, "WPE72", "Compex WPE72", wpe72_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt160nl.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt160nl.c deleted file mode 100644 index 21aefe00a0..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt160nl.c +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Linksys WRT160NL board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "nvram.h" -#include "machtypes.h" - -#define WRT160NL_GPIO_LED_POWER 14 -#define WRT160NL_GPIO_LED_WPS_AMBER 9 -#define WRT160NL_GPIO_LED_WPS_BLUE 8 -#define WRT160NL_GPIO_LED_WLAN 6 - -#define WRT160NL_GPIO_BTN_WPS 7 -#define WRT160NL_GPIO_BTN_RESET 21 - -#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) - -#define WRT160NL_NVRAM_ADDR 0x1f7e0000 -#define WRT160NL_NVRAM_SIZE 0x10000 - -static const char *wrt160nl_part_probes[] = { - "wrt160nl", - NULL, -}; - -static struct flash_platform_data wrt160nl_flash_data = { - .part_probes = wrt160nl_part_probes, -}; - -static struct gpio_led wrt160nl_leds_gpio[] __initdata = { - { - .name = "wrt160nl:blue:power", - .gpio = WRT160NL_GPIO_LED_POWER, - .active_low = 1, - .default_trigger = "default-on", - }, { - .name = "wrt160nl:amber:wps", - .gpio = WRT160NL_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wps", - .gpio = WRT160NL_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt160nl:blue:wlan", - .gpio = WRT160NL_GPIO_LED_WLAN, - .active_low = 1, - } -}; - -static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wps", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, - .gpio = WRT160NL_GPIO_BTN_WPS, - .active_low = 1, - } -}; - -static void __init wrt160nl_setup(void) -{ - const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 mac[6]; - - if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "lan_hwaddr=", mac) == 0) { - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - } - - ath79_register_mdio(0, 0x0); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.phy_mask = 0x01; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wrt160nl_flash_data); - - ath79_register_usb(); - - if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, - "wl0_hwaddr=", mac) == 0) - ath79_register_wmac(eeprom, mac); - else - ath79_register_wmac(eeprom, NULL); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), - wrt160nl_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt160nl_gpio_keys), - wrt160nl_gpio_keys); -} - -MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", - wrt160nl_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt400n.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt400n.c deleted file mode 100644 index 6c4c1cb0d6..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wrt400n.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Linksys WRT400N board support - * - * Copyright (C) 2009-2012 Gabor Juhos - * Copyright (C) 2009 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "machtypes.h" - -#define WRT400N_GPIO_LED_POWER 1 -#define WRT400N_GPIO_LED_WPS_BLUE 4 -#define WRT400N_GPIO_LED_WPS_AMBER 5 -#define WRT400N_GPIO_LED_WLAN 6 - -#define WRT400N_GPIO_BTN_RESET 8 -#define WRT400N_GPIO_BTN_WLSEC 3 - -#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) - -#define WRT400N_MAC_ADDR_OFFSET 0x120c -#define WRT400N_CALDATA0_OFFSET 0x1000 -#define WRT400N_CALDATA1_OFFSET 0x5000 - -static struct mtd_partition wrt400n_partitions[] = { - { - .name = "uboot", - .offset = 0, - .size = 0x030000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "env", - .offset = 0x030000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "linux", - .offset = 0x040000, - .size = 0x140000, - }, { - .name = "rootfs", - .offset = 0x180000, - .size = 0x630000, - }, { - .name = "nvram", - .offset = 0x7b0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "factory", - .offset = 0x7c0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "language", - .offset = 0x7d0000, - .size = 0x020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "caldata", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x040000, - .size = 0x770000, - } -}; - -static struct flash_platform_data wrt400n_flash_data = { - .parts = wrt400n_partitions, - .nr_parts = ARRAY_SIZE(wrt400n_partitions), -}; - -static struct gpio_led wrt400n_leds_gpio[] __initdata = { - { - .name = "wrt400n:blue:wps", - .gpio = WRT400N_GPIO_LED_WPS_BLUE, - .active_low = 1, - }, { - .name = "wrt400n:amber:wps", - .gpio = WRT400N_GPIO_LED_WPS_AMBER, - .active_low = 1, - }, { - .name = "wrt400n:blue:wlan", - .gpio = WRT400N_GPIO_LED_WLAN, - .active_low = 1, - }, { - .name = "wrt400n:blue:power", - .gpio = WRT400N_GPIO_LED_POWER, - .active_low = 0, - .default_trigger = "default-on", - } -}; - -static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "wlsec", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, - .gpio = WRT400N_GPIO_BTN_WLSEC, - .active_low = 1, - } -}; - -static void __init wrt400n_setup(void) -{ - u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); - u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; - - ath79_register_mdio(0, 0x0); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth0_data.speed = SPEED_100; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_m25p80(&wrt400n_flash_data); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), - wrt400n_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wrt400n_gpio_keys), - wrt400n_gpio_keys); - - ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, - art + WRT400N_CALDATA1_OFFSET, NULL); -} - -MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-ag300h.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-ag300h.c deleted file mode 100644 index 1223e842d8..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-ag300h.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Buffalo WZR-HP-AG300H board support - * - * Copyright (C) 2011 Felix Fietkau - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPAG300H_MAC_OFFSET 0x20c -#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpag300h_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - } -}; - -static struct flash_platform_data wzrhpag300h_flash_data = { - .parts = wzrhpag300h_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), -}; - -static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 1, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 3, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 5, - .active_low = 1, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "router_off", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - } -}; - -static void __init wzrhpag300h_setup(void) -{ - u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); - u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); - u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; - u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1); - - ath79_register_mdio(0, ~(BIT(0) | BIT(4))); - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = BIT(4); - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - gpio_request(2, "usb"); - gpio_direction_output(2, 1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), - wzrhpag300h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpag300h_gpio_keys), - wzrhpag300h_gpio_keys); - - ath79_register_m25p80_multi(&wzrhpag300h_flash_data); - - ap94_pci_init(eeprom1, mac1, eeprom2, mac2); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", - "Buffalo WZR-HP-AG300H", wzrhpag300h_setup); - diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh.c deleted file mode 100644 index 94f352aced..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh.c +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH board support - * - * Copyright (C) 2010-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "dev-wmac.h" -#include "machtypes.h" - -#define WZRHPG300NH_GPIO_LED_USB 0 -#define WZRHPG300NH_GPIO_LED_DIAG 1 -#define WZRHPG300NH_GPIO_LED_WIRELESS 6 -#define WZRHPG300NH_GPIO_LED_SECURITY 17 -#define WZRHPG300NH_GPIO_LED_ROUTER 18 - -#define WZRHPG300NH_GPIO_RTL8366_SDA 19 -#define WZRHPG300NH_GPIO_RTL8366_SCK 20 - -#define WZRHPG300NH_GPIO_74HC153_S0 9 -#define WZRHPG300NH_GPIO_74HC153_S1 11 -#define WZRHPG300NH_GPIO_74HC153_1Y 12 -#define WZRHPG300NH_GPIO_74HC153_2Y 14 - -#define WZRHPG300NH_GPIO_EXP_BASE 32 -#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) -#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) -#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) -#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) -#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) -#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) -#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) - -#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) - -#define WZRHPG300NH_MAC_OFFSET 0x20c - -static struct mtd_partition wzrhpg300nh_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e60000, - }, { - .name = "user_property", - .offset = 0x1fc0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x1fe0000, - .size = 0x0020000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f60000, - } -}; - -static struct physmap_flash_data wzrhpg300nh_flash_data = { - .width = 2, - .parts = wzrhpg300nh_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), -}; - -#define WZRHPG300NH_FLASH_BASE 0x1e000000 -#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) - -static struct resource wzrhpg300nh_flash_resources[] = { - [0] = { - .start = WZRHPG300NH_FLASH_BASE, - .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device wzrhpg300nh_flash_device = { - .name = "physmap-flash", - .id = -1, - .resource = wzrhpg300nh_flash_resources, - .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), - .dev = { - .platform_data = &wzrhpg300nh_flash_data, - } -}; - -static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { - { - .name = "buffalo:orange:security", - .gpio = WZRHPG300NH_GPIO_LED_SECURITY, - .active_low = 1, - }, { - .name = "buffalo:green:wireless", - .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, - .active_low = 1, - }, { - .name = "buffalo:green:router", - .gpio = WZRHPG300NH_GPIO_LED_ROUTER, - .active_low = 1, - }, { - .name = "buffalo:red:diag", - .gpio = WZRHPG300NH_GPIO_LED_DIAG, - .active_low = 1, - }, { - .name = "buffalo:blue:usb", - .gpio = WZRHPG300NH_GPIO_LED_USB, - .active_low = 1, - } -}; - -static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_RESET, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_AOSS, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_USB, - .active_low = 1, - }, { - .desc = "qos_on", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, - .active_low = 0, - }, { - .desc = "qos_off", - .type = EV_KEY, - .code = BTN_4, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, - .active_low = 0, - }, { - .desc = "router_auto", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, - .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, - .active_low = 0, - } -}; - -static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { - .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, - .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, - .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, - .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, - .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, -}; - -static struct platform_device wzrhpg300nh_74hc153_device = { - .name = NXP_74HC153_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_74hc153_data, - } -}; - -static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { - .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, - .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, -}; - -static struct platform_device wzrhpg300nh_rtl8366s_device = { - .name = RTL8366S_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static struct platform_device wzrhpg300nh_rtl8366rb_device = { - .name = RTL8366RB_DRIVER_NAME, - .id = -1, - .dev = { - .platform_data = &wzrhpg300nh_rtl8366_data, - } -}; - -static void __init wzrhpg300nh_setup(void) -{ - u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); - u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; - bool hasrtl8366rb = false; - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) - hasrtl8366rb = true; - - if (hasrtl8366rb) { - ath79_eth0_pll_data.pll_1000 = 0x1f000000; - ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - ath79_eth1_pll_data.pll_1000 = 0x100; - ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; - } else { - ath79_eth0_pll_data.pll_1000 = 0x1e000100; - ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - ath79_eth1_pll_data.pll_1000 = 0x1e000100; - ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; - } - - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - - ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth1_data.phy_mask = 0x10; - - ath79_register_eth(0); - ath79_register_eth(1); - - ath79_register_usb(); - ath79_register_wmac(eeprom, NULL); - - platform_device_register(&wzrhpg300nh_74hc153_device); - platform_device_register(&wzrhpg300nh_flash_device); - - if (hasrtl8366rb) - platform_device_register(&wzrhpg300nh_rtl8366rb_device); - else - platform_device_register(&wzrhpg300nh_rtl8366s_device); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), - wzrhpg300nh_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh_gpio_keys), - wzrhpg300nh_gpio_keys); - -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", - "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh2.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh2.c deleted file mode 100644 index 6ccafcb49d..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g300nh2.c +++ /dev/null @@ -1,177 +0,0 @@ -/* - * Buffalo WZR-HP-G300NH2 board support - * - * Copyright (C) 2011 Felix Fietkau - * Copyright (C) 2011 Mark Deneen - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include - -#include "dev-ap9x-pci.h" -#include "dev-eth.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-m25p80.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPG300NH2_MAC_OFFSET 0x20c -#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "art", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "kernel", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e90000, - }, { - .name = "user_property", - .offset = 0x1ff0000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f90000, - } -}; - -static struct flash_platform_data wzrhpg300nh2_flash_data = { - .parts = wzrhpg300nh2_flash_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), -}; - -static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 16, - .active_low = 1, - }, -}; - -static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:usb", - .gpio = 4, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 6, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 7, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_on", - .gpio = 8, - .active_low = 1, - }, - { - .name = "buffalo:blue:movie_engine_off", - .gpio = 9, - .active_low = 1, - }, -}; - -/* The AOSS button is wmac gpio 12 */ -static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 1, - }, { - .desc = "qos", - .type = EV_KEY, - .code = BTN_3, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 11, - .active_low = 0, - }, { - .desc = "router_on", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 0, - }, -}; - -static void __init wzrhpg300nh2_setup(void) -{ - - u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; - /* There is an eth1 but it is not connected to the switch */ - - ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - ath79_register_mdio(0, ~(BIT(0))); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_eth(0); - ath79_register_usb(); - /* gpio13 is usb power. Turn it on. */ - gpio_request(13, "usb"); - gpio_direction_output(13, 1); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), - wzrhpg300nh2_leds_gpio); - ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg300nh2_gpio_keys), - wzrhpg300nh2_gpio_keys); - ap9x_pci_setup_wmac_led_pin(0, 5); - ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); - - ap91_pci_init(eeprom, mac0); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", - "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g450h.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g450h.c deleted file mode 100644 index f606145573..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-wzr-hp-g450h.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * Buffalo WZR-HP-G450G board support - * - * Copyright (C) 2011 Felix Fietkau - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include - -#include - -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "dev-usb.h" -#include "machtypes.h" - -#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) - -static struct mtd_partition wzrhpg450h_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x0040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x0040000, - .size = 0x0010000, - }, { - .name = "ART", - .offset = 0x0050000, - .size = 0x0010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "uImage", - .offset = 0x0060000, - .size = 0x0100000, - }, { - .name = "rootfs", - .offset = 0x0160000, - .size = 0x1e80000, - }, { - .name = "user_property", - .offset = 0x1fe0000, - .size = 0x0020000, - }, { - .name = "firmware", - .offset = 0x0060000, - .size = 0x1f80000, - } -}; - -static struct flash_platform_data wzrhpg450h_flash_data = { - .parts = wzrhpg450h_partitions, - .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), -}; - -static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { - { - .name = "buffalo:red:diag", - .gpio = 14, - .active_low = 1, - }, - { - .name = "buffalo:orange:security", - .gpio = 13, - .active_low = 1, - }, -}; - - -static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { - { - .name = "buffalo:blue:movie_engine", - .gpio = 13, - .active_low = 1, - }, - { - .name = "buffalo:green:router", - .gpio = 14, - .active_low = 1, - }, -}; - -static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 6, - .active_low = 1, - }, { - .desc = "usb", - .type = EV_KEY, - .code = BTN_2, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 1, - .active_low = 1, - }, { - .desc = "aoss", - .type = EV_KEY, - .code = KEY_WPS_BUTTON, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 8, - .active_low = 1, - }, { - .desc = "movie_engine", - .type = EV_KEY, - .code = BTN_6, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 7, - .active_low = 0, - }, { - .desc = "router_off", - .type = EV_KEY, - .code = BTN_5, - .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, - .gpio = 12, - .active_low = 0, - } -}; - - -static void __init wzrhpg450h_init(void) -{ - u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); - u8 *mac = (u8 *) ee + 2; - - ath79_register_m25p80_multi(&wzrhpg450h_flash_data); - - ath79_register_mdio(0, ~BIT(0)); - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; - ath79_eth0_data.speed = SPEED_1000; - ath79_eth0_data.duplex = DUPLEX_FULL; - ath79_eth0_data.phy_mask = BIT(0); - - ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), - wzrhpg450h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(wzrhpg450h_gpio_keys), - wzrhpg450h_gpio_keys); - - ath79_register_eth(0); - - ath79_register_usb(); - gpio_request(16, "usb"); - gpio_direction_output(16, 1); - - ap91_pci_init(ee, NULL); - ap9x_pci_setup_wmac_led_pin(0, 15); - ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, - ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); -} - -MIPS_MACHINE(ATH79_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", - wzrhpg450h_init); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-zcn-1523h.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-zcn-1523h.c deleted file mode 100644 index af6db6ad60..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/mach-zcn-1523h.c +++ /dev/null @@ -1,206 +0,0 @@ -/* - * Zcomax ZCN-1523H-2-8/5-16 board support - * - * Copyright (C) 2010-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include - -#include "common.h" -#include "dev-eth.h" -#include "dev-m25p80.h" -#include "dev-ap9x-pci.h" -#include "dev-gpio-buttons.h" -#include "dev-leds-gpio.h" -#include "machtypes.h" - -#define ZCN_1523H_GPIO_BTN_RESET 0 -#define ZCN_1523H_GPIO_LED_INIT 11 -#define ZCN_1523H_GPIO_LED_LAN1 17 - -#define ZCN_1523H_2_GPIO_LED_WEAK 13 -#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 -#define ZCN_1523H_2_GPIO_LED_STRONG 15 - -#define ZCN_1523H_5_GPIO_LED_UNKNOWN 1 -#define ZCN_1523H_5_GPIO_LED_LAN2 13 -#define ZCN_1523H_5_GPIO_LED_WEAK 14 -#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 -#define ZCN_1523H_5_GPIO_LED_STRONG 16 - -#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ -#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) - -static struct mtd_partition zcn_1523h_partitions[] = { - { - .name = "u-boot", - .offset = 0, - .size = 0x040000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "u-boot-env", - .offset = 0x040000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "rootfs", - .offset = 0x050000, - .size = 0x610000, - }, { - .name = "kernel", - .offset = 0x660000, - .size = 0x170000, - }, { - .name = "configure", - .offset = 0x7d0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "mfg", - .offset = 0x7e0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "eeprom", - .offset = 0x7f0000, - .size = 0x010000, - .mask_flags = MTD_WRITEABLE, - }, { - .name = "firmware", - .offset = 0x050000, - .size = 0x780000, - } -}; - -static struct flash_platform_data zcn_1523h_flash_data = { - .parts = zcn_1523h_partitions, - .nr_parts = ARRAY_SIZE(zcn_1523h_partitions), -}; - -static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { - { - .desc = "reset", - .type = EV_KEY, - .code = KEY_RESTART, - .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, - .gpio = ZCN_1523H_GPIO_BTN_RESET, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:amber:init", - .gpio = ZCN_1523H_GPIO_LED_INIT, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan1", - .gpio = ZCN_1523H_GPIO_LED_LAN1, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_2_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_2_GPIO_LED_STRONG, - .active_low = 1, - } -}; - -static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { - { - .name = "zcn-1523h:red:weak", - .gpio = ZCN_1523H_5_GPIO_LED_WEAK, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:medium", - .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, - .active_low = 1, - }, { - .name = "zcn-1523h:green:strong", - .gpio = ZCN_1523H_5_GPIO_LED_STRONG, - .active_low = 1, - }, { - .name = "zcn-1523h:green:lan2", - .gpio = ZCN_1523H_5_GPIO_LED_LAN2, - .active_low = 1, - }, { - .name = "zcn-1523h:amber:unknown", - .gpio = ZCN_1523H_5_GPIO_LED_UNKNOWN, - } -}; - -static void __init zcn_1523h_generic_setup(void) -{ - u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); - u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); - - ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | - AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); - - ath79_register_m25p80(&zcn_1523h_flash_data); - - ath79_register_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), - zcn_1523h_leds_gpio); - - ath79_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, - ARRAY_SIZE(zcn_1523h_gpio_keys), - zcn_1523h_gpio_keys); - - ap91_pci_init(ee, mac); - - ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); - ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); - - ath79_register_mdio(0, 0x0); - - /* LAN1 port */ - ath79_register_eth(0); -} - -static void __init zcn_1523h_2_setup(void) -{ - zcn_1523h_generic_setup(); - ap9x_pci_setup_wmac_gpio(0, BIT(9), 0); - - ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), - zcn_1523h_2_leds_gpio); -} - -MIPS_MACHINE(ATH79_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", - zcn_1523h_2_setup); - -static void __init zcn_1523h_5_setup(void) -{ - zcn_1523h_generic_setup(); - ap9x_pci_setup_wmac_gpio(0, BIT(8), 0); - - ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), - zcn_1523h_5_leds_gpio); - - /* LAN2 port */ - ath79_register_eth(1); -} - -MIPS_MACHINE(ATH79_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", - zcn_1523h_5_setup); diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.c deleted file mode 100644 index 43911b8ac1..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include -#include -#include -#include - -#include "nvram.h" - -char *ath79_nvram_find_var(const char *name, const char *buf, unsigned buf_len) -{ - unsigned len = strlen(name); - char *cur, *last; - - if (buf_len == 0 || len == 0) - return NULL; - - if (buf_len < len) - return NULL; - - if (len == 1) - return memchr(buf, (int) *name, buf_len); - - last = (char *) buf + buf_len - len; - for (cur = (char *) buf; cur <= last; cur++) - if (cur[0] == name[0] && memcmp(cur, name, len) == 0) - return cur + len; - - return NULL; -} - -int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac) -{ - char *buf; - char *mac_str; - int ret; - int t; - - buf = vmalloc(nvram_len); - if (!buf) - return -ENOMEM; - - memcpy(buf, nvram, nvram_len); - buf[nvram_len - 1] = '\0'; - - mac_str = ath79_nvram_find_var(name, buf, nvram_len); - if (!mac_str) { - ret = -EINVAL; - goto free; - } - - t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", - &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); - - if (t != 6) { - ret = -EINVAL; - goto free; - } - - ret = 0; - -free: - vfree(buf); - return ret; -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.h deleted file mode 100644 index 75151d4a3c..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/nvram.h +++ /dev/null @@ -1,19 +0,0 @@ -/* - * Atheros AR71xx minimal nvram support - * - * Copyright (C) 2009 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef _ATH79_NVRAM_H -#define _ATH79_NVRAM_H - -char *ath79_nvram_find_var(const char *name, const char *buf, - unsigned buf_len); -int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, - const char *name, char *mac); - -#endif /* _ATH79_NVRAM_H */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.c b/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.c deleted file mode 100644 index c395fb434f..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Atheros AP94 reference board PCI initialization - * - * Copyright (C) 2009-2010 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include -#include - -#include -#include -#include - -struct ath9k_fixup { - u16 *cal_data; - unsigned slot; -}; - -static int ath9k_num_fixups; -static struct ath9k_fixup ath9k_fixups[2]; - -static void ath9k_pci_fixup(struct pci_dev *dev) -{ - void __iomem *mem; - u16 *cal_data = NULL; - u16 cmd; - u32 bar0; - u32 val; - unsigned i; - - for (i = 0; i < ath9k_num_fixups; i++) { - if (ath9k_fixups[i].cal_data == NULL) - continue; - - if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) - continue; - - cal_data = ath9k_fixups[i].cal_data; - break; - } - - if (cal_data == NULL) - return; - - if (*cal_data != 0xa55a) { - pr_err("pci %s: invalid calibration data\n", pci_name(dev)); - return; - } - - pr_info("pci %s: fixup device configuration\n", pci_name(dev)); - - mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); - if (!mem) { - pr_err("pci %s: ioremap error\n", pci_name(dev)); - return; - } - - pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); - - switch (ath79_soc) { - case ATH79_SOC_AR7161: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, - AR71XX_PCI_MEM_BASE); - break; - case ATH79_SOC_AR7240: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); - break; - - case ATH79_SOC_AR7241: - case ATH79_SOC_AR7242: - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); - break; - - default: - BUG(); - } - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; - pci_write_config_word(dev, PCI_COMMAND, cmd); - - /* set pointer to first reg address */ - cal_data += 3; - while (*cal_data != 0xffff) { - u32 reg; - reg = *cal_data++; - val = *cal_data++; - val |= (*cal_data++) << 16; - - __raw_writel(val, mem + reg); - udelay(100); - } - - pci_read_config_dword(dev, PCI_VENDOR_ID, &val); - dev->vendor = val & 0xffff; - dev->device = (val >> 16) & 0xffff; - - pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); - dev->revision = val & 0xff; - dev->class = val >> 8; /* upper 3 bytes */ - - pci_read_config_word(dev, PCI_COMMAND, &cmd); - cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); - pci_write_config_word(dev, PCI_COMMAND, cmd); - - pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); - - iounmap(mem); -} -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); - -void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) -{ - if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) - return; - - ath9k_fixups[ath9k_num_fixups].slot = slot; - ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; - ath9k_num_fixups++; -} diff --git a/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.h b/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.h deleted file mode 100644 index 5794941f08..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/ath79/pci-ath9k-fixup.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef _PCI_ATH9K_FIXUP -#define _PCI_ATH9K_FIXUP - -void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; - -#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/ag71xx_platform.h deleted file mode 100644 index 43e67557ae..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/ag71xx_platform.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Atheros AR71xx SoC specific platform data definitions - * - * Copyright (C) 2008-2012 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __ASM_MACH_ATH79_PLATFORM_H -#define __ASM_MACH_ATH79_PLATFORM_H - -#include -#include -#include -#include - -struct ag71xx_switch_platform_data { - u8 phy4_mii_en:1; -}; - -struct ag71xx_platform_data { - phy_interface_t phy_if_mode; - u32 phy_mask; - int speed; - int duplex; - u32 reset_bit; - u8 mac_addr[ETH_ALEN]; - struct device *mii_bus_dev; - - u8 has_gbit:1; - u8 is_ar91xx:1; - u8 is_ar7240:1; - u8 is_ar724x:1; - u8 has_ar8216:1; - - struct ag71xx_switch_platform_data *switch_data; - - void (*ddr_flush)(void); - void (*set_speed)(int speed); - - u32 fifo_cfg1; - u32 fifo_cfg2; - u32 fifo_cfg3; -}; - -struct ag71xx_mdio_platform_data { - u32 phy_mask; - int is_ar7240; -}; - -#endif /* __ASM_MACH_ATH79_PLATFORM_H */ diff --git a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/mach-rb750.h b/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/mach-rb750.h deleted file mode 100644 index 3e6fc50c55..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/mach-rb750.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * MikroTik RouterBOARD 750 definitions - * - * Copyright (C) 2010-2012 Gabor Juhos - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ -#ifndef _MACH_RB750_H -#define _MACH_RB750_H - -#include - -#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ -#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ -#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ -#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ -#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ -#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ -#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ -#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ -#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ -#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ -#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ -#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ -#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ -#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ -#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ - -#define RB750_GPIO_BTN_RESET 1 -#define RB750_GPIO_SPI_CS0 2 -#define RB750_GPIO_LED_ACT 12 -#define RB750_GPIO_LED_PORT1 13 -#define RB750_GPIO_LED_PORT2 14 -#define RB750_GPIO_LED_PORT3 15 -#define RB750_GPIO_LED_PORT4 16 -#define RB750_GPIO_LED_PORT5 17 - -#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) -#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) -#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) -#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) -#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) -#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) - -#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) - -#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ - RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) - -struct rb750_led_data { - char *name; - char *default_trigger; - u32 mask; - int active_low; -}; - -struct rb750_led_platform_data { - int num_leds; - struct rb750_led_data *leds; -}; - -int rb750_latch_change(u32 mask_clr, u32 mask_set); -void rb750_nand_pins_enable(void); -void rb750_nand_pins_disable(void); - -#endif /* _MACH_RB750_H */ \ No newline at end of file diff --git a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h b/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h deleted file mode 100644 index 5b17e94b64..0000000000 --- a/target/linux/ar71xx/files-3.2/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards - * - * Copyright (C) 2010 Gabor Juhos - * - * This file was based on the patches for Linux 2.6.27.39 published by - * MikroTik for their RouterBoard 4xx series devices. - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#define CPLD_GPIO_nLED1 0 -#define CPLD_GPIO_nLED2 1 -#define CPLD_GPIO_nLED3 2 -#define CPLD_GPIO_nLED4 3 -#define CPLD_GPIO_FAN 4 -#define CPLD_GPIO_ALE 5 -#define CPLD_GPIO_CLE 6 -#define CPLD_GPIO_nCE 7 -#define CPLD_GPIO_nLED5 8 - -#define CPLD_NUM_GPIOS 9 - -#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) -#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) -#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) -#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) -#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) -#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) -#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) -#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) -#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) - -struct rb4xx_cpld_platform_data { - unsigned gpio_base; -}; - -extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); -extern int rb4xx_cpld_read(unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_read_from(unsigned addr, - unsigned char *rx_buf, - const unsigned char *verify_buf, - unsigned cnt); -extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Kconfig b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Kconfig deleted file mode 100644 index 42d544f731..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Kconfig +++ /dev/null @@ -1,33 +0,0 @@ -config AG71XX - tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" - depends on ATH79 - select PHYLIB - help - If you wish to compile a kernel for AR7XXX/91XXX and enable - ethernet support, then you should always answer Y to this. - -if AG71XX - -config AG71XX_DEBUG - bool "Atheros AR71xx built-in ethernet driver debugging" - default n - help - Atheros AR71xx built-in ethernet driver debugging messages. - -config AG71XX_DEBUG_FS - bool "Atheros AR71xx built-in ethernet driver debugfs support" - depends on DEBUG_FS - default n - help - Say Y, if you need access to various statistics provided by - the ag71xx driver. - -config AG71XX_AR8216_SUPPORT - bool "special support for the Atheros AR8216 switch" - default n - default y if ATH79_MACH_WNR2000 || ATH79_MACH_MZK_W04NU - help - Say 'y' here if you want to enable special support for the - Atheros AR8216 switch found on some boards. - -endif diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Makefile b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Makefile deleted file mode 100644 index b3ec4084c8..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/Makefile +++ /dev/null @@ -1,15 +0,0 @@ -# -# Makefile for the Atheros AR71xx built-in ethernet macs -# - -ag71xx-y += ag71xx_main.o -ag71xx-y += ag71xx_ethtool.o -ag71xx-y += ag71xx_phy.o -ag71xx-y += ag71xx_mdio.o -ag71xx-y += ag71xx_ar7240.o - -ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o -ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o - -obj-$(CONFIG_AG71XX) += ag71xx.o - diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx.h deleted file mode 100644 index d1f692c388..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ /dev/null @@ -1,466 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#ifndef __AG71XX_H -#define __AG71XX_H - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#include -#include -#include - -#define AG71XX_DRV_NAME "ag71xx" -#define AG71XX_DRV_VERSION "0.5.35" - -#define AG71XX_NAPI_WEIGHT 64 -#define AG71XX_OOM_REFILL (1 + HZ/10) - -#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE) -#define AG71XX_INT_TX (AG71XX_INT_TX_PS) -#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF) - -#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX) -#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) - -#define AG71XX_TX_MTU_LEN 1540 -#define AG71XX_RX_PKT_RESERVE 64 -#define AG71XX_RX_PKT_SIZE \ - (AG71XX_RX_PKT_RESERVE + ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) - -#define AG71XX_TX_RING_SIZE_DEFAULT 64 -#define AG71XX_RX_RING_SIZE_DEFAULT 128 - -#define AG71XX_TX_RING_SIZE_MAX 256 -#define AG71XX_RX_RING_SIZE_MAX 256 - -#ifdef CONFIG_AG71XX_DEBUG -#define DBG(fmt, args...) pr_debug(fmt, ## args) -#else -#define DBG(fmt, args...) do {} while (0) -#endif - -#define ag71xx_assert(_cond) \ -do { \ - if (_cond) \ - break; \ - printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \ - BUG(); \ -} while (0) - -struct ag71xx_desc { - u32 data; - u32 ctrl; -#define DESC_EMPTY BIT(31) -#define DESC_MORE BIT(24) -#define DESC_PKTLEN_M 0xfff - u32 next; - u32 pad; -} __attribute__((aligned(4))); - -struct ag71xx_buf { - struct sk_buff *skb; - struct ag71xx_desc *desc; - dma_addr_t dma_addr; - unsigned long timestamp; -}; - -struct ag71xx_ring { - struct ag71xx_buf *buf; - u8 *descs_cpu; - dma_addr_t descs_dma; - unsigned int desc_size; - unsigned int curr; - unsigned int dirty; - unsigned int size; -}; - -struct ag71xx_mdio { - struct mii_bus *mii_bus; - int mii_irq[PHY_MAX_ADDR]; - void __iomem *mdio_base; - struct ag71xx_mdio_platform_data *pdata; -}; - -struct ag71xx_int_stats { - unsigned long rx_pr; - unsigned long rx_be; - unsigned long rx_of; - unsigned long tx_ps; - unsigned long tx_be; - unsigned long tx_ur; - unsigned long total; -}; - -struct ag71xx_napi_stats { - unsigned long napi_calls; - unsigned long rx_count; - unsigned long rx_packets; - unsigned long rx_packets_max; - unsigned long tx_count; - unsigned long tx_packets; - unsigned long tx_packets_max; - - unsigned long rx[AG71XX_NAPI_WEIGHT + 1]; - unsigned long tx[AG71XX_NAPI_WEIGHT + 1]; -}; - -struct ag71xx_debug { - struct dentry *debugfs_dir; - - struct ag71xx_int_stats int_stats; - struct ag71xx_napi_stats napi_stats; -}; - -struct ag71xx { - void __iomem *mac_base; - - spinlock_t lock; - struct platform_device *pdev; - struct net_device *dev; - struct napi_struct napi; - u32 msg_enable; - - struct ag71xx_desc *stop_desc; - dma_addr_t stop_desc_dma; - - struct ag71xx_ring rx_ring; - struct ag71xx_ring tx_ring; - - struct mii_bus *mii_bus; - struct phy_device *phy_dev; - void *phy_priv; - - unsigned int link; - unsigned int speed; - int duplex; - - struct work_struct restart_work; - struct delayed_work link_work; - struct timer_list oom_timer; - -#ifdef CONFIG_AG71XX_DEBUG_FS - struct ag71xx_debug debug; -#endif -}; - -extern struct ethtool_ops ag71xx_ethtool_ops; -void ag71xx_link_adjust(struct ag71xx *ag); - -int ag71xx_mdio_driver_init(void) __init; -void ag71xx_mdio_driver_exit(void); - -int ag71xx_phy_connect(struct ag71xx *ag); -void ag71xx_phy_disconnect(struct ag71xx *ag); -void ag71xx_phy_start(struct ag71xx *ag); -void ag71xx_phy_stop(struct ag71xx *ag); - -static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag) -{ - return ag->pdev->dev.platform_data; -} - -static inline int ag71xx_desc_empty(struct ag71xx_desc *desc) -{ - return (desc->ctrl & DESC_EMPTY) != 0; -} - -static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc) -{ - return desc->ctrl & DESC_PKTLEN_M; -} - -/* Register offsets */ -#define AG71XX_REG_MAC_CFG1 0x0000 -#define AG71XX_REG_MAC_CFG2 0x0004 -#define AG71XX_REG_MAC_IPG 0x0008 -#define AG71XX_REG_MAC_HDX 0x000c -#define AG71XX_REG_MAC_MFL 0x0010 -#define AG71XX_REG_MII_CFG 0x0020 -#define AG71XX_REG_MII_CMD 0x0024 -#define AG71XX_REG_MII_ADDR 0x0028 -#define AG71XX_REG_MII_CTRL 0x002c -#define AG71XX_REG_MII_STATUS 0x0030 -#define AG71XX_REG_MII_IND 0x0034 -#define AG71XX_REG_MAC_IFCTL 0x0038 -#define AG71XX_REG_MAC_ADDR1 0x0040 -#define AG71XX_REG_MAC_ADDR2 0x0044 -#define AG71XX_REG_FIFO_CFG0 0x0048 -#define AG71XX_REG_FIFO_CFG1 0x004c -#define AG71XX_REG_FIFO_CFG2 0x0050 -#define AG71XX_REG_FIFO_CFG3 0x0054 -#define AG71XX_REG_FIFO_CFG4 0x0058 -#define AG71XX_REG_FIFO_CFG5 0x005c -#define AG71XX_REG_FIFO_RAM0 0x0060 -#define AG71XX_REG_FIFO_RAM1 0x0064 -#define AG71XX_REG_FIFO_RAM2 0x0068 -#define AG71XX_REG_FIFO_RAM3 0x006c -#define AG71XX_REG_FIFO_RAM4 0x0070 -#define AG71XX_REG_FIFO_RAM5 0x0074 -#define AG71XX_REG_FIFO_RAM6 0x0078 -#define AG71XX_REG_FIFO_RAM7 0x007c - -#define AG71XX_REG_TX_CTRL 0x0180 -#define AG71XX_REG_TX_DESC 0x0184 -#define AG71XX_REG_TX_STATUS 0x0188 -#define AG71XX_REG_RX_CTRL 0x018c -#define AG71XX_REG_RX_DESC 0x0190 -#define AG71XX_REG_RX_STATUS 0x0194 -#define AG71XX_REG_INT_ENABLE 0x0198 -#define AG71XX_REG_INT_STATUS 0x019c - -#define AG71XX_REG_FIFO_DEPTH 0x01a8 -#define AG71XX_REG_RX_SM 0x01b0 -#define AG71XX_REG_TX_SM 0x01b4 - -#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ -#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ -#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ -#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ -#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ -#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ -#define MAC_CFG1_LB BIT(8) /* Loopback mode */ -#define MAC_CFG1_SR BIT(31) /* Soft Reset */ - -#define MAC_CFG2_FDX BIT(0) -#define MAC_CFG2_CRC_EN BIT(1) -#define MAC_CFG2_PAD_CRC_EN BIT(2) -#define MAC_CFG2_LEN_CHECK BIT(4) -#define MAC_CFG2_HUGE_FRAME_EN BIT(5) -#define MAC_CFG2_IF_1000 BIT(9) -#define MAC_CFG2_IF_10_100 BIT(8) - -#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */ -#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */ -#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */ -#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */ -#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */ -#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \ - | FIFO_CFG0_TXS | FIFO_CFG0_TXF) - -#define FIFO_CFG0_ENABLE_SHIFT 8 - -#define FIFO_CFG4_DE BIT(0) /* Drop Event */ -#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */ -#define FIFO_CFG4_FC BIT(2) /* False Carrier */ -#define FIFO_CFG4_CE BIT(3) /* Code Error */ -#define FIFO_CFG4_CR BIT(4) /* CRC error */ -#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */ -#define FIFO_CFG4_LO BIT(6) /* Length out of range */ -#define FIFO_CFG4_OK BIT(7) /* Packet is OK */ -#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ -#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ -#define FIFO_CFG4_DR BIT(10) /* Dribble */ -#define FIFO_CFG4_LE BIT(11) /* Long Event */ -#define FIFO_CFG4_CF BIT(12) /* Control Frame */ -#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ -#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ -#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ -#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ -#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ - -#define FIFO_CFG5_DE BIT(0) /* Drop Event */ -#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ -#define FIFO_CFG5_FC BIT(2) /* False Carrier */ -#define FIFO_CFG5_CE BIT(3) /* Code Error */ -#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ -#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ -#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ -#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ -#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ -#define FIFO_CFG5_DR BIT(9) /* Dribble */ -#define FIFO_CFG5_CF BIT(10) /* Control Frame */ -#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ -#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ -#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ -#define FIFO_CFG5_LE BIT(14) /* Long Event */ -#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ -#define FIFO_CFG5_16 BIT(16) /* unknown */ -#define FIFO_CFG5_17 BIT(17) /* unknown */ -#define FIFO_CFG5_SF BIT(18) /* Short Frame */ -#define FIFO_CFG5_BM BIT(19) /* Byte Mode */ - -#define AG71XX_INT_TX_PS BIT(0) -#define AG71XX_INT_TX_UR BIT(1) -#define AG71XX_INT_TX_BE BIT(3) -#define AG71XX_INT_RX_PR BIT(4) -#define AG71XX_INT_RX_OF BIT(6) -#define AG71XX_INT_RX_BE BIT(7) - -#define MAC_IFCTL_SPEED BIT(16) - -#define MII_CFG_CLK_DIV_4 0 -#define MII_CFG_CLK_DIV_6 2 -#define MII_CFG_CLK_DIV_8 3 -#define MII_CFG_CLK_DIV_10 4 -#define MII_CFG_CLK_DIV_14 5 -#define MII_CFG_CLK_DIV_20 6 -#define MII_CFG_CLK_DIV_28 7 -#define MII_CFG_RESET BIT(31) - -#define MII_CMD_WRITE 0x0 -#define MII_CMD_READ 0x1 -#define MII_ADDR_SHIFT 8 -#define MII_IND_BUSY BIT(0) -#define MII_IND_INVALID BIT(2) - -#define TX_CTRL_TXE BIT(0) /* Tx Enable */ - -#define TX_STATUS_PS BIT(0) /* Packet Sent */ -#define TX_STATUS_UR BIT(1) /* Tx Underrun */ -#define TX_STATUS_BE BIT(3) /* Bus Error */ - -#define RX_CTRL_RXE BIT(0) /* Rx Enable */ - -#define RX_STATUS_PR BIT(0) /* Packet Received */ -#define RX_STATUS_OF BIT(2) /* Rx Overflow */ -#define RX_STATUS_BE BIT(3) /* Bus Error */ - -static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) -{ - switch (reg) { - case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: - case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM: - case AG71XX_REG_MII_CFG: - break; - - default: - BUG(); - } -} - -static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) -{ - ag71xx_check_reg_offset(ag, reg); - - __raw_writel(value, ag->mac_base + reg); - /* flush write */ - (void) __raw_readl(ag->mac_base + reg); -} - -static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) -{ - ag71xx_check_reg_offset(ag, reg); - - return __raw_readl(ag->mac_base + reg); -} - -static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) -{ - void __iomem *r; - - ag71xx_check_reg_offset(ag, reg); - - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) | mask, r); - /* flush write */ - (void)__raw_readl(r); -} - -static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) -{ - void __iomem *r; - - ag71xx_check_reg_offset(ag, reg); - - r = ag->mac_base + reg; - __raw_writel(__raw_readl(r) & ~mask, r); - /* flush write */ - (void) __raw_readl(r); -} - -static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) -{ - ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); -} - -static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) -{ - ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); -} - -#ifdef CONFIG_AG71XX_AR8216_SUPPORT -void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); -int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, - int pktlen); -static inline int ag71xx_has_ar8216(struct ag71xx *ag) -{ - return ag71xx_get_pdata(ag)->has_ar8216; -} -#else -static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, - struct sk_buff *skb) -{ -} - -static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, - struct sk_buff *skb, - int pktlen) -{ - return 0; -} -static inline int ag71xx_has_ar8216(struct ag71xx *ag) -{ - return 0; -} -#endif - -#ifdef CONFIG_AG71XX_DEBUG_FS -int ag71xx_debugfs_root_init(void); -void ag71xx_debugfs_root_exit(void); -int ag71xx_debugfs_init(struct ag71xx *ag); -void ag71xx_debugfs_exit(struct ag71xx *ag); -void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status); -void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx); -#else -static inline int ag71xx_debugfs_root_init(void) { return 0; } -static inline void ag71xx_debugfs_root_exit(void) {} -static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; } -static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {} -static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, - u32 status) {} -static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, - int rx, int tx) {} -#endif /* CONFIG_AG71XX_DEBUG_FS */ - -void ag71xx_ar7240_start(struct ag71xx *ag); -void ag71xx_ar7240_stop(struct ag71xx *ag); -int ag71xx_ar7240_init(struct ag71xx *ag); -void ag71xx_ar7240_cleanup(struct ag71xx *ag); - -int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg); -void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val); - -u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr); -int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr, u16 reg_val); - -#endif /* _AG71XX_H */ diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c deleted file mode 100644 index ab7abd9e5c..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ /dev/null @@ -1,1194 +0,0 @@ -/* - * Driver for the built-in ethernet switch of the Atheros AR7240 SoC - * Copyright (c) 2010 Gabor Juhos - * Copyright (c) 2010 Felix Fietkau - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include "ag71xx.h" - -#define BITM(_count) (BIT(_count) - 1) -#define BITS(_shift, _count) (BITM(_count) << _shift) - -#define AR7240_REG_MASK_CTRL 0x00 -#define AR7240_MASK_CTRL_REVISION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_S 8 -#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 -#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 -#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) - -#define AR7240_REG_MAC_ADDR0 0x20 -#define AR7240_REG_MAC_ADDR1 0x24 - -#define AR7240_REG_FLOOD_MASK 0x2c -#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) - -#define AR7240_REG_GLOBAL_CTRL 0x30 -#define AR7240_GLOBAL_CTRL_MTU_M BITM(12) - -#define AR7240_REG_VTU 0x0040 -#define AR7240_VTU_OP BITM(3) -#define AR7240_VTU_OP_NOOP 0x0 -#define AR7240_VTU_OP_FLUSH 0x1 -#define AR7240_VTU_OP_LOAD 0x2 -#define AR7240_VTU_OP_PURGE 0x3 -#define AR7240_VTU_OP_REMOVE_PORT 0x4 -#define AR7240_VTU_ACTIVE BIT(3) -#define AR7240_VTU_FULL BIT(4) -#define AR7240_VTU_PORT BITS(8, 4) -#define AR7240_VTU_PORT_S 8 -#define AR7240_VTU_VID BITS(16, 12) -#define AR7240_VTU_VID_S 16 -#define AR7240_VTU_PRIO BITS(28, 3) -#define AR7240_VTU_PRIO_S 28 -#define AR7240_VTU_PRIO_EN BIT(31) - -#define AR7240_REG_VTU_DATA 0x0044 -#define AR7240_VTUDATA_MEMBER BITS(0, 10) -#define AR7240_VTUDATA_VALID BIT(11) - -#define AR7240_REG_ATU 0x50 -#define AR7240_ATU_FLUSH_ALL 0x1 - -#define AR7240_REG_AT_CTRL 0x5c -#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) -#define AR7240_AT_CTRL_AGE_EN BIT(17) -#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) -#define AR7240_AT_CTRL_RESERVED BIT(19) -#define AR7240_AT_CTRL_ARP_EN BIT(20) - -#define AR7240_REG_TAG_PRIORITY 0x70 - -#define AR7240_REG_SERVICE_TAG 0x74 -#define AR7240_SERVICE_TAG_M BITM(16) - -#define AR7240_REG_CPU_PORT 0x78 -#define AR7240_MIRROR_PORT_S 4 -#define AR7240_CPU_PORT_EN BIT(8) - -#define AR7240_REG_MIB_FUNCTION0 0x80 -#define AR7240_MIB_TIMER_M BITM(16) -#define AR7240_MIB_AT_HALF_EN BIT(16) -#define AR7240_MIB_BUSY BIT(17) -#define AR7240_MIB_FUNC_S 24 -#define AR7240_MIB_FUNC_NO_OP 0x0 -#define AR7240_MIB_FUNC_FLUSH 0x1 -#define AR7240_MIB_FUNC_CAPTURE 0x3 - -#define AR7240_REG_MDIO_CTRL 0x98 -#define AR7240_MDIO_CTRL_DATA_M BITM(16) -#define AR7240_MDIO_CTRL_REG_ADDR_S 16 -#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 -#define AR7240_MDIO_CTRL_CMD_WRITE 0 -#define AR7240_MDIO_CTRL_CMD_READ BIT(27) -#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) -#define AR7240_MDIO_CTRL_BUSY BIT(31) - -#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) -#define AR7240_PORT_STATUS_SPEED_S 0 -#define AR7240_PORT_STATUS_SPEED_M BITM(2) -#define AR7240_PORT_STATUS_SPEED_10 0 -#define AR7240_PORT_STATUS_SPEED_100 1 -#define AR7240_PORT_STATUS_SPEED_1000 2 -#define AR7240_PORT_STATUS_TXMAC BIT(2) -#define AR7240_PORT_STATUS_RXMAC BIT(3) -#define AR7240_PORT_STATUS_TXFLOW BIT(4) -#define AR7240_PORT_STATUS_RXFLOW BIT(5) -#define AR7240_PORT_STATUS_DUPLEX BIT(6) -#define AR7240_PORT_STATUS_LINK_UP BIT(8) -#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) -#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) - -#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) -#define AR7240_PORT_CTRL_STATE_M BITM(3) -#define AR7240_PORT_CTRL_STATE_DISABLED 0 -#define AR7240_PORT_CTRL_STATE_BLOCK 1 -#define AR7240_PORT_CTRL_STATE_LISTEN 2 -#define AR7240_PORT_CTRL_STATE_LEARN 3 -#define AR7240_PORT_CTRL_STATE_FORWARD 4 -#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) -#define AR7240_PORT_CTRL_VLAN_MODE_S 8 -#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 -#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 -#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 -#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 -#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) -#define AR7240_PORT_CTRL_HEADER BIT(11) -#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) -#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) -#define AR7240_PORT_CTRL_LEARN BIT(14) -#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) -#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) -#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) - -#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) - -#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 -#define AR7240_PORT_VLAN_DEST_PORTS_S 16 -#define AR7240_PORT_VLAN_MODE_S 30 -#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 -#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 -#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 -#define AR7240_PORT_VLAN_MODE_SECURE 3 - - -#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) - -#define AR7240_STATS_RXBROAD 0x00 -#define AR7240_STATS_RXPAUSE 0x04 -#define AR7240_STATS_RXMULTI 0x08 -#define AR7240_STATS_RXFCSERR 0x0c -#define AR7240_STATS_RXALIGNERR 0x10 -#define AR7240_STATS_RXRUNT 0x14 -#define AR7240_STATS_RXFRAGMENT 0x18 -#define AR7240_STATS_RX64BYTE 0x1c -#define AR7240_STATS_RX128BYTE 0x20 -#define AR7240_STATS_RX256BYTE 0x24 -#define AR7240_STATS_RX512BYTE 0x28 -#define AR7240_STATS_RX1024BYTE 0x2c -#define AR7240_STATS_RX1518BYTE 0x30 -#define AR7240_STATS_RXMAXBYTE 0x34 -#define AR7240_STATS_RXTOOLONG 0x38 -#define AR7240_STATS_RXGOODBYTE 0x3c -#define AR7240_STATS_RXBADBYTE 0x44 -#define AR7240_STATS_RXOVERFLOW 0x4c -#define AR7240_STATS_FILTERED 0x50 -#define AR7240_STATS_TXBROAD 0x54 -#define AR7240_STATS_TXPAUSE 0x58 -#define AR7240_STATS_TXMULTI 0x5c -#define AR7240_STATS_TXUNDERRUN 0x60 -#define AR7240_STATS_TX64BYTE 0x64 -#define AR7240_STATS_TX128BYTE 0x68 -#define AR7240_STATS_TX256BYTE 0x6c -#define AR7240_STATS_TX512BYTE 0x70 -#define AR7240_STATS_TX1024BYTE 0x74 -#define AR7240_STATS_TX1518BYTE 0x78 -#define AR7240_STATS_TXMAXBYTE 0x7c -#define AR7240_STATS_TXOVERSIZE 0x80 -#define AR7240_STATS_TXBYTE 0x84 -#define AR7240_STATS_TXCOLLISION 0x8c -#define AR7240_STATS_TXABORTCOL 0x90 -#define AR7240_STATS_TXMULTICOL 0x94 -#define AR7240_STATS_TXSINGLECOL 0x98 -#define AR7240_STATS_TXEXCDEFER 0x9c -#define AR7240_STATS_TXDEFER 0xa0 -#define AR7240_STATS_TXLATECOL 0xa4 - -#define AR7240_PORT_CPU 0 -#define AR7240_NUM_PORTS 6 -#define AR7240_NUM_PHYS 5 - -#define AR7240_PHY_ID1 0x004d -#define AR7240_PHY_ID2 0xd041 - -#define AR934X_PHY_ID1 0x004d -#define AR934X_PHY_ID2 0xd042 - -#define AR7240_MAX_VLANS 16 - -#define AR934X_REG_OPER_MODE0 0x04 -#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) -#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) - -#define AR934X_REG_OPER_MODE1 0x08 -#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) - -#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) -#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 -#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) -#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) -#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) -#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) -#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 -#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) -#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 - -#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) -#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 -#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 -#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 -#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 - -#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) - -struct ar7240sw_port_stat { - unsigned long rx_broadcast; - unsigned long rx_pause; - unsigned long rx_multicast; - unsigned long rx_fcs_error; - unsigned long rx_align_error; - unsigned long rx_runt; - unsigned long rx_fragments; - unsigned long rx_64byte; - unsigned long rx_128byte; - unsigned long rx_256byte; - unsigned long rx_512byte; - unsigned long rx_1024byte; - unsigned long rx_1518byte; - unsigned long rx_maxbyte; - unsigned long rx_toolong; - unsigned long rx_good_byte; - unsigned long rx_bad_byte; - unsigned long rx_overflow; - unsigned long filtered; - - unsigned long tx_broadcast; - unsigned long tx_pause; - unsigned long tx_multicast; - unsigned long tx_underrun; - unsigned long tx_64byte; - unsigned long tx_128byte; - unsigned long tx_256byte; - unsigned long tx_512byte; - unsigned long tx_1024byte; - unsigned long tx_1518byte; - unsigned long tx_maxbyte; - unsigned long tx_oversize; - unsigned long tx_byte; - unsigned long tx_collision; - unsigned long tx_abortcol; - unsigned long tx_multicol; - unsigned long tx_singlecol; - unsigned long tx_excdefer; - unsigned long tx_defer; - unsigned long tx_xlatecol; -}; - -struct ar7240sw { - struct mii_bus *mii_bus; - struct ag71xx_switch_platform_data *swdata; - struct switch_dev swdev; - int num_ports; - u8 ver; - bool vlan; - u16 vlan_id[AR7240_MAX_VLANS]; - u8 vlan_table[AR7240_MAX_VLANS]; - u8 vlan_tagged; - u16 pvid[AR7240_NUM_PORTS]; - char buf[80]; - - rwlock_t stats_lock; - struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; -}; - -struct ar7240sw_hw_stat { - char string[ETH_GSTRING_LEN]; - int sizeof_stat; - int reg; -}; - -static DEFINE_MUTEX(reg_mutex); - -static inline int sw_is_ar7240(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; -} - -static inline int sw_is_ar934x(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; -} - -static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) -{ - return BIT(port); -} - -static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) -{ - return BIT(as->swdev.ports) - 1; -} - -static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) -{ - return ar7240sw_port_mask_all(as) & ~BIT(port); -} - -static inline u16 mk_phy_addr(u32 reg) -{ - return 0x17 & ((reg >> 4) | 0x10); -} - -static inline u16 mk_phy_reg(u32 reg) -{ - return (reg << 1) & 0x1e; -} - -static inline u16 mk_high_addr(u32 reg) -{ - return (reg >> 7) & 0x1ff; -} - -static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - u32 hi, lo; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); - lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg); - hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1); - local_irq_restore(flags); - - return (hi << 16) | lo; -} - -static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); - ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16)); - ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff)); - local_irq_restore(flags); -} - -static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) -{ - u32 ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_read(mii, reg_addr); - mutex_unlock(®_mutex); - - return ret; -} - -static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) -{ - mutex_lock(®_mutex); - __ar7240sw_reg_write(mii, reg_addr, reg_val); - mutex_unlock(®_mutex); -} - -static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t &= ~mask; - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); - - return t; -} - -static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); -} - -static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int i; - - for (i = 0; i < timeout; i++) { - u32 t; - - t = __ar7240sw_reg_read(mii, reg); - if ((t & mask) == val) - return 0; - - msleep(1); - } - - return -ETIMEDOUT; -} - -static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); - mutex_unlock(®_mutex); - return ret; -} - -u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr) -{ - u32 t, val = 0xffff; - int err; - - if (phy_addr >= AR7240_NUM_PHYS) - return 0xffff; - - mutex_lock(®_mutex); - t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_READ; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - if (!err) - val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); - mutex_unlock(®_mutex); - - return val & AR7240_MDIO_CTRL_DATA_M; -} - -int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, - unsigned reg_addr, u16 reg_val) -{ - u32 t; - int ret; - - if (phy_addr >= AR7240_NUM_PHYS) - return -EINVAL; - - mutex_lock(®_mutex); - t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_WRITE | - reg_val; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - mutex_unlock(®_mutex); - - return ret; -} - -static int ar7240sw_capture_stats(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - int port; - int ret; - - write_lock(&as->stats_lock); - - /* Capture the hardware statistics for all ports */ - ar7240sw_reg_write(mii, AR7240_REG_MIB_FUNCTION0, - (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); - - /* Wait for the capturing to complete. */ - ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, - AR7240_MIB_BUSY, 0, 10); - - if (ret) - goto unlock; - - for (port = 0; port < AR7240_NUM_PORTS; port++) { - unsigned int base; - struct ar7240sw_port_stat *stats; - - base = AR7240_REG_STATS_BASE(port); - stats = &as->port_stats[port]; - -#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) - - stats->rx_good_byte += READ_STAT(RXGOODBYTE); - stats->tx_byte += READ_STAT(TXBYTE); - -#undef READ_STAT - } - - ret = 0; - -unlock: - write_unlock(&as->stats_lock); - return ret; -} - -static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) -{ - ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_STATE_DISABLED); -} - -static void ar7240sw_setup(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - - /* Enable CPU port, and disable mirror port */ - ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, - AR7240_CPU_PORT_EN | - (15 << AR7240_MIRROR_PORT_S)); - - /* Setup TAG priority mapping */ - ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); - - /* Enable ARP frame acknowledge, aging, MAC replacing */ - ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, - AR7240_AT_CTRL_RESERVED | - 0x2b /* 5 min age time */ | - AR7240_AT_CTRL_AGE_EN | - AR7240_AT_CTRL_ARP_EN | - AR7240_AT_CTRL_LEARN_CHANGE); - - /* Enable Broadcast frames transmitted to the CPU */ - ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, - AR7240_FLOOD_MASK_BROAD_TO_CPU); - - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M, - 1536); - - /* setup Service TAG */ - ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); -} - -static int ar7240sw_reset(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - int ret; - int i; - - /* Set all ports to disabled state. */ - for (i = 0; i < AR7240_NUM_PORTS; i++) - ar7240sw_disable_port(as, i); - - /* Wait for transmit queues to drain. */ - msleep(2); - - /* Reset the switch. */ - ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET); - - ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); - - ar7240sw_setup(as); - return ret; -} - -static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) -{ - struct mii_bus *mii = as->mii_bus; - u32 ctrl; - u32 vid, mode; - - ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | - AR7240_PORT_CTRL_SINGLE_VLAN; - - if (port == AR7240_PORT_CPU) { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_SPEED_1000 | - AR7240_PORT_STATUS_TXFLOW | - AR7240_PORT_STATUS_RXFLOW | - AR7240_PORT_STATUS_TXMAC | - AR7240_PORT_STATUS_RXMAC | - AR7240_PORT_STATUS_DUPLEX); - } else { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_LINK_AUTO); - } - - /* Set the default VID for this port */ - if (as->vlan) { - vid = as->vlan_id[as->pvid[port]]; - mode = AR7240_PORT_VLAN_MODE_SECURE; - } else { - vid = port; - mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; - } - - if (as->vlan && (as->vlan_tagged & BIT(port))) { - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << - AR7240_PORT_CTRL_VLAN_MODE_S; - } else { - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << - AR7240_PORT_CTRL_VLAN_MODE_S; - } - - if (!portmask) { - if (port == AR7240_PORT_CPU) - portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); - else - portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); - } - - /* allow the port to talk to all other ports, but exclude its - * own ID to prevent frames from being reflected back to the - * port that they came from */ - portmask &= ar7240sw_port_mask_but(as, port); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); - if (sw_is_ar934x(as)) { - u32 vlan1, vlan2; - - vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); - vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | - (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); - } else { - u32 vlan; - - vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | - (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); - } -} - -static int ar7240_set_addr(struct ar7240sw *as, u8 *addr) -{ - struct mii_bus *mii = as->mii_bus; - u32 t; - - t = (addr[4] << 8) | addr[5]; - ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t); - - t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; - ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t); - - return 0; -} - -static int -ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan_id[val->port_vlan] = val->value.i; - return 0; -} - -static int -ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan_id[val->port_vlan]; - return 0; -} - -static int -ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - /* make sure no invalid PVIDs get set */ - - if (vlan >= dev->vlans) - return -EINVAL; - - as->pvid[port] = vlan; - return 0; -} - -static int -ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - *vlan = as->pvid[port]; - return 0; -} - -static int -ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 ports = as->vlan_table[val->port_vlan]; - int i; - - val->len = 0; - for (i = 0; i < as->swdev.ports; i++) { - struct switch_port *p; - - if (!(ports & (1 << i))) - continue; - - p = &val->value.ports[val->len++]; - p->id = i; - if (as->vlan_tagged & (1 << i)) - p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); - else - p->flags = 0; - } - return 0; -} - -static int -ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 *vt = &as->vlan_table[val->port_vlan]; - int i, j; - - *vt = 0; - for (i = 0; i < val->len; i++) { - struct switch_port *p = &val->value.ports[i]; - - if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) - as->vlan_tagged |= (1 << p->id); - else { - as->vlan_tagged &= ~(1 << p->id); - as->pvid[p->id] = val->port_vlan; - - /* make sure that an untagged port does not - * appear in other vlans */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - if (j == val->port_vlan) - continue; - as->vlan_table[j] &= ~(1 << p->id); - } - } - - *vt |= 1 << p->id; - } - return 0; -} - -static int -ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan = !!val->value.i; - return 0; -} - -static int -ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan; - return 0; -} - -static const char * -ar7240_speed_str(u32 status) -{ - u32 speed; - - speed = (status >> AR7240_PORT_STATUS_SPEED_S) & - AR7240_PORT_STATUS_SPEED_M; - switch (speed) { - case AR7240_PORT_STATUS_SPEED_10: - return "10baseT"; - case AR7240_PORT_STATUS_SPEED_100: - return "100baseT"; - case AR7240_PORT_STATUS_SPEED_1000: - return "1000baseT"; - } - - return "unknown"; -} - -static int -ar7240_port_get_link(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - u32 len; - u32 status; - int port; - - port = val->port_vlan; - - memset(as->buf, '\0', sizeof(as->buf)); - status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); - - if (status & AR7240_PORT_STATUS_LINK_UP) { - len = snprintf(as->buf, sizeof(as->buf), - "port:%d link:up speed:%s %s-duplex %s%s%s", - port, - ar7240_speed_str(status), - (status & AR7240_PORT_STATUS_DUPLEX) ? - "full" : "half", - (status & AR7240_PORT_STATUS_TXFLOW) ? - "txflow ": "", - (status & AR7240_PORT_STATUS_RXFLOW) ? - "rxflow " : "", - (status & AR7240_PORT_STATUS_LINK_AUTO) ? - "auto ": ""); - } else { - len = snprintf(as->buf, sizeof(as->buf), - "port:%d link:down", port); - } - - val->value.s = as->buf; - val->len = len; - - return 0; -} - -static void -ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) -{ - struct mii_bus *mii = as->mii_bus; - - if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) - return; - - if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { - val &= AR7240_VTUDATA_MEMBER; - val |= AR7240_VTUDATA_VALID; - ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); - } - op |= AR7240_VTU_ACTIVE; - ar7240sw_reg_write(mii, AR7240_REG_VTU, op); -} - -static int -ar7240_hw_apply(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 portmask[AR7240_NUM_PORTS]; - int i, j; - - /* flush all vlan translation unit entries */ - ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); - - memset(portmask, 0, sizeof(portmask)); - if (as->vlan) { - /* calculate the port destination masks and load vlans - * into the vlan translation unit */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - u8 vp = as->vlan_table[j]; - - if (!vp) - continue; - - for (i = 0; i < as->swdev.ports; i++) { - u8 mask = (1 << i); - if (vp & mask) - portmask[i] |= vp & ~mask; - } - - ar7240_vtu_op(as, - AR7240_VTU_OP_LOAD | - (as->vlan_id[j] << AR7240_VTU_VID_S), - as->vlan_table[j]); - } - } else { - /* vlan disabled: - * isolate all ports, but connect them to the cpu port */ - for (i = 0; i < as->swdev.ports; i++) { - if (i == AR7240_PORT_CPU) - continue; - - portmask[i] = 1 << AR7240_PORT_CPU; - portmask[AR7240_PORT_CPU] |= (1 << i); - } - } - - /* update the port destination mask registers and tag settings */ - for (i = 0; i < as->swdev.ports; i++) - ar7240sw_setup_port(as, i, portmask[i]); - - return 0; -} - -static int -ar7240_reset_switch(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - ar7240sw_reset(as); - return 0; -} - -static int -ar7240_get_port_link(struct switch_dev *dev, int port, - struct switch_port_link *link) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - u32 status; - - if (port > AR7240_NUM_PORTS) - return -EINVAL; - - status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); - - link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); - link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); - link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); - link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); - link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); - switch (status & AR7240_PORT_STATUS_SPEED_M) { - case AR7240_PORT_STATUS_SPEED_10: - link->speed = SWITCH_PORT_SPEED_10; - break; - case AR7240_PORT_STATUS_SPEED_100: - link->speed = SWITCH_PORT_SPEED_100; - break; - case AR7240_PORT_STATUS_SPEED_1000: - link->speed = SWITCH_PORT_SPEED_1000; - break; - } - - return 0; -} - -static int -ar7240_get_port_stats(struct switch_dev *dev, int port, - struct switch_port_stats *stats) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - if (port > AR7240_NUM_PORTS) - return -EINVAL; - - ar7240sw_capture_stats(as); - - read_lock(&as->stats_lock); - stats->rx_bytes = as->port_stats[port].rx_good_byte; - stats->tx_bytes = as->port_stats[port].tx_byte; - read_unlock(&as->stats_lock); - - return 0; -} - -static struct switch_attr ar7240_globals[] = { - { - .type = SWITCH_TYPE_INT, - .name = "enable_vlan", - .description = "Enable VLAN mode", - .set = ar7240_set_vlan, - .get = ar7240_get_vlan, - .max = 1 - }, -}; - -static struct switch_attr ar7240_port[] = { - { - .type = SWITCH_TYPE_STRING, - .name = "link", - .description = "Get port link information", - .max = 1, - .set = NULL, - .get = ar7240_port_get_link, - }, -}; - -static struct switch_attr ar7240_vlan[] = { - { - .type = SWITCH_TYPE_INT, - .name = "vid", - .description = "VLAN ID", - .set = ar7240_set_vid, - .get = ar7240_get_vid, - .max = 4094, - }, -}; - -static const struct switch_dev_ops ar7240_ops = { - .attr_global = { - .attr = ar7240_globals, - .n_attr = ARRAY_SIZE(ar7240_globals), - }, - .attr_port = { - .attr = ar7240_port, - .n_attr = ARRAY_SIZE(ar7240_port), - }, - .attr_vlan = { - .attr = ar7240_vlan, - .n_attr = ARRAY_SIZE(ar7240_vlan), - }, - .get_port_pvid = ar7240_get_pvid, - .set_port_pvid = ar7240_set_pvid, - .get_vlan_ports = ar7240_get_ports, - .set_vlan_ports = ar7240_set_ports, - .apply_config = ar7240_hw_apply, - .reset_switch = ar7240_reset_switch, - .get_port_link = ar7240_get_port_link, - .get_port_stats = ar7240_get_port_stats, -}; - -static struct ar7240sw *ar7240_probe(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct mii_bus *mii = ag->mii_bus; - struct ar7240sw *as; - struct switch_dev *swdev; - u32 ctrl; - u16 phy_id1; - u16 phy_id2; - int i; - - phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1); - phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2); - if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) && - (phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) { - pr_err("%s: unknown phy id '%04x:%04x'\n", - ag->dev->name, phy_id1, phy_id2); - return NULL; - } - - as = kzalloc(sizeof(*as), GFP_KERNEL); - if (!as) - return NULL; - - as->mii_bus = mii; - as->swdata = pdata->switch_data; - - swdev = &as->swdev; - - ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); - as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & - AR7240_MASK_CTRL_VERSION_M; - - if (sw_is_ar7240(as)) { - swdev->name = "AR7240/AR9330 built-in switch"; - } else if (sw_is_ar934x(as)) { - swdev->name = "AR934X built-in switch"; - - if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_MAC_GMII_EN); - } else if (pdata->phy_if_mode == PHY_INTERFACE_MODE_MII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_PHY_MII_EN); - } else { - pr_err("%s: invalid PHY interface mode\n", - ag->dev->name); - goto err_free; - } - - if (as->swdata->phy4_mii_en) - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, - AR934X_REG_OPER_MODE1_PHY4_MII_EN); - } else { - pr_err("%s: unsupported chip, ctrl=%08x\n", - ag->dev->name, ctrl); - goto err_free; - } - - swdev->ports = AR7240_NUM_PORTS - 1; - swdev->cpu_port = AR7240_PORT_CPU; - swdev->vlans = AR7240_MAX_VLANS; - swdev->ops = &ar7240_ops; - - if (register_switch(&as->swdev, ag->dev) < 0) - goto err_free; - - pr_info("%s: Found an %s\n", ag->dev->name, swdev->name); - - /* initialize defaults */ - for (i = 0; i < AR7240_MAX_VLANS; i++) - as->vlan_id[i] = i; - - as->vlan_table[0] = ar7240sw_port_mask_all(as); - - return as; - -err_free: - kfree(as); - return NULL; -} - -static void link_function(struct work_struct *work) { - struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work); - unsigned long flags; - int i; - int status = 0; - - for (i = 0; i < 4; i++) { - int link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR); - if(link & BMSR_LSTATUS) { - status = 1; - break; - } - } - - spin_lock_irqsave(&ag->lock, flags); - if(status != ag->link) { - ag->link = status; - ag71xx_link_adjust(ag); - } - spin_unlock_irqrestore(&ag->lock, flags); - - schedule_delayed_work(&ag->link_work, HZ / 2); -} - -void ag71xx_ar7240_start(struct ag71xx *ag) -{ - struct ar7240sw *as = ag->phy_priv; - - ar7240sw_reset(as); - - ag->speed = SPEED_1000; - ag->duplex = 1; - - ar7240_set_addr(as, ag->dev->dev_addr); - ar7240_hw_apply(&as->swdev); - - schedule_delayed_work(&ag->link_work, HZ / 10); -} - -void ag71xx_ar7240_stop(struct ag71xx *ag) -{ - cancel_delayed_work_sync(&ag->link_work); -} - -int __devinit ag71xx_ar7240_init(struct ag71xx *ag) -{ - struct ar7240sw *as; - - as = ar7240_probe(ag); - if (!as) - return -ENODEV; - - ag->phy_priv = as; - ar7240sw_reset(as); - - rwlock_init(&as->stats_lock); - INIT_DELAYED_WORK(&ag->link_work, link_function); - - return 0; -} - -void ag71xx_ar7240_cleanup(struct ag71xx *ag) -{ - struct ar7240sw *as = ag->phy_priv; - - if (!as) - return; - - unregister_switch(&as->swdev); - kfree(as); - ag->phy_priv = NULL; -} diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c deleted file mode 100644 index 7ec43b7221..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c +++ /dev/null @@ -1,44 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * Special support for the Atheros ar8216 switch chip - * - * Copyright (C) 2009-2010 Gabor Juhos - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AR8216_PACKET_TYPE_MASK 0xf -#define AR8216_PACKET_TYPE_NORMAL 0 - -#define AR8216_HEADER_LEN 2 - -void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) -{ - skb_push(skb, AR8216_HEADER_LEN); - skb->data[0] = 0x10; - skb->data[1] = 0x80; -} - -int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, - int pktlen) -{ - u8 type; - - type = skb->data[1] & AR8216_PACKET_TYPE_MASK; - switch (type) { - case AR8216_PACKET_TYPE_NORMAL: - break; - - default: - return -EINVAL; - } - - skb_pull(skb, AR8216_HEADER_LEN); - return 0; -} diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c deleted file mode 100644 index 65f2be198f..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c +++ /dev/null @@ -1,280 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include - -#include "ag71xx.h" - -static struct dentry *ag71xx_debugfs_root; - -static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) -{ - file->private_data = inode->i_private; - return 0; -} - -void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) -{ - if (status) - ag->debug.int_stats.total++; - if (status & AG71XX_INT_TX_PS) - ag->debug.int_stats.tx_ps++; - if (status & AG71XX_INT_TX_UR) - ag->debug.int_stats.tx_ur++; - if (status & AG71XX_INT_TX_BE) - ag->debug.int_stats.tx_be++; - if (status & AG71XX_INT_RX_PR) - ag->debug.int_stats.rx_pr++; - if (status & AG71XX_INT_RX_OF) - ag->debug.int_stats.rx_of++; - if (status & AG71XX_INT_RX_BE) - ag->debug.int_stats.rx_be++; -} - -static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ -#define PR_INT_STAT(_label, _field) \ - len += snprintf(buf + len, sizeof(buf) - len, \ - "%20s: %10lu\n", _label, ag->debug.int_stats._field); - - struct ag71xx *ag = file->private_data; - char buf[256]; - unsigned int len = 0; - - PR_INT_STAT("TX Packet Sent", tx_ps); - PR_INT_STAT("TX Underrun", tx_ur); - PR_INT_STAT("TX Bus Error", tx_be); - PR_INT_STAT("RX Packet Received", rx_pr); - PR_INT_STAT("RX Overflow", rx_of); - PR_INT_STAT("RX Bus Error", rx_be); - len += snprintf(buf + len, sizeof(buf) - len, "\n"); - PR_INT_STAT("Total", total); - - return simple_read_from_buffer(user_buf, count, ppos, buf, len); -#undef PR_INT_STAT -} - -static const struct file_operations ag71xx_fops_int_stats = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_int_stats, - .owner = THIS_MODULE -}; - -void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) -{ - struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; - - if (rx) { - stats->rx_count++; - stats->rx_packets += rx; - if (rx <= AG71XX_NAPI_WEIGHT) - stats->rx[rx]++; - if (rx > stats->rx_packets_max) - stats->rx_packets_max = rx; - } - - if (tx) { - stats->tx_count++; - stats->tx_packets += tx; - if (tx <= AG71XX_NAPI_WEIGHT) - stats->tx[tx]++; - if (tx > stats->tx_packets_max) - stats->tx_packets_max = tx; - } -} - -static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; - char *buf; - unsigned int buflen; - unsigned int len = 0; - unsigned long rx_avg = 0; - unsigned long tx_avg = 0; - int ret; - int i; - - buflen = 2048; - buf = kmalloc(buflen, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - if (stats->rx_count) - rx_avg = stats->rx_packets / stats->rx_count; - - if (stats->tx_count) - tx_avg = stats->tx_packets / stats->tx_count; - - len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", - "len", "rx", "tx"); - - for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) - len += snprintf(buf + len, buflen - len, - "%3d: %10lu %10lu\n", - i, stats->rx[i], stats->tx[i]); - - len += snprintf(buf + len, buflen - len, "\n"); - - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "sum", stats->rx_count, stats->tx_count); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "avg", rx_avg, tx_avg); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "max", stats->rx_packets_max, stats->tx_packets_max); - len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", - "pkt", stats->rx_packets, stats->tx_packets); - - ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); - kfree(buf); - - return ret; -} - -static const struct file_operations ag71xx_fops_napi_stats = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_napi_stats, - .owner = THIS_MODULE -}; - -#define DESC_PRINT_LEN 64 - -static ssize_t read_file_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos, - struct ag71xx *ag, - struct ag71xx_ring *ring, - unsigned desc_reg) -{ - char *buf; - unsigned int buflen; - unsigned int len = 0; - unsigned long flags; - ssize_t ret; - int curr; - int dirty; - u32 desc_hw; - int i; - - buflen = (ring->size * DESC_PRINT_LEN); - buf = kmalloc(buflen, GFP_KERNEL); - if (!buf) - return -ENOMEM; - - len += snprintf(buf + len, buflen - len, - "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", - "desc", "next", "data", "ctrl", "timestamp"); - - spin_lock_irqsave(&ag->lock, flags); - - curr = (ring->curr % ring->size); - dirty = (ring->dirty % ring->size); - desc_hw = ag71xx_rr(ag, desc_reg); - for (i = 0; i < ring->size; i++) { - struct ag71xx_buf *ab = &ring->buf[i]; - u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size; - - len += snprintf(buf + len, buflen - len, - "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", - i, - (i == curr) ? 'C' : ' ', - (i == dirty) ? 'D' : ' ', - (desc_hw == desc_dma) ? 'H' : ' ', - desc_dma, - ab->desc->next, - ab->desc->data, - ab->desc->ctrl, - (ab->desc->ctrl & DESC_EMPTY) ? 'E' : '*', - ab->timestamp); - } - - spin_unlock_irqrestore(&ag->lock, flags); - - ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); - kfree(buf); - - return ret; -} - -static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - - return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, - AG71XX_REG_TX_DESC); -} - -static const struct file_operations ag71xx_fops_tx_ring = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_tx_ring, - .owner = THIS_MODULE -}; - -static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, - size_t count, loff_t *ppos) -{ - struct ag71xx *ag = file->private_data; - - return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, - AG71XX_REG_RX_DESC); -} - -static const struct file_operations ag71xx_fops_rx_ring = { - .open = ag71xx_debugfs_generic_open, - .read = read_file_rx_ring, - .owner = THIS_MODULE -}; - -void ag71xx_debugfs_exit(struct ag71xx *ag) -{ - debugfs_remove_recursive(ag->debug.debugfs_dir); -} - -int ag71xx_debugfs_init(struct ag71xx *ag) -{ - ag->debug.debugfs_dir = debugfs_create_dir(ag->dev->name, - ag71xx_debugfs_root); - if (!ag->debug.debugfs_dir) - return -ENOMEM; - - debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_int_stats); - debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_napi_stats); - debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_tx_ring); - debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, - ag, &ag71xx_fops_rx_ring); - - return 0; -} - -int ag71xx_debugfs_root_init(void) -{ - if (ag71xx_debugfs_root) - return -EBUSY; - - ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); - if (!ag71xx_debugfs_root) - return -ENOENT; - - return 0; -} - -void ag71xx_debugfs_root_exit(void) -{ - debugfs_remove(ag71xx_debugfs_root); - ag71xx_debugfs_root = NULL; -} diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c deleted file mode 100644 index 498fbed1ff..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -static int ag71xx_ethtool_get_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - - if (!phydev) - return -ENODEV; - - return phy_ethtool_gset(phydev, cmd); -} - -static int ag71xx_ethtool_set_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - - if (!phydev) - return -ENODEV; - - return phy_ethtool_sset(phydev, cmd); -} - -static void ag71xx_ethtool_get_drvinfo(struct net_device *dev, - struct ethtool_drvinfo *info) -{ - struct ag71xx *ag = netdev_priv(dev); - - strcpy(info->driver, ag->pdev->dev.driver->name); - strcpy(info->version, AG71XX_DRV_VERSION); - strcpy(info->bus_info, dev_name(&ag->pdev->dev)); -} - -static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - - return ag->msg_enable; -} - -static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) -{ - struct ag71xx *ag = netdev_priv(dev); - - ag->msg_enable = msg_level; -} - -static void ag71xx_ethtool_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) -{ - struct ag71xx *ag = netdev_priv(dev); - - er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX; - er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX; - er->rx_mini_max_pending = 0; - er->rx_jumbo_max_pending = 0; - - er->tx_pending = ag->tx_ring.size; - er->rx_pending = ag->rx_ring.size; - er->rx_mini_pending = 0; - er->rx_jumbo_pending = 0; -} - -static int ag71xx_ethtool_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *er) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned tx_size; - unsigned rx_size; - int err; - - if (er->rx_mini_pending != 0|| - er->rx_jumbo_pending != 0 || - er->rx_pending == 0 || - er->tx_pending == 0) - return -EINVAL; - - tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ? - er->tx_pending : AG71XX_TX_RING_SIZE_MAX; - - rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ? - er->rx_pending : AG71XX_RX_RING_SIZE_MAX; - - if (netif_running(dev)) { - err = dev->netdev_ops->ndo_stop(dev); - if (err) - return err; - } - - ag->tx_ring.size = tx_size; - ag->rx_ring.size = rx_size; - - if (netif_running(dev)) - err = dev->netdev_ops->ndo_open(dev); - - return err; -} - -struct ethtool_ops ag71xx_ethtool_ops = { - .set_settings = ag71xx_ethtool_set_settings, - .get_settings = ag71xx_ethtool_get_settings, - .get_drvinfo = ag71xx_ethtool_get_drvinfo, - .get_msglevel = ag71xx_ethtool_get_msglevel, - .set_msglevel = ag71xx_ethtool_set_msglevel, - .get_ringparam = ag71xx_ethtool_get_ringparam, - .set_ringparam = ag71xx_ethtool_set_ringparam, - .get_link = ethtool_op_get_link, -}; diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c deleted file mode 100644 index a69ed27d76..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ /dev/null @@ -1,1258 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AG71XX_DEFAULT_MSG_ENABLE \ - (NETIF_MSG_DRV \ - | NETIF_MSG_PROBE \ - | NETIF_MSG_LINK \ - | NETIF_MSG_TIMER \ - | NETIF_MSG_IFDOWN \ - | NETIF_MSG_IFUP \ - | NETIF_MSG_RX_ERR \ - | NETIF_MSG_TX_ERR) - -static int ag71xx_msg_level = -1; - -module_param_named(msg_level, ag71xx_msg_level, int, 0); -MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); - -static void ag71xx_dump_dma_regs(struct ag71xx *ag) -{ - DBG("%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_TX_CTRL), - ag71xx_rr(ag, AG71XX_REG_TX_DESC), - ag71xx_rr(ag, AG71XX_REG_TX_STATUS)); - - DBG("%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_RX_CTRL), - ag71xx_rr(ag, AG71XX_REG_RX_DESC), - ag71xx_rr(ag, AG71XX_REG_RX_STATUS)); -} - -static void ag71xx_dump_regs(struct ag71xx *ag) -{ - DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_CFG1), - ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), - ag71xx_rr(ag, AG71XX_REG_MAC_IPG), - ag71xx_rr(ag, AG71XX_REG_MAC_HDX), - ag71xx_rr(ag, AG71XX_REG_MAC_MFL)); - DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), - ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1), - ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2)); - DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); - DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); -} - -static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) -{ - DBG("%s: %s intr=%08x %s%s%s%s%s%s\n", - ag->dev->name, label, intr, - (intr & AG71XX_INT_TX_PS) ? "TXPS " : "", - (intr & AG71XX_INT_TX_UR) ? "TXUR " : "", - (intr & AG71XX_INT_TX_BE) ? "TXBE " : "", - (intr & AG71XX_INT_RX_PR) ? "RXPR " : "", - (intr & AG71XX_INT_RX_OF) ? "RXOF " : "", - (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); -} - -static void ag71xx_ring_free(struct ag71xx_ring *ring) -{ - kfree(ring->buf); - - if (ring->descs_cpu) - dma_free_coherent(NULL, ring->size * ring->desc_size, - ring->descs_cpu, ring->descs_dma); -} - -static int ag71xx_ring_alloc(struct ag71xx_ring *ring) -{ - int err; - int i; - - ring->desc_size = sizeof(struct ag71xx_desc); - if (ring->desc_size % cache_line_size()) { - DBG("ag71xx: ring %p, desc size %u rounded to %u\n", - ring, ring->desc_size, - roundup(ring->desc_size, cache_line_size())); - ring->desc_size = roundup(ring->desc_size, cache_line_size()); - } - - ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size, - &ring->descs_dma, GFP_ATOMIC); - if (!ring->descs_cpu) { - err = -ENOMEM; - goto err; - } - - - ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL); - if (!ring->buf) { - err = -ENOMEM; - goto err; - } - - for (i = 0; i < ring->size; i++) { - int idx = i * ring->desc_size; - ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx]; - DBG("ag71xx: ring %p, desc %d at %p\n", - ring, i, ring->buf[i].desc); - } - - return 0; - -err: - return err; -} - -static void ag71xx_ring_tx_clean(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - struct net_device *dev = ag->dev; - - while (ring->curr != ring->dirty) { - u32 i = ring->dirty % ring->size; - - if (!ag71xx_desc_empty(ring->buf[i].desc)) { - ring->buf[i].desc->ctrl = 0; - dev->stats.tx_errors++; - } - - if (ring->buf[i].skb) - dev_kfree_skb_any(ring->buf[i].skb); - - ring->buf[i].skb = NULL; - - ring->dirty++; - } - - /* flush descriptors */ - wmb(); - -} - -static void ag71xx_ring_tx_init(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - int i; - - for (i = 0; i < ring->size; i++) { - ring->buf[i].desc->next = (u32) (ring->descs_dma + - ring->desc_size * ((i + 1) % ring->size)); - - ring->buf[i].desc->ctrl = DESC_EMPTY; - ring->buf[i].skb = NULL; - } - - /* flush descriptors */ - wmb(); - - ring->curr = 0; - ring->dirty = 0; -} - -static void ag71xx_ring_rx_clean(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - int i; - - if (!ring->buf) - return; - - for (i = 0; i < ring->size; i++) - if (ring->buf[i].skb) { - dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, - AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE); - kfree_skb(ring->buf[i].skb); - } -} - -static int ag71xx_rx_reserve(struct ag71xx *ag) -{ - int reserve = 0; - - if (ag71xx_get_pdata(ag)->is_ar724x) { - if (!ag71xx_has_ar8216(ag)) - reserve = 2; - - if (ag->phy_dev) - reserve += 4 - (ag->phy_dev->pkt_align % 4); - - reserve %= 4; - } - - return reserve + AG71XX_RX_PKT_RESERVE; -} - - -static int ag71xx_ring_rx_init(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - unsigned int reserve = ag71xx_rx_reserve(ag); - unsigned int i; - int ret; - - ret = 0; - for (i = 0; i < ring->size; i++) { - ring->buf[i].desc->next = (u32) (ring->descs_dma + - ring->desc_size * ((i + 1) % ring->size)); - - DBG("ag71xx: RX desc at %p, next is %08x\n", - ring->buf[i].desc, - ring->buf[i].desc->next); - } - - for (i = 0; i < ring->size; i++) { - struct sk_buff *skb; - dma_addr_t dma_addr; - - skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + reserve); - if (!skb) { - ret = -ENOMEM; - break; - } - - skb->dev = ag->dev; - skb_reserve(skb, reserve); - - dma_addr = dma_map_single(&ag->dev->dev, skb->data, - AG71XX_RX_PKT_SIZE, - DMA_FROM_DEVICE); - ring->buf[i].skb = skb; - ring->buf[i].dma_addr = dma_addr; - ring->buf[i].desc->data = (u32) dma_addr; - ring->buf[i].desc->ctrl = DESC_EMPTY; - } - - /* flush descriptors */ - wmb(); - - ring->curr = 0; - ring->dirty = 0; - - return ret; -} - -static int ag71xx_ring_rx_refill(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->rx_ring; - unsigned int reserve = ag71xx_rx_reserve(ag); - unsigned int count; - - count = 0; - for (; ring->curr - ring->dirty > 0; ring->dirty++) { - unsigned int i; - - i = ring->dirty % ring->size; - - if (ring->buf[i].skb == NULL) { - dma_addr_t dma_addr; - struct sk_buff *skb; - - skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + reserve); - if (skb == NULL) - break; - - skb_reserve(skb, reserve); - skb->dev = ag->dev; - - dma_addr = dma_map_single(&ag->dev->dev, skb->data, - AG71XX_RX_PKT_SIZE, - DMA_FROM_DEVICE); - - ring->buf[i].skb = skb; - ring->buf[i].dma_addr = dma_addr; - ring->buf[i].desc->data = (u32) dma_addr; - } - - ring->buf[i].desc->ctrl = DESC_EMPTY; - count++; - } - - /* flush descriptors */ - wmb(); - - DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count); - - return count; -} - -static int ag71xx_rings_init(struct ag71xx *ag) -{ - int ret; - - ret = ag71xx_ring_alloc(&ag->tx_ring); - if (ret) - return ret; - - ag71xx_ring_tx_init(ag); - - ret = ag71xx_ring_alloc(&ag->rx_ring); - if (ret) - return ret; - - ret = ag71xx_ring_rx_init(ag); - return ret; -} - -static void ag71xx_rings_cleanup(struct ag71xx *ag) -{ - ag71xx_ring_rx_clean(ag); - ag71xx_ring_free(&ag->rx_ring); - - ag71xx_ring_tx_clean(ag); - ag71xx_ring_free(&ag->tx_ring); -} - -static unsigned char *ag71xx_speed_str(struct ag71xx *ag) -{ - switch (ag->speed) { - case SPEED_1000: - return "1000"; - case SPEED_100: - return "100"; - case SPEED_10: - return "10"; - } - - return "?"; -} - -static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) -{ - u32 t; - - t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16) - | (((u32) mac[3]) << 8) | ((u32) mac[2]); - - ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); - - t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16); - ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); -} - -static void ag71xx_dma_reset(struct ag71xx *ag) -{ - u32 val; - int i; - - ag71xx_dump_dma_regs(ag); - - /* stop RX and TX */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); - - /* - * give the hardware some time to really stop all rx/tx activity - * clearing the descriptors too early causes random memory corruption - */ - mdelay(1); - - /* clear descriptor addresses */ - ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); - ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); - - /* clear pending RX/TX interrupts */ - for (i = 0; i < 256; i++) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); - } - - /* clear pending errors */ - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); - - val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); - if (val) - pr_alert("%s: unable to clear DMA Rx status: %08x\n", - ag->dev->name, val); - - val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); - - /* mask out reserved bits */ - val &= ~0xff000000; - - if (val) - pr_alert("%s: unable to clear DMA Tx status: %08x\n", - ag->dev->name, val); - - ag71xx_dump_dma_regs(ag); -} - -#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \ - MAC_CFG1_SRX | MAC_CFG1_STX) - -#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT) - -#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \ - FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \ - FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \ - FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \ - FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \ - FIFO_CFG4_VT) - -#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ - FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ - FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ - FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ - FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ - FIFO_CFG5_17 | FIFO_CFG5_SF) - -static void ag71xx_hw_stop(struct ag71xx *ag) -{ - /* disable all interrupts and stop the rx/tx engine */ - ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); -} - -static void ag71xx_hw_setup(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - /* setup MAC configuration registers */ - ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); - - ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, - MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); - - /* setup max frame length */ - ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN); - - /* setup FIFO configuration registers */ - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); - if (pdata->is_ar724x) { - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); - } else { - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); - } - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); -} - -static void ag71xx_hw_init(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - u32 reset_mask = pdata->reset_bit; - - ag71xx_hw_stop(ag); - - if (pdata->is_ar724x) { - u32 reset_phy = reset_mask; - - reset_phy &= AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY; - reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY); - - ath79_device_reset_set(reset_phy); - mdelay(50); - ath79_device_reset_clear(reset_phy); - mdelay(200); - } - - ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); - udelay(20); - - ath79_device_reset_set(reset_mask); - mdelay(100); - ath79_device_reset_clear(reset_mask); - mdelay(200); - - ag71xx_hw_setup(ag); - - ag71xx_dma_reset(ag); -} - -static void ag71xx_fast_reset(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct net_device *dev = ag->dev; - u32 reset_mask = pdata->reset_bit; - u32 rx_ds, tx_ds; - u32 mii_reg; - - reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC; - - mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); - rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); - tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC); - - ath79_device_reset_set(reset_mask); - udelay(10); - ath79_device_reset_clear(reset_mask); - udelay(10); - - ag71xx_dma_reset(ag); - ag71xx_hw_setup(ag); - - ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); - ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds); - ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); - - ag71xx_hw_set_macaddr(ag, dev->dev_addr); -} - -static void ag71xx_hw_start(struct ag71xx *ag) -{ - /* start RX engine */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); - - /* enable interrupts */ - ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); -} - -void ag71xx_link_adjust(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - u32 cfg2; - u32 ifctl; - u32 fifo5; - - if (!ag->link) { - ag71xx_hw_stop(ag); - netif_carrier_off(ag->dev); - if (netif_msg_link(ag)) - pr_info("%s: link down\n", ag->dev->name); - return; - } - - if (pdata->is_ar724x) - ag71xx_fast_reset(ag); - - cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); - cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); - cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0; - - ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); - ifctl &= ~(MAC_IFCTL_SPEED); - - fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); - fifo5 &= ~FIFO_CFG5_BM; - - switch (ag->speed) { - case SPEED_1000: - cfg2 |= MAC_CFG2_IF_1000; - fifo5 |= FIFO_CFG5_BM; - break; - case SPEED_100: - cfg2 |= MAC_CFG2_IF_10_100; - ifctl |= MAC_IFCTL_SPEED; - break; - case SPEED_10: - cfg2 |= MAC_CFG2_IF_10_100; - break; - default: - BUG(); - return; - } - - if (pdata->is_ar91xx) - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff); - else if (pdata->is_ar724x) - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3); - else - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff); - - if (pdata->set_speed) - pdata->set_speed(ag->speed); - - ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); - ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); - ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); - ag71xx_hw_start(ag); - - netif_carrier_on(ag->dev); - if (netif_msg_link(ag)) - pr_info("%s: link up (%sMbps/%s duplex)\n", - ag->dev->name, - ag71xx_speed_str(ag), - (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); - - DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); - - DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), - ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); - - DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n", - ag->dev->name, - ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), - ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL)); -} - -static int ag71xx_open(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - int ret; - - ret = ag71xx_rings_init(ag); - if (ret) - goto err; - - napi_enable(&ag->napi); - - netif_carrier_off(dev); - ag71xx_phy_start(ag); - - ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); - ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); - - ag71xx_hw_set_macaddr(ag, dev->dev_addr); - - netif_start_queue(dev); - - return 0; - -err: - ag71xx_rings_cleanup(ag); - return ret; -} - -static int ag71xx_stop(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - unsigned long flags; - - netif_carrier_off(dev); - ag71xx_phy_stop(ag); - - spin_lock_irqsave(&ag->lock, flags); - - netif_stop_queue(dev); - - ag71xx_hw_stop(ag); - ag71xx_dma_reset(ag); - - napi_disable(&ag->napi); - del_timer_sync(&ag->oom_timer); - - spin_unlock_irqrestore(&ag->lock, flags); - - ag71xx_rings_cleanup(ag); - - return 0; -} - -static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, - struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - struct ag71xx_ring *ring = &ag->tx_ring; - struct ag71xx_desc *desc; - dma_addr_t dma_addr; - int i; - - i = ring->curr % ring->size; - desc = ring->buf[i].desc; - - if (!ag71xx_desc_empty(desc)) - goto err_drop; - - if (ag71xx_has_ar8216(ag)) - ag71xx_add_ar8216_header(ag, skb); - - if (skb->len <= 0) { - DBG("%s: packet len is too small\n", ag->dev->name); - goto err_drop; - } - - dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, - DMA_TO_DEVICE); - - ring->buf[i].skb = skb; - ring->buf[i].timestamp = jiffies; - - /* setup descriptor fields */ - desc->data = (u32) dma_addr; - desc->ctrl = (skb->len & DESC_PKTLEN_M); - - /* flush descriptor */ - wmb(); - - ring->curr++; - if (ring->curr == (ring->dirty + ring->size)) { - DBG("%s: tx queue full\n", ag->dev->name); - netif_stop_queue(dev); - } - - DBG("%s: packet injected into TX queue\n", ag->dev->name); - - /* enable TX engine */ - ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); - - return NETDEV_TX_OK; - -err_drop: - dev->stats.tx_dropped++; - - dev_kfree_skb(skb); - return NETDEV_TX_OK; -} - -static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -{ - struct ag71xx *ag = netdev_priv(dev); - int ret; - - switch (cmd) { - case SIOCETHTOOL: - if (ag->phy_dev == NULL) - break; - - spin_lock_irq(&ag->lock); - ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data); - spin_unlock_irq(&ag->lock); - return ret; - - case SIOCSIFHWADDR: - if (copy_from_user - (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGIFHWADDR: - if (copy_to_user - (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) - return -EFAULT; - return 0; - - case SIOCGMIIPHY: - case SIOCGMIIREG: - case SIOCSMIIREG: - if (ag->phy_dev == NULL) - break; - - return phy_mii_ioctl(ag->phy_dev, ifr, cmd); - - default: - break; - } - - return -EOPNOTSUPP; -} - -static void ag71xx_oom_timer_handler(unsigned long data) -{ - struct net_device *dev = (struct net_device *) data; - struct ag71xx *ag = netdev_priv(dev); - - napi_schedule(&ag->napi); -} - -static void ag71xx_tx_timeout(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - - if (netif_msg_tx_err(ag)) - pr_info("%s: tx timeout\n", ag->dev->name); - - schedule_work(&ag->restart_work); -} - -static void ag71xx_restart_work_func(struct work_struct *work) -{ - struct ag71xx *ag = container_of(work, struct ag71xx, restart_work); - - if (ag71xx_get_pdata(ag)->is_ar724x) { - ag->link = 0; - ag71xx_link_adjust(ag); - return; - } - - ag71xx_stop(ag->dev); - ag71xx_open(ag->dev); -} - -static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) -{ - u32 rx_sm, tx_sm, rx_fd; - - if (likely(time_before(jiffies, timestamp + HZ/10))) - return false; - - if (!netif_carrier_ok(ag->dev)) - return false; - - rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); - if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6) - return true; - - tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); - rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); - if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) && - ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0) - return true; - - return false; -} - -static int ag71xx_tx_packets(struct ag71xx *ag) -{ - struct ag71xx_ring *ring = &ag->tx_ring; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - int sent; - - DBG("%s: processing TX ring\n", ag->dev->name); - - sent = 0; - while (ring->dirty != ring->curr) { - unsigned int i = ring->dirty % ring->size; - struct ag71xx_desc *desc = ring->buf[i].desc; - struct sk_buff *skb = ring->buf[i].skb; - - if (!ag71xx_desc_empty(desc)) { - if (pdata->is_ar7240 && - ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) - schedule_work(&ag->restart_work); - break; - } - - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); - - ag->dev->stats.tx_bytes += skb->len; - ag->dev->stats.tx_packets++; - - dev_kfree_skb_any(skb); - ring->buf[i].skb = NULL; - - ring->dirty++; - sent++; - } - - DBG("%s: %d packets sent out\n", ag->dev->name, sent); - - if ((ring->curr - ring->dirty) < (ring->size * 3) / 4) - netif_wake_queue(ag->dev); - - return sent; -} - -static int ag71xx_rx_packets(struct ag71xx *ag, int limit) -{ - struct net_device *dev = ag->dev; - struct ag71xx_ring *ring = &ag->rx_ring; - int done = 0; - - DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n", - dev->name, limit, ring->curr, ring->dirty); - - while (done < limit) { - unsigned int i = ring->curr % ring->size; - struct ag71xx_desc *desc = ring->buf[i].desc; - struct sk_buff *skb; - int pktlen; - int err = 0; - - if (ag71xx_desc_empty(desc)) - break; - - if ((ring->dirty + ring->size) == ring->curr) { - ag71xx_assert(0); - break; - } - - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); - - skb = ring->buf[i].skb; - pktlen = ag71xx_desc_pktlen(desc); - pktlen -= ETH_FCS_LEN; - - dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, - AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE); - - dev->last_rx = jiffies; - dev->stats.rx_packets++; - dev->stats.rx_bytes += pktlen; - - skb_put(skb, pktlen); - if (ag71xx_has_ar8216(ag)) - err = ag71xx_remove_ar8216_header(ag, skb, pktlen); - - if (err) { - dev->stats.rx_dropped++; - kfree_skb(skb); - } else { - skb->dev = dev; - skb->ip_summed = CHECKSUM_NONE; - if (ag->phy_dev) { - ag->phy_dev->netif_receive_skb(skb); - } else { - skb->protocol = eth_type_trans(skb, dev); - netif_receive_skb(skb); - } - } - - ring->buf[i].skb = NULL; - done++; - - ring->curr++; - } - - ag71xx_ring_rx_refill(ag); - - DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", - dev->name, ring->curr, ring->dirty, done); - - return done; -} - -static int ag71xx_poll(struct napi_struct *napi, int limit) -{ - struct ag71xx *ag = container_of(napi, struct ag71xx, napi); - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct net_device *dev = ag->dev; - struct ag71xx_ring *rx_ring; - unsigned long flags; - u32 status; - int tx_done; - int rx_done; - - pdata->ddr_flush(); - tx_done = ag71xx_tx_packets(ag); - - DBG("%s: processing RX ring\n", dev->name); - rx_done = ag71xx_rx_packets(ag, limit); - - ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done); - - rx_ring = &ag->rx_ring; - if (rx_ring->buf[rx_ring->dirty % rx_ring->size].skb == NULL) - goto oom; - - status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); - if (unlikely(status & RX_STATUS_OF)) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); - dev->stats.rx_fifo_errors++; - - /* restart RX */ - ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); - } - - if (rx_done < limit) { - if (status & RX_STATUS_PR) - goto more; - - status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); - if (status & TX_STATUS_PS) - goto more; - - DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", - dev->name, rx_done, tx_done, limit); - - napi_complete(napi); - - /* enable interrupts */ - spin_lock_irqsave(&ag->lock, flags); - ag71xx_int_enable(ag, AG71XX_INT_POLL); - spin_unlock_irqrestore(&ag->lock, flags); - return rx_done; - } - -more: - DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n", - dev->name, rx_done, tx_done, limit); - return rx_done; - -oom: - if (netif_msg_rx_err(ag)) - pr_info("%s: out of memory\n", dev->name); - - mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); - napi_complete(napi); - return 0; -} - -static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - struct ag71xx *ag = netdev_priv(dev); - u32 status; - - status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); - ag71xx_dump_intr(ag, "raw", status); - - if (unlikely(!status)) - return IRQ_NONE; - - if (unlikely(status & AG71XX_INT_ERR)) { - if (status & AG71XX_INT_TX_BE) { - ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); - dev_err(&dev->dev, "TX BUS error\n"); - } - if (status & AG71XX_INT_RX_BE) { - ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); - dev_err(&dev->dev, "RX BUS error\n"); - } - } - - if (likely(status & AG71XX_INT_POLL)) { - ag71xx_int_disable(ag, AG71XX_INT_POLL); - DBG("%s: enable polling mode\n", dev->name); - napi_schedule(&ag->napi); - } - - ag71xx_debugfs_update_int_stats(ag, status); - - return IRQ_HANDLED; -} - -#ifdef CONFIG_NET_POLL_CONTROLLER -/* - * Polling 'interrupt' - used by things like netconsole to send skbs - * without having to re-enable interrupts. It's not called while - * the interrupt routine is executing. - */ -static void ag71xx_netpoll(struct net_device *dev) -{ - disable_irq(dev->irq); - ag71xx_interrupt(dev->irq, dev); - enable_irq(dev->irq); -} -#endif - -static const struct net_device_ops ag71xx_netdev_ops = { - .ndo_open = ag71xx_open, - .ndo_stop = ag71xx_stop, - .ndo_start_xmit = ag71xx_hard_start_xmit, - .ndo_do_ioctl = ag71xx_do_ioctl, - .ndo_tx_timeout = ag71xx_tx_timeout, - .ndo_change_mtu = eth_change_mtu, - .ndo_set_mac_address = eth_mac_addr, - .ndo_validate_addr = eth_validate_addr, -#ifdef CONFIG_NET_POLL_CONTROLLER - .ndo_poll_controller = ag71xx_netpoll, -#endif -}; - -static int __devinit ag71xx_probe(struct platform_device *pdev) -{ - struct net_device *dev; - struct resource *res; - struct ag71xx *ag; - struct ag71xx_platform_data *pdata; - int err; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "no platform data specified\n"); - err = -ENXIO; - goto err_out; - } - - if (pdata->mii_bus_dev == NULL) { - dev_err(&pdev->dev, "no MII bus device specified\n"); - err = -EINVAL; - goto err_out; - } - - dev = alloc_etherdev(sizeof(*ag)); - if (!dev) { - dev_err(&pdev->dev, "alloc_etherdev failed\n"); - err = -ENOMEM; - goto err_out; - } - - SET_NETDEV_DEV(dev, &pdev->dev); - - ag = netdev_priv(dev); - ag->pdev = pdev; - ag->dev = dev; - ag->msg_enable = netif_msg_init(ag71xx_msg_level, - AG71XX_DEFAULT_MSG_ENABLE); - spin_lock_init(&ag->lock); - - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base"); - if (!res) { - dev_err(&pdev->dev, "no mac_base resource found\n"); - err = -ENXIO; - goto err_out; - } - - ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1); - if (!ag->mac_base) { - dev_err(&pdev->dev, "unable to ioremap mac_base\n"); - err = -ENOMEM; - goto err_free_dev; - } - - dev->irq = platform_get_irq(pdev, 0); - err = request_irq(dev->irq, ag71xx_interrupt, - IRQF_DISABLED, - dev->name, dev); - if (err) { - dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); - goto err_unmap_base; - } - - dev->base_addr = (unsigned long)ag->mac_base; - dev->netdev_ops = &ag71xx_netdev_ops; - dev->ethtool_ops = &ag71xx_ethtool_ops; - - INIT_WORK(&ag->restart_work, ag71xx_restart_work_func); - - init_timer(&ag->oom_timer); - ag->oom_timer.data = (unsigned long) dev; - ag->oom_timer.function = ag71xx_oom_timer_handler; - - ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT; - ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT; - - ag->stop_desc = dma_alloc_coherent(NULL, - sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); - - if (!ag->stop_desc) - goto err_free_irq; - - ag->stop_desc->data = 0; - ag->stop_desc->ctrl = 0; - ag->stop_desc->next = (u32) ag->stop_desc_dma; - - memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN); - - netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); - - err = register_netdev(dev); - if (err) { - dev_err(&pdev->dev, "unable to register net device\n"); - goto err_free_desc; - } - - pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d\n", - dev->name, dev->base_addr, dev->irq); - - ag71xx_dump_regs(ag); - - ag71xx_hw_init(ag); - - ag71xx_dump_regs(ag); - - err = ag71xx_phy_connect(ag); - if (err) - goto err_unregister_netdev; - - err = ag71xx_debugfs_init(ag); - if (err) - goto err_phy_disconnect; - - platform_set_drvdata(pdev, dev); - - return 0; - -err_phy_disconnect: - ag71xx_phy_disconnect(ag); -err_unregister_netdev: - unregister_netdev(dev); -err_free_desc: - dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc, - ag->stop_desc_dma); -err_free_irq: - free_irq(dev->irq, dev); -err_unmap_base: - iounmap(ag->mac_base); -err_free_dev: - kfree(dev); -err_out: - platform_set_drvdata(pdev, NULL); - return err; -} - -static int __devexit ag71xx_remove(struct platform_device *pdev) -{ - struct net_device *dev = platform_get_drvdata(pdev); - - if (dev) { - struct ag71xx *ag = netdev_priv(dev); - - ag71xx_debugfs_exit(ag); - ag71xx_phy_disconnect(ag); - unregister_netdev(dev); - free_irq(dev->irq, dev); - iounmap(ag->mac_base); - kfree(dev); - platform_set_drvdata(pdev, NULL); - } - - return 0; -} - -static struct platform_driver ag71xx_driver = { - .probe = ag71xx_probe, - .remove = __exit_p(ag71xx_remove), - .driver = { - .name = AG71XX_DRV_NAME, - } -}; - -static int __init ag71xx_module_init(void) -{ - int ret; - - ret = ag71xx_debugfs_root_init(); - if (ret) - goto err_out; - - ret = ag71xx_mdio_driver_init(); - if (ret) - goto err_debugfs_exit; - - ret = platform_driver_register(&ag71xx_driver); - if (ret) - goto err_mdio_exit; - - return 0; - -err_mdio_exit: - ag71xx_mdio_driver_exit(); -err_debugfs_exit: - ag71xx_debugfs_root_exit(); -err_out: - return ret; -} - -static void __exit ag71xx_module_exit(void) -{ - platform_driver_unregister(&ag71xx_driver); - ag71xx_mdio_driver_exit(); - ag71xx_debugfs_root_exit(); -} - -module_init(ag71xx_module_init); -module_exit(ag71xx_module_exit); - -MODULE_VERSION(AG71XX_DRV_VERSION); -MODULE_AUTHOR("Gabor Juhos "); -MODULE_AUTHOR("Imre Kaloz "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" AG71XX_DRV_NAME); diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c deleted file mode 100644 index 552c7bfbac..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ /dev/null @@ -1,246 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -#define AG71XX_MDIO_RETRY 1000 -#define AG71XX_MDIO_DELAY 5 - -static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg, - u32 value) -{ - void __iomem *r; - - r = am->mdio_base + reg; - __raw_writel(value, r); - - /* flush write */ - (void) __raw_readl(r); -} - -static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg) -{ - return __raw_readl(am->mdio_base + reg); -} - -static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am) -{ - DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n", - am->mii_bus->name, - ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG), - ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD), - ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR)); - DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n", - am->mii_bus->name, - ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL), - ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS), - ag71xx_mdio_rr(am, AG71XX_REG_MII_IND)); -} - -int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg) -{ - int ret; - int i; - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); - ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, - ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ); - - i = AG71XX_MDIO_RETRY; - while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) { - if (i-- == 0) { - pr_err("%s: mii_read timed out\n", am->mii_bus->name); - ret = 0xffff; - goto out; - } - udelay(AG71XX_MDIO_DELAY); - } - - ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff; - ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); - - DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); - -out: - return ret; -} - -void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val) -{ - int i; - - DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); - - ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, - ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); - ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val); - - i = AG71XX_MDIO_RETRY; - while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) { - if (i-- == 0) { - pr_err("%s: mii_write timed out\n", am->mii_bus->name); - break; - } - udelay(AG71XX_MDIO_DELAY); - } -} - -static int ag71xx_mdio_reset(struct mii_bus *bus) -{ - struct ag71xx_mdio *am = bus->priv; - u32 t; - - if (am->pdata->is_ar7240) - t = MII_CFG_CLK_DIV_6; - else - t = MII_CFG_CLK_DIV_28; - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); - udelay(100); - - ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t); - udelay(100); - - return 0; -} - -static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg) -{ - struct ag71xx_mdio *am = bus->priv; - - if (am->pdata->is_ar7240) - return ar7240sw_phy_read(bus, addr, reg); - else - return ag71xx_mdio_mii_read(am, addr, reg); -} - -static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val) -{ - struct ag71xx_mdio *am = bus->priv; - - if (am->pdata->is_ar7240) - ar7240sw_phy_write(bus, addr, reg, val); - else - ag71xx_mdio_mii_write(am, addr, reg, val); - return 0; -} - -static int __devinit ag71xx_mdio_probe(struct platform_device *pdev) -{ - struct ag71xx_mdio_platform_data *pdata; - struct ag71xx_mdio *am; - struct resource *res; - int i; - int err; - - pdata = pdev->dev.platform_data; - if (!pdata) { - dev_err(&pdev->dev, "no platform data specified\n"); - return -EINVAL; - } - - am = kzalloc(sizeof(*am), GFP_KERNEL); - if (!am) { - err = -ENOMEM; - goto err_out; - } - - am->pdata = pdata; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&pdev->dev, "no iomem resource found\n"); - err = -ENXIO; - goto err_out; - } - - am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1); - if (!am->mdio_base) { - dev_err(&pdev->dev, "unable to ioremap registers\n"); - err = -ENOMEM; - goto err_free_mdio; - } - - am->mii_bus = mdiobus_alloc(); - if (am->mii_bus == NULL) { - err = -ENOMEM; - goto err_iounmap; - } - - am->mii_bus->name = "ag71xx_mdio"; - am->mii_bus->read = ag71xx_mdio_read; - am->mii_bus->write = ag71xx_mdio_write; - am->mii_bus->reset = ag71xx_mdio_reset; - am->mii_bus->irq = am->mii_irq; - am->mii_bus->priv = am; - am->mii_bus->parent = &pdev->dev; - snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); - am->mii_bus->phy_mask = pdata->phy_mask; - - for (i = 0; i < PHY_MAX_ADDR; i++) - am->mii_irq[i] = PHY_POLL; - - ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); - - err = mdiobus_register(am->mii_bus); - if (err) - goto err_free_bus; - - ag71xx_mdio_dump_regs(am); - - platform_set_drvdata(pdev, am); - return 0; - -err_free_bus: - mdiobus_free(am->mii_bus); -err_iounmap: - iounmap(am->mdio_base); -err_free_mdio: - kfree(am); -err_out: - return err; -} - -static int __devexit ag71xx_mdio_remove(struct platform_device *pdev) -{ - struct ag71xx_mdio *am = platform_get_drvdata(pdev); - - if (am) { - mdiobus_unregister(am->mii_bus); - mdiobus_free(am->mii_bus); - iounmap(am->mdio_base); - kfree(am); - platform_set_drvdata(pdev, NULL); - } - - return 0; -} - -static struct platform_driver ag71xx_mdio_driver = { - .probe = ag71xx_mdio_probe, - .remove = __exit_p(ag71xx_mdio_remove), - .driver = { - .name = "ag71xx-mdio", - } -}; - -int __init ag71xx_mdio_driver_init(void) -{ - return platform_driver_register(&ag71xx_mdio_driver); -} - -void ag71xx_mdio_driver_exit(void) -{ - platform_driver_unregister(&ag71xx_mdio_driver); -} diff --git a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c deleted file mode 100644 index ebdbc5b9ac..0000000000 --- a/target/linux/ar71xx/files-3.2/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c +++ /dev/null @@ -1,235 +0,0 @@ -/* - * Atheros AR71xx built-in ethernet mac driver - * - * Copyright (C) 2008-2010 Gabor Juhos - * Copyright (C) 2008 Imre Kaloz - * - * Based on Atheros' AG7100 driver - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - */ - -#include "ag71xx.h" - -static void ag71xx_phy_link_adjust(struct net_device *dev) -{ - struct ag71xx *ag = netdev_priv(dev); - struct phy_device *phydev = ag->phy_dev; - unsigned long flags; - int status_change = 0; - - spin_lock_irqsave(&ag->lock, flags); - - if (phydev->link) { - if (ag->duplex != phydev->duplex - || ag->speed != phydev->speed) { - status_change = 1; - } - } - - if (phydev->link != ag->link) - status_change = 1; - - ag->link = phydev->link; - ag->duplex = phydev->duplex; - ag->speed = phydev->speed; - - if (status_change) - ag71xx_link_adjust(ag); - - spin_unlock_irqrestore(&ag->lock, flags); -} - -void ag71xx_phy_start(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (ag->phy_dev) { - phy_start(ag->phy_dev); - } else if (pdata->switch_data) { - ag71xx_ar7240_start(ag); - } else { - ag->link = 1; - ag71xx_link_adjust(ag); - } -} - -void ag71xx_phy_stop(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - unsigned long flags; - - if (ag->phy_dev) - phy_stop(ag->phy_dev); - else if (pdata->switch_data) - ag71xx_ar7240_stop(ag); - - spin_lock_irqsave(&ag->lock, flags); - if (ag->link) { - ag->link = 0; - ag71xx_link_adjust(ag); - } - spin_unlock_irqrestore(&ag->lock, flags); -} - -static int ag71xx_phy_connect_fixed(struct ag71xx *ag) -{ - struct net_device *dev = ag->dev; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - int ret = 0; - - /* use fixed settings */ - switch (pdata->speed) { - case SPEED_10: - case SPEED_100: - case SPEED_1000: - break; - default: - netdev_err(dev, "invalid speed specified\n"); - ret = -EINVAL; - break; - } - - netdev_dbg(dev, "using fixed link parameters\n"); - - ag->duplex = pdata->duplex; - ag->speed = pdata->speed; - - return ret; -} - -static int ag71xx_phy_connect_multi(struct ag71xx *ag) -{ - struct net_device *dev = ag->dev; - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - struct phy_device *phydev = NULL; - int phy_addr; - int ret = 0; - - for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { - if (!(pdata->phy_mask & (1 << phy_addr))) - continue; - - if (ag->mii_bus->phy_map[phy_addr] == NULL) - continue; - - DBG("%s: PHY found at %s, uid=%08x\n", - dev->name, - dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), - ag->mii_bus->phy_map[phy_addr]->phy_id); - - if (phydev == NULL) - phydev = ag->mii_bus->phy_map[phy_addr]; - } - - if (!phydev) { - netdev_err(dev, "no PHY found with phy_mask=%08x\n", - pdata->phy_mask); - return -ENODEV; - } - - ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev), - &ag71xx_phy_link_adjust, 0, - pdata->phy_if_mode); - - if (IS_ERR(ag->phy_dev)) { - netdev_err(dev, "could not connect to PHY at %s\n", - dev_name(&phydev->dev)); - return PTR_ERR(ag->phy_dev); - } - - /* mask with MAC supported features */ - if (pdata->has_gbit) - phydev->supported &= PHY_GBIT_FEATURES; - else - phydev->supported &= PHY_BASIC_FEATURES; - - phydev->advertising = phydev->supported; - - netdev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", - dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); - - ag->link = 0; - ag->speed = 0; - ag->duplex = -1; - - return ret; -} - -static int dev_is_class(struct device *dev, void *class) -{ - if (dev->class != NULL && !strcmp(dev->class->name, class)) - return 1; - - return 0; -} - -static struct device *dev_find_class(struct device *parent, char *class) -{ - if (dev_is_class(parent, class)) { - get_device(parent); - return parent; - } - - return device_find_child(parent, class, dev_is_class); -} - -static struct mii_bus *dev_to_mii_bus(struct device *dev) -{ - struct device *d; - - d = dev_find_class(dev, "mdio_bus"); - if (d != NULL) { - struct mii_bus *bus; - - bus = to_mii_bus(d); - put_device(d); - - return bus; - } - - return NULL; -} - -int __devinit ag71xx_phy_connect(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (pdata->mii_bus_dev == NULL || - pdata->mii_bus_dev->bus == NULL ) - return ag71xx_phy_connect_fixed(ag); - - ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev); - if (ag->mii_bus == NULL) { - netdev_err(ag->dev, "unable to find MII bus on device '%s'\n", - dev_name(pdata->mii_bus_dev)); - return -ENODEV; - } - - /* Reset the mdio bus explicitly */ - if (ag->mii_bus->reset) { - mutex_lock(&ag->mii_bus->mdio_lock); - ag->mii_bus->reset(ag->mii_bus); - mutex_unlock(&ag->mii_bus->mdio_lock); - } - - if (pdata->switch_data) - return ag71xx_ar7240_init(ag); - - if (pdata->phy_mask) - return ag71xx_phy_connect_multi(ag); - - return ag71xx_phy_connect_fixed(ag); -} - -void ag71xx_phy_disconnect(struct ag71xx *ag) -{ - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (pdata->switch_data) - ag71xx_ar7240_cleanup(ag); - else if (ag->phy_dev) - phy_disconnect(ag->phy_dev); -} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c new file mode 100644 index 0000000000..1b08254861 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.c @@ -0,0 +1,141 @@ +/* + * Atheros AP9X reference board PCI initialization + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#include "dev-ap9x-pci.h" +#include "pci-ath9k-fixup.h" +#include "pci.h" + +static struct ath9k_platform_data ap9x_wmac0_data = { + .led_pin = -1, +}; +static struct ath9k_platform_data ap9x_wmac1_data = { + .led_pin = -1, +}; +static char ap9x_wmac0_mac[6]; +static char ap9x_wmac1_mac[6]; + +__init void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) +{ + switch (wmac) { + case 0: + ap9x_wmac0_data.led_pin = pin; + break; + case 1: + ap9x_wmac1_data.led_pin = pin; + break; + } +} + +__init void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val) +{ + switch (wmac) { + case 0: + ap9x_wmac0_data.gpio_mask = mask; + ap9x_wmac0_data.gpio_val = val; + break; + case 1: + ap9x_wmac1_data.gpio_mask = mask; + ap9x_wmac1_data.gpio_val = val; + break; + } +} + +__init void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, + int num_leds) +{ + switch (wmac) { + case 0: + ap9x_wmac0_data.leds = leds; + ap9x_wmac0_data.num_leds = num_leds; + break; + case 1: + ap9x_wmac1_data.leds = leds; + ap9x_wmac1_data.num_leds = num_leds; + break; + } +} + +static int ap91_pci_plat_dev_init(struct pci_dev *dev) +{ + switch (PCI_SLOT(dev->devfn)) { + case 0: + dev->dev.platform_data = &ap9x_wmac0_data; + break; + } + + return 0; +} + +__init void ap91_pci_init(u8 *cal_data, u8 *mac_addr) +{ + if (cal_data) + memcpy(ap9x_wmac0_data.eeprom_data, cal_data, + sizeof(ap9x_wmac0_data.eeprom_data)); + + if (mac_addr) { + memcpy(ap9x_wmac0_mac, mac_addr, sizeof(ap9x_wmac0_mac)); + ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; + } + + ath79_pci_set_plat_dev_init(ap91_pci_plat_dev_init); + ath79_register_pci(); + + pci_enable_ath9k_fixup(0, ap9x_wmac0_data.eeprom_data); +} + +static int ap94_pci_plat_dev_init(struct pci_dev *dev) +{ + switch (PCI_SLOT(dev->devfn)) { + case 17: + dev->dev.platform_data = &ap9x_wmac0_data; + break; + + case 18: + dev->dev.platform_data = &ap9x_wmac1_data; + break; + } + + return 0; +} + +__init void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, + u8 *cal_data1, u8 *mac_addr1) +{ + if (cal_data0) + memcpy(ap9x_wmac0_data.eeprom_data, cal_data0, + sizeof(ap9x_wmac0_data.eeprom_data)); + + if (cal_data1) + memcpy(ap9x_wmac1_data.eeprom_data, cal_data1, + sizeof(ap9x_wmac1_data.eeprom_data)); + + if (mac_addr0) { + memcpy(ap9x_wmac0_mac, mac_addr0, sizeof(ap9x_wmac0_mac)); + ap9x_wmac0_data.macaddr = ap9x_wmac0_mac; + } + + if (mac_addr1) { + memcpy(ap9x_wmac1_mac, mac_addr1, sizeof(ap9x_wmac1_mac)); + ap9x_wmac1_data.macaddr = ap9x_wmac1_mac; + } + + ath79_pci_set_plat_dev_init(ap94_pci_plat_dev_init); + ath79_register_pci(); + + pci_enable_ath9k_fixup(17, ap9x_wmac0_data.eeprom_data); + pci_enable_ath9k_fixup(18, ap9x_wmac1_data.eeprom_data); +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h new file mode 100644 index 0000000000..c7f1bb9ec2 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-ap9x-pci.h @@ -0,0 +1,40 @@ +/* + * Atheros AP9X reference board PCI initialization + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_AP9X_PCI_H +#define _ATH79_DEV_AP9X_PCI_H + +struct gpio_led; + +#if defined(CONFIG_ATH79_DEV_AP9X_PCI) +void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin); +void ap9x_pci_setup_wmac_gpio(unsigned wmac, u32 mask, u32 val); +void ap9x_pci_setup_wmac_leds(unsigned wmac, struct gpio_led *leds, + int num_leds); + +void ap91_pci_init(u8 *cal_data, u8 *mac_addr); +void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, + u8 *cal_data1, u8 *mac_addr1); + +#else +static inline void ap9x_pci_setup_wmac_led_pin(unsigned wmac, int pin) {} +static inline void ap9x_pci_setup_wmac_gpio(unsigned wmac, + u32 mask, u32 val) {} +static inline void ap9x_pci_setup_wmac_leds(unsigned wmac, + struct gpio_led *leds, + int num_leds) {} + +static inline void ap91_pci_init(u8 *cal_data, u8 *mac_addr) {} +static inline void ap94_pci_init(u8 *cal_data0, u8 *mac_addr0, + u8 *cal_data1, u8 *mac_addr1) {} +#endif + +#endif /* _ATH79_DEV_AP9X_PCI_H */ + diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c new file mode 100644 index 0000000000..1764147386 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.c @@ -0,0 +1,36 @@ +/* + * Atheros AR71xx DSA switch device support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-dsa.h" + +static struct platform_device ar71xx_dsa_switch_device = { + .name = "dsa", + .id = 0, +}; + +void __init ath79_register_dsa(struct device *netdev, + struct device *miidev, + struct dsa_platform_data *d) +{ + int i; + + d->netdev = netdev; + for (i = 0; i < d->nr_chips; i++) + d->chip[i].mii_bus = miidev; + + ar71xx_dsa_switch_device.dev.platform_data = d; + platform_device_register(&ar71xx_dsa_switch_device); +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h new file mode 100644 index 0000000000..3730202e8d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-dsa.h @@ -0,0 +1,21 @@ +/* + * Atheros AR71xx DSA switch device support + * + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_DSA_H +#define _ATH79_DEV_DSA_H + +#include + +void ath79_register_dsa(struct device *netdev, + struct device *miidev, + struct dsa_platform_data *d); + +#endif /* _ATH79_DEV_DSA_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c new file mode 100644 index 0000000000..27c8a40b60 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -0,0 +1,971 @@ +/* + * Atheros AR71xx SoC platform devices + * + * Copyright (C) 2010-2011 Jaiganesh Narayanan + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Parts of this file are based on Atheros 2.6.15 BSP + * Parts of this file are based on Atheros 2.6.31 BSP + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include "common.h" +#include "dev-eth.h" + +unsigned char ath79_mac_base[ETH_ALEN] __initdata; + +static struct resource ath79_mdio0_resources[] = { + { + .name = "mdio_base", + .flags = IORESOURCE_MEM, + .start = AR71XX_GE0_BASE, + .end = AR71XX_GE0_BASE + 0x200 - 1, + } +}; + +static struct ag71xx_mdio_platform_data ath79_mdio0_data; + +struct platform_device ath79_mdio0_device = { + .name = "ag71xx-mdio", + .id = 0, + .resource = ath79_mdio0_resources, + .num_resources = ARRAY_SIZE(ath79_mdio0_resources), + .dev = { + .platform_data = &ath79_mdio0_data, + }, +}; + +static struct resource ath79_mdio1_resources[] = { + { + .name = "mdio_base", + .flags = IORESOURCE_MEM, + .start = AR71XX_GE1_BASE, + .end = AR71XX_GE1_BASE + 0x200 - 1, + } +}; + +static struct ag71xx_mdio_platform_data ath79_mdio1_data; + +struct platform_device ath79_mdio1_device = { + .name = "ag71xx-mdio", + .id = 1, + .resource = ath79_mdio1_resources, + .num_resources = ARRAY_SIZE(ath79_mdio1_resources), + .dev = { + .platform_data = &ath79_mdio1_data, + }, +}; + +static void ath79_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift) +{ + void __iomem *base; + u32 t; + + base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); + + t = __raw_readl(base + cfg_reg); + t &= ~(3 << shift); + t |= (2 << shift); + __raw_writel(t, base + cfg_reg); + udelay(100); + + __raw_writel(pll_val, base + pll_reg); + + t |= (3 << shift); + __raw_writel(t, base + cfg_reg); + udelay(100); + + t &= ~(3 << shift); + __raw_writel(t, base + cfg_reg); + udelay(100); + + printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n", + (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg)); + + iounmap(base); +} + +static void __init ath79_mii_ctrl_set_if(unsigned int reg, + unsigned int mii_if) +{ + void __iomem *base; + u32 t; + + base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); + + t = __raw_readl(base + reg); + t &= ~(AR71XX_MII_CTRL_IF_MASK); + t |= (mii_if & AR71XX_MII_CTRL_IF_MASK); + __raw_writel(t, base + reg); + + iounmap(base); +} + +static void ath79_mii_ctrl_set_speed(unsigned int reg, unsigned int speed) +{ + void __iomem *base; + unsigned int mii_speed; + u32 t; + + switch (speed) { + case SPEED_10: + mii_speed = AR71XX_MII_CTRL_SPEED_10; + break; + case SPEED_100: + mii_speed = AR71XX_MII_CTRL_SPEED_100; + break; + case SPEED_1000: + mii_speed = AR71XX_MII_CTRL_SPEED_1000; + break; + default: + BUG(); + } + + base = ioremap(AR71XX_MII_BASE, AR71XX_MII_SIZE); + + t = __raw_readl(base + reg); + t &= ~(AR71XX_MII_CTRL_SPEED_MASK << AR71XX_MII_CTRL_SPEED_SHIFT); + t |= mii_speed << AR71XX_MII_CTRL_SPEED_SHIFT; + __raw_writel(t, base + reg); + + iounmap(base); +} + +void __init ath79_register_mdio(unsigned int id, u32 phy_mask) +{ + struct platform_device *mdio_dev; + struct ag71xx_mdio_platform_data *mdio_data; + unsigned int max_id; + + if (ath79_soc == ATH79_SOC_AR9341 || + ath79_soc == ATH79_SOC_AR9342 || + ath79_soc == ATH79_SOC_AR9344) + max_id = 1; + else + max_id = 0; + + if (id > max_id) { + printk(KERN_ERR "ar71xx: invalid MDIO id %u\n", id); + return; + } + + switch (ath79_soc) { + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + mdio_dev = &ath79_mdio1_device; + mdio_data = &ath79_mdio1_data; + break; + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + if (id == 0) { + mdio_dev = &ath79_mdio0_device; + mdio_data = &ath79_mdio0_data; + } else { + mdio_dev = &ath79_mdio1_device; + mdio_data = &ath79_mdio1_data; + } + break; + + case ATH79_SOC_AR7242: + ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, + AR7242_PLL_REG_ETH0_INT_CLOCK, 0x62000000, + AR71XX_ETH0_PLL_SHIFT); + /* fall through */ + default: + mdio_dev = &ath79_mdio0_device; + mdio_data = &ath79_mdio0_data; + break; + } + + mdio_data->phy_mask = phy_mask; + + switch (ath79_soc) { + case ATH79_SOC_AR7240: + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + mdio_data->is_ar7240 = 1; + break; + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + if (id == 1) + mdio_data->is_ar7240 = 1; + break; + + default: + break; + } + + platform_device_register(mdio_dev); +} + +struct ath79_eth_pll_data ath79_eth0_pll_data; +struct ath79_eth_pll_data ath79_eth1_pll_data; + +static u32 ath79_get_eth_pll(unsigned int mac, int speed) +{ + struct ath79_eth_pll_data *pll_data; + u32 pll_val; + + switch (mac) { + case 0: + pll_data = &ath79_eth0_pll_data; + break; + case 1: + pll_data = &ath79_eth1_pll_data; + break; + default: + BUG(); + } + + switch (speed) { + case SPEED_10: + pll_val = pll_data->pll_10; + break; + case SPEED_100: + pll_val = pll_data->pll_100; + break; + case SPEED_1000: + pll_val = pll_data->pll_1000; + break; + default: + BUG(); + } + + return pll_val; +} + +static void ath79_set_speed_ge0(int speed) +{ + u32 val = ath79_get_eth_pll(0, speed); + + ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK, + val, AR71XX_ETH0_PLL_SHIFT); + ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); +} + +static void ath79_set_speed_ge1(int speed) +{ + u32 val = ath79_get_eth_pll(1, speed); + + ath79_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK, + val, AR71XX_ETH1_PLL_SHIFT); + ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); +} + +static void ar724x_set_speed_ge0(int speed) +{ + /* TODO */ +} + +static void ar724x_set_speed_ge1(int speed) +{ + /* TODO */ +} + +static void ar7242_set_speed_ge0(int speed) +{ + u32 val = ath79_get_eth_pll(0, speed); + void __iomem *base; + + base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE); + __raw_writel(val, base + AR7242_PLL_REG_ETH0_INT_CLOCK); + iounmap(base); +} + +static void ar91xx_set_speed_ge0(int speed) +{ + u32 val = ath79_get_eth_pll(0, speed); + + ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH0_INT_CLOCK, + val, AR913X_ETH0_PLL_SHIFT); + ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII0_CTRL, speed); +} + +static void ar91xx_set_speed_ge1(int speed) +{ + u32 val = ath79_get_eth_pll(1, speed); + + ath79_set_pll(AR913X_PLL_REG_ETH_CONFIG, AR913X_PLL_REG_ETH1_INT_CLOCK, + val, AR913X_ETH1_PLL_SHIFT); + ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed); +} + +static void ar933x_set_speed_ge0(int speed) +{ + /* TODO */ +} + +static void ar933x_set_speed_ge1(int speed) +{ + /* TODO */ +} + +static void ar934x_set_speed_ge0(int speed) +{ + /* TODO */ +} + +static void ar934x_set_speed_ge1(int speed) +{ + /* TODO */ +} + +static void ath79_ddr_flush_ge0(void) +{ + ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE0); +} + +static void ath79_ddr_flush_ge1(void) +{ + ath79_ddr_wb_flush(AR71XX_DDR_REG_FLUSH_GE1); +} + +static void ar724x_ddr_flush_ge0(void) +{ + ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE0); +} + +static void ar724x_ddr_flush_ge1(void) +{ + ath79_ddr_wb_flush(AR724X_DDR_REG_FLUSH_GE1); +} + +static void ar91xx_ddr_flush_ge0(void) +{ + ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE0); +} + +static void ar91xx_ddr_flush_ge1(void) +{ + ath79_ddr_wb_flush(AR913X_DDR_REG_FLUSH_GE1); +} + +static void ar933x_ddr_flush_ge0(void) +{ + ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE0); +} + +static void ar933x_ddr_flush_ge1(void) +{ + ath79_ddr_wb_flush(AR933X_DDR_REG_FLUSH_GE1); +} + +static void ar934x_ddr_flush_ge0(void) +{ + ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE0); +} + +static void ar934x_ddr_flush_ge1(void) +{ + ath79_ddr_wb_flush(AR934X_DDR_REG_FLUSH_GE1); +} + +static struct resource ath79_eth0_resources[] = { + { + .name = "mac_base", + .flags = IORESOURCE_MEM, + .start = AR71XX_GE0_BASE, + .end = AR71XX_GE0_BASE + 0x200 - 1, + }, { + .name = "mac_irq", + .flags = IORESOURCE_IRQ, + .start = ATH79_CPU_IRQ_GE0, + .end = ATH79_CPU_IRQ_GE0, + }, +}; + +struct ag71xx_platform_data ath79_eth0_data = { + .reset_bit = AR71XX_RESET_GE0_MAC, +}; + +struct platform_device ath79_eth0_device = { + .name = "ag71xx", + .id = 0, + .resource = ath79_eth0_resources, + .num_resources = ARRAY_SIZE(ath79_eth0_resources), + .dev = { + .platform_data = &ath79_eth0_data, + }, +}; + +static struct resource ath79_eth1_resources[] = { + { + .name = "mac_base", + .flags = IORESOURCE_MEM, + .start = AR71XX_GE1_BASE, + .end = AR71XX_GE1_BASE + 0x200 - 1, + }, { + .name = "mac_irq", + .flags = IORESOURCE_IRQ, + .start = ATH79_CPU_IRQ_GE1, + .end = ATH79_CPU_IRQ_GE1, + }, +}; + +struct ag71xx_platform_data ath79_eth1_data = { + .reset_bit = AR71XX_RESET_GE1_MAC, +}; + +struct platform_device ath79_eth1_device = { + .name = "ag71xx", + .id = 1, + .resource = ath79_eth1_resources, + .num_resources = ARRAY_SIZE(ath79_eth1_resources), + .dev = { + .platform_data = &ath79_eth1_data, + }, +}; + +struct ag71xx_switch_platform_data ath79_switch_data; + +#define AR71XX_PLL_VAL_1000 0x00110000 +#define AR71XX_PLL_VAL_100 0x00001099 +#define AR71XX_PLL_VAL_10 0x00991099 + +#define AR724X_PLL_VAL_1000 0x00110000 +#define AR724X_PLL_VAL_100 0x00001099 +#define AR724X_PLL_VAL_10 0x00991099 + +#define AR7242_PLL_VAL_1000 0x16000000 +#define AR7242_PLL_VAL_100 0x00000101 +#define AR7242_PLL_VAL_10 0x00001616 + +#define AR913X_PLL_VAL_1000 0x1a000000 +#define AR913X_PLL_VAL_100 0x13000a44 +#define AR913X_PLL_VAL_10 0x00441099 + +#define AR933X_PLL_VAL_1000 0x00110000 +#define AR933X_PLL_VAL_100 0x00001099 +#define AR933X_PLL_VAL_10 0x00991099 + +#define AR934X_PLL_VAL_1000 0x00110000 +#define AR934X_PLL_VAL_100 0x00001099 +#define AR934X_PLL_VAL_10 0x00991099 + +static void __init ath79_init_eth_pll_data(unsigned int id) +{ + struct ath79_eth_pll_data *pll_data; + u32 pll_10, pll_100, pll_1000; + + switch (id) { + case 0: + pll_data = &ath79_eth0_pll_data; + break; + case 1: + pll_data = &ath79_eth1_pll_data; + break; + default: + BUG(); + } + + switch (ath79_soc) { + case ATH79_SOC_AR7130: + case ATH79_SOC_AR7141: + case ATH79_SOC_AR7161: + pll_10 = AR71XX_PLL_VAL_10; + pll_100 = AR71XX_PLL_VAL_100; + pll_1000 = AR71XX_PLL_VAL_1000; + break; + + case ATH79_SOC_AR7240: + case ATH79_SOC_AR7241: + pll_10 = AR724X_PLL_VAL_10; + pll_100 = AR724X_PLL_VAL_100; + pll_1000 = AR724X_PLL_VAL_1000; + break; + + case ATH79_SOC_AR7242: + pll_10 = AR7242_PLL_VAL_10; + pll_100 = AR7242_PLL_VAL_100; + pll_1000 = AR7242_PLL_VAL_1000; + break; + + case ATH79_SOC_AR9130: + case ATH79_SOC_AR9132: + pll_10 = AR913X_PLL_VAL_10; + pll_100 = AR913X_PLL_VAL_100; + pll_1000 = AR913X_PLL_VAL_1000; + break; + + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + pll_10 = AR933X_PLL_VAL_10; + pll_100 = AR933X_PLL_VAL_100; + pll_1000 = AR933X_PLL_VAL_1000; + break; + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + pll_10 = AR934X_PLL_VAL_10; + pll_100 = AR934X_PLL_VAL_100; + pll_1000 = AR934X_PLL_VAL_1000; + break; + + default: + BUG(); + } + + if (!pll_data->pll_10) + pll_data->pll_10 = pll_10; + + if (!pll_data->pll_100) + pll_data->pll_100 = pll_100; + + if (!pll_data->pll_1000) + pll_data->pll_1000 = pll_1000; +} + +static int __init ath79_setup_phy_if_mode(unsigned int id, + struct ag71xx_platform_data *pdata) +{ + unsigned int mii_if; + + switch (id) { + case 0: + switch (ath79_soc) { + case ATH79_SOC_AR7130: + case ATH79_SOC_AR7141: + case ATH79_SOC_AR7161: + case ATH79_SOC_AR9130: + case ATH79_SOC_AR9132: + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_MII: + mii_if = AR71XX_MII0_CTRL_IF_MII; + break; + case PHY_INTERFACE_MODE_GMII: + mii_if = AR71XX_MII0_CTRL_IF_GMII; + break; + case PHY_INTERFACE_MODE_RGMII: + mii_if = AR71XX_MII0_CTRL_IF_RGMII; + break; + case PHY_INTERFACE_MODE_RMII: + mii_if = AR71XX_MII0_CTRL_IF_RMII; + break; + default: + return -EINVAL; + } + ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII0_CTRL, mii_if); + break; + + case ATH79_SOC_AR7240: + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + pdata->phy_if_mode = PHY_INTERFACE_MODE_MII; + break; + + case ATH79_SOC_AR7242: + /* FIXME */ + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_MII: + case PHY_INTERFACE_MODE_GMII: + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RMII: + break; + default: + return -EINVAL; + } + break; + + default: + BUG(); + } + break; + case 1: + switch (ath79_soc) { + case ATH79_SOC_AR7130: + case ATH79_SOC_AR7141: + case ATH79_SOC_AR7161: + case ATH79_SOC_AR9130: + case ATH79_SOC_AR9132: + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_RMII: + mii_if = AR71XX_MII1_CTRL_IF_RMII; + break; + case PHY_INTERFACE_MODE_RGMII: + mii_if = AR71XX_MII1_CTRL_IF_RGMII; + break; + default: + return -EINVAL; + } + ath79_mii_ctrl_set_if(AR71XX_MII_REG_MII1_CTRL, mii_if); + break; + + case ATH79_SOC_AR7240: + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + pdata->phy_if_mode = PHY_INTERFACE_MODE_GMII; + break; + + case ATH79_SOC_AR7242: + /* FIXME */ + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_MII: + case PHY_INTERFACE_MODE_GMII: + break; + default: + return -EINVAL; + } + break; + + default: + BUG(); + } + break; + } + + return 0; +} + +static int ath79_eth_instance __initdata; +void __init ath79_register_eth(unsigned int id) +{ + struct platform_device *pdev; + struct ag71xx_platform_data *pdata; + int err; + + if (id > 1) { + printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id); + return; + } + + ath79_init_eth_pll_data(id); + + if (id == 0) + pdev = &ath79_eth0_device; + else + pdev = &ath79_eth1_device; + + pdata = pdev->dev.platform_data; + + err = ath79_setup_phy_if_mode(id, pdata); + if (err) { + printk(KERN_ERR + "ar71xx: invalid PHY interface mode for GE%u\n", id); + return; + } + + switch (ath79_soc) { + case ATH79_SOC_AR7130: + if (id == 0) { + pdata->ddr_flush = ath79_ddr_flush_ge0; + pdata->set_speed = ath79_set_speed_ge0; + } else { + pdata->ddr_flush = ath79_ddr_flush_ge1; + pdata->set_speed = ath79_set_speed_ge1; + } + break; + + case ATH79_SOC_AR7141: + case ATH79_SOC_AR7161: + if (id == 0) { + pdata->ddr_flush = ath79_ddr_flush_ge0; + pdata->set_speed = ath79_set_speed_ge0; + } else { + pdata->ddr_flush = ath79_ddr_flush_ge1; + pdata->set_speed = ath79_set_speed_ge1; + } + pdata->has_gbit = 1; + break; + + case ATH79_SOC_AR7242: + if (id == 0) { + pdata->reset_bit |= AR724X_RESET_GE0_MDIO | + AR71XX_RESET_GE0_PHY; + pdata->ddr_flush = ar724x_ddr_flush_ge0; + pdata->set_speed = ar7242_set_speed_ge0; + } else { + pdata->reset_bit |= AR724X_RESET_GE1_MDIO | + AR71XX_RESET_GE1_PHY; + pdata->ddr_flush = ar724x_ddr_flush_ge1; + pdata->set_speed = ar724x_set_speed_ge1; + } + pdata->has_gbit = 1; + pdata->is_ar724x = 1; + + if (!pdata->fifo_cfg1) + pdata->fifo_cfg1 = 0x0010ffff; + if (!pdata->fifo_cfg2) + pdata->fifo_cfg2 = 0x015500aa; + if (!pdata->fifo_cfg3) + pdata->fifo_cfg3 = 0x01f00140; + break; + + case ATH79_SOC_AR7241: + if (id == 0) + pdata->reset_bit |= AR724X_RESET_GE0_MDIO; + else + pdata->reset_bit |= AR724X_RESET_GE1_MDIO; + /* fall through */ + case ATH79_SOC_AR7240: + if (id == 0) { + pdata->reset_bit |= AR71XX_RESET_GE0_PHY; + pdata->ddr_flush = ar724x_ddr_flush_ge0; + pdata->set_speed = ar724x_set_speed_ge0; + + pdata->phy_mask = BIT(4); + } else { + pdata->reset_bit |= AR71XX_RESET_GE1_PHY; + pdata->ddr_flush = ar724x_ddr_flush_ge1; + pdata->set_speed = ar724x_set_speed_ge1; + + pdata->speed = SPEED_1000; + pdata->duplex = DUPLEX_FULL; + pdata->switch_data = &ath79_switch_data; + } + pdata->has_gbit = 1; + pdata->is_ar724x = 1; + if (ath79_soc == ATH79_SOC_AR7240) + pdata->is_ar7240 = 1; + + if (!pdata->fifo_cfg1) + pdata->fifo_cfg1 = 0x0010ffff; + if (!pdata->fifo_cfg2) + pdata->fifo_cfg2 = 0x015500aa; + if (!pdata->fifo_cfg3) + pdata->fifo_cfg3 = 0x01f00140; + break; + + case ATH79_SOC_AR9130: + if (id == 0) { + pdata->ddr_flush = ar91xx_ddr_flush_ge0; + pdata->set_speed = ar91xx_set_speed_ge0; + } else { + pdata->ddr_flush = ar91xx_ddr_flush_ge1; + pdata->set_speed = ar91xx_set_speed_ge1; + } + pdata->is_ar91xx = 1; + break; + + case ATH79_SOC_AR9132: + if (id == 0) { + pdata->ddr_flush = ar91xx_ddr_flush_ge0; + pdata->set_speed = ar91xx_set_speed_ge0; + } else { + pdata->ddr_flush = ar91xx_ddr_flush_ge1; + pdata->set_speed = ar91xx_set_speed_ge1; + } + pdata->is_ar91xx = 1; + pdata->has_gbit = 1; + break; + + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + if (id == 0) { + pdata->reset_bit = AR933X_RESET_GE0_MAC | + AR933X_RESET_GE0_MDIO; + pdata->ddr_flush = ar933x_ddr_flush_ge0; + pdata->set_speed = ar933x_set_speed_ge0; + + pdata->phy_mask = BIT(4); + } else { + pdata->reset_bit = AR933X_RESET_GE1_MAC | + AR933X_RESET_GE1_MDIO; + pdata->ddr_flush = ar933x_ddr_flush_ge1; + pdata->set_speed = ar933x_set_speed_ge1; + + pdata->speed = SPEED_1000; + pdata->duplex = DUPLEX_FULL; + pdata->switch_data = &ath79_switch_data; + } + + pdata->has_gbit = 1; + pdata->is_ar724x = 1; + + if (!pdata->fifo_cfg1) + pdata->fifo_cfg1 = 0x0010ffff; + if (!pdata->fifo_cfg2) + pdata->fifo_cfg2 = 0x015500aa; + if (!pdata->fifo_cfg3) + pdata->fifo_cfg3 = 0x01f00140; + break; + + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + if (id == 0) { + pdata->reset_bit = AR934X_RESET_GE0_MAC | + AR934X_RESET_GE0_MDIO; + pdata->ddr_flush =ar934x_ddr_flush_ge0; + pdata->set_speed = ar934x_set_speed_ge0; + } else { + pdata->reset_bit = AR934X_RESET_GE1_MAC | + AR934X_RESET_GE1_MDIO; + pdata->ddr_flush = ar934x_ddr_flush_ge1; + pdata->set_speed = ar934x_set_speed_ge1; + + pdata->switch_data = &ath79_switch_data; + } + + pdata->has_gbit = 1; + pdata->is_ar724x = 1; + + if (!pdata->fifo_cfg1) + pdata->fifo_cfg1 = 0x0010ffff; + if (!pdata->fifo_cfg2) + pdata->fifo_cfg2 = 0x015500aa; + if (!pdata->fifo_cfg3) + pdata->fifo_cfg3 = 0x01f00140; + break; + + default: + BUG(); + } + + switch (pdata->phy_if_mode) { + case PHY_INTERFACE_MODE_GMII: + case PHY_INTERFACE_MODE_RGMII: + if (!pdata->has_gbit) { + printk(KERN_ERR "ar71xx: no gbit available on eth%d\n", + id); + return; + } + /* fallthrough */ + default: + break; + } + + if (!is_valid_ether_addr(pdata->mac_addr)) { + random_ether_addr(pdata->mac_addr); + printk(KERN_DEBUG + "ar71xx: using random MAC address for eth%d\n", + ath79_eth_instance); + } + + if (pdata->mii_bus_dev == NULL) { + switch (ath79_soc) { + case ATH79_SOC_AR9341: + case ATH79_SOC_AR9342: + case ATH79_SOC_AR9344: + if (id == 0) + pdata->mii_bus_dev = &ath79_mdio0_device.dev; + else + pdata->mii_bus_dev = &ath79_mdio1_device.dev; + break; + + case ATH79_SOC_AR7241: + case ATH79_SOC_AR9330: + case ATH79_SOC_AR9331: + pdata->mii_bus_dev = &ath79_mdio1_device.dev; + break; + + default: + pdata->mii_bus_dev = &ath79_mdio0_device.dev; + break; + } + } + + /* Reset the device */ + ath79_device_reset_set(pdata->reset_bit); + mdelay(100); + + ath79_device_reset_clear(pdata->reset_bit); + mdelay(100); + + platform_device_register(pdev); + ath79_eth_instance++; +} + +void __init ath79_set_mac_base(unsigned char *mac) +{ + memcpy(ath79_mac_base, mac, ETH_ALEN); +} + +void __init ath79_parse_mac_addr(char *mac_str) +{ + u8 tmp[ETH_ALEN]; + int t; + + t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); + + if (t != ETH_ALEN) + t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx", + &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]); + + if (t == ETH_ALEN) + ath79_set_mac_base(tmp); + else + printk(KERN_DEBUG "ar71xx: failed to parse mac address " + "\"%s\"\n", mac_str); +} + +static int __init ath79_ethaddr_setup(char *str) +{ + ath79_parse_mac_addr(str); + return 1; +} +__setup("ethaddr=", ath79_ethaddr_setup); + +static int __init ath79_kmac_setup(char *str) +{ + ath79_parse_mac_addr(str); + return 1; +} +__setup("kmac=", ath79_kmac_setup); + +void __init ath79_init_mac(unsigned char *dst, const unsigned char *src, + int offset) +{ + int t; + + if (!is_valid_ether_addr(src)) { + memset(dst, '\0', ETH_ALEN); + return; + } + + t = (((u32) src[3]) << 16) + (((u32) src[4]) << 8) + ((u32) src[5]); + t += offset; + + dst[0] = src[0]; + dst[1] = src[1]; + dst[2] = src[2]; + dst[3] = (t >> 16) & 0xff; + dst[4] = (t >> 8) & 0xff; + dst[5] = t & 0xff; +} + +void __init ath79_init_local_mac(unsigned char *dst, const unsigned char *src) +{ + int i; + + if (!is_valid_ether_addr(src)) { + memset(dst, '\0', ETH_ALEN); + return; + } + + for (i = 0; i < ETH_ALEN; i++) + dst[i] = src[i]; + dst[0] |= 0x02; +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h new file mode 100644 index 0000000000..4c010ef74e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h @@ -0,0 +1,46 @@ +/* + * Atheros AR71xx SoC device definitions + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_ETH_H +#define _ATH79_DEV_ETH_H + +#include + +struct platform_device; + +extern unsigned char ath79_mac_base[] __initdata; +void ath79_parse_mac_addr(char *mac_str); +void ath79_init_mac(unsigned char *dst, const unsigned char *src, + int offset); +void ath79_init_local_mac(unsigned char *dst, const unsigned char *src); + +struct ath79_eth_pll_data { + u32 pll_10; + u32 pll_100; + u32 pll_1000; +}; + +extern struct ath79_eth_pll_data ath79_eth0_pll_data; +extern struct ath79_eth_pll_data ath79_eth1_pll_data; + +extern struct ag71xx_platform_data ath79_eth0_data; +extern struct ag71xx_platform_data ath79_eth1_data; +extern struct platform_device ath79_eth0_device; +extern struct platform_device ath79_eth1_device; +void ath79_register_eth(unsigned int id); + +extern struct ag71xx_switch_platform_data ath79_switch_data; + +extern struct platform_device ath79_mdio0_device; +extern struct platform_device ath79_mdio1_device; +void ath79_register_mdio(unsigned int id, u32 phy_mask); + +#endif /* _ATH79_DEV_ETH_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c new file mode 100644 index 0000000000..9ac19d83ae --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.c @@ -0,0 +1,116 @@ +/* + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include "dev-spi.h" +#include "dev-m25p80.h" + +static struct ath79_spi_controller_data ath79_spi0_cdata = +{ + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 0, +}; + +static struct ath79_spi_controller_data ath79_spi1_cdata = +{ + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 1, +}; + +static struct spi_board_info ath79_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .controller_data = &ath79_spi0_cdata, + }, + { + .bus_num = 0, + .chip_select = 1, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .controller_data = &ath79_spi1_cdata, + } +}; + +static struct ath79_spi_platform_data ath79_spi_data; + +void __init ath79_register_m25p80(struct flash_platform_data *pdata) +{ + ath79_spi_data.bus_num = 0; + ath79_spi_data.num_chipselect = 1; + ath79_spi_info[0].platform_data = pdata; + ath79_register_spi(&ath79_spi_data, ath79_spi_info, 1); +} + +static struct flash_platform_data *multi_pdata; + +static struct mtd_info *concat_devs[2] = { NULL, NULL }; +static struct work_struct mtd_concat_work; + +static void mtd_concat_add_work(struct work_struct *work) +{ + struct mtd_info *mtd; + + mtd = mtd_concat_create(concat_devs, ARRAY_SIZE(concat_devs), "flash"); + + mtd_device_register(mtd, multi_pdata->parts, multi_pdata->nr_parts); +} + +static void mtd_concat_add(struct mtd_info *mtd) +{ + static bool registered = false; + + if (registered) + return; + + if (!strcmp(mtd->name, "spi0.0")) + concat_devs[0] = mtd; + else if (!strcmp(mtd->name, "spi0.1")) + concat_devs[1] = mtd; + else + return; + + if (!concat_devs[0] || !concat_devs[1]) + return; + + registered = true; + INIT_WORK(&mtd_concat_work, mtd_concat_add_work); + schedule_work(&mtd_concat_work); +} + +static void mtd_concat_remove(struct mtd_info *mtd) +{ +} + +static void add_mtd_concat_notifier(void) +{ + static struct mtd_notifier not = { + .add = mtd_concat_add, + .remove = mtd_concat_remove, + }; + + register_mtd_user(¬); +} + + +void __init ath79_register_m25p80_multi(struct flash_platform_data *pdata) +{ + multi_pdata = pdata; + add_mtd_concat_notifier(); + ath79_spi_data.bus_num = 0; + ath79_spi_data.num_chipselect = 2; + ath79_register_spi(&ath79_spi_data, ath79_spi_info, 2); +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h new file mode 100644 index 0000000000..637b41a7d8 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-m25p80.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_DEV_M25P80_H +#define _ATH79_DEV_M25P80_H + +#include + +void ath79_register_m25p80(struct flash_platform_data *pdata) __init; +void ath79_register_m25p80_multi(struct flash_platform_data *pdata) __init; + +#endif /* _ATH79_DEV_M25P80_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c new file mode 100644 index 0000000000..f7315a7493 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-ap96.c @@ -0,0 +1,153 @@ +/* + * ALFA Network AP96 board support + * + * Copyright (C) 2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-spi.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define ALFA_AP96_GPIO_PCIE_RESET 2 +#define ALFA_AP96_GPIO_SIM_DETECT 3 +#define ALFA_AP96_GPIO_MICROSD_CD 4 +#define ALFA_AP96_GPIO_PCIE_W_DISABLE 5 + +#define ALFA_AP96_GPIO_BUTTON_RESET 11 + +#define ALFA_AP96_KEYS_POLL_INTERVAL 20 /* msecs */ +#define ALFA_AP96_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP96_KEYS_POLL_INTERVAL) + +static struct gpio_keys_button alfa_ap96_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ALFA_AP96_KEYS_DEBOUNCE_INTERVAL, + .gpio = ALFA_AP96_GPIO_BUTTON_RESET, + .active_low = 1, + } +}; + +static int alfa_ap96_mmc_get_cd(struct device *dev) +{ + return !gpio_get_value(ALFA_AP96_GPIO_MICROSD_CD); +} + +static struct mmc_spi_platform_data alfa_ap96_mmc_data = { + .get_cd = alfa_ap96_mmc_get_cd, + .caps = MMC_CAP_NEEDS_POLL, + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, +}; + +static struct ath79_spi_controller_data ap96_spi0_cdata = { + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 0, +}; + +static struct ath79_spi_controller_data ap96_spi1_cdata = { + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 1, +}; + +static struct ath79_spi_controller_data ap96_spi2_cdata = { + .cs_type = ATH79_SPI_CS_TYPE_INTERNAL, + .cs_line = 2, +}; + +static struct spi_board_info alfa_ap96_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .controller_data = &ap96_spi0_cdata + }, { + .bus_num = 0, + .chip_select = 1, + .max_speed_hz = 25000000, + .modalias = "mmc_spi", + .platform_data = &alfa_ap96_mmc_data, + .controller_data = &ap96_spi1_cdata + }, { + .bus_num = 0, + .chip_select = 2, + .max_speed_hz = 6250000, + .modalias = "rtc-pcf2123", + .controller_data = &ap96_spi2_cdata + }, +}; + +static struct ath79_spi_platform_data alfa_ap96_spi_data = { + .bus_num = 0, + .num_chipselect = 3, +}; + +static void __init alfa_ap96_gpio_setup(void) +{ + ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | + AR71XX_GPIO_FUNC_SPI_CS2_EN); + + gpio_request(ALFA_AP96_GPIO_MICROSD_CD, "microSD CD"); + gpio_direction_input(ALFA_AP96_GPIO_MICROSD_CD); + gpio_request(ALFA_AP96_GPIO_PCIE_RESET, "PCIe reset"); + gpio_direction_output(ALFA_AP96_GPIO_PCIE_RESET, 1); + gpio_request(ALFA_AP96_GPIO_PCIE_W_DISABLE, "PCIe write disable"); + gpio_direction_output(ALFA_AP96_GPIO_PCIE_W_DISABLE, 1); +} + +#define ALFA_AP96_WAN_PHYMASK BIT(4) +#define ALFA_AP96_LAN_PHYMASK BIT(5) +#define ALFA_AP96_MDIO_PHYMASK (ALFA_AP96_LAN_PHYMASK | ALFA_AP96_WAN_PHYMASK) + +static void __init alfa_ap96_init(void) +{ + alfa_ap96_gpio_setup(); + + ath79_register_mdio(0, ~ALFA_AP96_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = ALFA_AP96_WAN_PHYMASK; + ath79_eth1_pll_data.pll_1000 = 0x110000; + + ath79_register_eth(0); + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = ALFA_AP96_LAN_PHYMASK; + ath79_eth1_pll_data.pll_1000 = 0x110000; + + ath79_register_eth(1); + + ath79_register_pci(); + ath79_register_spi(&alfa_ap96_spi_data, alfa_ap96_spi_info, + ARRAY_SIZE(alfa_ap96_spi_info)); + + ath79_register_gpio_keys_polled(-1, ALFA_AP96_KEYS_POLL_INTERVAL, + ARRAY_SIZE(alfa_ap96_gpio_keys), + alfa_ap96_gpio_keys); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_ALFA_AP96, "ALFA-AP96", "ALFA Network AP96", + alfa_ap96_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c new file mode 100644 index 0000000000..d37e63fe12 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-alfa-nx.c @@ -0,0 +1,157 @@ +/* + * ALFA Network N2/N5 board support + * + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define ALFA_NX_GPIO_LED_2 17 +#define ALFA_NX_GPIO_LED_3 16 +#define ALFA_NX_GPIO_LED_5 12 +#define ALFA_NX_GPIO_LED_6 8 +#define ALFA_NX_GPIO_LED_7 6 +#define ALFA_NX_GPIO_LED_8 7 + +#define ALFA_NX_GPIO_BTN_RESET 11 + +#define ALFA_NX_KEYS_POLL_INTERVAL 20 /* msecs */ +#define ALFA_NX_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_NX_KEYS_POLL_INTERVAL) + +#define ALFA_NX_MAC0_OFFSET 0 +#define ALFA_NX_MAC1_OFFSET 6 +#define ALFA_NX_CALDATA_OFFSET 0x1000 + +static struct mtd_partition alfa_nx_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "rootfs", + .offset = 0x050000, + .size = 0x600000, + }, { + .name = "kernel", + .offset = 0x650000, + .size = 0x190000, + }, { + .name = "nvram", + .offset = 0x7e0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "art", + .offset = 0x7f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x050000, + .size = 0x780000, + } +}; + +static struct flash_platform_data alfa_nx_flash_data = { + .parts = alfa_nx_partitions, + .nr_parts = ARRAY_SIZE(alfa_nx_partitions), +}; + +static struct gpio_keys_button alfa_nx_gpio_keys[] __initdata = { + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ALFA_NX_KEYS_DEBOUNCE_INTERVAL, + .gpio = ALFA_NX_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct gpio_led alfa_nx_leds_gpio[] __initdata = { + { + .name = "alfa:green:led_2", + .gpio = ALFA_NX_GPIO_LED_2, + .active_low = 1, + }, { + .name = "alfa:green:led_3", + .gpio = ALFA_NX_GPIO_LED_3, + .active_low = 1, + }, { + .name = "alfa:red:led_5", + .gpio = ALFA_NX_GPIO_LED_5, + .active_low = 1, + }, { + .name = "alfa:amber:led_6", + .gpio = ALFA_NX_GPIO_LED_6, + .active_low = 1, + }, { + .name = "alfa:green:led_7", + .gpio = ALFA_NX_GPIO_LED_7, + .active_low = 1, + }, { + .name = "alfa:green:led_8", + .gpio = ALFA_NX_GPIO_LED_8, + .active_low = 1, + } +}; + +static void __init alfa_nx_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, + AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_m25p80(&alfa_nx_flash_data); + + ath79_register_leds_gpio(0, ARRAY_SIZE(alfa_nx_leds_gpio), + alfa_nx_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ALFA_NX_KEYS_POLL_INTERVAL, + ARRAY_SIZE(alfa_nx_gpio_keys), + alfa_nx_gpio_keys); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, + art + ALFA_NX_MAC0_OFFSET, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, + art + ALFA_NX_MAC1_OFFSET, 0); + + /* WAN port */ + ath79_register_eth(0); + /* LAN port */ + ath79_register_eth(1); + + ap91_pci_init(art + ALFA_NX_CALDATA_OFFSET, NULL); +} + +MIPS_MACHINE(ATH79_MACH_ALFA_NX, "ALFA-NX", "ALFA Network N2/N5", + alfa_nx_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c new file mode 100644 index 0000000000..fa3cefb64c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-all0258n.c @@ -0,0 +1,136 @@ +/* + * Allnet ALL0258N support + * + * Copyright (C) 2011 Daniel Golle + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +/* found via /sys/gpio/... try and error */ +#define ALL0258N_GPIO_BTN_RESET 1 +#define ALL0258N_GPIO_LED_RSSIHIGH 13 +#define ALL0258N_GPIO_LED_RSSIMEDIUM 15 +#define ALL0258N_GPIO_LED_RSSILOW 14 + +/* defaults taken from others machs */ +#define ALL0258N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define ALL0258N_KEYS_DEBOUNCE_INTERVAL (3 * ALL0258N_KEYS_POLL_INTERVAL) + +/* showed up in the original firmware's bootlog */ +#define ALL0258N_SEC_PHYMASK BIT(3) + +/* + * from U-Boot bootargs of original firmware: + * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),320k(custom),1024k(kernel),4928k(rootfs),1536k(failsafe),64k(ART) + * we use a more OpenWrt-friendly layout now: + * mtdparts=ar7240-nor0:256k(u-boot),64k(u-boot-env),896k(kernel),5376k(rootfs),1536k(failsafe),64k(ART) + */ +static struct mtd_partition all0258n_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + }, { + .name = "kernel", + .offset = 0x050000, + .size = 0x0E0000, + }, { + .name = "rootfs", + .offset = 0x130000, + .size = 0x540000, + }, { + .name = "failsafe", + .offset = 0x670000, + .size = 0x180000, + }, { + .name = "firmware", + .offset = 0x050000, + .size = 0x620000, + }, { + .name = "art", + .offset = 0x7F0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data all0258n_flash_data = { + .parts = all0258n_partitions, + .nr_parts = ARRAY_SIZE(all0258n_partitions), +}; + +static struct gpio_led all0258n_leds_gpio[] __initdata = { + { + .name = "all0258n:green:rssihigh", + .gpio = ALL0258N_GPIO_LED_RSSIHIGH, + .active_low = 1, + }, { + .name = "all0258n:yellow:rssimedium", + .gpio = ALL0258N_GPIO_LED_RSSIMEDIUM, + .active_low = 1, + }, { + .name = "all0258n:red:rssilow", + .gpio = ALL0258N_GPIO_LED_RSSILOW, + .active_low = 1, + } +}; + +static struct gpio_keys_button all0258n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ALL0258N_KEYS_DEBOUNCE_INTERVAL, + .gpio = ALL0258N_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static void __init all0258n_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f7f0000); + u8 *ee = (u8 *) KSEG1ADDR(0x1f7f1000); + + ath79_register_m25p80(&all0258n_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(all0258n_leds_gpio), + all0258n_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ALL0258N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(all0258n_gpio_keys), + all0258n_gpio_keys); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + + ath79_eth1_data.phy_mask = ALL0258N_SEC_PHYMASK; + + ath79_register_mdio(0, 0x0); + + ath79_register_eth(0); + ath79_register_eth(1); + + ap91_pci_init(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_ALL0258N, "ALL0258N", "Allnet ALL0258N", + all0258n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c new file mode 100644 index 0000000000..178815cf91 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap113.c @@ -0,0 +1,124 @@ +/* + * Atheros AP113 board support + * + * Copyright (C) 2011 Florian Fainelli + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "pci.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define AP113_GPIO_LED_USB 0 +#define AP113_GPIO_LED_STATUS 1 +#define AP113_GPIO_LED_ST 11 + +#define AP113_GPIO_BTN_JUMPSTART 12 + +#define AP113_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AP113_KEYS_DEBOUNCE_INTERVAL (3 * AP113_KEYS_POLL_INTERVAL) + +static struct mtd_partition ap113_parts[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, + { + .name = "rootfs", + .offset = 0x010000, + .size = 0x300000, + }, + { + .name = "uImage", + .offset = 0x300000, + .size = 0x3e0000, + }, + { + .name = "NVRAM", + .offset = 0x3e0000, + .size = 0x010000, + }, + { + .name = "ART", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, +}; +#define ap113_nr_parts ARRAY_SIZE(ap113_parts) + +static struct flash_platform_data ap113_flash_data = { + .parts = ap113_parts, + .nr_parts = ap113_nr_parts, +}; + +static struct gpio_led ap113_leds_gpio[] __initdata = { + { + .name = "ap113:green:usb", + .gpio = AP113_GPIO_LED_USB, + .active_low = 1, + }, + { + .name = "ap113:green:status", + .gpio = AP113_GPIO_LED_STATUS, + .active_low = 1, + }, + { + .name = "ap113:green:st", + .gpio = AP113_GPIO_LED_ST, + .active_low = 1, + } +}; + +static struct gpio_keys_button ap113_gpio_keys[] __initdata = { + { + .desc = "jumpstart button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AP113_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP113_GPIO_BTN_JUMPSTART, + .active_low = 1, + }, +}; + +static void __init ap113_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(&ap113_flash_data); + + ath79_register_mdio(0, ~BIT(0)); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + + ath79_register_eth(0); + + ath79_register_gpio_keys_polled(-1, AP113_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap113_gpio_keys), + ap113_gpio_keys); + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap113_leds_gpio), + ap113_leds_gpio); + + ath79_register_pci(); + + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_AP113, "AP113", "Atheros AP113", + ap113_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c new file mode 100644 index 0000000000..8519a9d9a6 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap83.c @@ -0,0 +1,275 @@ +/* + * Atheros AP83 board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define AP83_GPIO_LED_WLAN 6 +#define AP83_GPIO_LED_POWER 14 +#define AP83_GPIO_LED_JUMPSTART 15 +#define AP83_GPIO_BTN_JUMPSTART 12 +#define AP83_GPIO_BTN_RESET 21 + +#define AP83_050_GPIO_VSC7385_CS 1 +#define AP83_050_GPIO_VSC7385_MISO 3 +#define AP83_050_GPIO_VSC7385_MOSI 16 +#define AP83_050_GPIO_VSC7385_SCK 17 + +#define AP83_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AP83_KEYS_DEBOUNCE_INTERVAL (3 * AP83_KEYS_POLL_INTERVAL) + +static struct mtd_partition ap83_flash_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x060000, + .size = 0x140000, + }, { + .name = "rootfs", + .offset = 0x1a0000, + .size = 0x650000, + }, { + .name = "art", + .offset = 0x7f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x060000, + .size = 0x790000, + } +}; + +static struct physmap_flash_data ap83_flash_data = { + .width = 2, + .parts = ap83_flash_partitions, + .nr_parts = ARRAY_SIZE(ap83_flash_partitions), +}; + +static struct resource ap83_flash_resources[] = { + [0] = { + .start = AR71XX_SPI_BASE, + .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ap83_flash_device = { + .name = "ar91xx-flash", + .id = -1, + .resource = ap83_flash_resources, + .num_resources = ARRAY_SIZE(ap83_flash_resources), + .dev = { + .platform_data = &ap83_flash_data, + } +}; + +static struct gpio_led ap83_leds_gpio[] __initdata = { + { + .name = "ap83:green:jumpstart", + .gpio = AP83_GPIO_LED_JUMPSTART, + .active_low = 0, + }, { + .name = "ap83:green:power", + .gpio = AP83_GPIO_LED_POWER, + .active_low = 0, + }, { + .name = "ap83:green:wlan", + .gpio = AP83_GPIO_LED_WLAN, + .active_low = 0, + }, +}; + +static struct gpio_keys_button ap83_gpio_keys[] __initdata = { + { + .desc = "soft_reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP83_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "jumpstart", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AP83_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP83_GPIO_BTN_JUMPSTART, + .active_low = 1, + } +}; + +static struct resource ap83_040_spi_resources[] = { + [0] = { + .start = AR71XX_SPI_BASE, + .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device ap83_040_spi_device = { + .name = "ap83-spi", + .id = 0, + .resource = ap83_040_spi_resources, + .num_resources = ARRAY_SIZE(ap83_040_spi_resources), +}; + +static struct spi_gpio_platform_data ap83_050_spi_data = { + .miso = AP83_050_GPIO_VSC7385_MISO, + .mosi = AP83_050_GPIO_VSC7385_MOSI, + .sck = AP83_050_GPIO_VSC7385_SCK, + .num_chipselect = 1, +}; + +static struct platform_device ap83_050_spi_device = { + .name = "spi_gpio", + .id = 0, + .dev = { + .platform_data = &ap83_050_spi_data, + } +}; + +static void ap83_vsc7385_reset(void) +{ + ath79_device_reset_set(AR71XX_RESET_GE1_PHY); + udelay(10); + ath79_device_reset_clear(AR71XX_RESET_GE1_PHY); + mdelay(50); +} + +static struct vsc7385_platform_data ap83_vsc7385_data = { + .reset = ap83_vsc7385_reset, + .ucode_name = "vsc7385_ucode_ap83.bin", + .mac_cfg = { + .tx_ipg = 6, + .bit2 = 0, + .clk_sel = 3, + }, +}; + +static struct spi_board_info ap83_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "spi-vsc7385", + .platform_data = &ap83_vsc7385_data, + .controller_data = (void *) AP83_050_GPIO_VSC7385_CS, + } +}; + +static void __init ap83_generic_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_mdio(0, 0xfffffffe); + + ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = 0x1; + + ath79_register_eth(0); + + ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_eth1_pll_data.pll_1000 = 0x1f000000; + + ath79_register_eth(1); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap83_leds_gpio), + ap83_leds_gpio); + + ath79_register_gpio_keys_polled(-1, AP83_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap83_gpio_keys), + ap83_gpio_keys); + + ath79_register_usb(); + + ath79_register_wmac(eeprom, NULL); + + platform_device_register(&ap83_flash_device); + + spi_register_board_info(ap83_spi_info, ARRAY_SIZE(ap83_spi_info)); +} + +static void ap83_040_flash_lock(struct platform_device *pdev) +{ + ath79_flash_acquire(); +} + +static void ap83_040_flash_unlock(struct platform_device *pdev) +{ + ath79_flash_release(); +} + +static void __init ap83_040_setup(void) +{ + ap83_flash_data.lock = ap83_040_flash_lock; + ap83_flash_data.unlock = ap83_040_flash_unlock; + ap83_generic_setup(); + platform_device_register(&ap83_040_spi_device); +} + +static void __init ap83_050_setup(void) +{ + ap83_generic_setup(); + platform_device_register(&ap83_050_spi_device); +} + +static void __init ap83_setup(void) +{ + u8 *board_id = (u8 *) KSEG1ADDR(0x1fff1244); + unsigned int board_version; + + board_version = (unsigned int)(board_id[0] - '0'); + board_version += ((unsigned int)(board_id[1] - '0')) * 10; + + switch (board_version) { + case 40: + ap83_040_setup(); + break; + case 50: + ap83_050_setup(); + break; + default: + printk(KERN_WARNING "AP83-%03u board is not yet supported\n", + board_version); + } +} + +MIPS_MACHINE(ATH79_MACH_AP83, "AP83", "Atheros AP83", ap83_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c new file mode 100644 index 0000000000..9ab36cc1cb --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ap96.c @@ -0,0 +1,176 @@ +/* + * Atheros AP96 board support + * + * Copyright (C) 2009 Marco Porsch + * Copyright (C) 2009-2012 Gabor Juhos + * Copyright (C) 2010 Atheros Communications + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include + +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define AP96_GPIO_LED_12_GREEN 0 +#define AP96_GPIO_LED_3_GREEN 1 +#define AP96_GPIO_LED_2_GREEN 2 +#define AP96_GPIO_LED_WPS_GREEN 4 +#define AP96_GPIO_LED_5_GREEN 5 +#define AP96_GPIO_LED_4_ORANGE 6 + +/* Reset button - next to the power connector */ +#define AP96_GPIO_BTN_RESET 3 +/* WPS button - next to a led on right */ +#define AP96_GPIO_BTN_WPS 8 + +#define AP96_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AP96_KEYS_DEBOUNCE_INTERVAL (3 * AP96_KEYS_POLL_INTERVAL) + +#define AP96_WMAC0_MAC_OFFSET 0x120c +#define AP96_WMAC1_MAC_OFFSET 0x520c +#define AP96_CALDATA0_OFFSET 0x1000 +#define AP96_CALDATA1_OFFSET 0x5000 + +static struct mtd_partition ap96_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = 0x030000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "env", + .offset = 0x030000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "rootfs", + .offset = 0x040000, + .size = 0x600000, + }, { + .name = "uImage", + .offset = 0x640000, + .size = 0x1b0000, + }, { + .name = "caldata", + .offset = 0x7f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data ap96_flash_data = { + .parts = ap96_partitions, + .nr_parts = ARRAY_SIZE(ap96_partitions), +}; + +/* + * AP96 has 12 unlabeled leds in the front; these are numbered from 1 to 12 + * below (from left to right on the board). Led 1 seems to be on whenever the + * board is powered. Led 11 shows LAN link activity actity. Led 3 is orange; + * others are green. + * + * In addition, there is one led next to a button on the right side for WPS. + */ +static struct gpio_led ap96_leds_gpio[] __initdata = { + { + .name = "ap96:green:led2", + .gpio = AP96_GPIO_LED_2_GREEN, + .active_low = 1, + }, { + .name = "ap96:green:led3", + .gpio = AP96_GPIO_LED_3_GREEN, + .active_low = 1, + }, { + .name = "ap96:orange:led4", + .gpio = AP96_GPIO_LED_4_ORANGE, + .active_low = 1, + }, { + .name = "ap96:green:led5", + .gpio = AP96_GPIO_LED_5_GREEN, + .active_low = 1, + }, { + .name = "ap96:green:led12", + .gpio = AP96_GPIO_LED_12_GREEN, + .active_low = 1, + }, { /* next to a button on right */ + .name = "ap96:green:wps", + .gpio = AP96_GPIO_LED_WPS_GREEN, + .active_low = 1, + } +}; + +static struct gpio_keys_button ap96_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP96_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AP96_KEYS_DEBOUNCE_INTERVAL, + .gpio = AP96_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +#define AP96_WAN_PHYMASK 0x10 +#define AP96_LAN_PHYMASK 0x0f + +static void __init ap96_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_mdio(0, ~(AP96_WAN_PHYMASK | AP96_LAN_PHYMASK)); + + ath79_init_mac(ath79_eth0_data.mac_addr, art, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = AP96_LAN_PHYMASK; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + + ath79_init_mac(ath79_eth1_data.mac_addr, art, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = AP96_WAN_PHYMASK; + + ath79_eth1_pll_data.pll_1000 = 0x1f000000; + + ath79_register_eth(1); + + ath79_register_usb(); + + ath79_register_m25p80(&ap96_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ap96_leds_gpio), + ap96_leds_gpio); + + ath79_register_gpio_keys_polled(-1, AP96_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ap96_gpio_keys), + ap96_gpio_keys); + + ap94_pci_init(art + AP96_CALDATA0_OFFSET, + art + AP96_WMAC0_MAC_OFFSET, + art + AP96_CALDATA1_OFFSET, + art + AP96_WMAC1_MAC_OFFSET); +} + +MIPS_MACHINE(ATH79_MACH_AP96, "AP96", "Atheros AP96", ap96_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c new file mode 100644 index 0000000000..281129b787 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-aw-nr580.c @@ -0,0 +1,107 @@ +/* + * AzureWave AW-NR580 board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "machtypes.h" +#include "pci.h" + +#define AW_NR580_GPIO_LED_READY_RED 0 +#define AW_NR580_GPIO_LED_WLAN 1 +#define AW_NR580_GPIO_LED_READY_GREEN 2 +#define AW_NR580_GPIO_LED_WPS_GREEN 4 +#define AW_NR580_GPIO_LED_WPS_AMBER 5 + +#define AW_NR580_GPIO_BTN_WPS 3 +#define AW_NR580_GPIO_BTN_RESET 11 + +#define AW_NR580_KEYS_POLL_INTERVAL 20 /* msecs */ +#define AW_NR580_KEYS_DEBOUNCE_INTERVAL (3 * AW_NR580_KEYS_POLL_INTERVAL) + +static struct gpio_led aw_nr580_leds_gpio[] __initdata = { + { + .name = "aw-nr580:red:ready", + .gpio = AW_NR580_GPIO_LED_READY_RED, + .active_low = 0, + }, { + .name = "aw-nr580:green:ready", + .gpio = AW_NR580_GPIO_LED_READY_GREEN, + .active_low = 0, + }, { + .name = "aw-nr580:green:wps", + .gpio = AW_NR580_GPIO_LED_WPS_GREEN, + .active_low = 0, + }, { + .name = "aw-nr580:amber:wps", + .gpio = AW_NR580_GPIO_LED_WPS_AMBER, + .active_low = 0, + }, { + .name = "aw-nr580:green:wlan", + .gpio = AW_NR580_GPIO_LED_WLAN, + .active_low = 0, + } +}; + +static struct gpio_keys_button aw_nr580_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, + .gpio = AW_NR580_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = AW_NR580_KEYS_DEBOUNCE_INTERVAL, + .gpio = AW_NR580_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static const char *aw_nr580_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data aw_nr580_flash_data = { + .part_probes = aw_nr580_part_probes, +}; + +static void __init aw_nr580_setup(void) +{ + ath79_register_mdio(0, 0x0); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + + ath79_register_pci(); + + ath79_register_m25p80(&aw_nr580_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(aw_nr580_leds_gpio), + aw_nr580_leds_gpio); + + ath79_register_gpio_keys_polled(-1, AW_NR580_KEYS_POLL_INTERVAL, + ARRAY_SIZE(aw_nr580_gpio_keys), + aw_nr580_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_AW_NR580, "AW-NR580", "AzureWave AW-NR580", + aw_nr580_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c new file mode 100644 index 0000000000..931a7292e2 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-600-a1.c @@ -0,0 +1,194 @@ +/* + * D-Link DIR-600 rev. A1 board support + * + * Copyright (C) 2010-2012 Gabor Juhos + * Copyright (C) 2012 Vadim Girlin + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "nvram.h" + +#define DIR_600_A1_GPIO_LED_WPS 0 +#define DIR_600_A1_GPIO_LED_POWER_AMBER 1 +#define DIR_600_A1_GPIO_LED_POWER_GREEN 6 +#define DIR_600_A1_GPIO_LED_LAN1 13 +#define DIR_600_A1_GPIO_LED_LAN2 14 +#define DIR_600_A1_GPIO_LED_LAN3 15 +#define DIR_600_A1_GPIO_LED_LAN4 16 +#define DIR_600_A1_GPIO_LED_WAN_AMBER 7 +#define DIR_600_A1_GPIO_LED_WAN_GREEN 17 + +#define DIR_600_A1_GPIO_BTN_RESET 8 +#define DIR_600_A1_GPIO_BTN_WPS 12 + +#define DIR_600_A1_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DIR_600_A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_600_A1_KEYS_POLL_INTERVAL) + +#define DIR_600_A1_NVRAM_ADDR 0x1f030000 +#define DIR_600_A1_NVRAM_SIZE 0x10000 + +static struct mtd_partition dir_600_a1_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x030000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "nvram", + .offset = 0x030000, + .size = 0x010000, + }, { + .name = "kernel", + .offset = 0x040000, + .size = 0x0e0000, + }, { + .name = "rootfs", + .offset = 0x120000, + .size = 0x2c0000, + }, { + .name = "mac", + .offset = 0x3e0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "art", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x040000, + .size = 0x3a0000, + } +}; + +static struct flash_platform_data dir_600_a1_flash_data = { + .parts = dir_600_a1_partitions, + .nr_parts = ARRAY_SIZE(dir_600_a1_partitions), +}; + +static struct gpio_led dir_600_a1_leds_gpio[] __initdata = { + { + .name = "d-link:green:power", + .gpio = DIR_600_A1_GPIO_LED_POWER_GREEN, + }, { + .name = "d-link:amber:power", + .gpio = DIR_600_A1_GPIO_LED_POWER_AMBER, + }, { + .name = "d-link:amber:wan", + .gpio = DIR_600_A1_GPIO_LED_WAN_AMBER, + }, { + .name = "d-link:green:wan", + .gpio = DIR_600_A1_GPIO_LED_WAN_GREEN, + .active_low = 1, + }, { + .name = "d-link:green:lan1", + .gpio = DIR_600_A1_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "d-link:green:lan2", + .gpio = DIR_600_A1_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "d-link:green:lan3", + .gpio = DIR_600_A1_GPIO_LED_LAN3, + .active_low = 1, + }, { + .name = "d-link:green:lan4", + .gpio = DIR_600_A1_GPIO_LED_LAN4, + .active_low = 1, + }, { + .name = "d-link:blue:wps", + .gpio = DIR_600_A1_GPIO_LED_WPS, + .active_low = 1, + } +}; + +static struct gpio_keys_button dir_600_a1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR_600_A1_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = DIR_600_A1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR_600_A1_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static void __init dir_600_a1_setup(void) +{ + const char *nvram = (char *) KSEG1ADDR(DIR_600_A1_NVRAM_ADDR); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + u8 mac_buff[6]; + u8 *mac = NULL; + + if (ath79_nvram_parse_mac_addr(nvram, DIR_600_A1_NVRAM_SIZE, + "lan_mac=", mac_buff) == 0) { + ath79_init_mac(ath79_eth0_data.mac_addr, mac_buff, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac_buff, 1); + mac = mac_buff; + } + + ath79_register_m25p80(&dir_600_a1_flash_data); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_600_a1_leds_gpio), + dir_600_a1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, DIR_600_A1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dir_600_a1_gpio_keys), + dir_600_a1_gpio_keys); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + + ath79_register_mdio(0, 0x0); + + /* LAN ports */ + ath79_register_eth(1); + + /* WAN port */ + ath79_register_eth(0); + + ap91_pci_init(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_DIR_600_A1, "DIR-600-A1", "D-Link DIR-600 rev. A1", + dir_600_a1_setup); + +static void __init dir_615_e4_setup(void) +{ + dir_600_a1_setup(); + ap9x_pci_setup_wmac_led_pin(0, 1); +} + +MIPS_MACHINE(ATH79_MACH_DIR_615_E4, "DIR-615-E4", "D-Link DIR-615 rev. E4", + dir_615_e4_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c new file mode 100644 index 0000000000..b15fc6814c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-615-c1.c @@ -0,0 +1,171 @@ +/* + * D-Link DIR-615 rev C1 board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "nvram.h" + +#define DIR_615C1_GPIO_LED_ORANGE_STATUS 1 /* ORANGE:STATUS:TRICOLOR */ +#define DIR_615C1_GPIO_LED_BLUE_WPS 3 /* BLUE:WPS */ +#define DIR_615C1_GPIO_LED_GREEN_WAN 4 /* GREEN:WAN:TRICOLOR */ +#define DIR_615C1_GPIO_LED_GREEN_WANCPU 5 /* GREEN:WAN:CPU:TRICOLOR */ +#define DIR_615C1_GPIO_LED_GREEN_WLAN 6 /* GREEN:WLAN */ +#define DIR_615C1_GPIO_LED_GREEN_STATUS 14 /* GREEN:STATUS:TRICOLOR */ +#define DIR_615C1_GPIO_LED_ORANGE_WAN 15 /* ORANGE:WAN:TRICOLOR */ + +/* buttons may need refinement */ + +#define DIR_615C1_GPIO_BTN_WPS 12 +#define DIR_615C1_GPIO_BTN_RESET 21 + +#define DIR_615C1_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DIR_615C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR_615C1_KEYS_POLL_INTERVAL) + +#define DIR_615C1_CONFIG_ADDR 0x1f020000 +#define DIR_615C1_CONFIG_SIZE 0x10000 + +static struct mtd_partition dir_615c1_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "config", + .offset = 0x020000, + .size = 0x010000, + }, { + .name = "kernel", + .offset = 0x030000, + .size = 0x0e0000, + }, { + .name = "rootfs", + .offset = 0x110000, + .size = 0x2e0000, + }, { + .name = "art", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x030000, + .size = 0x3c0000, + } +}; + +static struct flash_platform_data dir_615c1_flash_data = { + .parts = dir_615c1_partitions, + .nr_parts = ARRAY_SIZE(dir_615c1_partitions), +}; + +static struct gpio_led dir_615c1_leds_gpio[] __initdata = { + { + .name = "d-link:orange:status", + .gpio = DIR_615C1_GPIO_LED_ORANGE_STATUS, + .active_low = 1, + }, { + .name = "d-link:blue:wps", + .gpio = DIR_615C1_GPIO_LED_BLUE_WPS, + .active_low = 1, + }, { + .name = "d-link:green:wan", + .gpio = DIR_615C1_GPIO_LED_GREEN_WAN, + .active_low = 1, + }, { + .name = "d-link:green:wancpu", + .gpio = DIR_615C1_GPIO_LED_GREEN_WANCPU, + .active_low = 1, + }, { + .name = "d-link:green:wlan", + .gpio = DIR_615C1_GPIO_LED_GREEN_WLAN, + .active_low = 1, + }, { + .name = "d-link:green:status", + .gpio = DIR_615C1_GPIO_LED_GREEN_STATUS, + .active_low = 1, + }, { + .name = "d-link:orange:wan", + .gpio = DIR_615C1_GPIO_LED_ORANGE_WAN, + .active_low = 1, + } + +}; + +static struct gpio_keys_button dir_615c1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR_615C1_GPIO_BTN_RESET, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = DIR_615C1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR_615C1_GPIO_BTN_WPS, + } +}; + +#define DIR_615C1_LAN_PHYMASK BIT(0) +#define DIR_615C1_WAN_PHYMASK BIT(4) +#define DIR_615C1_MDIO_MASK (~(DIR_615C1_LAN_PHYMASK | \ + DIR_615C1_WAN_PHYMASK)) + +static void __init dir_615c1_setup(void) +{ + const char *config = (char *) KSEG1ADDR(DIR_615C1_CONFIG_ADDR); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + u8 mac[6]; + u8 *wlan_mac = NULL; + + if (ath79_nvram_parse_mac_addr(config, DIR_615C1_CONFIG_SIZE, + "lan_mac=", mac) == 0) { + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + wlan_mac = mac; + } + + ath79_register_mdio(0, DIR_615C1_MDIO_MASK); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.phy_mask = DIR_615C1_LAN_PHYMASK; + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = DIR_615C1_WAN_PHYMASK; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&dir_615c1_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(dir_615c1_leds_gpio), + dir_615c1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, DIR_615C1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dir_615c1_gpio_keys), + dir_615c1_gpio_keys); + + ath79_register_wmac(eeprom, wlan_mac); +} + +MIPS_MACHINE(ATH79_MACH_DIR_615_C1, "DIR-615-C1", "D-Link DIR-615 rev. C1", + dir_615c1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c new file mode 100644 index 0000000000..ab973ebfb8 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c @@ -0,0 +1,208 @@ +/* + * D-Link DIR-825 rev. B1 board support + * + * Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o. + * + * based on mach-wndr3700.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define DIR825B1_GPIO_LED_BLUE_USB 0 +#define DIR825B1_GPIO_LED_ORANGE_POWER 1 +#define DIR825B1_GPIO_LED_BLUE_POWER 2 +#define DIR825B1_GPIO_LED_BLUE_WPS 4 +#define DIR825B1_GPIO_LED_ORANGE_PLANET 6 +#define DIR825B1_GPIO_LED_BLUE_PLANET 11 + +#define DIR825B1_GPIO_BTN_RESET 3 +#define DIR825B1_GPIO_BTN_WPS 8 + +#define DIR825B1_GPIO_RTL8366_SDA 5 +#define DIR825B1_GPIO_RTL8366_SCK 7 + +#define DIR825B1_KEYS_POLL_INTERVAL 20 /* msecs */ +#define DIR825B1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825B1_KEYS_POLL_INTERVAL) + +#define DIR825B1_CAL_LOCATION_0 0x1f661000 +#define DIR825B1_CAL_LOCATION_1 0x1f665000 + +#define DIR825B1_MAC_LOCATION_0 0x1f66ffa0 +#define DIR825B1_MAC_LOCATION_1 0x1f66ffb4 + +static struct mtd_partition dir825b1_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "config", + .offset = 0x040000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x050000, + .size = 0x610000, + }, { + .name = "caldata", + .offset = 0x660000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "unknown", + .offset = 0x670000, + .size = 0x190000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data dir825b1_flash_data = { + .parts = dir825b1_partitions, + .nr_parts = ARRAY_SIZE(dir825b1_partitions), +}; + +static struct gpio_led dir825b1_leds_gpio[] __initdata = { + { + .name = "d-link:blue:usb", + .gpio = DIR825B1_GPIO_LED_BLUE_USB, + .active_low = 1, + }, { + .name = "d-link:orange:power", + .gpio = DIR825B1_GPIO_LED_ORANGE_POWER, + .active_low = 1, + }, { + .name = "d-link:blue:power", + .gpio = DIR825B1_GPIO_LED_BLUE_POWER, + .active_low = 1, + }, { + .name = "d-link:blue:wps", + .gpio = DIR825B1_GPIO_LED_BLUE_WPS, + .active_low = 1, + }, { + .name = "d-link:orange:planet", + .gpio = DIR825B1_GPIO_LED_ORANGE_PLANET, + .active_low = 1, + }, { + .name = "d-link:blue:planet", + .gpio = DIR825B1_GPIO_LED_BLUE_PLANET, + .active_low = 1, + } +}; + +static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR825B1_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL, + .gpio = DIR825B1_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = { + { .reg = 0x06, .val = 0x0108 }, +}; + +static struct rtl8366_platform_data dir825b1_rtl8366s_data = { + .gpio_sda = DIR825B1_GPIO_RTL8366_SDA, + .gpio_sck = DIR825B1_GPIO_RTL8366_SCK, + .num_initvals = ARRAY_SIZE(dir825b1_rtl8366s_initvals), + .initvals = dir825b1_rtl8366s_initvals, +}; + +static struct platform_device dir825b1_rtl8366s_device = { + .name = RTL8366S_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &dir825b1_rtl8366s_data, + } +}; + +static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr) +{ + int ret; + u8 *src = (u8 *)KSEG1ADDR(src_addr); + + ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + &dest[0], &dest[1], &dest[2], + &dest[3], &dest[4], &dest[5]); + + if (ret != ETH_ALEN) + memset(dest, 0, ETH_ALEN); +} + +static void __init dir825b1_setup(void) +{ + u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; + + dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0); + dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); + ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_pll_data.pll_1000 = 0x11110000; + + ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); + ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = 0x10; + ath79_eth1_pll_data.pll_1000 = 0x11110000; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&dir825b1_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio), + dir825b1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(dir825b1_gpio_keys), + dir825b1_gpio_keys); + + ath79_register_usb(); + + platform_device_register(&dir825b1_rtl8366s_device); + + ap9x_pci_setup_wmac_led_pin(0, 5); + ap9x_pci_setup_wmac_led_pin(1, 5); + + ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1, + (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2); +} + +MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1", + dir825b1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c new file mode 100644 index 0000000000..cbd201994d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-eap7660d.c @@ -0,0 +1,179 @@ +/* + * Senao EAP7660D board support + * + * Copyright (C) 2010 Daniel Golle + * Copyright (C) 2008 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "pci.h" + +#define EAP7660D_KEYS_POLL_INTERVAL 20 /* msecs */ +#define EAP7660D_KEYS_DEBOUNCE_INTERVAL (3 * EAP7660D_KEYS_POLL_INTERVAL) + +#define EAP7660D_GPIO_DS4 7 +#define EAP7660D_GPIO_DS5 2 +#define EAP7660D_GPIO_DS7 0 +#define EAP7660D_GPIO_DS8 4 +#define EAP7660D_GPIO_SW1 3 +#define EAP7660D_GPIO_SW3 8 +#define EAP7660D_PHYMASK BIT(20) +#define EAP7660D_BOARDCONFIG 0x1F7F0000 +#define EAP7660D_GBIC_MAC_OFFSET 0x1000 +#define EAP7660D_WMAC0_MAC_OFFSET 0x1010 +#define EAP7660D_WMAC1_MAC_OFFSET 0x1016 +#define EAP7660D_WMAC0_CALDATA_OFFSET 0x2000 +#define EAP7660D_WMAC1_CALDATA_OFFSET 0x3000 + +#ifdef CONFIG_PCI +static struct ath5k_platform_data eap7660d_wmac0_data; +static struct ath5k_platform_data eap7660d_wmac1_data; +static char eap7660d_wmac0_mac[6]; +static char eap7660d_wmac1_mac[6]; +static u16 eap7660d_wmac0_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; +static u16 eap7660d_wmac1_eeprom[ATH5K_PLAT_EEP_MAX_WORDS]; + +static int eap7660d_pci_plat_dev_init(struct pci_dev *dev) +{ + switch (PCI_SLOT(dev->devfn)) { + case 17: + dev->dev.platform_data = &eap7660d_wmac0_data; + break; + + case 18: + dev->dev.platform_data = &eap7660d_wmac1_data; + break; + } + + return 0; +} + +void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, + u8 *cal_data1, u8 *mac_addr1) +{ + if (cal_data0 && *cal_data0 == 0xa55a) { + memcpy(eap7660d_wmac0_eeprom, cal_data0, + ATH5K_PLAT_EEP_MAX_WORDS); + eap7660d_wmac0_data.eeprom_data = eap7660d_wmac0_eeprom; + } + + if (cal_data1 && *cal_data1 == 0xa55a) { + memcpy(eap7660d_wmac1_eeprom, cal_data1, + ATH5K_PLAT_EEP_MAX_WORDS); + eap7660d_wmac1_data.eeprom_data = eap7660d_wmac1_eeprom; + } + + if (mac_addr0) { + memcpy(eap7660d_wmac0_mac, mac_addr0, + sizeof(eap7660d_wmac0_mac)); + eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; + } + + if (mac_addr1) { + memcpy(eap7660d_wmac1_mac, mac_addr1, + sizeof(eap7660d_wmac1_mac)); + eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; + } + + ath79_pci_set_plat_dev_init(eap7660d_pci_plat_dev_init); + ath79_register_pci(); +} +#else +static inline void eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0, + u8 *cal_data1, u8 *mac_addr1) +{ +} +#endif /* CONFIG_PCI */ + +static struct gpio_led eap7660d_leds_gpio[] __initdata = { + { + .name = "eap7660d:green:ds8", + .gpio = EAP7660D_GPIO_DS8, + .active_low = 0, + }, + { + .name = "eap7660d:green:ds5", + .gpio = EAP7660D_GPIO_DS5, + .active_low = 0, + }, + { + .name = "eap7660d:green:ds7", + .gpio = EAP7660D_GPIO_DS7, + .active_low = 0, + }, + { + .name = "eap7660d:green:ds4", + .gpio = EAP7660D_GPIO_DS4, + .active_low = 0, + } +}; + +static struct gpio_keys_button eap7660d_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, + .gpio = EAP7660D_GPIO_SW1, + .active_low = 1, + }, + { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = EAP7660D_KEYS_DEBOUNCE_INTERVAL, + .gpio = EAP7660D_GPIO_SW3, + .active_low = 1, + } +}; + +static const char *eap7660d_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data eap7660d_flash_data = { + .part_probes = eap7660d_part_probes, +}; + +static void __init eap7660d_setup(void) +{ + u8 *boardconfig = (u8 *) KSEG1ADDR(EAP7660D_BOARDCONFIG); + + ath79_register_mdio(0, ~EAP7660D_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, + boardconfig + EAP7660D_GBIC_MAC_OFFSET, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = EAP7660D_PHYMASK; + ath79_register_eth(0); + ath79_register_m25p80(&eap7660d_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(eap7660d_leds_gpio), + eap7660d_leds_gpio); + ath79_register_gpio_keys_polled(-1, EAP7660D_KEYS_POLL_INTERVAL, + ARRAY_SIZE(eap7660d_gpio_keys), + eap7660d_gpio_keys); + eap7660d_pci_init(boardconfig + EAP7660D_WMAC0_CALDATA_OFFSET, + boardconfig + EAP7660D_WMAC0_MAC_OFFSET, + boardconfig + EAP7660D_WMAC1_CALDATA_OFFSET, + boardconfig + EAP7660D_WMAC1_MAC_OFFSET); +}; + +MIPS_MACHINE(ATH79_MACH_EAP7660D, "EAP7660D", "Senao EAP7660D", + eap7660d_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c new file mode 100644 index 0000000000..45dc0f618c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-hornet-ub.c @@ -0,0 +1,136 @@ +/* + * ALFA NETWORKS Hornet-UB board support + * + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define HORNET_UB_GPIO_LED_WLAN 0 +#define HORNET_UB_GPIO_LED_USB 1 +#define HORNET_UB_GPIO_LED_LAN 13 +#define HORNET_UB_GPIO_LED_WAN 17 +#define HORNET_UB_GPIO_LED_WPS 27 + +#define HORNET_UB_GPIO_BTN_RESET 11 +#define HORNET_UB_GPIO_BTN_WPS 12 + +#define HORNET_UB_GPIO_USB_POWER 26 + +#define HORNET_UB_KEYS_POLL_INTERVAL 20 /* msecs */ +#define HORNET_UB_KEYS_DEBOUNCE_INTERVAL (3 * HORNET_UB_KEYS_POLL_INTERVAL) + +#define HORNET_UB_MAC0_OFFSET 0x0000 +#define HORNET_UB_MAC1_OFFSET 0x0006 +#define HORNET_UB_CALDATA_OFFSET 0x1000 + +static struct gpio_led hornet_ub_leds_gpio[] __initdata = { + { + .name = "alfa:blue:lan", + .gpio = HORNET_UB_GPIO_LED_LAN, + .active_low = 0, + }, + { + .name = "alfa:blue:usb", + .gpio = HORNET_UB_GPIO_LED_USB, + .active_low = 0, + }, + { + .name = "alfa:blue:wan", + .gpio = HORNET_UB_GPIO_LED_WAN, + .active_low = 1, + }, + { + .name = "alfa:blue:wlan", + .gpio = HORNET_UB_GPIO_LED_WLAN, + .active_low = 0, + }, + { + .name = "alfa:blue:wps", + .gpio = HORNET_UB_GPIO_LED_WPS, + .active_low = 1, + }, +}; + +static struct gpio_keys_button hornet_ub_gpio_keys[] __initdata = { + { + .desc = "WPS button", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, + .gpio = HORNET_UB_GPIO_BTN_WPS, + .active_low = 1, + }, + { + .desc = "Reset button", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = HORNET_UB_KEYS_DEBOUNCE_INTERVAL, + .gpio = HORNET_UB_GPIO_BTN_RESET, + .active_low = 0, + } +}; + +static void __init hornet_ub_gpio_setup(void) +{ + u32 t; + + ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); + t |= AR933X_BOOTSTRAP_MDIO_GPIO_EN; + ath79_reset_wr(AR933X_RESET_REG_BOOTSTRAP, t); + + gpio_request(HORNET_UB_GPIO_USB_POWER, "USB power"); + gpio_direction_output(HORNET_UB_GPIO_USB_POWER, 1); +} + +static void __init hornet_ub_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + hornet_ub_gpio_setup(); + + ath79_register_m25p80(NULL); + ath79_register_leds_gpio(-1, ARRAY_SIZE(hornet_ub_leds_gpio), + hornet_ub_leds_gpio); + ath79_register_gpio_keys_polled(-1, HORNET_UB_KEYS_POLL_INTERVAL, + ARRAY_SIZE(hornet_ub_gpio_keys), + hornet_ub_gpio_keys); + + ath79_init_mac(ath79_eth1_data.mac_addr, + art + HORNET_UB_MAC0_OFFSET, 0); + ath79_init_mac(ath79_eth0_data.mac_addr, + art + HORNET_UB_MAC1_OFFSET, 0); + + ath79_register_mdio(0, 0x0); + + ath79_register_eth(1); + ath79_register_eth(0); + + ath79_register_wmac(art + HORNET_UB_CALDATA_OFFSET, NULL); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_HORNET_UB, "HORNET-UB", "ALFA NETWORKS Hornet-UB", + hornet_ub_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c new file mode 100644 index 0000000000..46c12c1be3 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ja76pf.c @@ -0,0 +1,114 @@ +/* + * jjPlus JA76PF board support + */ + +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define JA76PF_KEYS_POLL_INTERVAL 20 /* msecs */ +#define JA76PF_KEYS_DEBOUNCE_INTERVAL (3 * JA76PF_KEYS_POLL_INTERVAL) + +#define JA76PF_GPIO_I2C_SCL 0 +#define JA76PF_GPIO_I2C_SDA 1 +#define JA76PF_GPIO_LED_1 5 +#define JA76PF_GPIO_LED_2 4 +#define JA76PF_GPIO_LED_3 3 +#define JA76PF_GPIO_BTN_RESET 11 + +static struct gpio_led ja76pf_leds_gpio[] __initdata = { + { + .name = "ja76pf:green:led1", + .gpio = JA76PF_GPIO_LED_1, + .active_low = 1, + }, { + .name = "ja76pf:green:led2", + .gpio = JA76PF_GPIO_LED_2, + .active_low = 1, + }, { + .name = "ja76pf:green:led3", + .gpio = JA76PF_GPIO_LED_3, + .active_low = 1, + } +}; + +static struct gpio_keys_button ja76pf_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = JA76PF_KEYS_DEBOUNCE_INTERVAL, + .gpio = JA76PF_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct i2c_gpio_platform_data ja76pf_i2c_gpio_data = { + .sda_pin = JA76PF_GPIO_I2C_SDA, + .scl_pin = JA76PF_GPIO_I2C_SCL, +}; + +static struct platform_device ja76pf_i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &ja76pf_i2c_gpio_data, + } +}; + +static const char *ja76pf_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data ja76pf_flash_data = { + .part_probes = ja76pf_part_probes, +}; + +#define JA76PF_WAN_PHYMASK (1 << 4) +#define JA76PF_LAN_PHYMASK ((1 << 0) | (1 << 1) | (1 << 2) | (1 < 3)) +#define JA76PF_MDIO_PHYMASK (JA76PF_LAN_PHYMASK | JA76PF_WAN_PHYMASK) + +static void __init ja76pf_init(void) +{ + ath79_register_m25p80(&ja76pf_flash_data); + + ath79_register_mdio(0, ~JA76PF_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = JA76PF_LAN_PHYMASK; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = JA76PF_WAN_PHYMASK; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); + + platform_device_register(&ja76pf_i2c_gpio_device); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ja76pf_leds_gpio), + ja76pf_leds_gpio); + + ath79_register_gpio_keys_polled(-1, JA76PF_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ja76pf_gpio_keys), + ja76pf_gpio_keys); + + ath79_register_usb(); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_JA76PF, "JA76PF", "jjPlus JA76PF", ja76pf_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c new file mode 100644 index 0000000000..a3c93ccd90 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-jwap003.c @@ -0,0 +1,95 @@ +/* + * jjPlus JWAP003 board support + * + */ + +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-gpio-buttons.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define JWAP003_KEYS_POLL_INTERVAL 20 /* msecs */ +#define JWAP003_KEYS_DEBOUNCE_INTERVAL (3 * JWAP003_KEYS_POLL_INTERVAL) + +#define JWAP003_GPIO_WPS 11 +#define JWAP003_GPIO_I2C_SCL 0 +#define JWAP003_GPIO_I2C_SDA 1 + +static struct gpio_keys_button jwap003_gpio_keys[] __initdata = { + { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = JWAP003_KEYS_DEBOUNCE_INTERVAL, + .gpio = JWAP003_GPIO_WPS, + .active_low = 1, + } +}; + +static struct i2c_gpio_platform_data jwap003_i2c_gpio_data = { + .sda_pin = JWAP003_GPIO_I2C_SDA, + .scl_pin = JWAP003_GPIO_I2C_SCL, +}; + +static struct platform_device jwap003_i2c_gpio_device = { + .name = "i2c-gpio", + .id = 0, + .dev = { + .platform_data = &jwap003_i2c_gpio_data, + } +}; + +static const char *jwap003_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data jwap003_flash_data = { + .part_probes = jwap003_part_probes, +}; + +#define JWAP003_WAN_PHYMASK BIT(0) +#define JWAP003_LAN_PHYMASK BIT(4) + +static void __init jwap003_init(void) +{ + ath79_register_m25p80(&jwap003_flash_data); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.phy_mask = JWAP003_WAN_PHYMASK; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.has_ar8216 = 1; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = JWAP003_LAN_PHYMASK; + ath79_eth1_data.speed = SPEED_100; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); + + platform_device_register(&jwap003_i2c_gpio_device); + + ath79_register_usb(); + + ath79_register_gpio_keys_polled(-1, JWAP003_KEYS_POLL_INTERVAL, + ARRAY_SIZE(jwap003_gpio_keys), + jwap003_gpio_keys); + + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_JWAP003, "JWAP003", "jjPlus JWAP003", jwap003_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c new file mode 100644 index 0000000000..c2460ce33c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w04nu.c @@ -0,0 +1,124 @@ +/* + * Planex MZK-W04NU board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define MZK_W04NU_GPIO_LED_USB 0 +#define MZK_W04NU_GPIO_LED_STATUS 1 +#define MZK_W04NU_GPIO_LED_WPS 3 +#define MZK_W04NU_GPIO_LED_WLAN 6 +#define MZK_W04NU_GPIO_LED_AP 15 +#define MZK_W04NU_GPIO_LED_ROUTER 16 + +#define MZK_W04NU_GPIO_BTN_APROUTER 5 +#define MZK_W04NU_GPIO_BTN_WPS 12 +#define MZK_W04NU_GPIO_BTN_RESET 21 + +#define MZK_W04NU_KEYS_POLL_INTERVAL 20 /* msecs */ +#define MZK_W04NU_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W04NU_KEYS_POLL_INTERVAL) + +static struct gpio_led mzk_w04nu_leds_gpio[] __initdata = { + { + .name = "planex:green:status", + .gpio = MZK_W04NU_GPIO_LED_STATUS, + .active_low = 1, + }, { + .name = "planex:blue:wps", + .gpio = MZK_W04NU_GPIO_LED_WPS, + .active_low = 1, + }, { + .name = "planex:green:wlan", + .gpio = MZK_W04NU_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "planex:green:usb", + .gpio = MZK_W04NU_GPIO_LED_USB, + .active_low = 1, + }, { + .name = "planex:green:ap", + .gpio = MZK_W04NU_GPIO_LED_AP, + .active_low = 1, + }, { + .name = "planex:green:router", + .gpio = MZK_W04NU_GPIO_LED_ROUTER, + .active_low = 1, + } +}; + +static struct gpio_keys_button mzk_w04nu_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W04NU_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W04NU_GPIO_BTN_WPS, + .active_low = 1, + }, { + .desc = "aprouter", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = MZK_W04NU_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W04NU_GPIO_BTN_APROUTER, + .active_low = 0, + } +}; + +#define MZK_W04NU_WAN_PHYMASK BIT(4) +#define MZK_W04NU_MDIO_MASK (~MZK_W04NU_WAN_PHYMASK) + +static void __init mzk_w04nu_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_mdio(0, MZK_W04NU_MDIO_MASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.has_ar8216 = 1; + + ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = MZK_W04NU_WAN_PHYMASK; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w04nu_leds_gpio), + mzk_w04nu_leds_gpio); + + ath79_register_gpio_keys_polled(-1, MZK_W04NU_KEYS_POLL_INTERVAL, + ARRAY_SIZE(mzk_w04nu_gpio_keys), + mzk_w04nu_gpio_keys); + ath79_register_usb(); + + ath79_register_wmac(eeprom, NULL); +} + +MIPS_MACHINE(ATH79_MACH_MZK_W04NU, "MZK-W04NU", "Planex MZK-W04NU", + mzk_w04nu_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c new file mode 100644 index 0000000000..8c40365283 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mzk-w300nh.c @@ -0,0 +1,115 @@ +/* + * Planex MZK-W300NH board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define MZK_W300NH_GPIO_LED_STATUS 1 +#define MZK_W300NH_GPIO_LED_WPS 3 +#define MZK_W300NH_GPIO_LED_WLAN 6 +#define MZK_W300NH_GPIO_LED_AP_GREEN 15 +#define MZK_W300NH_GPIO_LED_AP_AMBER 16 + +#define MZK_W300NH_GPIO_BTN_APROUTER 5 +#define MZK_W300NH_GPIO_BTN_WPS 12 +#define MZK_W300NH_GPIO_BTN_RESET 21 + +#define MZK_W300NH_KEYS_POLL_INTERVAL 20 /* msecs */ +#define MZK_W300NH_KEYS_DEBOUNCE_INTERVAL (3 * MZK_W300NH_KEYS_POLL_INTERVAL) + +static struct gpio_led mzk_w300nh_leds_gpio[] __initdata = { + { + .name = "planex:green:status", + .gpio = MZK_W300NH_GPIO_LED_STATUS, + .active_low = 1, + }, { + .name = "planex:blue:wps", + .gpio = MZK_W300NH_GPIO_LED_WPS, + .active_low = 1, + }, { + .name = "planex:green:wlan", + .gpio = MZK_W300NH_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "planex:green:aprouter", + .gpio = MZK_W300NH_GPIO_LED_AP_GREEN, + }, { + .name = "planex:amber:aprouter", + .gpio = MZK_W300NH_GPIO_LED_AP_AMBER, + } +}; + +static struct gpio_keys_button mzk_w300nh_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W300NH_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W300NH_GPIO_BTN_WPS, + .active_low = 1, + }, { + .desc = "aprouter", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = MZK_W300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = MZK_W300NH_GPIO_BTN_APROUTER, + .active_low = 0, + } +}; + +#define MZK_W300NH_WAN_PHYMASK BIT(4) +#define MZK_W300NH_MDIO_MASK (~MZK_W300NH_WAN_PHYMASK) + +static void __init mzk_w300nh_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_mdio(0, MZK_W300NH_MDIO_MASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.has_ar8216 = 1; + + ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = MZK_W300NH_WAN_PHYMASK; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(mzk_w300nh_leds_gpio), + mzk_w300nh_leds_gpio); + + ath79_register_gpio_keys_polled(-1, MZK_W300NH_KEYS_POLL_INTERVAL, + ARRAY_SIZE(mzk_w300nh_gpio_keys), + mzk_w300nh_gpio_keys); + ath79_register_wmac(eeprom, NULL); +} + +MIPS_MACHINE(ATH79_MACH_MZK_W300NH, "MZK-W300NH", "Planex MZK-W300NH", + mzk_w300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c new file mode 100644 index 0000000000..8aa7331d43 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg460n.c @@ -0,0 +1,220 @@ +/* + * Zyxel NBG 460N/550N/550NH board support + * + * Copyright (C) 2010 Michael Kurz + * + * based on mach-tl-wr1043nd.c + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +/* LEDs */ +#define NBG460N_GPIO_LED_WPS 3 +#define NBG460N_GPIO_LED_WAN 6 +#define NBG460N_GPIO_LED_POWER 14 +#define NBG460N_GPIO_LED_WLAN 15 + +/* Buttons */ +#define NBG460N_GPIO_BTN_WPS 12 +#define NBG460N_GPIO_BTN_RESET 21 + +#define NBG460N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define NBG460N_KEYS_DEBOUNCE_INTERVAL (3 * NBG460N_KEYS_POLL_INTERVAL) + +/* RTC chip PCF8563 I2C interface */ +#define NBG460N_GPIO_PCF8563_SDA 8 +#define NBG460N_GPIO_PCF8563_SCK 7 + +/* Switch configuration I2C interface */ +#define NBG460N_GPIO_RTL8366_SDA 16 +#define NBG460N_GPIO_RTL8366_SCK 18 + +static struct mtd_partition nbg460n_partitions[] = { + { + .name = "Bootbase", + .offset = 0, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "U-Boot Config", + .offset = 0x010000, + .size = 0x030000, + }, { + .name = "U-Boot", + .offset = 0x040000, + .size = 0x030000, + }, { + .name = "linux", + .offset = 0x070000, + .size = 0x0e0000, + }, { + .name = "rootfs", + .offset = 0x150000, + .size = 0x2a0000, + }, { + .name = "CalibData", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x070000, + .size = 0x380000, + } +}; + +static struct flash_platform_data nbg460n_flash_data = { + .parts = nbg460n_partitions, + .nr_parts = ARRAY_SIZE(nbg460n_partitions), +}; + +static struct gpio_led nbg460n_leds_gpio[] __initdata = { + { + .name = "nbg460n:green:power", + .gpio = NBG460N_GPIO_LED_POWER, + .active_low = 0, + .default_trigger = "default-on", + }, { + .name = "nbg460n:green:wps", + .gpio = NBG460N_GPIO_LED_WPS, + .active_low = 0, + }, { + .name = "nbg460n:green:wlan", + .gpio = NBG460N_GPIO_LED_WLAN, + .active_low = 0, + }, { + /* Not really for controlling the LED, + when set low the LED blinks uncontrollable */ + .name = "nbg460n:green:wan", + .gpio = NBG460N_GPIO_LED_WAN, + .active_low = 0, + } +}; + +static struct gpio_keys_button nbg460n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, + .gpio = NBG460N_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = NBG460N_KEYS_DEBOUNCE_INTERVAL, + .gpio = NBG460N_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static struct i2c_gpio_platform_data nbg460n_i2c_device_platdata = { + .sda_pin = NBG460N_GPIO_PCF8563_SDA, + .scl_pin = NBG460N_GPIO_PCF8563_SCK, + .udelay = 10, +}; + +static struct platform_device nbg460n_i2c_device = { + .name = "i2c-gpio", + .id = -1, + .num_resources = 0, + .resource = NULL, + .dev = { + .platform_data = &nbg460n_i2c_device_platdata, + }, +}; + +static struct i2c_board_info nbg460n_i2c_devs[] __initdata = { + { + I2C_BOARD_INFO("pcf8563", 0x51), + }, +}; + +static void __devinit nbg460n_i2c_init(void) +{ + /* The gpio interface */ + platform_device_register(&nbg460n_i2c_device); + /* I2C devices */ + i2c_register_board_info(0, nbg460n_i2c_devs, + ARRAY_SIZE(nbg460n_i2c_devs)); +} + + +static struct rtl8366_platform_data nbg460n_rtl8366s_data = { + .gpio_sda = NBG460N_GPIO_RTL8366_SDA, + .gpio_sck = NBG460N_GPIO_RTL8366_SCK, +}; + +static struct platform_device nbg460n_rtl8366s_device = { + .name = RTL8366S_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &nbg460n_rtl8366s_data, + } +}; + +static void __init nbg460n_setup(void) +{ + /* end of bootloader sector contains mac address */ + u8 *mac = (u8 *) KSEG1ADDR(0x1fc0fff8); + /* last sector contains wlan calib data */ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + /* LAN Port */ + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + + /* WAN Port */ + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + ath79_eth1_data.mii_bus_dev = &nbg460n_rtl8366s_device.dev; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + /* register the switch phy */ + platform_device_register(&nbg460n_rtl8366s_device); + + /* register flash */ + ath79_register_m25p80(&nbg460n_flash_data); + + ath79_register_wmac(eeprom, mac); + + /* register RTC chip */ + nbg460n_i2c_init(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(nbg460n_leds_gpio), + nbg460n_leds_gpio); + + ath79_register_gpio_keys_polled(-1, NBG460N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(nbg460n_gpio_keys), + nbg460n_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", + nbg460n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c new file mode 100644 index 0000000000..519640ac9a --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-om2p.c @@ -0,0 +1,116 @@ +/* + * OpenMesh OM2P support + * + * Copyright (C) 2011 Marek Lindner + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define OM2P_GPIO_LED_POWER 0 +#define OM2P_GPIO_LED_GREEN 13 +#define OM2P_GPIO_LED_RED 14 +#define OM2P_GPIO_LED_YELLOW 15 +#define OM2P_GPIO_LED_LAN 16 +#define OM2P_GPIO_LED_WAN 17 +#define OM2P_GPIO_BTN_RESET 11 + +#define OM2P_KEYS_POLL_INTERVAL 20 /* msecs */ +#define OM2P_KEYS_DEBOUNCE_INTERVAL (3 * OM2P_KEYS_POLL_INTERVAL) + +#define OM2P_WAN_PHYMASK BIT(4) + +static struct flash_platform_data om2p_flash_data = { + .type = "s25sl12800", + .name = "ar7240-nor0", +}; + +static struct gpio_led om2p_leds_gpio[] __initdata = { + { + .name = "om2p:blue:power", + .gpio = OM2P_GPIO_LED_POWER, + .active_low = 1, + }, { + .name = "om2p:red:wifi", + .gpio = OM2P_GPIO_LED_RED, + .active_low = 1, + }, { + .name = "om2p:yellow:wifi", + .gpio = OM2P_GPIO_LED_YELLOW, + .active_low = 1, + }, { + .name = "om2p:green:wifi", + .gpio = OM2P_GPIO_LED_GREEN, + .active_low = 1, + }, { + .name = "om2p:blue:lan", + .gpio = OM2P_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "om2p:blue:wan", + .gpio = OM2P_GPIO_LED_WAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button om2p_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = OM2P_KEYS_DEBOUNCE_INTERVAL, + .gpio = OM2P_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static void __init om2p_setup(void) +{ + u8 *mac1 = (u8 *)KSEG1ADDR(0x1ffc0000); + u8 *mac2 = (u8 *)KSEG1ADDR(0x1ffc0000 + ETH_ALEN); + u8 *ee = (u8 *)KSEG1ADDR(0x1ffc1000); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_m25p80(&om2p_flash_data); + + ath79_register_mdio(0, ~OM2P_WAN_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); + + ath79_register_eth(0); + ath79_register_eth(1); + + ap91_pci_init(ee, NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(om2p_leds_gpio), + om2p_leds_gpio); + + ath79_register_gpio_keys_polled(-1, OM2P_KEYS_POLL_INTERVAL, + ARRAY_SIZE(om2p_gpio_keys), + om2p_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_OM2P, "OM2P", "OpenMesh OM2P", om2p_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c new file mode 100644 index 0000000000..3a350e90a1 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb42.c @@ -0,0 +1,83 @@ +/* + * Atheros PB42 board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define PB42_KEYS_POLL_INTERVAL 20 /* msecs */ +#define PB42_KEYS_DEBOUNCE_INTERVAL (3 * PB42_KEYS_POLL_INTERVAL) + +#define PB42_GPIO_BTN_SW4 8 +#define PB42_GPIO_BTN_SW5 3 + +static struct gpio_keys_button pb42_gpio_keys[] __initdata = { + { + .desc = "sw4", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, + .gpio = PB42_GPIO_BTN_SW4, + .active_low = 1, + }, { + .desc = "sw5", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = PB42_KEYS_DEBOUNCE_INTERVAL, + .gpio = PB42_GPIO_BTN_SW5, + .active_low = 1, + } +}; + +static const char *pb42_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data pb42_flash_data = { + .part_probes = pb42_part_probes, +}; + +#define PB42_WAN_PHYMASK BIT(20) +#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) +#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK) + +static void __init pb42_init(void) +{ + ath79_register_m25p80(&pb42_flash_data); + + ath79_register_mdio(0, ~PB42_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = PB42_WAN_PHYMASK; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.speed = SPEED_100; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_gpio_keys_polled(-1, PB42_KEYS_POLL_INTERVAL, + ARRAY_SIZE(pb42_gpio_keys), + pb42_gpio_keys); + + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_PB42, "PB42", "Atheros PB42", pb42_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c new file mode 100644 index 0000000000..ff01f72869 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-pb92.c @@ -0,0 +1,104 @@ +/* + * Atheros PB92 board support + * + * Copyright (C) 2010 Felix Fietkau + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +static struct mtd_partition pb92_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + }, { + .name = "rootfs", + .offset = 0x050000, + .size = 0x2b0000, + }, { + .name = "uImage", + .offset = 0x300000, + .size = 0x0e0000, + }, { + .name = "ART", + .offset = 0x3e0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data pb92_flash_data = { + .parts = pb92_partitions, + .nr_parts = ARRAY_SIZE(pb92_partitions), +}; + +#define PB92_KEYS_POLL_INTERVAL 20 /* msecs */ +#define PB92_KEYS_DEBOUNCE_INTERVAL (3 * PB92_KEYS_POLL_INTERVAL) + +#define PB92_GPIO_BTN_SW4 8 +#define PB92_GPIO_BTN_SW5 3 + +static struct gpio_keys_button pb92_gpio_keys[] __initdata = { + { + .desc = "sw4", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, + .gpio = PB92_GPIO_BTN_SW4, + .active_low = 1, + }, { + .desc = "sw5", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = PB92_KEYS_DEBOUNCE_INTERVAL, + .gpio = PB92_GPIO_BTN_SW5, + .active_low = 1, + } +}; + +static void __init pb92_init(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); + + ath79_register_m25p80(&pb92_flash_data); + + ath79_register_mdio(0, ~BIT(0)); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + + ath79_register_eth(0); + + ath79_register_gpio_keys_polled(-1, PB92_KEYS_POLL_INTERVAL, + ARRAY_SIZE(pb92_gpio_keys), + pb92_gpio_keys); + + ath79_register_usb(); + + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_PB92, "PB92", "Atheros PB92", pb92_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c new file mode 100644 index 0000000000..24a4e7c3ca --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb4xx.c @@ -0,0 +1,406 @@ +/* + * MikroTik RouterBOARD 4xx series support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define RB4XX_GPIO_USER_LED 4 +#define RB4XX_GPIO_RESET_SWITCH 7 + +#define RB4XX_GPIO_CPLD_BASE 32 +#define RB4XX_GPIO_CPLD_LED1 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED1) +#define RB4XX_GPIO_CPLD_LED2 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED2) +#define RB4XX_GPIO_CPLD_LED3 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED3) +#define RB4XX_GPIO_CPLD_LED4 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED4) +#define RB4XX_GPIO_CPLD_LED5 (RB4XX_GPIO_CPLD_BASE + CPLD_GPIO_nLED5) + +#define RB4XX_KEYS_POLL_INTERVAL 20 /* msecs */ +#define RB4XX_KEYS_DEBOUNCE_INTERVAL (3 * RB4XX_KEYS_POLL_INTERVAL) + +static struct gpio_led rb4xx_leds_gpio[] __initdata = { + { + .name = "rb4xx:yellow:user", + .gpio = RB4XX_GPIO_USER_LED, + .active_low = 0, + }, { + .name = "rb4xx:green:led1", + .gpio = RB4XX_GPIO_CPLD_LED1, + .active_low = 1, + }, { + .name = "rb4xx:green:led2", + .gpio = RB4XX_GPIO_CPLD_LED2, + .active_low = 1, + }, { + .name = "rb4xx:green:led3", + .gpio = RB4XX_GPIO_CPLD_LED3, + .active_low = 1, + }, { + .name = "rb4xx:green:led4", + .gpio = RB4XX_GPIO_CPLD_LED4, + .active_low = 1, + }, { + .name = "rb4xx:green:led5", + .gpio = RB4XX_GPIO_CPLD_LED5, + .active_low = 0, + }, +}; + +static struct gpio_keys_button rb4xx_gpio_keys[] __initdata = { + { + .desc = "reset_switch", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = RB4XX_KEYS_DEBOUNCE_INTERVAL, + .gpio = RB4XX_GPIO_RESET_SWITCH, + .active_low = 1, + } +}; + +static struct platform_device rb4xx_nand_device = { + .name = "rb4xx-nand", + .id = -1, +}; + +static struct ath79_pci_irq rb4xx_pci_irqs[] __initdata = { + { + .slot = 17, + .pin = 1, + .irq = ATH79_PCI_IRQ(2), + }, { + .slot = 18, + .pin = 1, + .irq = ATH79_PCI_IRQ(0), + }, { + .slot = 18, + .pin = 2, + .irq = ATH79_PCI_IRQ(1), + }, { + .slot = 19, + .pin = 1, + .irq = ATH79_PCI_IRQ(1), + }, { + .slot = 19, + .pin = 1, + .irq = ATH79_PCI_IRQ(2), + } +}; + +static struct mtd_partition rb4xx_partitions[] = { + { + .name = "routerboot", + .offset = 0, + .size = 0x0b000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "hard_config", + .offset = 0x0b000, + .size = 0x01000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "bios", + .offset = 0x0d000, + .size = 0x02000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "soft_config", + .offset = 0x0f000, + .size = 0x01000, + } +}; + +static struct flash_platform_data rb4xx_flash_data = { + .type = "pm25lv512", + .parts = rb4xx_partitions, + .nr_parts = ARRAY_SIZE(rb4xx_partitions), +}; + +static struct rb4xx_cpld_platform_data rb4xx_cpld_data = { + .gpio_base = RB4XX_GPIO_CPLD_BASE, +}; + +static struct mmc_spi_platform_data rb4xx_mmc_data = { + .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, +}; + +static struct spi_board_info rb4xx_spi_info[] = { + { + .bus_num = 0, + .chip_select = 0, + .max_speed_hz = 25000000, + .modalias = "m25p80", + .platform_data = &rb4xx_flash_data, + }, { + .bus_num = 0, + .chip_select = 1, + .max_speed_hz = 25000000, + .modalias = "spi-rb4xx-cpld", + .platform_data = &rb4xx_cpld_data, + } +}; + +static struct spi_board_info rb4xx_microsd_info[] = { + { + .bus_num = 0, + .chip_select = 2, + .max_speed_hz = 25000000, + .modalias = "mmc_spi", + .platform_data = &rb4xx_mmc_data, + } +}; + + +static struct resource rb4xx_spi_resources[] = { + { + .start = AR71XX_SPI_BASE, + .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device rb4xx_spi_device = { + .name = "rb4xx-spi", + .id = -1, + .resource = rb4xx_spi_resources, + .num_resources = ARRAY_SIZE(rb4xx_spi_resources), +}; + +static void __init rb4xx_generic_setup(void) +{ + ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | + AR71XX_GPIO_FUNC_SPI_CS2_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), + rb4xx_leds_gpio); + + ath79_register_gpio_keys_polled(-1, RB4XX_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rb4xx_gpio_keys), + rb4xx_gpio_keys); + + spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); + platform_device_register(&rb4xx_spi_device); + platform_device_register(&rb4xx_nand_device); +} + +static void __init rb411_setup(void) +{ + rb4xx_generic_setup(); + spi_register_board_info(rb4xx_microsd_info, + ARRAY_SIZE(rb4xx_microsd_info)); + + ath79_register_mdio(0, 0xfffffffc); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = 0x00000003; + + ath79_register_eth(0); + + ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_RB_411, "411", "MikroTik RouterBOARD 411/A/AH", + rb411_setup); + +static void __init rb411u_setup(void) +{ + rb411_setup(); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_RB_411U, "411U", "MikroTik RouterBOARD 411U", + rb411u_setup); + +#define RB433_LAN_PHYMASK BIT(0) +#define RB433_WAN_PHYMASK BIT(4) +#define RB433_MDIO_PHYMASK (RB433_LAN_PHYMASK | RB433_WAN_PHYMASK) + +static void __init rb433_setup(void) +{ + rb4xx_generic_setup(); + spi_register_board_info(rb4xx_microsd_info, + ARRAY_SIZE(rb4xx_microsd_info)); + + ath79_register_mdio(0, ~RB433_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = RB433_LAN_PHYMASK; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = RB433_WAN_PHYMASK; + + ath79_register_eth(1); + ath79_register_eth(0); + + ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_RB_433, "433", "MikroTik RouterBOARD 433/AH", + rb433_setup); + +static void __init rb433u_setup(void) +{ + rb433_setup(); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_RB_433U, "433U", "MikroTik RouterBOARD 433UAH", + rb433u_setup); + +#define RB450_LAN_PHYMASK BIT(0) +#define RB450_WAN_PHYMASK BIT(4) +#define RB450_MDIO_PHYMASK (RB450_LAN_PHYMASK | RB450_WAN_PHYMASK) + +static void __init rb450_generic_setup(int gige) +{ + rb4xx_generic_setup(); + ath79_register_mdio(0, ~RB450_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 1); + ath79_eth0_data.phy_if_mode = (gige) ? + PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = RB450_LAN_PHYMASK; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 0); + ath79_eth1_data.phy_if_mode = (gige) ? + PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = RB450_WAN_PHYMASK; + + ath79_register_eth(1); + ath79_register_eth(0); +} + +static void __init rb450_setup(void) +{ + rb450_generic_setup(0); +} + +MIPS_MACHINE(ATH79_MACH_RB_450, "450", "MikroTik RouterBOARD 450", + rb450_setup); + +static void __init rb450g_setup(void) +{ + rb450_generic_setup(1); + spi_register_board_info(rb4xx_microsd_info, + ARRAY_SIZE(rb4xx_microsd_info)); +} + +MIPS_MACHINE(ATH79_MACH_RB_450G, "450G", "MikroTik RouterBOARD 450G", + rb450g_setup); + +static void __init rb493_setup(void) +{ + rb4xx_generic_setup(); + + ath79_register_mdio(0, 0x3fffff00); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = 0x00000001; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_RB_493, "493", "MikroTik RouterBOARD 493/AH", + rb493_setup); + +#define RB493G_GPIO_MDIO_MDC 7 +#define RB493G_GPIO_MDIO_DATA 8 + +#define RB493G_MDIO_PHYMASK BIT(0) + +static struct mdio_gpio_platform_data rb493g_mdio_data = { + .mdc = RB493G_GPIO_MDIO_MDC, + .mdio = RB493G_GPIO_MDIO_DATA, + + .phy_mask = ~RB493G_MDIO_PHYMASK, +}; + +static struct platform_device rb493g_mdio_device = { + .name = "mdio-gpio", + .id = -1, + .dev = { + .platform_data = &rb493g_mdio_data, + }, +}; + +static void __init rb493g_setup(void) +{ + ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN | + AR71XX_GPIO_FUNC_SPI_CS2_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rb4xx_leds_gpio), + rb4xx_leds_gpio); + + spi_register_board_info(rb4xx_spi_info, ARRAY_SIZE(rb4xx_spi_info)); + platform_device_register(&rb4xx_spi_device); + platform_device_register(&rb4xx_nand_device); + + ath79_register_mdio(0, ~RB493G_MDIO_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = RB493G_MDIO_PHYMASK; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.mii_bus_dev = &rb493g_mdio_device.dev; + ath79_eth1_data.phy_mask = RB493G_MDIO_PHYMASK; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + platform_device_register(&rb493g_mdio_device); + + ath79_register_eth(1); + ath79_register_eth(0); + + ath79_register_usb(); + + ath79_pci_set_irq_map(ARRAY_SIZE(rb4xx_pci_irqs), rb4xx_pci_irqs); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_RB_493G, "493G", "MikroTik RouterBOARD 493G", + rb493g_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c new file mode 100644 index 0000000000..976617bb36 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb750.c @@ -0,0 +1,154 @@ +/* + * MikroTik RouterBOARD 750 support + * + * Copyright (C) 2010-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "machtypes.h" + +static struct rb750_led_data rb750_leds[] = { + { + .name = "rb750:green:act", + .mask = RB750_LED_ACT, + .active_low = 1, + }, { + .name = "rb750:green:port1", + .mask = RB750_LED_PORT5, + .active_low = 1, + }, { + .name = "rb750:green:port2", + .mask = RB750_LED_PORT4, + .active_low = 1, + }, { + .name = "rb750:green:port3", + .mask = RB750_LED_PORT3, + .active_low = 1, + }, { + .name = "rb750:green:port4", + .mask = RB750_LED_PORT2, + .active_low = 1, + }, { + .name = "rb750:green:port5", + .mask = RB750_LED_PORT1, + .active_low = 1, + } +}; + +static struct rb750_led_platform_data rb750_leds_data = { + .num_leds = ARRAY_SIZE(rb750_leds), + .leds = rb750_leds, +}; + +static struct platform_device rb750_leds_device = { + .name = "leds-rb750", + .dev = { + .platform_data = &rb750_leds_data, + } +}; + +static struct platform_device rb750_nand_device = { + .name = "rb750-nand", + .id = -1, +}; + +int rb750_latch_change(u32 mask_clr, u32 mask_set) +{ + static DEFINE_SPINLOCK(lock); + static u32 latch_set = RB750_LED_BITS | RB750_LVC573_LE; + static u32 latch_oe; + static u32 latch_clr; + unsigned long flags; + u32 t; + int ret = 0; + + spin_lock_irqsave(&lock, flags); + + if ((mask_clr & BIT(31)) != 0 && + (latch_set & RB750_LVC573_LE) == 0) { + goto unlock; + } + + latch_set = (latch_set | mask_set) & ~mask_clr; + latch_clr = (latch_clr | mask_clr) & ~mask_set; + + if (latch_oe == 0) + latch_oe = __raw_readl(ath79_gpio_base + AR71XX_GPIO_REG_OE); + + if (likely(latch_set & RB750_LVC573_LE)) { + void __iomem *base = ath79_gpio_base; + + t = __raw_readl(base + AR71XX_GPIO_REG_OE); + t |= mask_clr | latch_oe | mask_set; + + __raw_writel(t, base + AR71XX_GPIO_REG_OE); + __raw_writel(latch_clr, base + AR71XX_GPIO_REG_CLEAR); + __raw_writel(latch_set, base + AR71XX_GPIO_REG_SET); + } else if (mask_clr & RB750_LVC573_LE) { + void __iomem *base = ath79_gpio_base; + + latch_oe = __raw_readl(base + AR71XX_GPIO_REG_OE); + __raw_writel(RB750_LVC573_LE, base + AR71XX_GPIO_REG_CLEAR); + /* flush write */ + __raw_readl(base + AR71XX_GPIO_REG_CLEAR); + } + + ret = 1; + +unlock: + spin_unlock_irqrestore(&lock, flags); + return ret; +} +EXPORT_SYMBOL_GPL(rb750_latch_change); + +void rb750_nand_pins_enable(void) +{ + ath79_gpio_function_setup(AR724X_GPIO_FUNC_JTAG_DISABLE, + AR724X_GPIO_FUNC_SPI_EN); +} +EXPORT_SYMBOL_GPL(rb750_nand_pins_enable); + +void rb750_nand_pins_disable(void) +{ + ath79_gpio_function_setup(AR724X_GPIO_FUNC_SPI_EN, + AR724X_GPIO_FUNC_JTAG_DISABLE); +} +EXPORT_SYMBOL_GPL(rb750_nand_pins_disable); + +static void __init rb750_setup(void) +{ + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + + ath79_register_mdio(0, 0x0); + + /* LAN ports */ + ath79_register_eth(1); + + /* WAN port */ + ath79_register_eth(0); + + platform_device_register(&rb750_leds_device); + platform_device_register(&rb750_nand_device); +} + +MIPS_MACHINE(ATH79_MACH_RB_750, "750i", "MikroTik RouterBOARD 750", + rb750_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c new file mode 100644 index 0000000000..28d9de4f3e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rw2458n.c @@ -0,0 +1,100 @@ +/* + * Redwave RW2458N support + * + * Copyright (C) 2011-2012 Cezary Jackiewicz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define RW2458N_GPIO_LED_D3 1 +#define RW2458N_GPIO_LED_D4 0 +#define RW2458N_GPIO_LED_D5 11 +#define RW2458N_GPIO_LED_D6 7 +#define RW2458N_GPIO_BTN_RESET 12 + +#define RW2458N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define RW2458N_KEYS_DEBOUNCE_INTERVAL (3 * RW2458N_KEYS_POLL_INTERVAL) + +static struct gpio_keys_button rw2458n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = RW2458N_KEYS_DEBOUNCE_INTERVAL, + .gpio = RW2458N_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +#define RW2458N_WAN_PHYMASK BIT(4) + +static struct gpio_led rw2458n_leds_gpio[] __initdata = { + { + .name = "rw2458n:green:d3", + .gpio = RW2458N_GPIO_LED_D3, + .active_low = 1, + }, { + .name = "rw2458n:green:d4", + .gpio = RW2458N_GPIO_LED_D4, + .active_low = 1, + }, { + .name = "rw2458n:green:d5", + .gpio = RW2458N_GPIO_LED_D5, + .active_low = 1, + }, { + .name = "rw2458n:green:d6", + .gpio = RW2458N_GPIO_LED_D6, + .active_low = 1, + } +}; + +static const char *rw2458n_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data rw2458n_flash_data = { + .part_probes = rw2458n_part_probes, +}; + +static void __init rw2458n_setup(void) +{ + u8 *mac1 = (u8 *) KSEG1ADDR(0x1fff0000); + u8 *mac2 = (u8 *) KSEG1ADDR(0x1fff0000 + ETH_ALEN); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&rw2458n_flash_data); + + ath79_register_mdio(0, ~RW2458N_WAN_PHYMASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 0); + + ath79_register_eth(0); + ath79_register_eth(1); + + ap91_pci_init(ee, NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(rw2458n_leds_gpio), + rw2458n_leds_gpio); + + ath79_register_gpio_keys_polled(-1, RW2458N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(rw2458n_gpio_keys), + rw2458n_gpio_keys); + ath79_register_usb(); +} + +MIPS_MACHINE(ATH79_MACH_RW2458N, "RW2458N", "Redwave RW2458N", + rw2458n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c new file mode 100644 index 0000000000..de2d2a5376 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-632brp.c @@ -0,0 +1,147 @@ +/* + * TrendNET TEW-632BRP board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" +#include "nvram.h" + +#define TEW_632BRP_GPIO_LED_STATUS 1 +#define TEW_632BRP_GPIO_LED_WPS 3 +#define TEW_632BRP_GPIO_LED_WLAN 6 +#define TEW_632BRP_GPIO_BTN_WPS 12 +#define TEW_632BRP_GPIO_BTN_RESET 21 + +#define TEW_632BRP_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TEW_632BRP_KEYS_DEBOUNCE_INTERVAL (3 * TEW_632BRP_KEYS_POLL_INTERVAL) + +#define TEW_632BRP_CONFIG_ADDR 0x1f020000 +#define TEW_632BRP_CONFIG_SIZE 0x10000 + +static struct mtd_partition tew_632brp_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "config", + .offset = 0x020000, + .size = 0x010000, + }, { + .name = "kernel", + .offset = 0x030000, + .size = 0x0e0000, + }, { + .name = "rootfs", + .offset = 0x110000, + .size = 0x2e0000, + }, { + .name = "art", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x030000, + .size = 0x3c0000, + } +}; + +static struct flash_platform_data tew_632brp_flash_data = { + .parts = tew_632brp_partitions, + .nr_parts = ARRAY_SIZE(tew_632brp_partitions), +}; + +static struct gpio_led tew_632brp_leds_gpio[] __initdata = { + { + .name = "tew-632brp:green:status", + .gpio = TEW_632BRP_GPIO_LED_STATUS, + .active_low = 1, + }, { + .name = "tew-632brp:blue:wps", + .gpio = TEW_632BRP_GPIO_LED_WPS, + .active_low = 1, + }, { + .name = "tew-632brp:green:wlan", + .gpio = TEW_632BRP_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button tew_632brp_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, + .gpio = TEW_632BRP_GPIO_BTN_RESET, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TEW_632BRP_KEYS_DEBOUNCE_INTERVAL, + .gpio = TEW_632BRP_GPIO_BTN_WPS, + } +}; + +#define TEW_632BRP_LAN_PHYMASK BIT(0) +#define TEW_632BRP_WAN_PHYMASK BIT(4) +#define TEW_632BRP_MDIO_MASK (~(TEW_632BRP_LAN_PHYMASK | \ + TEW_632BRP_WAN_PHYMASK)) + +static void __init tew_632brp_setup(void) +{ + const char *config = (char *) KSEG1ADDR(TEW_632BRP_CONFIG_ADDR); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + u8 mac[6]; + u8 *wlan_mac = NULL; + + if (ath79_nvram_parse_mac_addr(config, TEW_632BRP_CONFIG_SIZE, + "lan_mac=", mac) == 0) { + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + wlan_mac = mac; + } + + ath79_register_mdio(0, TEW_632BRP_MDIO_MASK); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.phy_mask = TEW_632BRP_LAN_PHYMASK; + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = TEW_632BRP_WAN_PHYMASK; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&tew_632brp_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tew_632brp_leds_gpio), + tew_632brp_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TEW_632BRP_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tew_632brp_gpio_keys), + tew_632brp_gpio_keys); + + ath79_register_wmac(eeprom, wlan_mac); +} + +MIPS_MACHINE(ATH79_MACH_TEW_632BRP, "TEW-632BRP", "TRENDnet TEW-632BRP", + tew_632brp_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c new file mode 100644 index 0000000000..71f2ec00e4 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-673gru.c @@ -0,0 +1,217 @@ +/* + * TRENDnet TEW-673GRU board support + * + * Copyright (C) 2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define TEW673GRU_GPIO_LCD_SCK 0 +#define TEW673GRU_GPIO_LCD_MOSI 1 +#define TEW673GRU_GPIO_LCD_MISO 2 +#define TEW673GRU_GPIO_LCD_CS 6 + +#define TEW673GRU_GPIO_LED_WPS 9 + +#define TEW673GRU_GPIO_BTN_RESET 3 +#define TEW673GRU_GPIO_BTN_WPS 8 + +#define TEW673GRU_GPIO_RTL8366_SDA 5 +#define TEW673GRU_GPIO_RTL8366_SCK 7 + +#define TEW673GRU_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TEW673GRU_KEYS_DEBOUNCE_INTERVAL (3 * TEW673GRU_KEYS_POLL_INTERVAL) + +#define TEW673GRU_CAL_LOCATION_0 0x1f661000 +#define TEW673GRU_CAL_LOCATION_1 0x1f665000 + +#define TEW673GRU_MAC_LOCATION_0 0x1f66ffa0 +#define TEW673GRU_MAC_LOCATION_1 0x1f66ffb4 + +static struct mtd_partition tew673gru_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "config", + .offset = 0x040000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x050000, + .size = 0x610000, + }, { + .name = "caldata", + .offset = 0x660000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "unknown", + .offset = 0x670000, + .size = 0x190000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data tew673gru_flash_data = { + .parts = tew673gru_partitions, + .nr_parts = ARRAY_SIZE(tew673gru_partitions), +}; + +static struct gpio_led tew673gru_leds_gpio[] __initdata = { + { + .name = "trendnet:blue:wps", + .gpio = TEW673GRU_GPIO_LED_WPS, + .active_low = 1, + } +}; + +static struct gpio_keys_button tew673gru_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, + .gpio = TEW673GRU_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TEW673GRU_KEYS_DEBOUNCE_INTERVAL, + .gpio = TEW673GRU_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static struct rtl8366_initval tew673gru_rtl8366s_initvals[] = { + { .reg = 0x06, .val = 0x0108 }, +}; + +static struct rtl8366_platform_data tew673gru_rtl8366s_data = { + .gpio_sda = TEW673GRU_GPIO_RTL8366_SDA, + .gpio_sck = TEW673GRU_GPIO_RTL8366_SCK, + .num_initvals = ARRAY_SIZE(tew673gru_rtl8366s_initvals), + .initvals = tew673gru_rtl8366s_initvals, +}; + +static struct platform_device tew673gru_rtl8366s_device = { + .name = RTL8366S_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &tew673gru_rtl8366s_data, + } +}; + +static struct spi_board_info tew673gru_spi_info[] = { + { + .bus_num = 1, + .chip_select = 0, + .max_speed_hz = 400000, + .modalias = "spidev", + .mode = SPI_MODE_2, + .controller_data = (void *) TEW673GRU_GPIO_LCD_CS, + }, +}; + +static struct spi_gpio_platform_data tew673gru_spi_data = { + .sck = TEW673GRU_GPIO_LCD_SCK, + .miso = TEW673GRU_GPIO_LCD_MISO, + .mosi = TEW673GRU_GPIO_LCD_MOSI, + .num_chipselect = 1, +}; + +static struct platform_device tew673gru_spi_device = { + .name = "spi_gpio", + .id = 1, + .dev = { + .platform_data = &tew673gru_spi_data, + }, +}; + +static void tew673gru_read_ascii_mac(u8 *dest, unsigned int src_addr) +{ + int ret; + u8 *src = (u8 *)KSEG1ADDR(src_addr); + + ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + &dest[0], &dest[1], &dest[2], + &dest[3], &dest[4], &dest[5]); + + if (ret != ETH_ALEN) memset(dest, 0, ETH_ALEN); +} + +static void __init tew673gru_setup(void) +{ + u8 mac1[ETH_ALEN], mac2[ETH_ALEN]; + + tew673gru_read_ascii_mac(mac1, TEW673GRU_MAC_LOCATION_0); + tew673gru_read_ascii_mac(mac2, TEW673GRU_MAC_LOCATION_1); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2); + ath79_eth0_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_pll_data.pll_1000 = 0x11110000; + + ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3); + ath79_eth1_data.mii_bus_dev = &tew673gru_rtl8366s_device.dev; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = 0x10; + ath79_eth1_pll_data.pll_1000 = 0x11110000; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&tew673gru_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tew673gru_leds_gpio), + tew673gru_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TEW673GRU_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tew673gru_gpio_keys), + tew673gru_gpio_keys); + + ath79_register_usb(); + + platform_device_register(&tew673gru_rtl8366s_device); + + ap9x_pci_setup_wmac_led_pin(0, 5); + ap9x_pci_setup_wmac_led_pin(1, 5); + + ap94_pci_init((u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_0), mac1, + (u8 *) KSEG1ADDR(TEW673GRU_CAL_LOCATION_1), mac2); + + spi_register_board_info(tew673gru_spi_info, + ARRAY_SIZE(tew673gru_spi_info)); + platform_device_register(&tew673gru_spi_device); +} + +MIPS_MACHINE(ATH79_MACH_TEW_673GRU, "TEW-673GRU", "TRENDnet TEW-673GRU", + tew673gru_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c new file mode 100644 index 0000000000..7846b4f18d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr11u.c @@ -0,0 +1,107 @@ +/* + * TP-LINK TL-MR11U board support + * + * Copyright (C) 2011 dongyuqi <729650915@qq.com> + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_MR11U_GPIO_LED_3G 27 +#define TL_MR11U_GPIO_LED_WLAN 26 +#define TL_MR11U_GPIO_LED_LAN 17 + +#define TL_MR11U_GPIO_BTN_WPS 20 +#define TL_MR11U_GPIO_BTN_RESET 11 + +#define TL_MR11U_GPIO_USB_POWER 8 + +#define TL_MR11U_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_MR11U_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR11U_KEYS_POLL_INTERVAL) + +static const char *tl_mr11u_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_mr11u_flash_data = { + .part_probes = tl_mr11u_part_probes, +}; + +static struct gpio_led tl_mr11u_leds_gpio[] __initdata = { + { + .name = "tp-link:green:3g", + .gpio = TL_MR11U_GPIO_LED_3G, + .active_low = 1, + }, + { + .name = "tp-link:green:wlan", + .gpio = TL_MR11U_GPIO_LED_WLAN, + .active_low = 1, + }, + { + .name = "tp-link:green:lan", + .gpio = TL_MR11U_GPIO_LED_LAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_mr11u_gpio_keys[] __initdata = { + { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR11U_GPIO_BTN_WPS, + .active_low = 0, + }, + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_MR11U_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR11U_GPIO_BTN_RESET, + .active_low = 0, + } +}; + +static void __init tl_mr11u_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_mr11u_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr11u_leds_gpio), + tl_mr11u_leds_gpio); + ath79_register_gpio_keys_polled(-1, TL_MR11U_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_mr11u_gpio_keys), + tl_mr11u_gpio_keys); + + gpio_request(TL_MR11U_GPIO_USB_POWER, "USB power"); + gpio_direction_output(TL_MR11U_GPIO_USB_POWER, 1); + ath79_register_usb(); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(0); + + ath79_register_wmac(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_MR11U, "TL-MR11U", "TP-LINK TL-MR11U", + tl_mr11u_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c new file mode 100644 index 0000000000..9732d5cd56 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3020.c @@ -0,0 +1,121 @@ +/* + * TP-LINK TL-MR3020 board support + * + * Copyright (C) 2011 dongyuqi <729650915@qq.com> + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_MR3020_GPIO_LED_3G 27 +#define TL_MR3020_GPIO_LED_WLAN 0 +#define TL_MR3020_GPIO_LED_LAN 17 +#define TL_MR3020_GPIO_LED_WPS 26 + +#define TL_MR3020_GPIO_BTN_WPS 11 +#define TL_MR3020_GPIO_BTN_SW1 18 +#define TL_MR3020_GPIO_BTN_SW2 20 + +#define TL_MR3020_GPIO_USB_POWER 8 + +#define TL_MR3020_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_MR3020_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3020_KEYS_POLL_INTERVAL) + +static const char *tl_mr3020_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_mr3020_flash_data = { + .part_probes = tl_mr3020_part_probes, +}; + +static struct gpio_led tl_mr3020_leds_gpio[] __initdata = { + { + .name = "tp-link:green:3g", + .gpio = TL_MR3020_GPIO_LED_3G, + .active_low = 1, + }, + { + .name = "tp-link:green:wlan", + .gpio = TL_MR3020_GPIO_LED_WLAN, + .active_low = 0, + }, + { + .name = "tp-link:green:lan", + .gpio = TL_MR3020_GPIO_LED_LAN, + .active_low = 1, + }, + { + .name = "tp-link:green:wps", + .gpio = TL_MR3020_GPIO_LED_WPS, + .active_low = 1, + }, +}; + +static struct gpio_keys_button tl_mr3020_gpio_keys[] __initdata = { + { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR3020_GPIO_BTN_WPS, + .active_low = 0, + }, + { + .desc = "sw1", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR3020_GPIO_BTN_SW1, + .active_low = 0, + }, + { + .desc = "sw2", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = TL_MR3020_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR3020_GPIO_BTN_SW2, + .active_low = 0, + } +}; + +static void __init tl_mr3020_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_mr3020_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3020_leds_gpio), + tl_mr3020_leds_gpio); + ath79_register_gpio_keys_polled(-1, TL_MR3020_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_mr3020_gpio_keys), + tl_mr3020_gpio_keys); + + gpio_request(TL_MR3020_GPIO_USB_POWER, "USB power"); + gpio_direction_output(TL_MR3020_GPIO_USB_POWER, 1); + ath79_register_usb(); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(0); + ath79_register_wmac(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_MR3020, "TL-MR3020", "TP-LINK TL-MR3020", + tl_mr3020_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c new file mode 100644 index 0000000000..35515a9b4b --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-mr3x20.c @@ -0,0 +1,147 @@ +/* + * TP-LINK TL-MR3220/3420 board support + * + * Copyright (C) 2010-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define TL_MR3X20_GPIO_LED_QSS 0 +#define TL_MR3X20_GPIO_LED_SYSTEM 1 +#define TL_MR3X20_GPIO_LED_3G 8 + +#define TL_MR3X20_GPIO_BTN_RESET 11 +#define TL_MR3X20_GPIO_BTN_QSS 12 + +#define TL_MR3X20_GPIO_USB_POWER 6 + +#define TL_MR3X20_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_MR3X20_KEYS_DEBOUNCE_INTERVAL (3 * TL_MR3X20_KEYS_POLL_INTERVAL) + +static const char *tl_mr3x20_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_mr3x20_flash_data = { + .part_probes = tl_mr3x20_part_probes, +}; + +static struct gpio_led tl_mr3x20_leds_gpio[] __initdata = { + { + .name = "tp-link:green:system", + .gpio = TL_MR3X20_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_MR3X20_GPIO_LED_QSS, + .active_low = 1, + }, { + .name = "tp-link:green:3g", + .gpio = TL_MR3X20_GPIO_LED_3G, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_mr3x20_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR3X20_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_MR3X20_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_MR3X20_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static void __init tl_ap99_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_mr3x20_flash_data); + + ath79_register_gpio_keys_polled(-1, TL_MR3X20_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_mr3x20_gpio_keys), + tl_mr3x20_gpio_keys); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + + ath79_register_mdio(0, 0x0); + + /* LAN ports */ + ath79_register_eth(1); + /* WAN port */ + ath79_register_eth(0); + + ap91_pci_init(ee, mac); +} + +static void __init tl_mr3x20_usb_setup(void) +{ + /* enable power for the USB port */ + gpio_request(TL_MR3X20_GPIO_USB_POWER, "USB power"); + gpio_direction_output(TL_MR3X20_GPIO_USB_POWER, 1); + + ath79_register_usb(); +} + +static void __init tl_mr3220_setup(void) +{ + tl_ap99_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), + tl_mr3x20_leds_gpio); + ap9x_pci_setup_wmac_led_pin(0, 1); + tl_mr3x20_usb_setup(); +} + +MIPS_MACHINE(ATH79_MACH_TL_MR3220, "TL-MR3220", "TP-LINK TL-MR3220", + tl_mr3220_setup); + +static void __init tl_mr3420_setup(void) +{ + tl_ap99_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio), + tl_mr3x20_leds_gpio); + ap9x_pci_setup_wmac_led_pin(0, 0); + tl_mr3x20_usb_setup(); +} + +MIPS_MACHINE(ATH79_MACH_TL_MR3420, "TL-MR3420", "TP-LINK TL-MR3420", + tl_mr3420_setup); + +static void __init tl_wr841n_v7_setup(void) +{ + tl_ap99_setup(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_mr3x20_leds_gpio) - 1, + tl_mr3x20_leds_gpio); + ap9x_pci_setup_wmac_led_pin(0, 0); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR841N_V7, "TL-WR841N-v7", + "TP-LINK TL-WR841N/ND v7", tl_wr841n_v7_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c new file mode 100644 index 0000000000..b4fb2a9f91 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd-v2.c @@ -0,0 +1,104 @@ +/* + * TP-LINK TL-WA901N/ND v2 board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * Copyright (C) 2010 Pieter Hollants + * Copyright (C) 2011 Jonathan Bennett + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_WA901ND_V2_GPIO_LED_QSS 4 +#define TL_WA901ND_V2_GPIO_LED_SYSTEM 2 +#define TL_WA901ND_V2_GPIO_LED_WLAN 9 + +#define TL_WA901ND_V2_GPIO_BTN_RESET 3 +#define TL_WA901ND_V2_GPIO_BTN_QSS 7 + +#define TL_WA901ND_V2_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL \ + (3 * TL_WA901ND_V2_KEYS_POLL_INTERVAL) + +static const char *tl_wa901nd_v2_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wa901nd_v2_flash_data = { + .part_probes = tl_wa901nd_v2_part_probes, +}; + +static struct gpio_led tl_wa901nd_v2_leds_gpio[] __initdata = { + { + .name = "tp-link:green:system", + .gpio = TL_WA901ND_V2_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WA901ND_V2_GPIO_LED_QSS, + }, { + .name = "tp-link:green:wlan", + .gpio = TL_WA901ND_V2_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_wa901nd_v2_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WA901ND_V2_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WA901ND_V2_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WA901ND_V2_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static void __init tl_wa901nd_v2_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = 0x00001000; + ath79_register_mdio(0, 0x0); + + ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | + AR71XX_RESET_GE0_PHY; + ath79_register_eth(0); + + ath79_register_m25p80(&tl_wa901nd_v2_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_v2_leds_gpio), + tl_wa901nd_v2_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WA901ND_V2_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wa901nd_v2_gpio_keys), + tl_wa901nd_v2_gpio_keys); + + ath79_register_wmac(eeprom, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WA901ND_V2, "TL-WA901ND-v2", + "TP-LINK TL-WA901ND v2", tl_wa901nd_v2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c new file mode 100644 index 0000000000..2f4e0c047d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wa901nd.c @@ -0,0 +1,109 @@ +/* + * TP-LINK TL-WA901N/ND v1 board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * Copyright (C) 2010 Pieter Hollants + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define TL_WA901ND_GPIO_LED_QSS 0 +#define TL_WA901ND_GPIO_LED_SYSTEM 1 +#define TL_WA901ND_GPIO_LED_LAN 13 + +#define TL_WA901ND_GPIO_BTN_RESET 11 +#define TL_WA901ND_GPIO_BTN_QSS 12 + +#define TL_WA901ND_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WA901ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WA901ND_KEYS_POLL_INTERVAL) + +static const char *tl_wa901nd_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wa901nd_flash_data = { + .part_probes = tl_wa901nd_part_probes, +}; + +static struct gpio_led tl_wa901nd_leds_gpio[] __initdata = { + { + .name = "tp-link:green:lan", + .gpio = TL_WA901ND_GPIO_LED_LAN, + .active_low = 1, + }, { + .name = "tp-link:green:system", + .gpio = TL_WA901ND_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WA901ND_GPIO_LED_QSS, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_wa901nd_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WA901ND_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = TL_WA901ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WA901ND_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static void __init tl_wa901nd_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + /* + * ath79_eth0 would be the WAN port, but is not connected on + * the TL-WA901ND. ath79_eth1 connects to the internal switch chip, + * however we have a single LAN port only. + */ + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0); + ath79_register_mdio(0, 0x0); + ath79_register_eth(1); + + ath79_register_m25p80(&tl_wa901nd_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wa901nd_leds_gpio), + tl_wa901nd_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WA901ND_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wa901nd_gpio_keys), + tl_wa901nd_gpio_keys); + + ap91_pci_init(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WA901ND, "TL-WA901ND", "TP-LINK TL-WA901ND", + tl_wa901nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c new file mode 100644 index 0000000000..e789b402b8 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd.c @@ -0,0 +1,128 @@ +/* + * TP-LINK TL-WR1043N/ND board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_WR1043ND_GPIO_LED_USB 1 +#define TL_WR1043ND_GPIO_LED_SYSTEM 2 +#define TL_WR1043ND_GPIO_LED_QSS 5 +#define TL_WR1043ND_GPIO_LED_WLAN 9 + +#define TL_WR1043ND_GPIO_BTN_RESET 3 +#define TL_WR1043ND_GPIO_BTN_QSS 7 + +#define TL_WR1043ND_GPIO_RTL8366_SDA 18 +#define TL_WR1043ND_GPIO_RTL8366_SCK 19 + +#define TL_WR1043ND_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR1043ND_KEYS_POLL_INTERVAL) + +static const char *tl_wr1043nd_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr1043nd_flash_data = { + .part_probes = tl_wr1043nd_part_probes, +}; + +static struct gpio_led tl_wr1043nd_leds_gpio[] __initdata = { + { + .name = "tp-link:green:usb", + .gpio = TL_WR1043ND_GPIO_LED_USB, + .active_low = 1, + }, { + .name = "tp-link:green:system", + .gpio = TL_WR1043ND_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WR1043ND_GPIO_LED_QSS, + .active_low = 0, + }, { + .name = "tp-link:green:wlan", + .gpio = TL_WR1043ND_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_wr1043nd_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR1043ND_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR1043ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR1043ND_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static struct rtl8366_platform_data tl_wr1043nd_rtl8366rb_data = { + .gpio_sda = TL_WR1043ND_GPIO_RTL8366_SDA, + .gpio_sck = TL_WR1043ND_GPIO_RTL8366_SCK, +}; + +static struct platform_device tl_wr1043nd_rtl8366rb_device = { + .name = RTL8366RB_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &tl_wr1043nd_rtl8366rb_data, + } +}; + +static void __init tl_wr1043nd_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.mii_bus_dev = &tl_wr1043nd_rtl8366rb_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_pll_data.pll_1000 = 0x1a000000; + + ath79_register_eth(0); + + ath79_register_usb(); + + ath79_register_m25p80(&tl_wr1043nd_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr1043nd_leds_gpio), + tl_wr1043nd_leds_gpio); + + platform_device_register(&tl_wr1043nd_rtl8366rb_device); + + ath79_register_gpio_keys_polled(-1, TL_WR1043ND_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr1043nd_gpio_keys), + tl_wr1043nd_gpio_keys); + + ath79_register_wmac(eeprom, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR1043ND, "TL-WR1043ND", "TP-LINK TL-WR1043ND", + tl_wr1043nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c new file mode 100644 index 0000000000..bb00b72e7d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr2543n.c @@ -0,0 +1,130 @@ +/* + * TP-LINK TL-WR2543N/ND board support + * + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define TL_WR2543N_GPIO_LED_WPS 0 +#define TL_WR2543N_GPIO_LED_USB 8 + +#define TL_WR2543N_GPIO_BTN_RESET 11 +#define TL_WR2543N_GPIO_BTN_WPS 12 + +#define TL_WR2543N_GPIO_RTL8367_SDA 1 +#define TL_WR2543N_GPIO_RTL8367_SCK 6 + +#define TL_WR2543N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR2543N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR2543N_KEYS_POLL_INTERVAL) + +static const char *tl_wr2543n_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr2543n_flash_data = { + .part_probes = tl_wr2543n_part_probes, + .max_read_len = 64, +}; + +static struct gpio_led tl_wr2543n_leds_gpio[] __initdata = { + { + .name = "tp-link:green:usb", + .gpio = TL_WR2543N_GPIO_LED_USB, + .active_low = 1, + }, { + .name = "tp-link:green:wps", + .gpio = TL_WR2543N_GPIO_LED_WPS, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_wr2543n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR2543N_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR2543N_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR2543N_GPIO_BTN_WPS, + } +}; + +static struct rtl8367_extif_config tl_wr2543n_rtl8367_extif0_cfg = { + .mode = RTL8367_EXTIF_MODE_RGMII, + .txdelay = 1, + .rxdelay = 0, + .ability = { + .force_mode = 1, + .txpause = 1, + .rxpause = 1, + .link = 1, + .duplex = 1, + .speed = RTL8367_PORT_SPEED_1000, + }, +}; + +static struct rtl8367_platform_data tl_wr2543n_rtl8367_data = { + .gpio_sda = TL_WR2543N_GPIO_RTL8367_SDA, + .gpio_sck = TL_WR2543N_GPIO_RTL8367_SCK, + .extif0_cfg = &tl_wr2543n_rtl8367_extif0_cfg, +}; + +static struct platform_device tl_wr2543n_rtl8367_device = { + .name = RTL8367_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &tl_wr2543n_rtl8367_data, + } +}; + +static void __init tl_wr2543n_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_wr2543n_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr2543n_leds_gpio), + tl_wr2543n_leds_gpio); + ath79_register_gpio_keys_polled(-1, TL_WR2543N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr2543n_gpio_keys), + tl_wr2543n_gpio_keys); + ath79_register_usb(); + ap91_pci_init(eeprom, mac); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1); + ath79_eth0_data.mii_bus_dev = &tl_wr2543n_rtl8367_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_pll_data.pll_1000 = 0x1a000000; + + ath79_register_eth(0); + + platform_device_register(&tl_wr2543n_rtl8367_device); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR2543N, "TL-WR2543N", "TP-LINK TL-WR2543N/ND", + tl_wr2543n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c new file mode 100644 index 0000000000..badc35af15 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr703n.c @@ -0,0 +1,85 @@ +/* + * TP-LINK TL-WR703N board support + * + * Copyright (C) 2011 dongyuqi <729650915@qq.com> + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_WR703N_GPIO_LED_SYSTEM 27 +#define TL_WR703N_GPIO_BTN_RESET 11 + +#define TL_WR703N_GPIO_USB_POWER 8 + +#define TL_WR703N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR703N_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR703N_KEYS_POLL_INTERVAL) + +static const char *tl_wr703n_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr703n_flash_data = { + .part_probes = tl_wr703n_part_probes, +}; + +static struct gpio_led tl_wr703n_leds_gpio[] __initdata = { + { + .name = "tp-link:blue:system", + .gpio = TL_WR703N_GPIO_LED_SYSTEM, + .active_low = 1, + }, +}; + +static struct gpio_keys_button tl_wr703n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR703N_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR703N_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static void __init tl_wr703n_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_wr703n_flash_data); + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr703n_leds_gpio), + tl_wr703n_leds_gpio); + ath79_register_gpio_keys_polled(-1, TL_WR703N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr703n_gpio_keys), + tl_wr703n_gpio_keys); + + gpio_request(TL_WR703N_GPIO_USB_POWER, "USB power"); + gpio_direction_output(TL_WR703N_GPIO_USB_POWER, 1); + ath79_register_usb(); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(0); + + ath79_register_wmac(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR703N, "TL-WR703N", "TP-LINK TL-WR703N v1", + tl_wr703n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c new file mode 100644 index 0000000000..b8ccdfd60e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd-v4.c @@ -0,0 +1,149 @@ +/* + * TP-LINK TL-WR741ND v4 board support + * + * Copyright (C) 2011-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_WR741NDV4_GPIO_BTN_RESET 11 +#define TL_WR741NDV4_GPIO_BTN_WPS 26 + +#define TL_WR741NDV4_GPIO_LED_WLAN 0 +#define TL_WR741NDV4_GPIO_LED_QSS 1 +#define TL_WR741NDV4_GPIO_LED_WAN 13 +#define TL_WR741NDV4_GPIO_LED_LAN1 14 +#define TL_WR741NDV4_GPIO_LED_LAN2 15 +#define TL_WR741NDV4_GPIO_LED_LAN3 16 +#define TL_WR741NDV4_GPIO_LED_LAN4 17 + +#define TL_WR741NDV4_GPIO_LED_SYSTEM 27 + +#define TL_WR741NDV4_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741NDV4_KEYS_POLL_INTERVAL) + +static const char *tl_wr741ndv4_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr741ndv4_flash_data = { + .part_probes = tl_wr741ndv4_part_probes, +}; + +static struct gpio_led tl_wr741ndv4_leds_gpio[] __initdata = { + { + .name = "tp-link:green:lan1", + .gpio = TL_WR741NDV4_GPIO_LED_LAN1, + .active_low = 0, + }, { + .name = "tp-link:green:lan2", + .gpio = TL_WR741NDV4_GPIO_LED_LAN2, + .active_low = 0, + }, { + .name = "tp-link:green:lan3", + .gpio = TL_WR741NDV4_GPIO_LED_LAN3, + .active_low = 0, + }, { + .name = "tp-link:green:lan4", + .gpio = TL_WR741NDV4_GPIO_LED_LAN4, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WR741NDV4_GPIO_LED_QSS, + .active_low = 0, + }, { + .name = "tp-link:green:system", + .gpio = TL_WR741NDV4_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:wan", + .gpio = TL_WR741NDV4_GPIO_LED_WAN, + .active_low = 0, + }, { + .name = "tp-link:green:wlan", + .gpio = TL_WR741NDV4_GPIO_LED_WLAN, + .active_low = 0, + }, +}; + +static struct gpio_keys_button tl_wr741ndv4_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR741NDV4_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "WPS", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR741NDV4_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR741NDV4_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static void __init tl_wr741ndv4_gmac_setup(void) +{ + void __iomem *base; + u32 t; + + base = ioremap(AR933X_GMAC_BASE, AR933X_GMAC_SIZE); + + t = __raw_readl(base + AR933X_GMAC_REG_ETH_CFG); + t |= (AR933X_ETH_CFG_SW_PHY_SWAP | AR933X_ETH_CFG_SW_PHY_ADDR_SWAP); + __raw_writel(t, base + AR933X_GMAC_REG_ETH_CFG); + + iounmap(base); +} + +static void __init tl_wr741ndv4_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + tl_wr741ndv4_gmac_setup(); + + ath79_gpio_function_disable(AR933X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR933X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741ndv4_leds_gpio), + tl_wr741ndv4_leds_gpio); + + ath79_register_gpio_keys_polled(1, TL_WR741NDV4_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr741ndv4_gpio_keys), + tl_wr741ndv4_gpio_keys); + + ath79_register_m25p80(&tl_wr741ndv4_flash_data); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + + ath79_register_mdio(0, 0x0); + ath79_register_eth(1); + ath79_register_eth(0); + + ath79_register_wmac(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR741ND_V4, "TL-WR741ND-v4", + "TP-LINK TL-WR741ND v4", tl_wr741ndv4_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c new file mode 100644 index 0000000000..5931654bbd --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr741nd.c @@ -0,0 +1,130 @@ +/* + * TP-LINK TL-WR741ND board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define TL_WR741ND_GPIO_LED_QSS 0 +#define TL_WR741ND_GPIO_LED_SYSTEM 1 +#define TL_WR741ND_GPIO_LED_LAN1 13 +#define TL_WR741ND_GPIO_LED_LAN2 14 +#define TL_WR741ND_GPIO_LED_LAN3 15 +#define TL_WR741ND_GPIO_LED_LAN4 16 +#define TL_WR741ND_GPIO_LED_WAN 17 + +#define TL_WR741ND_GPIO_BTN_RESET 11 +#define TL_WR741ND_GPIO_BTN_QSS 12 + +#define TL_WR741ND_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR741ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR741ND_KEYS_POLL_INTERVAL) + +static const char *tl_wr741nd_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr741nd_flash_data = { + .part_probes = tl_wr741nd_part_probes, +}; + +static struct gpio_led tl_wr741nd_leds_gpio[] __initdata = { + { + .name = "tp-link:green:lan1", + .gpio = TL_WR741ND_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "tp-link:green:lan2", + .gpio = TL_WR741ND_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "tp-link:green:lan3", + .gpio = TL_WR741ND_GPIO_LED_LAN3, + .active_low = 1, + }, { + .name = "tp-link:green:lan4", + .gpio = TL_WR741ND_GPIO_LED_LAN4, + .active_low = 1, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WR741ND_GPIO_LED_QSS, + .active_low = 1, + }, { + .name = "tp-link:green:system", + .gpio = TL_WR741ND_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:green:wan", + .gpio = TL_WR741ND_GPIO_LED_WAN, + .active_low = 1, + }, +}; + +static struct gpio_keys_button tl_wr741nd_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR741ND_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR741ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR741ND_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static void __init tl_wr741nd_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_m25p80(&tl_wr741nd_flash_data); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr741nd_leds_gpio), + tl_wr741nd_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WR741ND_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr741nd_gpio_keys), + tl_wr741nd_gpio_keys); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, -1); + + ath79_register_mdio(0, 0x0); + + /* LAN ports */ + ath79_register_eth(1); + + /* WAN port */ + ath79_register_eth(0); + + ap9x_pci_setup_wmac_led_pin(0, 1); + ap91_pci_init(ee, mac); +} +MIPS_MACHINE(ATH79_MACH_TL_WR741ND, "TL-WR741ND", "TP-LINK TL-WR741ND", + tl_wr741nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c new file mode 100644 index 0000000000..11f853f057 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr841n.c @@ -0,0 +1,140 @@ +/* + * TP-LINK TL-WR841N/ND v1 board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#include "dev-dsa.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" +#include "pci.h" + +#define TL_WR841ND_V1_GPIO_LED_SYSTEM 2 +#define TL_WR841ND_V1_GPIO_LED_QSS_GREEN 4 +#define TL_WR841ND_V1_GPIO_LED_QSS_RED 5 + +#define TL_WR841ND_V1_GPIO_BTN_RESET 3 +#define TL_WR841ND_V1_GPIO_BTN_QSS 7 + +#define TL_WR841ND_V1_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL \ + (3 * TL_WR841ND_V1_KEYS_POLL_INTERVAL) + +static struct mtd_partition tl_wr841n_v1_partitions[] = { + { + .name = "redboot", + .offset = 0, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x020000, + .size = 0x140000, + }, { + .name = "rootfs", + .offset = 0x160000, + .size = 0x280000, + }, { + .name = "config", + .offset = 0x3e0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x020000, + .size = 0x3c0000, + } +}; + +static struct flash_platform_data tl_wr841n_v1_flash_data = { + .parts = tl_wr841n_v1_partitions, + .nr_parts = ARRAY_SIZE(tl_wr841n_v1_partitions), +}; + +static struct gpio_led tl_wr841n_v1_leds_gpio[] __initdata = { + { + .name = "tp-link:green:system", + .gpio = TL_WR841ND_V1_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:red:qss", + .gpio = TL_WR841ND_V1_GPIO_LED_QSS_RED, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WR841ND_V1_GPIO_LED_QSS_GREEN, + } +}; + +static struct gpio_keys_button tl_wr841n_v1_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR841ND_V1_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR841ND_V1_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR841ND_V1_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static struct dsa_chip_data tl_wr841n_v1_dsa_chip = { + .port_names[0] = "wan", + .port_names[1] = "lan1", + .port_names[2] = "lan2", + .port_names[3] = "lan3", + .port_names[4] = "lan4", + .port_names[5] = "cpu", +}; + +static struct dsa_platform_data tl_wr841n_v1_dsa_data = { + .nr_chips = 1, + .chip = &tl_wr841n_v1_dsa_chip, +}; + +static void __init tl_wr841n_v1_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, + &tl_wr841n_v1_dsa_data); + + ath79_register_m25p80(&tl_wr841n_v1_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr841n_v1_leds_gpio), + tl_wr841n_v1_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WR841ND_V1_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr841n_v1_gpio_keys), + tl_wr841n_v1_gpio_keys); + ath79_register_pci(); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR841N_V1, "TL-WR841N-v1.5", "TP-LINK TL-WR841N v1", + tl_wr841n_v1_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c new file mode 100644 index 0000000000..1ddeec730e --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr941nd.c @@ -0,0 +1,121 @@ +/* + * TP-LINK TL-WR941ND board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include + +#include "dev-dsa.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define TL_WR941ND_GPIO_LED_SYSTEM 2 +#define TL_WR941ND_GPIO_LED_QSS_RED 4 +#define TL_WR941ND_GPIO_LED_QSS_GREEN 5 +#define TL_WR941ND_GPIO_LED_WLAN 9 + +#define TL_WR941ND_GPIO_BTN_RESET 3 +#define TL_WR941ND_GPIO_BTN_QSS 7 + +#define TL_WR941ND_KEYS_POLL_INTERVAL 20 /* msecs */ +#define TL_WR941ND_KEYS_DEBOUNCE_INTERVAL (3 * TL_WR941ND_KEYS_POLL_INTERVAL) + +static const char *tl_wr941nd_part_probes[] = { + "tp-link", + NULL, +}; + +static struct flash_platform_data tl_wr941nd_flash_data = { + .part_probes = tl_wr941nd_part_probes, +}; + +static struct gpio_led tl_wr941nd_leds_gpio[] __initdata = { + { + .name = "tp-link:green:system", + .gpio = TL_WR941ND_GPIO_LED_SYSTEM, + .active_low = 1, + }, { + .name = "tp-link:red:qss", + .gpio = TL_WR941ND_GPIO_LED_QSS_RED, + }, { + .name = "tp-link:green:qss", + .gpio = TL_WR941ND_GPIO_LED_QSS_GREEN, + }, { + .name = "tp-link:green:wlan", + .gpio = TL_WR941ND_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button tl_wr941nd_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR941ND_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "qss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = TL_WR941ND_KEYS_DEBOUNCE_INTERVAL, + .gpio = TL_WR941ND_GPIO_BTN_QSS, + .active_low = 1, + } +}; + +static struct dsa_chip_data tl_wr941nd_dsa_chip = { + .port_names[0] = "wan", + .port_names[1] = "lan1", + .port_names[2] = "lan2", + .port_names[3] = "lan3", + .port_names[4] = "lan4", + .port_names[5] = "cpu", +}; + +static struct dsa_platform_data tl_wr941nd_dsa_data = { + .nr_chips = 1, + .chip = &tl_wr941nd_dsa_chip, +}; + +static void __init tl_wr941nd_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_dsa(&ath79_eth0_device.dev, &ath79_mdio0_device.dev, + &tl_wr941nd_dsa_data); + + ath79_register_m25p80(&tl_wr941nd_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wr941nd_leds_gpio), + tl_wr941nd_leds_gpio); + + ath79_register_gpio_keys_polled(-1, TL_WR941ND_KEYS_POLL_INTERVAL, + ARRAY_SIZE(tl_wr941nd_gpio_keys), + tl_wr941nd_gpio_keys); + ath79_register_wmac(eeprom, mac); +} + +MIPS_MACHINE(ATH79_MACH_TL_WR941ND, "TL-WR941ND", "TP-LINK TL-WR941ND", + tl_wr941nd_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c new file mode 100644 index 0000000000..e49ac23fd1 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-ubnt.c @@ -0,0 +1,205 @@ +/* + * Ubiquiti RouterStation support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * Copyright (C) 2008 Ubiquiti + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define UBNT_RS_GPIO_LED_RF 2 +#define UBNT_RS_GPIO_SW4 8 + +#define UBNT_LS_SR71_GPIO_LED_D25 0 +#define UBNT_LS_SR71_GPIO_LED_D26 1 +#define UBNT_LS_SR71_GPIO_LED_D24 2 +#define UBNT_LS_SR71_GPIO_LED_D23 4 +#define UBNT_LS_SR71_GPIO_LED_D22 5 +#define UBNT_LS_SR71_GPIO_LED_D27 6 +#define UBNT_LS_SR71_GPIO_LED_D28 7 + +#define UBNT_KEYS_POLL_INTERVAL 20 /* msecs */ +#define UBNT_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_KEYS_POLL_INTERVAL) + +static struct gpio_led ubnt_rs_leds_gpio[] __initdata = { + { + .name = "ubnt:green:rf", + .gpio = UBNT_RS_GPIO_LED_RF, + .active_low = 0, + } +}; + +static struct gpio_led ubnt_ls_sr71_leds_gpio[] __initdata = { + { + .name = "ubnt:green:d22", + .gpio = UBNT_LS_SR71_GPIO_LED_D22, + .active_low = 0, + }, { + .name = "ubnt:green:d23", + .gpio = UBNT_LS_SR71_GPIO_LED_D23, + .active_low = 0, + }, { + .name = "ubnt:green:d24", + .gpio = UBNT_LS_SR71_GPIO_LED_D24, + .active_low = 0, + }, { + .name = "ubnt:red:d25", + .gpio = UBNT_LS_SR71_GPIO_LED_D25, + .active_low = 0, + }, { + .name = "ubnt:red:d26", + .gpio = UBNT_LS_SR71_GPIO_LED_D26, + .active_low = 0, + }, { + .name = "ubnt:green:d27", + .gpio = UBNT_LS_SR71_GPIO_LED_D27, + .active_low = 0, + }, { + .name = "ubnt:green:d28", + .gpio = UBNT_LS_SR71_GPIO_LED_D28, + .active_low = 0, + } +}; + +static struct gpio_keys_button ubnt_gpio_keys[] __initdata = { + { + .desc = "sw4", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = UBNT_KEYS_DEBOUNCE_INTERVAL, + .gpio = UBNT_RS_GPIO_SW4, + .active_low = 1, + } +}; + +static const char *ubnt_part_probes[] = { + "RedBoot", + NULL, +}; + +static struct flash_platform_data ubnt_flash_data = { + .part_probes = ubnt_part_probes, +}; + +static void __init ubnt_generic_setup(void) +{ + ath79_register_m25p80(&ubnt_flash_data); + + ath79_register_gpio_keys_polled(-1, UBNT_KEYS_POLL_INTERVAL, + ARRAY_SIZE(ubnt_gpio_keys), + ubnt_gpio_keys); + ath79_register_pci(); +} + +#define UBNT_RS_WAN_PHYMASK BIT(20) +#define UBNT_RS_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19)) + +static void __init ubnt_rs_setup(void) +{ + ubnt_generic_setup(); + + ath79_register_mdio(0, ~(UBNT_RS_WAN_PHYMASK | UBNT_RS_LAN_PHYMASK)); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = UBNT_RS_WAN_PHYMASK; + + /* + * There is Secondary MAC address duplicate problem with some + * UBNT HW batches. Do not increase Secondary MAC address by 1 + * but do workaround with 'Locally Administrated' bit. + */ + ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.speed = SPEED_100; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), + ubnt_rs_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_UBNT_RS, "UBNT-RS", "Ubiquiti RouterStation", + ubnt_rs_setup); + +#define UBNT_RSPRO_WAN_PHYMASK BIT(4) +#define UBNT_RSPRO_LAN_PHYMASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) + +static void __init ubnt_rspro_setup(void) +{ + ubnt_generic_setup(); + + ath79_register_mdio(0, ~(UBNT_RSPRO_WAN_PHYMASK | + UBNT_RSPRO_LAN_PHYMASK)); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.phy_mask = UBNT_RSPRO_WAN_PHYMASK; + + /* + * There is Secondary MAC address duplicate problem with some + * UBNT HW batches. Do not increase Secondary MAC address by 1 + * but do workaround with 'Locally Administrated' bit. + */ + ath79_init_local_mac(ath79_eth1_data.mac_addr, ath79_mac_base); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = UBNT_RSPRO_LAN_PHYMASK; + ath79_eth1_data.speed = SPEED_1000; + ath79_eth1_data.duplex = DUPLEX_FULL; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_rs_leds_gpio), + ubnt_rs_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_UBNT_RSPRO, "UBNT-RSPRO", "Ubiquiti RouterStation Pro", + ubnt_rspro_setup); + +static void __init ubnt_lsx_setup(void) +{ + ubnt_generic_setup(); +} + +MIPS_MACHINE(ATH79_MACH_UBNT_LSX, "UBNT-LSX", "Ubiquiti LSX", ubnt_lsx_setup); + +#define UBNT_LSSR71_PHY_MASK BIT(1) + +static void __init ubnt_lssr71_setup(void) +{ + ubnt_generic_setup(); + + ath79_register_mdio(0, ~UBNT_LSSR71_PHY_MASK); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = UBNT_LSSR71_PHY_MASK; + + ath79_register_eth(0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_ls_sr71_leds_gpio), + ubnt_ls_sr71_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_UBNT_LSSR71, "UBNT-LS-SR71", "Ubiquiti LS-SR71", + ubnt_lssr71_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c new file mode 100644 index 0000000000..3e3924b877 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-whr-hp-g300n.c @@ -0,0 +1,198 @@ +/* + * Buffalo WHR-HP-G300N board support + * + * based on ... + * + * TP-LINK TL-WR741ND board support + * + * Copyright (C) 2009-2010 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define WHRHPG300N_GPIO_LED_SECURITY 0 +#define WHRHPG300N_GPIO_LED_DIAG 1 +#define WHRHPG300N_GPIO_LED_ROUTER 6 + +#define WHRHPG300N_GPIO_BTN_ROUTER_ON 7 +#define WHRHPG300N_GPIO_BTN_ROUTER_AUTO 8 +#define WHRHPG300N_GPIO_BTN_RESET 11 +#define WHRHPG300N_GPIO_BTN_AOSS 12 +#define WHRHPG300N_GPIO_LED_LAN1 13 +#define WHRHPG300N_GPIO_LED_LAN2 14 +#define WHRHPG300N_GPIO_LED_LAN3 15 +#define WHRHPG300N_GPIO_LED_LAN4 16 +#define WHRHPG300N_GPIO_LED_WAN 17 + +#define WHRHPG300N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WHRHPG300N_KEYS_DEBOUNCE_INTERVAL (3 * WHRHPG300N_KEYS_POLL_INTERVAL) + +#define WHRHPG300N_MAC_OFFSET 0x20c + +static struct mtd_partition whrhpg300n_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x03e000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x03e000, + .size = 0x002000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x040000, + .size = 0x0e0000, + }, { + .name = "rootfs", + .offset = 0x120000, + .size = 0x2c0000, + }, { + .name = "user_property", + .offset = 0x3e0000, + .size = 0x010000, + }, { + .name = "ART", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x040000, + .size = 0x3a0000, + } +}; + +static struct flash_platform_data whrhpg300n_flash_data = { + .parts = whrhpg300n_partitions, + .nr_parts = ARRAY_SIZE(whrhpg300n_partitions), +}; + +static struct gpio_led whrhpg300n_leds_gpio[] __initdata = { + { + .name = "buffalo:orange:security", + .gpio = WHRHPG300N_GPIO_LED_SECURITY, + .active_low = 1, + }, { + .name = "buffalo:red:diag", + .gpio = WHRHPG300N_GPIO_LED_DIAG, + .active_low = 1, + }, { + .name = "buffalo:green:router", + .gpio = WHRHPG300N_GPIO_LED_ROUTER, + .active_low = 1, + }, { + .name = "buffalo:green:wan", + .gpio = WHRHPG300N_GPIO_LED_WAN, + .active_low = 1, + }, { + .name = "buffalo:green:lan1", + .gpio = WHRHPG300N_GPIO_LED_LAN1, + .active_low = 1, + }, { + .name = "buffalo:green:lan2", + .gpio = WHRHPG300N_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "buffalo:green:lan3", + .gpio = WHRHPG300N_GPIO_LED_LAN3, + .active_low = 1, + }, { + .name = "buffalo:green:lan4", + .gpio = WHRHPG300N_GPIO_LED_LAN4, + .active_low = 1, + } +}; + +static struct gpio_keys_button whrhpg300n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, + .gpio = WHRHPG300N_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "aoss/wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .gpio = WHRHPG300N_GPIO_BTN_AOSS, + .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, + .active_low = 1, + }, { + .desc = "router_on", + .type = EV_KEY, + .code = BTN_2, + .gpio = WHRHPG300N_GPIO_BTN_ROUTER_ON, + .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, + .active_low = 1, + }, { + .desc = "router_auto", + .type = EV_KEY, + .code = BTN_3, + .gpio = WHRHPG300N_GPIO_BTN_ROUTER_AUTO, + .debounce_interval = WHRHPG300N_KEYS_DEBOUNCE_INTERVAL, + .active_low = 1, + } +}; + +static void __init whrhpg300n_setup(void) +{ + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + u8 *mac = (u8 *) KSEG1ADDR(ee + WHRHPG300N_MAC_OFFSET); + + ath79_register_m25p80(&whrhpg300n_flash_data); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(whrhpg300n_leds_gpio), + whrhpg300n_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WHRHPG300N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(whrhpg300n_gpio_keys), + whrhpg300n_gpio_keys); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + + ath79_register_mdio(0, 0x0); + + /* LAN ports */ + ath79_register_eth(1); + /* WAN port */ + ath79_register_eth(0); + + ap9x_pci_setup_wmac_led_pin(0, 1); + + ap91_pci_init(ee, mac); +} + +MIPS_MACHINE(ATH79_MACH_WHR_HP_G300N, "WHR-HP-G300N", "Buffalo WHR-HP-G300N", + whrhpg300n_setup); + +MIPS_MACHINE(ATH79_MACH_WHR_G301N, "WHR-G301N", "Buffalo WHR-G301N", + whrhpg300n_setup); + +MIPS_MACHINE(ATH79_MACH_WHR_HP_GN, "WHR-HP-GN", "Buffalo WHR-HP-GN", + whrhpg300n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c new file mode 100644 index 0000000000..fccf1c6633 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wndr3700.c @@ -0,0 +1,172 @@ +/* + * Netgear WNDR3700 board support + * + * Copyright (C) 2009 Marco Porsch + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include + +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define WNDR3700_GPIO_LED_WPS_ORANGE 0 +#define WNDR3700_GPIO_LED_POWER_ORANGE 1 +#define WNDR3700_GPIO_LED_POWER_GREEN 2 +#define WNDR3700_GPIO_LED_WPS_GREEN 4 +#define WNDR3700_GPIO_LED_WAN_GREEN 6 + +#define WNDR3700_GPIO_BTN_WPS 3 +#define WNDR3700_GPIO_BTN_RESET 8 +#define WNDR3700_GPIO_BTN_WIFI 11 + +#define WNDR3700_GPIO_RTL8366_SDA 5 +#define WNDR3700_GPIO_RTL8366_SCK 7 + +#define WNDR3700_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WNDR3700_KEYS_DEBOUNCE_INTERVAL (3 * WNDR3700_KEYS_POLL_INTERVAL) + +#define WNDR3700_ETH0_MAC_OFFSET 0 +#define WNDR3700_ETH1_MAC_OFFSET 0x6 + +#define WNDR3700_WMAC0_MAC_OFFSET 0 +#define WNDR3700_WMAC1_MAC_OFFSET 0xc +#define WNDR3700_CALDATA0_OFFSET 0x1000 +#define WNDR3700_CALDATA1_OFFSET 0x5000 + +static struct gpio_led wndr3700_leds_gpio[] __initdata = { + { + .name = "wndr3700:green:power", + .gpio = WNDR3700_GPIO_LED_POWER_GREEN, + .active_low = 1, + }, { + .name = "wndr3700:orange:power", + .gpio = WNDR3700_GPIO_LED_POWER_ORANGE, + .active_low = 1, + }, { + .name = "wndr3700:green:wps", + .gpio = WNDR3700_GPIO_LED_WPS_GREEN, + .active_low = 1, + }, { + .name = "wndr3700:orange:wps", + .gpio = WNDR3700_GPIO_LED_WPS_ORANGE, + .active_low = 1, + }, { + .name = "wndr3700:green:wan", + .gpio = WNDR3700_GPIO_LED_WAN_GREEN, + .active_low = 1, + } +}; + +static struct gpio_keys_button wndr3700_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, + .gpio = WNDR3700_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, + .gpio = WNDR3700_GPIO_BTN_WPS, + .active_low = 1, + }, { + .desc = "wifi", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = WNDR3700_KEYS_DEBOUNCE_INTERVAL, + .gpio = WNDR3700_GPIO_BTN_WIFI, + .active_low = 1, + } +}; + +static struct rtl8366_platform_data wndr3700_rtl8366s_data = { + .gpio_sda = WNDR3700_GPIO_RTL8366_SDA, + .gpio_sck = WNDR3700_GPIO_RTL8366_SCK, +}; + +static struct platform_device wndr3700_rtl8366s_device = { + .name = RTL8366S_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &wndr3700_rtl8366s_data, + } +}; + +static void __init wndr3700_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + + /* + * The eth0 and wmac0 interfaces share the same MAC address which + * can lead to problems if operated unbridged. Set the locally + * administered bit on the eth0 MAC to make it unique. + */ + ath79_init_local_mac(ath79_eth0_data.mac_addr, + art + WNDR3700_ETH0_MAC_OFFSET); + ath79_eth0_pll_data.pll_1000 = 0x11110000; + ath79_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_init_mac(ath79_eth1_data.mac_addr, + art + WNDR3700_ETH1_MAC_OFFSET, 0); + ath79_eth1_pll_data.pll_1000 = 0x11110000; + ath79_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev; + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + + ath79_register_m25p80(NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wndr3700_leds_gpio), + wndr3700_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WNDR3700_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wndr3700_gpio_keys), + wndr3700_gpio_keys); + + platform_device_register(&wndr3700_rtl8366s_device); + platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0); + + ap9x_pci_setup_wmac_led_pin(0, 5); + ap9x_pci_setup_wmac_led_pin(1, 5); + + /* 2.4 GHz uses the first fixed antenna group (1, 0, 1, 0) */ + ap9x_pci_setup_wmac_gpio(0, (0xf << 6), (0xa << 6)); + + /* 5 GHz uses the second fixed antenna group (0, 1, 1, 0) */ + ap9x_pci_setup_wmac_gpio(1, (0xf << 6), (0x6 << 6)); + + ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET, + art + WNDR3700_WMAC0_MAC_OFFSET, + art + WNDR3700_CALDATA1_OFFSET, + art + WNDR3700_WMAC1_MAC_OFFSET); +} + +MIPS_MACHINE(ATH79_MACH_WNDR3700, "WNDR3700", + "NETGEAR WNDR3700/WNDR3800/WNDRMAC", + wndr3700_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c new file mode 100644 index 0000000000..bd86db386a --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wnr2000.c @@ -0,0 +1,145 @@ +/* + * NETGEAR WNR2000 board support + * + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * Copyright (C) 2008-2009 Andy Boyett + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define WNR2000_GPIO_LED_PWR_GREEN 14 +#define WNR2000_GPIO_LED_PWR_AMBER 7 +#define WNR2000_GPIO_LED_WPS 4 +#define WNR2000_GPIO_LED_WLAN 6 +#define WNR2000_GPIO_BTN_RESET 21 +#define WNR2000_GPIO_BTN_WPS 8 + +#define WNR2000_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WNR2000_KEYS_DEBOUNCE_INTERVAL (3 * WNR2000_KEYS_POLL_INTERVAL) + +static struct mtd_partition wnr2000_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + }, { + .name = "rootfs", + .offset = 0x050000, + .size = 0x240000, + }, { + .name = "user-config", + .offset = 0x290000, + .size = 0x010000, + }, { + .name = "uImage", + .offset = 0x2a0000, + .size = 0x120000, + }, { + .name = "language_table", + .offset = 0x3c0000, + .size = 0x020000, + }, { + .name = "rootfs_checksum", + .offset = 0x3e0000, + .size = 0x010000, + }, { + .name = "art", + .offset = 0x3f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + } +}; + +static struct flash_platform_data wnr2000_flash_data = { + .parts = wnr2000_partitions, + .nr_parts = ARRAY_SIZE(wnr2000_partitions), +}; + +static struct gpio_led wnr2000_leds_gpio[] __initdata = { + { + .name = "wnr2000:green:power", + .gpio = WNR2000_GPIO_LED_PWR_GREEN, + .active_low = 1, + }, { + .name = "wnr2000:amber:power", + .gpio = WNR2000_GPIO_LED_PWR_AMBER, + .active_low = 1, + }, { + .name = "wnr2000:green:wps", + .gpio = WNR2000_GPIO_LED_WPS, + .active_low = 1, + }, { + .name = "wnr2000:blue:wlan", + .gpio = WNR2000_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button wnr2000_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, + .gpio = WNR2000_GPIO_BTN_RESET, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WNR2000_KEYS_DEBOUNCE_INTERVAL, + .gpio = WNR2000_GPIO_BTN_WPS, + } +}; + +static void __init wnr2000_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, eeprom, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.has_ar8216 = 1; + + ath79_init_mac(ath79_eth1_data.mac_addr, eeprom, 1); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&wnr2000_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wnr2000_leds_gpio), + wnr2000_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WNR2000_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wnr2000_gpio_keys), + wnr2000_gpio_keys); + + ath79_register_wmac(eeprom, NULL); +} + +MIPS_MACHINE(ATH79_MACH_WNR2000, "WNR2000", "NETGEAR WNR2000", wnr2000_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c new file mode 100644 index 0000000000..148cd7c7f2 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wp543.c @@ -0,0 +1,107 @@ +/* + * Compex WP543/WPJ543 board support + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define WP543_GPIO_SW6 2 +#define WP543_GPIO_LED_1 3 +#define WP543_GPIO_LED_2 4 +#define WP543_GPIO_LED_WLAN 5 +#define WP543_GPIO_LED_CONN 6 +#define WP543_GPIO_LED_DIAG 7 +#define WP543_GPIO_SW4 8 + +#define WP543_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WP543_KEYS_DEBOUNCE_INTERVAL (3 * WP543_KEYS_POLL_INTERVAL) + +static struct gpio_led wp543_leds_gpio[] __initdata = { + { + .name = "wp543:green:led1", + .gpio = WP543_GPIO_LED_1, + .active_low = 1, + }, { + .name = "wp543:green:led2", + .gpio = WP543_GPIO_LED_2, + .active_low = 1, + }, { + .name = "wp543:green:wlan", + .gpio = WP543_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "wp543:green:conn", + .gpio = WP543_GPIO_LED_CONN, + .active_low = 1, + }, { + .name = "wp543:green:diag", + .gpio = WP543_GPIO_LED_DIAG, + .active_low = 1, + } +}; + +static struct gpio_keys_button wp543_gpio_keys[] __initdata = { + { + .desc = "sw6", + .type = EV_KEY, + .code = BTN_0, + .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, + .gpio = WP543_GPIO_SW6, + }, { + .desc = "sw4", + .type = EV_KEY, + .code = BTN_1, + .debounce_interval = WP543_KEYS_DEBOUNCE_INTERVAL, + .gpio = WP543_GPIO_SW4, + } +}; + +static const char *wp543_part_probes[] = { + "MyLoader", + NULL, +}; + +static struct flash_platform_data wp543_flash_data = { + .part_probes = wp543_part_probes, +}; + +static void __init wp543_setup(void) +{ + ath79_register_m25p80(&wp543_flash_data); + + ath79_register_mdio(0, 0xfffffff0); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII; + ath79_eth0_data.phy_mask = 0x0f; + ath79_eth0_data.reset_bit = AR71XX_RESET_GE0_MAC | + AR71XX_RESET_GE0_PHY; + ath79_register_eth(0); + + ath79_register_usb(); + ath79_register_pci(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wp543_leds_gpio), + wp543_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WP543_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wp543_gpio_keys), + wp543_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_WP543, "WP543", "Compex WP543", wp543_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c new file mode 100644 index 0000000000..114d6233c3 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpe72.c @@ -0,0 +1,96 @@ +/* + * Compex WPE72 board support + * + * Copyright (C) 2012 Johnathan Boyce + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" +#include "pci.h" + +#define WPE72_GPIO_RESET 12 +#define WPE72_GPIO_LED_DIAG 13 +#define WPE72_GPIO_LED_1 14 +#define WPE72_GPIO_LED_2 15 +#define WPE72_GPIO_LED_3 16 +#define WPE72_GPIO_LED_4 17 + +#define WPE72_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WPE72_KEYS_DEBOUNCE_INTERVAL (3 * WPE72_KEYS_POLL_INTERVAL) + +static struct gpio_led wpe72_leds_gpio[] __initdata = { + { + .name = "wpe72:green:led1", + .gpio = WPE72_GPIO_LED_1, + .active_low = 1, + }, { + .name = "wpe72:green:led2", + .gpio = WPE72_GPIO_LED_2, + .active_low = 1, + }, { + .name = "wpe72:green:led3", + .gpio = WPE72_GPIO_LED_3, + .active_low = 1, + }, { + .name = "wpe72:green:led4", + .gpio = WPE72_GPIO_LED_4, + .active_low = 1, + }, { + .name = "wpe72:green:diag", + .gpio = WPE72_GPIO_LED_DIAG, + .active_low = 1, + } +}; + +static struct gpio_keys_button wpe72_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WPE72_KEYS_DEBOUNCE_INTERVAL, + .gpio = WPE72_GPIO_RESET, + } +}; + +static const char *wpe72_part_probes[] = { + "MyLoader", + NULL, +}; + +static struct flash_platform_data wpe72_flash_data = { + .part_probes = wpe72_part_probes, +}; + +static void __init wpe72_setup(void) +{ + ath79_register_m25p80(&wpe72_flash_data); + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, ath79_mac_base, 1); + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + ath79_register_pci(); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wpe72_leds_gpio), + wpe72_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WPE72_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wpe72_gpio_keys), + wpe72_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_WPE72, "WPE72", "Compex WPE72", wpe72_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c new file mode 100644 index 0000000000..21aefe00a0 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt160nl.c @@ -0,0 +1,126 @@ +/* + * Linksys WRT160NL board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "nvram.h" +#include "machtypes.h" + +#define WRT160NL_GPIO_LED_POWER 14 +#define WRT160NL_GPIO_LED_WPS_AMBER 9 +#define WRT160NL_GPIO_LED_WPS_BLUE 8 +#define WRT160NL_GPIO_LED_WLAN 6 + +#define WRT160NL_GPIO_BTN_WPS 7 +#define WRT160NL_GPIO_BTN_RESET 21 + +#define WRT160NL_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WRT160NL_KEYS_DEBOUNCE_INTERVAL (3 * WRT160NL_KEYS_POLL_INTERVAL) + +#define WRT160NL_NVRAM_ADDR 0x1f7e0000 +#define WRT160NL_NVRAM_SIZE 0x10000 + +static const char *wrt160nl_part_probes[] = { + "wrt160nl", + NULL, +}; + +static struct flash_platform_data wrt160nl_flash_data = { + .part_probes = wrt160nl_part_probes, +}; + +static struct gpio_led wrt160nl_leds_gpio[] __initdata = { + { + .name = "wrt160nl:blue:power", + .gpio = WRT160NL_GPIO_LED_POWER, + .active_low = 1, + .default_trigger = "default-on", + }, { + .name = "wrt160nl:amber:wps", + .gpio = WRT160NL_GPIO_LED_WPS_AMBER, + .active_low = 1, + }, { + .name = "wrt160nl:blue:wps", + .gpio = WRT160NL_GPIO_LED_WPS_BLUE, + .active_low = 1, + }, { + .name = "wrt160nl:blue:wlan", + .gpio = WRT160NL_GPIO_LED_WLAN, + .active_low = 1, + } +}; + +static struct gpio_keys_button wrt160nl_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, + .gpio = WRT160NL_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wps", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WRT160NL_KEYS_DEBOUNCE_INTERVAL, + .gpio = WRT160NL_GPIO_BTN_WPS, + .active_low = 1, + } +}; + +static void __init wrt160nl_setup(void) +{ + const char *nvram = (char *) KSEG1ADDR(WRT160NL_NVRAM_ADDR); + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + u8 mac[6]; + + if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, + "lan_hwaddr=", mac) == 0) { + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + } + + ath79_register_mdio(0, 0x0); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.phy_mask = 0x01; + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&wrt160nl_flash_data); + + ath79_register_usb(); + + if (ath79_nvram_parse_mac_addr(nvram, WRT160NL_NVRAM_SIZE, + "wl0_hwaddr=", mac) == 0) + ath79_register_wmac(eeprom, mac); + else + ath79_register_wmac(eeprom, NULL); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt160nl_leds_gpio), + wrt160nl_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WRT160NL_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wrt160nl_gpio_keys), + wrt160nl_gpio_keys); +} + +MIPS_MACHINE(ATH79_MACH_WRT160NL, "WRT160NL", "Linksys WRT160NL", + wrt160nl_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c new file mode 100644 index 0000000000..6c4c1cb0d6 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wrt400n.c @@ -0,0 +1,161 @@ +/* + * Linksys WRT400N board support + * + * Copyright (C) 2009-2012 Gabor Juhos + * Copyright (C) 2009 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include + +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "machtypes.h" + +#define WRT400N_GPIO_LED_POWER 1 +#define WRT400N_GPIO_LED_WPS_BLUE 4 +#define WRT400N_GPIO_LED_WPS_AMBER 5 +#define WRT400N_GPIO_LED_WLAN 6 + +#define WRT400N_GPIO_BTN_RESET 8 +#define WRT400N_GPIO_BTN_WLSEC 3 + +#define WRT400N_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WRT400N_KEYS_DEBOUNE_INTERVAL (3 * WRT400N_KEYS_POLL_INTERVAL) + +#define WRT400N_MAC_ADDR_OFFSET 0x120c +#define WRT400N_CALDATA0_OFFSET 0x1000 +#define WRT400N_CALDATA1_OFFSET 0x5000 + +static struct mtd_partition wrt400n_partitions[] = { + { + .name = "uboot", + .offset = 0, + .size = 0x030000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "env", + .offset = 0x030000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "linux", + .offset = 0x040000, + .size = 0x140000, + }, { + .name = "rootfs", + .offset = 0x180000, + .size = 0x630000, + }, { + .name = "nvram", + .offset = 0x7b0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "factory", + .offset = 0x7c0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "language", + .offset = 0x7d0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "caldata", + .offset = 0x7f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x040000, + .size = 0x770000, + } +}; + +static struct flash_platform_data wrt400n_flash_data = { + .parts = wrt400n_partitions, + .nr_parts = ARRAY_SIZE(wrt400n_partitions), +}; + +static struct gpio_led wrt400n_leds_gpio[] __initdata = { + { + .name = "wrt400n:blue:wps", + .gpio = WRT400N_GPIO_LED_WPS_BLUE, + .active_low = 1, + }, { + .name = "wrt400n:amber:wps", + .gpio = WRT400N_GPIO_LED_WPS_AMBER, + .active_low = 1, + }, { + .name = "wrt400n:blue:wlan", + .gpio = WRT400N_GPIO_LED_WLAN, + .active_low = 1, + }, { + .name = "wrt400n:blue:power", + .gpio = WRT400N_GPIO_LED_POWER, + .active_low = 0, + .default_trigger = "default-on", + } +}; + +static struct gpio_keys_button wrt400n_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, + .gpio = WRT400N_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "wlsec", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WRT400N_KEYS_DEBOUNE_INTERVAL, + .gpio = WRT400N_GPIO_BTN_WLSEC, + .active_low = 1, + } +}; + +static void __init wrt400n_setup(void) +{ + u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); + u8 *mac = art + WRT400N_MAC_ADDR_OFFSET; + + ath79_register_mdio(0, 0x0); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth0_data.speed = SPEED_100; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 2); + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_m25p80(&wrt400n_flash_data); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wrt400n_leds_gpio), + wrt400n_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WRT400N_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wrt400n_gpio_keys), + wrt400n_gpio_keys); + + ap94_pci_init(art + WRT400N_CALDATA0_OFFSET, NULL, + art + WRT400N_CALDATA1_OFFSET, NULL); +} + +MIPS_MACHINE(ATH79_MACH_WRT400N, "WRT400N", "Linksys WRT400N", wrt400n_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c new file mode 100644 index 0000000000..1223e842d8 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-ag300h.c @@ -0,0 +1,158 @@ +/* + * Buffalo WZR-HP-AG300H board support + * + * Copyright (C) 2011 Felix Fietkau + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define WZRHPAG300H_MAC_OFFSET 0x20c +#define WZRHPAG300H_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPAG300H_KEYS_POLL_INTERVAL) + +static struct mtd_partition wzrhpag300h_flash_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x0040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x0040000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "art", + .offset = 0x0050000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x0060000, + .size = 0x0100000, + }, { + .name = "rootfs", + .offset = 0x0160000, + .size = 0x1e90000, + }, { + .name = "user_property", + .offset = 0x1ff0000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x0060000, + .size = 0x1f90000, + } +}; + +static struct flash_platform_data wzrhpag300h_flash_data = { + .parts = wzrhpag300h_flash_partitions, + .nr_parts = ARRAY_SIZE(wzrhpag300h_flash_partitions), +}; + +static struct gpio_led wzrhpag300h_leds_gpio[] __initdata = { + { + .name = "buffalo:red:diag", + .gpio = 1, + .active_low = 1, + }, +}; + +static struct gpio_keys_button wzrhpag300h_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 11, + .active_low = 1, + }, { + .desc = "usb", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 3, + .active_low = 1, + }, { + .desc = "aoss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 5, + .active_low = 1, + }, { + .desc = "router_auto", + .type = EV_KEY, + .code = BTN_6, + .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 6, + .active_low = 1, + }, { + .desc = "router_off", + .type = EV_KEY, + .code = BTN_5, + .debounce_interval = WZRHPAG300H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 7, + .active_low = 1, + } +}; + +static void __init wzrhpag300h_setup(void) +{ + u8 *eeprom1 = (u8 *) KSEG1ADDR(0x1f051000); + u8 *eeprom2 = (u8 *) KSEG1ADDR(0x1f055000); + u8 *mac1 = eeprom1 + WZRHPAG300H_MAC_OFFSET; + u8 *mac2 = eeprom2 + WZRHPAG300H_MAC_OFFSET; + + ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac2, 1); + + ath79_register_mdio(0, ~(BIT(0) | BIT(4))); + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = BIT(4); + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + gpio_request(2, "usb"); + gpio_direction_output(2, 1); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpag300h_leds_gpio), + wzrhpag300h_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WZRHPAG300H_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wzrhpag300h_gpio_keys), + wzrhpag300h_gpio_keys); + + ath79_register_m25p80_multi(&wzrhpag300h_flash_data); + + ap94_pci_init(eeprom1, mac1, eeprom2, mac2); +} + +MIPS_MACHINE(ATH79_MACH_WZR_HP_AG300H, "WZR-HP-AG300H", + "Buffalo WZR-HP-AG300H", wzrhpag300h_setup); + diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c new file mode 100644 index 0000000000..94f352aced --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh.c @@ -0,0 +1,287 @@ +/* + * Buffalo WZR-HP-G300NH board support + * + * Copyright (C) 2010-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" +#include "dev-wmac.h" +#include "machtypes.h" + +#define WZRHPG300NH_GPIO_LED_USB 0 +#define WZRHPG300NH_GPIO_LED_DIAG 1 +#define WZRHPG300NH_GPIO_LED_WIRELESS 6 +#define WZRHPG300NH_GPIO_LED_SECURITY 17 +#define WZRHPG300NH_GPIO_LED_ROUTER 18 + +#define WZRHPG300NH_GPIO_RTL8366_SDA 19 +#define WZRHPG300NH_GPIO_RTL8366_SCK 20 + +#define WZRHPG300NH_GPIO_74HC153_S0 9 +#define WZRHPG300NH_GPIO_74HC153_S1 11 +#define WZRHPG300NH_GPIO_74HC153_1Y 12 +#define WZRHPG300NH_GPIO_74HC153_2Y 14 + +#define WZRHPG300NH_GPIO_EXP_BASE 32 +#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0) +#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1) +#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2) +#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3) +#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5) +#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6) +#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7) + +#define WZRHPG300NH_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH_KEYS_POLL_INTERVAL) + +#define WZRHPG300NH_MAC_OFFSET 0x20c + +static struct mtd_partition wzrhpg300nh_flash_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x0040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x0040000, + .size = 0x0020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x0060000, + .size = 0x0100000, + }, { + .name = "rootfs", + .offset = 0x0160000, + .size = 0x1e60000, + }, { + .name = "user_property", + .offset = 0x1fc0000, + .size = 0x0020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "art", + .offset = 0x1fe0000, + .size = 0x0020000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x0060000, + .size = 0x1f60000, + } +}; + +static struct physmap_flash_data wzrhpg300nh_flash_data = { + .width = 2, + .parts = wzrhpg300nh_flash_partitions, + .nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions), +}; + +#define WZRHPG300NH_FLASH_BASE 0x1e000000 +#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024) + +static struct resource wzrhpg300nh_flash_resources[] = { + [0] = { + .start = WZRHPG300NH_FLASH_BASE, + .end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1, + .flags = IORESOURCE_MEM, + }, +}; + +static struct platform_device wzrhpg300nh_flash_device = { + .name = "physmap-flash", + .id = -1, + .resource = wzrhpg300nh_flash_resources, + .num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources), + .dev = { + .platform_data = &wzrhpg300nh_flash_data, + } +}; + +static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = { + { + .name = "buffalo:orange:security", + .gpio = WZRHPG300NH_GPIO_LED_SECURITY, + .active_low = 1, + }, { + .name = "buffalo:green:wireless", + .gpio = WZRHPG300NH_GPIO_LED_WIRELESS, + .active_low = 1, + }, { + .name = "buffalo:green:router", + .gpio = WZRHPG300NH_GPIO_LED_ROUTER, + .active_low = 1, + }, { + .name = "buffalo:red:diag", + .gpio = WZRHPG300NH_GPIO_LED_DIAG, + .active_low = 1, + }, { + .name = "buffalo:blue:usb", + .gpio = WZRHPG300NH_GPIO_LED_USB, + .active_low = 1, + } +}; + +static struct gpio_keys_button wzrhpg300nh_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_RESET, + .active_low = 1, + }, { + .desc = "aoss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_AOSS, + .active_low = 1, + }, { + .desc = "usb", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_USB, + .active_low = 1, + }, { + .desc = "qos_on", + .type = EV_KEY, + .code = BTN_3, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_QOS_ON, + .active_low = 0, + }, { + .desc = "qos_off", + .type = EV_KEY, + .code = BTN_4, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF, + .active_low = 0, + }, { + .desc = "router_on", + .type = EV_KEY, + .code = BTN_5, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON, + .active_low = 0, + }, { + .desc = "router_auto", + .type = EV_KEY, + .code = BTN_6, + .debounce_interval = WZRHPG300NH_KEYS_DEBOUNCE_INTERVAL, + .gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO, + .active_low = 0, + } +}; + +static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = { + .gpio_base = WZRHPG300NH_GPIO_EXP_BASE, + .gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0, + .gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1, + .gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y, + .gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y, +}; + +static struct platform_device wzrhpg300nh_74hc153_device = { + .name = NXP_74HC153_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &wzrhpg300nh_74hc153_data, + } +}; + +static struct rtl8366_platform_data wzrhpg300nh_rtl8366_data = { + .gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA, + .gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK, +}; + +static struct platform_device wzrhpg300nh_rtl8366s_device = { + .name = RTL8366S_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &wzrhpg300nh_rtl8366_data, + } +}; + +static struct platform_device wzrhpg300nh_rtl8366rb_device = { + .name = RTL8366RB_DRIVER_NAME, + .id = -1, + .dev = { + .platform_data = &wzrhpg300nh_rtl8366_data, + } +}; + +static void __init wzrhpg300nh_setup(void) +{ + u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000); + u8 *mac = eeprom + WZRHPG300NH_MAC_OFFSET; + bool hasrtl8366rb = false; + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + + if (rtl8366_smi_detect(&wzrhpg300nh_rtl8366_data) == RTL8366_TYPE_RB) + hasrtl8366rb = true; + + if (hasrtl8366rb) { + ath79_eth0_pll_data.pll_1000 = 0x1f000000; + ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; + ath79_eth1_pll_data.pll_1000 = 0x100; + ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366rb_device.dev; + } else { + ath79_eth0_pll_data.pll_1000 = 0x1e000100; + ath79_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; + ath79_eth1_pll_data.pll_1000 = 0x1e000100; + ath79_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev; + } + + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + + ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth1_data.phy_mask = 0x10; + + ath79_register_eth(0); + ath79_register_eth(1); + + ath79_register_usb(); + ath79_register_wmac(eeprom, NULL); + + platform_device_register(&wzrhpg300nh_74hc153_device); + platform_device_register(&wzrhpg300nh_flash_device); + + if (hasrtl8366rb) + platform_device_register(&wzrhpg300nh_rtl8366rb_device); + else + platform_device_register(&wzrhpg300nh_rtl8366s_device); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio), + wzrhpg300nh_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WZRHPG300NH_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wzrhpg300nh_gpio_keys), + wzrhpg300nh_gpio_keys); + +} + +MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH, "WZR-HP-G300NH", + "Buffalo WZR-HP-G300NH", wzrhpg300nh_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c new file mode 100644 index 0000000000..6ccafcb49d --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g300nh2.c @@ -0,0 +1,177 @@ +/* + * Buffalo WZR-HP-G300NH2 board support + * + * Copyright (C) 2011 Felix Fietkau + * Copyright (C) 2011 Mark Deneen + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#include "dev-ap9x-pci.h" +#include "dev-eth.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-m25p80.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define WZRHPG300NH2_MAC_OFFSET 0x20c +#define WZRHPG300NH2_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG300NH2_KEYS_POLL_INTERVAL) + +static struct mtd_partition wzrhpg300nh2_flash_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x0040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x0040000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "art", + .offset = 0x0050000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "kernel", + .offset = 0x0060000, + .size = 0x0100000, + }, { + .name = "rootfs", + .offset = 0x0160000, + .size = 0x1e90000, + }, { + .name = "user_property", + .offset = 0x1ff0000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x0060000, + .size = 0x1f90000, + } +}; + +static struct flash_platform_data wzrhpg300nh2_flash_data = { + .parts = wzrhpg300nh2_flash_partitions, + .nr_parts = ARRAY_SIZE(wzrhpg300nh2_flash_partitions), +}; + +static struct gpio_led wzrhpg300nh2_leds_gpio[] __initdata = { + { + .name = "buffalo:red:diag", + .gpio = 16, + .active_low = 1, + }, +}; + +static struct gpio_led wzrhpg300nh2_wmac_leds_gpio[] = { + { + .name = "buffalo:blue:usb", + .gpio = 4, + .active_low = 1, + }, + { + .name = "buffalo:orange:security", + .gpio = 6, + .active_low = 1, + }, + { + .name = "buffalo:green:router", + .gpio = 7, + .active_low = 1, + }, + { + .name = "buffalo:blue:movie_engine_on", + .gpio = 8, + .active_low = 1, + }, + { + .name = "buffalo:blue:movie_engine_off", + .gpio = 9, + .active_low = 1, + }, +}; + +/* The AOSS button is wmac gpio 12 */ +static struct gpio_keys_button wzrhpg300nh2_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, + .gpio = 1, + .active_low = 1, + }, { + .desc = "usb", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, + .gpio = 7, + .active_low = 1, + }, { + .desc = "qos", + .type = EV_KEY, + .code = BTN_3, + .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, + .gpio = 11, + .active_low = 0, + }, { + .desc = "router_on", + .type = EV_KEY, + .code = BTN_5, + .debounce_interval = WZRHPG300NH2_KEYS_DEBOUNCE_INTERVAL, + .gpio = 8, + .active_low = 0, + }, +}; + +static void __init wzrhpg300nh2_setup(void) +{ + + u8 *eeprom = (u8 *) KSEG1ADDR(0x1f051000); + u8 *mac0 = eeprom + WZRHPG300NH2_MAC_OFFSET; + /* There is an eth1 but it is not connected to the switch */ + + ath79_register_m25p80_multi(&wzrhpg300nh2_flash_data); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); + ath79_register_mdio(0, ~(BIT(0))); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + + ath79_register_eth(0); + ath79_register_usb(); + /* gpio13 is usb power. Turn it on. */ + gpio_request(13, "usb"); + gpio_direction_output(13, 1); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh2_leds_gpio), + wzrhpg300nh2_leds_gpio); + ath79_register_gpio_keys_polled(-1, WZRHPG300NH2_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wzrhpg300nh2_gpio_keys), + wzrhpg300nh2_gpio_keys); + ap9x_pci_setup_wmac_led_pin(0, 5); + ap9x_pci_setup_wmac_leds(0, wzrhpg300nh2_wmac_leds_gpio, + ARRAY_SIZE(wzrhpg300nh2_wmac_leds_gpio)); + + ap91_pci_init(eeprom, mac0); +} + +MIPS_MACHINE(ATH79_MACH_WZR_HP_G300NH2, "WZR-HP-G300NH2", + "Buffalo WZR-HP-G300NH2", wzrhpg300nh2_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c new file mode 100644 index 0000000000..f606145573 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-hp-g450h.c @@ -0,0 +1,170 @@ +/* + * Buffalo WZR-HP-G450G board support + * + * Copyright (C) 2011 Felix Fietkau + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include + +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "dev-usb.h" +#include "machtypes.h" + +#define WZRHPG450H_KEYS_POLL_INTERVAL 20 /* msecs */ +#define WZRHPG450H_KEYS_DEBOUNCE_INTERVAL (3 * WZRHPG450H_KEYS_POLL_INTERVAL) + +static struct mtd_partition wzrhpg450h_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x0040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x0040000, + .size = 0x0010000, + }, { + .name = "ART", + .offset = 0x0050000, + .size = 0x0010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "uImage", + .offset = 0x0060000, + .size = 0x0100000, + }, { + .name = "rootfs", + .offset = 0x0160000, + .size = 0x1e80000, + }, { + .name = "user_property", + .offset = 0x1fe0000, + .size = 0x0020000, + }, { + .name = "firmware", + .offset = 0x0060000, + .size = 0x1f80000, + } +}; + +static struct flash_platform_data wzrhpg450h_flash_data = { + .parts = wzrhpg450h_partitions, + .nr_parts = ARRAY_SIZE(wzrhpg450h_partitions), +}; + +static struct gpio_led wzrhpg450h_leds_gpio[] __initdata = { + { + .name = "buffalo:red:diag", + .gpio = 14, + .active_low = 1, + }, + { + .name = "buffalo:orange:security", + .gpio = 13, + .active_low = 1, + }, +}; + + +static struct gpio_led wzrhpg450h_wmac_leds_gpio[] = { + { + .name = "buffalo:blue:movie_engine", + .gpio = 13, + .active_low = 1, + }, + { + .name = "buffalo:green:router", + .gpio = 14, + .active_low = 1, + }, +}; + +static struct gpio_keys_button wzrhpg450h_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 6, + .active_low = 1, + }, { + .desc = "usb", + .type = EV_KEY, + .code = BTN_2, + .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 1, + .active_low = 1, + }, { + .desc = "aoss", + .type = EV_KEY, + .code = KEY_WPS_BUTTON, + .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 8, + .active_low = 1, + }, { + .desc = "movie_engine", + .type = EV_KEY, + .code = BTN_6, + .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 7, + .active_low = 0, + }, { + .desc = "router_off", + .type = EV_KEY, + .code = BTN_5, + .debounce_interval = WZRHPG450H_KEYS_DEBOUNCE_INTERVAL, + .gpio = 12, + .active_low = 0, + } +}; + + +static void __init wzrhpg450h_init(void) +{ + u8 *ee = (u8 *) KSEG1ADDR(0x1f051000); + u8 *mac = (u8 *) ee + 2; + + ath79_register_m25p80_multi(&wzrhpg450h_flash_data); + + ath79_register_mdio(0, ~BIT(0)); + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; + ath79_eth0_data.speed = SPEED_1000; + ath79_eth0_data.duplex = DUPLEX_FULL; + ath79_eth0_data.phy_mask = BIT(0); + + ath79_register_leds_gpio(-1, ARRAY_SIZE(wzrhpg450h_leds_gpio), + wzrhpg450h_leds_gpio); + + ath79_register_gpio_keys_polled(-1, WZRHPG450H_KEYS_POLL_INTERVAL, + ARRAY_SIZE(wzrhpg450h_gpio_keys), + wzrhpg450h_gpio_keys); + + ath79_register_eth(0); + + ath79_register_usb(); + gpio_request(16, "usb"); + gpio_direction_output(16, 1); + + ap91_pci_init(ee, NULL); + ap9x_pci_setup_wmac_led_pin(0, 15); + ap9x_pci_setup_wmac_leds(0, wzrhpg450h_wmac_leds_gpio, + ARRAY_SIZE(wzrhpg450h_wmac_leds_gpio)); +} + +MIPS_MACHINE(ATH79_MACH_WZR_HP_G450H, "WZR-HP-G450H", "Buffalo WZR-HP-G450H", + wzrhpg450h_init); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c new file mode 100644 index 0000000000..af6db6ad60 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-zcn-1523h.c @@ -0,0 +1,206 @@ +/* + * Zcomax ZCN-1523H-2-8/5-16 board support + * + * Copyright (C) 2010-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include + +#include "common.h" +#include "dev-eth.h" +#include "dev-m25p80.h" +#include "dev-ap9x-pci.h" +#include "dev-gpio-buttons.h" +#include "dev-leds-gpio.h" +#include "machtypes.h" + +#define ZCN_1523H_GPIO_BTN_RESET 0 +#define ZCN_1523H_GPIO_LED_INIT 11 +#define ZCN_1523H_GPIO_LED_LAN1 17 + +#define ZCN_1523H_2_GPIO_LED_WEAK 13 +#define ZCN_1523H_2_GPIO_LED_MEDIUM 14 +#define ZCN_1523H_2_GPIO_LED_STRONG 15 + +#define ZCN_1523H_5_GPIO_LED_UNKNOWN 1 +#define ZCN_1523H_5_GPIO_LED_LAN2 13 +#define ZCN_1523H_5_GPIO_LED_WEAK 14 +#define ZCN_1523H_5_GPIO_LED_MEDIUM 15 +#define ZCN_1523H_5_GPIO_LED_STRONG 16 + +#define ZCN_1523H_KEYS_POLL_INTERVAL 20 /* msecs */ +#define ZCN_1523H_KEYS_DEBOUNCE_INTERVAL (3 * ZCN_1523H_KEYS_POLL_INTERVAL) + +static struct mtd_partition zcn_1523h_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "rootfs", + .offset = 0x050000, + .size = 0x610000, + }, { + .name = "kernel", + .offset = 0x660000, + .size = 0x170000, + }, { + .name = "configure", + .offset = 0x7d0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "mfg", + .offset = 0x7e0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "eeprom", + .offset = 0x7f0000, + .size = 0x010000, + .mask_flags = MTD_WRITEABLE, + }, { + .name = "firmware", + .offset = 0x050000, + .size = 0x780000, + } +}; + +static struct flash_platform_data zcn_1523h_flash_data = { + .parts = zcn_1523h_partitions, + .nr_parts = ARRAY_SIZE(zcn_1523h_partitions), +}; + +static struct gpio_keys_button zcn_1523h_gpio_keys[] __initdata = { + { + .desc = "reset", + .type = EV_KEY, + .code = KEY_RESTART, + .debounce_interval = ZCN_1523H_KEYS_DEBOUNCE_INTERVAL, + .gpio = ZCN_1523H_GPIO_BTN_RESET, + .active_low = 1, + } +}; + +static struct gpio_led zcn_1523h_leds_gpio[] __initdata = { + { + .name = "zcn-1523h:amber:init", + .gpio = ZCN_1523H_GPIO_LED_INIT, + .active_low = 1, + }, { + .name = "zcn-1523h:green:lan1", + .gpio = ZCN_1523H_GPIO_LED_LAN1, + .active_low = 1, + } +}; + +static struct gpio_led zcn_1523h_2_leds_gpio[] __initdata = { + { + .name = "zcn-1523h:red:weak", + .gpio = ZCN_1523H_2_GPIO_LED_WEAK, + .active_low = 1, + }, { + .name = "zcn-1523h:amber:medium", + .gpio = ZCN_1523H_2_GPIO_LED_MEDIUM, + .active_low = 1, + }, { + .name = "zcn-1523h:green:strong", + .gpio = ZCN_1523H_2_GPIO_LED_STRONG, + .active_low = 1, + } +}; + +static struct gpio_led zcn_1523h_5_leds_gpio[] __initdata = { + { + .name = "zcn-1523h:red:weak", + .gpio = ZCN_1523H_5_GPIO_LED_WEAK, + .active_low = 1, + }, { + .name = "zcn-1523h:amber:medium", + .gpio = ZCN_1523H_5_GPIO_LED_MEDIUM, + .active_low = 1, + }, { + .name = "zcn-1523h:green:strong", + .gpio = ZCN_1523H_5_GPIO_LED_STRONG, + .active_low = 1, + }, { + .name = "zcn-1523h:green:lan2", + .gpio = ZCN_1523H_5_GPIO_LED_LAN2, + .active_low = 1, + }, { + .name = "zcn-1523h:amber:unknown", + .gpio = ZCN_1523H_5_GPIO_LED_UNKNOWN, + } +}; + +static void __init zcn_1523h_generic_setup(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1f7e0004); + u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000); + + ath79_gpio_function_disable(AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN | + AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN); + + ath79_register_m25p80(&zcn_1523h_flash_data); + + ath79_register_leds_gpio(0, ARRAY_SIZE(zcn_1523h_leds_gpio), + zcn_1523h_leds_gpio); + + ath79_register_gpio_keys_polled(-1, ZCN_1523H_KEYS_POLL_INTERVAL, + ARRAY_SIZE(zcn_1523h_gpio_keys), + zcn_1523h_gpio_keys); + + ap91_pci_init(ee, mac); + + ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0); + ath79_init_mac(ath79_eth1_data.mac_addr, mac, 1); + + ath79_register_mdio(0, 0x0); + + /* LAN1 port */ + ath79_register_eth(0); +} + +static void __init zcn_1523h_2_setup(void) +{ + zcn_1523h_generic_setup(); + ap9x_pci_setup_wmac_gpio(0, BIT(9), 0); + + ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_2_leds_gpio), + zcn_1523h_2_leds_gpio); +} + +MIPS_MACHINE(ATH79_MACH_ZCN_1523H_2, "ZCN-1523H-2", "Zcomax ZCN-1523H-2", + zcn_1523h_2_setup); + +static void __init zcn_1523h_5_setup(void) +{ + zcn_1523h_generic_setup(); + ap9x_pci_setup_wmac_gpio(0, BIT(8), 0); + + ath79_register_leds_gpio(1, ARRAY_SIZE(zcn_1523h_5_leds_gpio), + zcn_1523h_5_leds_gpio); + + /* LAN2 port */ + ath79_register_eth(1); +} + +MIPS_MACHINE(ATH79_MACH_ZCN_1523H_5, "ZCN-1523H-5", "Zcomax ZCN-1523H-5", + zcn_1523h_5_setup); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/nvram.c b/target/linux/ar71xx/files/arch/mips/ath79/nvram.c new file mode 100644 index 0000000000..43911b8ac1 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/nvram.c @@ -0,0 +1,75 @@ +/* + * Atheros AR71xx minimal nvram support + * + * Copyright (C) 2009 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include +#include +#include + +#include "nvram.h" + +char *ath79_nvram_find_var(const char *name, const char *buf, unsigned buf_len) +{ + unsigned len = strlen(name); + char *cur, *last; + + if (buf_len == 0 || len == 0) + return NULL; + + if (buf_len < len) + return NULL; + + if (len == 1) + return memchr(buf, (int) *name, buf_len); + + last = (char *) buf + buf_len - len; + for (cur = (char *) buf; cur <= last; cur++) + if (cur[0] == name[0] && memcmp(cur, name, len) == 0) + return cur + len; + + return NULL; +} + +int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, + const char *name, char *mac) +{ + char *buf; + char *mac_str; + int ret; + int t; + + buf = vmalloc(nvram_len); + if (!buf) + return -ENOMEM; + + memcpy(buf, nvram, nvram_len); + buf[nvram_len - 1] = '\0'; + + mac_str = ath79_nvram_find_var(name, buf, nvram_len); + if (!mac_str) { + ret = -EINVAL; + goto free; + } + + t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx", + &mac[0], &mac[1], &mac[2], &mac[3], &mac[4], &mac[5]); + + if (t != 6) { + ret = -EINVAL; + goto free; + } + + ret = 0; + +free: + vfree(buf); + return ret; +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/nvram.h b/target/linux/ar71xx/files/arch/mips/ath79/nvram.h new file mode 100644 index 0000000000..75151d4a3c --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/nvram.h @@ -0,0 +1,19 @@ +/* + * Atheros AR71xx minimal nvram support + * + * Copyright (C) 2009 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _ATH79_NVRAM_H +#define _ATH79_NVRAM_H + +char *ath79_nvram_find_var(const char *name, const char *buf, + unsigned buf_len); +int ath79_nvram_parse_mac_addr(const char *nvram, unsigned nvram_len, + const char *name, char *mac); + +#endif /* _ATH79_NVRAM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c new file mode 100644 index 0000000000..c395fb434f --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.c @@ -0,0 +1,124 @@ +/* + * Atheros AP94 reference board PCI initialization + * + * Copyright (C) 2009-2010 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include + +#include +#include +#include + +struct ath9k_fixup { + u16 *cal_data; + unsigned slot; +}; + +static int ath9k_num_fixups; +static struct ath9k_fixup ath9k_fixups[2]; + +static void ath9k_pci_fixup(struct pci_dev *dev) +{ + void __iomem *mem; + u16 *cal_data = NULL; + u16 cmd; + u32 bar0; + u32 val; + unsigned i; + + for (i = 0; i < ath9k_num_fixups; i++) { + if (ath9k_fixups[i].cal_data == NULL) + continue; + + if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn)) + continue; + + cal_data = ath9k_fixups[i].cal_data; + break; + } + + if (cal_data == NULL) + return; + + if (*cal_data != 0xa55a) { + pr_err("pci %s: invalid calibration data\n", pci_name(dev)); + return; + } + + pr_info("pci %s: fixup device configuration\n", pci_name(dev)); + + mem = ioremap(AR71XX_PCI_MEM_BASE, 0x10000); + if (!mem) { + pr_err("pci %s: ioremap error\n", pci_name(dev)); + return; + } + + pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0); + + switch (ath79_soc) { + case ATH79_SOC_AR7161: + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, + AR71XX_PCI_MEM_BASE); + break; + case ATH79_SOC_AR7240: + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0xffff); + break; + + case ATH79_SOC_AR7241: + case ATH79_SOC_AR7242: + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, 0x1000ffff); + break; + + default: + BUG(); + } + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; + pci_write_config_word(dev, PCI_COMMAND, cmd); + + /* set pointer to first reg address */ + cal_data += 3; + while (*cal_data != 0xffff) { + u32 reg; + reg = *cal_data++; + val = *cal_data++; + val |= (*cal_data++) << 16; + + __raw_writel(val, mem + reg); + udelay(100); + } + + pci_read_config_dword(dev, PCI_VENDOR_ID, &val); + dev->vendor = val & 0xffff; + dev->device = (val >> 16) & 0xffff; + + pci_read_config_dword(dev, PCI_CLASS_REVISION, &val); + dev->revision = val & 0xff; + dev->class = val >> 8; /* upper 3 bytes */ + + pci_read_config_word(dev, PCI_COMMAND, &cmd); + cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); + pci_write_config_word(dev, PCI_COMMAND, cmd); + + pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0); + + iounmap(mem); +} +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup); + +void __init pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) +{ + if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups)) + return; + + ath9k_fixups[ath9k_num_fixups].slot = slot; + ath9k_fixups[ath9k_num_fixups].cal_data = cal_data; + ath9k_num_fixups++; +} diff --git a/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h new file mode 100644 index 0000000000..5794941f08 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ath79/pci-ath9k-fixup.h @@ -0,0 +1,6 @@ +#ifndef _PCI_ATH9K_FIXUP +#define _PCI_ATH9K_FIXUP + +void pci_enable_ath9k_fixup(unsigned slot, u16 *cal_data) __init; + +#endif /* _PCI_ATH9K_FIXUP */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h new file mode 100644 index 0000000000..43e67557ae --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/ag71xx_platform.h @@ -0,0 +1,54 @@ +/* + * Atheros AR71xx SoC specific platform data definitions + * + * Copyright (C) 2008-2012 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef __ASM_MACH_ATH79_PLATFORM_H +#define __ASM_MACH_ATH79_PLATFORM_H + +#include +#include +#include +#include + +struct ag71xx_switch_platform_data { + u8 phy4_mii_en:1; +}; + +struct ag71xx_platform_data { + phy_interface_t phy_if_mode; + u32 phy_mask; + int speed; + int duplex; + u32 reset_bit; + u8 mac_addr[ETH_ALEN]; + struct device *mii_bus_dev; + + u8 has_gbit:1; + u8 is_ar91xx:1; + u8 is_ar7240:1; + u8 is_ar724x:1; + u8 has_ar8216:1; + + struct ag71xx_switch_platform_data *switch_data; + + void (*ddr_flush)(void); + void (*set_speed)(int speed); + + u32 fifo_cfg1; + u32 fifo_cfg2; + u32 fifo_cfg3; +}; + +struct ag71xx_mdio_platform_data { + u32 phy_mask; + int is_ar7240; +}; + +#endif /* __ASM_MACH_ATH79_PLATFORM_H */ diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h new file mode 100644 index 0000000000..3e6fc50c55 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/mach-rb750.h @@ -0,0 +1,68 @@ +/* + * MikroTik RouterBOARD 750 definitions + * + * Copyright (C) 2010-2012 Gabor Juhos + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ +#ifndef _MACH_RB750_H +#define _MACH_RB750_H + +#include + +#define RB750_GPIO_LVC573_LE 0 /* Latch enable on LVC573 */ +#define RB750_GPIO_NAND_IO0 1 /* NAND I/O 0 */ +#define RB750_GPIO_NAND_IO1 2 /* NAND I/O 1 */ +#define RB750_GPIO_NAND_IO2 3 /* NAND I/O 2 */ +#define RB750_GPIO_NAND_IO3 4 /* NAND I/O 3 */ +#define RB750_GPIO_NAND_IO4 5 /* NAND I/O 4 */ +#define RB750_GPIO_NAND_IO5 6 /* NAND I/O 5 */ +#define RB750_GPIO_NAND_IO6 7 /* NAND I/O 6 */ +#define RB750_GPIO_NAND_IO7 8 /* NAND I/O 7 */ +#define RB750_GPIO_NAND_NCE 11 /* NAND Chip Enable (active low) */ +#define RB750_GPIO_NAND_RDY 12 /* NAND Ready */ +#define RB750_GPIO_NAND_CLE 14 /* NAND Command Latch Enable */ +#define RB750_GPIO_NAND_ALE 15 /* NAND Address Latch Enable */ +#define RB750_GPIO_NAND_NRE 16 /* NAND Read Enable (active low) */ +#define RB750_GPIO_NAND_NWE 17 /* NAND Write Enable (active low) */ + +#define RB750_GPIO_BTN_RESET 1 +#define RB750_GPIO_SPI_CS0 2 +#define RB750_GPIO_LED_ACT 12 +#define RB750_GPIO_LED_PORT1 13 +#define RB750_GPIO_LED_PORT2 14 +#define RB750_GPIO_LED_PORT3 15 +#define RB750_GPIO_LED_PORT4 16 +#define RB750_GPIO_LED_PORT5 17 + +#define RB750_LED_ACT BIT(RB750_GPIO_LED_ACT) +#define RB750_LED_PORT1 BIT(RB750_GPIO_LED_PORT1) +#define RB750_LED_PORT2 BIT(RB750_GPIO_LED_PORT2) +#define RB750_LED_PORT3 BIT(RB750_GPIO_LED_PORT3) +#define RB750_LED_PORT4 BIT(RB750_GPIO_LED_PORT4) +#define RB750_LED_PORT5 BIT(RB750_GPIO_LED_PORT5) + +#define RB750_LVC573_LE BIT(RB750_GPIO_LVC573_LE) + +#define RB750_LED_BITS (RB750_LED_PORT1 | RB750_LED_PORT2 | RB750_LED_PORT3 | \ + RB750_LED_PORT4 | RB750_LED_PORT5 | RB750_LED_ACT) + +struct rb750_led_data { + char *name; + char *default_trigger; + u32 mask; + int active_low; +}; + +struct rb750_led_platform_data { + int num_leds; + struct rb750_led_data *leds; +}; + +int rb750_latch_change(u32 mask_clr, u32 mask_set); +void rb750_nand_pins_enable(void); +void rb750_nand_pins_disable(void); + +#endif /* _MACH_RB750_H */ \ No newline at end of file diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h new file mode 100644 index 0000000000..5b17e94b64 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ath79/rb4xx_cpld.h @@ -0,0 +1,48 @@ +/* + * SPI driver definitions for the CPLD chip on the Mikrotik RB4xx boards + * + * Copyright (C) 2010 Gabor Juhos + * + * This file was based on the patches for Linux 2.6.27.39 published by + * MikroTik for their RouterBoard 4xx series devices. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#define CPLD_GPIO_nLED1 0 +#define CPLD_GPIO_nLED2 1 +#define CPLD_GPIO_nLED3 2 +#define CPLD_GPIO_nLED4 3 +#define CPLD_GPIO_FAN 4 +#define CPLD_GPIO_ALE 5 +#define CPLD_GPIO_CLE 6 +#define CPLD_GPIO_nCE 7 +#define CPLD_GPIO_nLED5 8 + +#define CPLD_NUM_GPIOS 9 + +#define CPLD_CFG_nLED1 BIT(CPLD_GPIO_nLED1) +#define CPLD_CFG_nLED2 BIT(CPLD_GPIO_nLED2) +#define CPLD_CFG_nLED3 BIT(CPLD_GPIO_nLED3) +#define CPLD_CFG_nLED4 BIT(CPLD_GPIO_nLED4) +#define CPLD_CFG_FAN BIT(CPLD_GPIO_FAN) +#define CPLD_CFG_ALE BIT(CPLD_GPIO_ALE) +#define CPLD_CFG_CLE BIT(CPLD_GPIO_CLE) +#define CPLD_CFG_nCE BIT(CPLD_GPIO_nCE) +#define CPLD_CFG_nLED5 BIT(CPLD_GPIO_nLED5) + +struct rb4xx_cpld_platform_data { + unsigned gpio_base; +}; + +extern int rb4xx_cpld_change_cfg(unsigned mask, unsigned value); +extern int rb4xx_cpld_read(unsigned char *rx_buf, + const unsigned char *verify_buf, + unsigned cnt); +extern int rb4xx_cpld_read_from(unsigned addr, + unsigned char *rx_buf, + const unsigned char *verify_buf, + unsigned cnt); +extern int rb4xx_cpld_write(const unsigned char *buf, unsigned count); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig new file mode 100644 index 0000000000..42d544f731 --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Kconfig @@ -0,0 +1,33 @@ +config AG71XX + tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" + depends on ATH79 + select PHYLIB + help + If you wish to compile a kernel for AR7XXX/91XXX and enable + ethernet support, then you should always answer Y to this. + +if AG71XX + +config AG71XX_DEBUG + bool "Atheros AR71xx built-in ethernet driver debugging" + default n + help + Atheros AR71xx built-in ethernet driver debugging messages. + +config AG71XX_DEBUG_FS + bool "Atheros AR71xx built-in ethernet driver debugfs support" + depends on DEBUG_FS + default n + help + Say Y, if you need access to various statistics provided by + the ag71xx driver. + +config AG71XX_AR8216_SUPPORT + bool "special support for the Atheros AR8216 switch" + default n + default y if ATH79_MACH_WNR2000 || ATH79_MACH_MZK_W04NU + help + Say 'y' here if you want to enable special support for the + Atheros AR8216 switch found on some boards. + +endif diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile new file mode 100644 index 0000000000..b3ec4084c8 --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/Makefile @@ -0,0 +1,15 @@ +# +# Makefile for the Atheros AR71xx built-in ethernet macs +# + +ag71xx-y += ag71xx_main.o +ag71xx-y += ag71xx_ethtool.o +ag71xx-y += ag71xx_phy.o +ag71xx-y += ag71xx_mdio.o +ag71xx-y += ag71xx_ar7240.o + +ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o +ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o + +obj-$(CONFIG_AG71XX) += ag71xx.o + diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h new file mode 100644 index 0000000000..d1f692c388 --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -0,0 +1,466 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef __AG71XX_H +#define __AG71XX_H + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include +#include + +#define AG71XX_DRV_NAME "ag71xx" +#define AG71XX_DRV_VERSION "0.5.35" + +#define AG71XX_NAPI_WEIGHT 64 +#define AG71XX_OOM_REFILL (1 + HZ/10) + +#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE) +#define AG71XX_INT_TX (AG71XX_INT_TX_PS) +#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF) + +#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX) +#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL) + +#define AG71XX_TX_MTU_LEN 1540 +#define AG71XX_RX_PKT_RESERVE 64 +#define AG71XX_RX_PKT_SIZE \ + (AG71XX_RX_PKT_RESERVE + ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN) + +#define AG71XX_TX_RING_SIZE_DEFAULT 64 +#define AG71XX_RX_RING_SIZE_DEFAULT 128 + +#define AG71XX_TX_RING_SIZE_MAX 256 +#define AG71XX_RX_RING_SIZE_MAX 256 + +#ifdef CONFIG_AG71XX_DEBUG +#define DBG(fmt, args...) pr_debug(fmt, ## args) +#else +#define DBG(fmt, args...) do {} while (0) +#endif + +#define ag71xx_assert(_cond) \ +do { \ + if (_cond) \ + break; \ + printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \ + BUG(); \ +} while (0) + +struct ag71xx_desc { + u32 data; + u32 ctrl; +#define DESC_EMPTY BIT(31) +#define DESC_MORE BIT(24) +#define DESC_PKTLEN_M 0xfff + u32 next; + u32 pad; +} __attribute__((aligned(4))); + +struct ag71xx_buf { + struct sk_buff *skb; + struct ag71xx_desc *desc; + dma_addr_t dma_addr; + unsigned long timestamp; +}; + +struct ag71xx_ring { + struct ag71xx_buf *buf; + u8 *descs_cpu; + dma_addr_t descs_dma; + unsigned int desc_size; + unsigned int curr; + unsigned int dirty; + unsigned int size; +}; + +struct ag71xx_mdio { + struct mii_bus *mii_bus; + int mii_irq[PHY_MAX_ADDR]; + void __iomem *mdio_base; + struct ag71xx_mdio_platform_data *pdata; +}; + +struct ag71xx_int_stats { + unsigned long rx_pr; + unsigned long rx_be; + unsigned long rx_of; + unsigned long tx_ps; + unsigned long tx_be; + unsigned long tx_ur; + unsigned long total; +}; + +struct ag71xx_napi_stats { + unsigned long napi_calls; + unsigned long rx_count; + unsigned long rx_packets; + unsigned long rx_packets_max; + unsigned long tx_count; + unsigned long tx_packets; + unsigned long tx_packets_max; + + unsigned long rx[AG71XX_NAPI_WEIGHT + 1]; + unsigned long tx[AG71XX_NAPI_WEIGHT + 1]; +}; + +struct ag71xx_debug { + struct dentry *debugfs_dir; + + struct ag71xx_int_stats int_stats; + struct ag71xx_napi_stats napi_stats; +}; + +struct ag71xx { + void __iomem *mac_base; + + spinlock_t lock; + struct platform_device *pdev; + struct net_device *dev; + struct napi_struct napi; + u32 msg_enable; + + struct ag71xx_desc *stop_desc; + dma_addr_t stop_desc_dma; + + struct ag71xx_ring rx_ring; + struct ag71xx_ring tx_ring; + + struct mii_bus *mii_bus; + struct phy_device *phy_dev; + void *phy_priv; + + unsigned int link; + unsigned int speed; + int duplex; + + struct work_struct restart_work; + struct delayed_work link_work; + struct timer_list oom_timer; + +#ifdef CONFIG_AG71XX_DEBUG_FS + struct ag71xx_debug debug; +#endif +}; + +extern struct ethtool_ops ag71xx_ethtool_ops; +void ag71xx_link_adjust(struct ag71xx *ag); + +int ag71xx_mdio_driver_init(void) __init; +void ag71xx_mdio_driver_exit(void); + +int ag71xx_phy_connect(struct ag71xx *ag); +void ag71xx_phy_disconnect(struct ag71xx *ag); +void ag71xx_phy_start(struct ag71xx *ag); +void ag71xx_phy_stop(struct ag71xx *ag); + +static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag) +{ + return ag->pdev->dev.platform_data; +} + +static inline int ag71xx_desc_empty(struct ag71xx_desc *desc) +{ + return (desc->ctrl & DESC_EMPTY) != 0; +} + +static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc) +{ + return desc->ctrl & DESC_PKTLEN_M; +} + +/* Register offsets */ +#define AG71XX_REG_MAC_CFG1 0x0000 +#define AG71XX_REG_MAC_CFG2 0x0004 +#define AG71XX_REG_MAC_IPG 0x0008 +#define AG71XX_REG_MAC_HDX 0x000c +#define AG71XX_REG_MAC_MFL 0x0010 +#define AG71XX_REG_MII_CFG 0x0020 +#define AG71XX_REG_MII_CMD 0x0024 +#define AG71XX_REG_MII_ADDR 0x0028 +#define AG71XX_REG_MII_CTRL 0x002c +#define AG71XX_REG_MII_STATUS 0x0030 +#define AG71XX_REG_MII_IND 0x0034 +#define AG71XX_REG_MAC_IFCTL 0x0038 +#define AG71XX_REG_MAC_ADDR1 0x0040 +#define AG71XX_REG_MAC_ADDR2 0x0044 +#define AG71XX_REG_FIFO_CFG0 0x0048 +#define AG71XX_REG_FIFO_CFG1 0x004c +#define AG71XX_REG_FIFO_CFG2 0x0050 +#define AG71XX_REG_FIFO_CFG3 0x0054 +#define AG71XX_REG_FIFO_CFG4 0x0058 +#define AG71XX_REG_FIFO_CFG5 0x005c +#define AG71XX_REG_FIFO_RAM0 0x0060 +#define AG71XX_REG_FIFO_RAM1 0x0064 +#define AG71XX_REG_FIFO_RAM2 0x0068 +#define AG71XX_REG_FIFO_RAM3 0x006c +#define AG71XX_REG_FIFO_RAM4 0x0070 +#define AG71XX_REG_FIFO_RAM5 0x0074 +#define AG71XX_REG_FIFO_RAM6 0x0078 +#define AG71XX_REG_FIFO_RAM7 0x007c + +#define AG71XX_REG_TX_CTRL 0x0180 +#define AG71XX_REG_TX_DESC 0x0184 +#define AG71XX_REG_TX_STATUS 0x0188 +#define AG71XX_REG_RX_CTRL 0x018c +#define AG71XX_REG_RX_DESC 0x0190 +#define AG71XX_REG_RX_STATUS 0x0194 +#define AG71XX_REG_INT_ENABLE 0x0198 +#define AG71XX_REG_INT_STATUS 0x019c + +#define AG71XX_REG_FIFO_DEPTH 0x01a8 +#define AG71XX_REG_RX_SM 0x01b0 +#define AG71XX_REG_TX_SM 0x01b4 + +#define MAC_CFG1_TXE BIT(0) /* Tx Enable */ +#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */ +#define MAC_CFG1_RXE BIT(2) /* Rx Enable */ +#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */ +#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */ +#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */ +#define MAC_CFG1_LB BIT(8) /* Loopback mode */ +#define MAC_CFG1_SR BIT(31) /* Soft Reset */ + +#define MAC_CFG2_FDX BIT(0) +#define MAC_CFG2_CRC_EN BIT(1) +#define MAC_CFG2_PAD_CRC_EN BIT(2) +#define MAC_CFG2_LEN_CHECK BIT(4) +#define MAC_CFG2_HUGE_FRAME_EN BIT(5) +#define MAC_CFG2_IF_1000 BIT(9) +#define MAC_CFG2_IF_10_100 BIT(8) + +#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */ +#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */ +#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */ +#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */ +#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */ +#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \ + | FIFO_CFG0_TXS | FIFO_CFG0_TXF) + +#define FIFO_CFG0_ENABLE_SHIFT 8 + +#define FIFO_CFG4_DE BIT(0) /* Drop Event */ +#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */ +#define FIFO_CFG4_FC BIT(2) /* False Carrier */ +#define FIFO_CFG4_CE BIT(3) /* Code Error */ +#define FIFO_CFG4_CR BIT(4) /* CRC error */ +#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */ +#define FIFO_CFG4_LO BIT(6) /* Length out of range */ +#define FIFO_CFG4_OK BIT(7) /* Packet is OK */ +#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */ +#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */ +#define FIFO_CFG4_DR BIT(10) /* Dribble */ +#define FIFO_CFG4_LE BIT(11) /* Long Event */ +#define FIFO_CFG4_CF BIT(12) /* Control Frame */ +#define FIFO_CFG4_PF BIT(13) /* Pause Frame */ +#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */ +#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */ +#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */ +#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */ + +#define FIFO_CFG5_DE BIT(0) /* Drop Event */ +#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */ +#define FIFO_CFG5_FC BIT(2) /* False Carrier */ +#define FIFO_CFG5_CE BIT(3) /* Code Error */ +#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */ +#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */ +#define FIFO_CFG5_OK BIT(6) /* Packet is OK */ +#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */ +#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */ +#define FIFO_CFG5_DR BIT(9) /* Dribble */ +#define FIFO_CFG5_CF BIT(10) /* Control Frame */ +#define FIFO_CFG5_PF BIT(11) /* Pause Frame */ +#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */ +#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */ +#define FIFO_CFG5_LE BIT(14) /* Long Event */ +#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */ +#define FIFO_CFG5_16 BIT(16) /* unknown */ +#define FIFO_CFG5_17 BIT(17) /* unknown */ +#define FIFO_CFG5_SF BIT(18) /* Short Frame */ +#define FIFO_CFG5_BM BIT(19) /* Byte Mode */ + +#define AG71XX_INT_TX_PS BIT(0) +#define AG71XX_INT_TX_UR BIT(1) +#define AG71XX_INT_TX_BE BIT(3) +#define AG71XX_INT_RX_PR BIT(4) +#define AG71XX_INT_RX_OF BIT(6) +#define AG71XX_INT_RX_BE BIT(7) + +#define MAC_IFCTL_SPEED BIT(16) + +#define MII_CFG_CLK_DIV_4 0 +#define MII_CFG_CLK_DIV_6 2 +#define MII_CFG_CLK_DIV_8 3 +#define MII_CFG_CLK_DIV_10 4 +#define MII_CFG_CLK_DIV_14 5 +#define MII_CFG_CLK_DIV_20 6 +#define MII_CFG_CLK_DIV_28 7 +#define MII_CFG_RESET BIT(31) + +#define MII_CMD_WRITE 0x0 +#define MII_CMD_READ 0x1 +#define MII_ADDR_SHIFT 8 +#define MII_IND_BUSY BIT(0) +#define MII_IND_INVALID BIT(2) + +#define TX_CTRL_TXE BIT(0) /* Tx Enable */ + +#define TX_STATUS_PS BIT(0) /* Packet Sent */ +#define TX_STATUS_UR BIT(1) /* Tx Underrun */ +#define TX_STATUS_BE BIT(3) /* Bus Error */ + +#define RX_CTRL_RXE BIT(0) /* Rx Enable */ + +#define RX_STATUS_PR BIT(0) /* Packet Received */ +#define RX_STATUS_OF BIT(2) /* Rx Overflow */ +#define RX_STATUS_BE BIT(3) /* Bus Error */ + +static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg) +{ + switch (reg) { + case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL: + case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM: + case AG71XX_REG_MII_CFG: + break; + + default: + BUG(); + } +} + +static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value) +{ + ag71xx_check_reg_offset(ag, reg); + + __raw_writel(value, ag->mac_base + reg); + /* flush write */ + (void) __raw_readl(ag->mac_base + reg); +} + +static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg) +{ + ag71xx_check_reg_offset(ag, reg); + + return __raw_readl(ag->mac_base + reg); +} + +static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask) +{ + void __iomem *r; + + ag71xx_check_reg_offset(ag, reg); + + r = ag->mac_base + reg; + __raw_writel(__raw_readl(r) | mask, r); + /* flush write */ + (void)__raw_readl(r); +} + +static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask) +{ + void __iomem *r; + + ag71xx_check_reg_offset(ag, reg); + + r = ag->mac_base + reg; + __raw_writel(__raw_readl(r) & ~mask, r); + /* flush write */ + (void) __raw_readl(r); +} + +static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints) +{ + ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints); +} + +static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints) +{ + ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints); +} + +#ifdef CONFIG_AG71XX_AR8216_SUPPORT +void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); +int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, + int pktlen); +static inline int ag71xx_has_ar8216(struct ag71xx *ag) +{ + return ag71xx_get_pdata(ag)->has_ar8216; +} +#else +static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, + struct sk_buff *skb) +{ +} + +static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, + struct sk_buff *skb, + int pktlen) +{ + return 0; +} +static inline int ag71xx_has_ar8216(struct ag71xx *ag) +{ + return 0; +} +#endif + +#ifdef CONFIG_AG71XX_DEBUG_FS +int ag71xx_debugfs_root_init(void); +void ag71xx_debugfs_root_exit(void); +int ag71xx_debugfs_init(struct ag71xx *ag); +void ag71xx_debugfs_exit(struct ag71xx *ag); +void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status); +void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx); +#else +static inline int ag71xx_debugfs_root_init(void) { return 0; } +static inline void ag71xx_debugfs_root_exit(void) {} +static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; } +static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {} +static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, + u32 status) {} +static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, + int rx, int tx) {} +#endif /* CONFIG_AG71XX_DEBUG_FS */ + +void ag71xx_ar7240_start(struct ag71xx *ag); +void ag71xx_ar7240_stop(struct ag71xx *ag); +int ag71xx_ar7240_init(struct ag71xx *ag); +void ag71xx_ar7240_cleanup(struct ag71xx *ag); + +int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg); +void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val); + +u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, + unsigned reg_addr); +int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, + unsigned reg_addr, u16 reg_val); + +#endif /* _AG71XX_H */ diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c new file mode 100644 index 0000000000..ab7abd9e5c --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c @@ -0,0 +1,1194 @@ +/* + * Driver for the built-in ethernet switch of the Atheros AR7240 SoC + * Copyright (c) 2010 Gabor Juhos + * Copyright (c) 2010 Felix Fietkau + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include "ag71xx.h" + +#define BITM(_count) (BIT(_count) - 1) +#define BITS(_shift, _count) (BITM(_count) << _shift) + +#define AR7240_REG_MASK_CTRL 0x00 +#define AR7240_MASK_CTRL_REVISION_M BITM(8) +#define AR7240_MASK_CTRL_VERSION_M BITM(8) +#define AR7240_MASK_CTRL_VERSION_S 8 +#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 +#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 +#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) + +#define AR7240_REG_MAC_ADDR0 0x20 +#define AR7240_REG_MAC_ADDR1 0x24 + +#define AR7240_REG_FLOOD_MASK 0x2c +#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) + +#define AR7240_REG_GLOBAL_CTRL 0x30 +#define AR7240_GLOBAL_CTRL_MTU_M BITM(12) + +#define AR7240_REG_VTU 0x0040 +#define AR7240_VTU_OP BITM(3) +#define AR7240_VTU_OP_NOOP 0x0 +#define AR7240_VTU_OP_FLUSH 0x1 +#define AR7240_VTU_OP_LOAD 0x2 +#define AR7240_VTU_OP_PURGE 0x3 +#define AR7240_VTU_OP_REMOVE_PORT 0x4 +#define AR7240_VTU_ACTIVE BIT(3) +#define AR7240_VTU_FULL BIT(4) +#define AR7240_VTU_PORT BITS(8, 4) +#define AR7240_VTU_PORT_S 8 +#define AR7240_VTU_VID BITS(16, 12) +#define AR7240_VTU_VID_S 16 +#define AR7240_VTU_PRIO BITS(28, 3) +#define AR7240_VTU_PRIO_S 28 +#define AR7240_VTU_PRIO_EN BIT(31) + +#define AR7240_REG_VTU_DATA 0x0044 +#define AR7240_VTUDATA_MEMBER BITS(0, 10) +#define AR7240_VTUDATA_VALID BIT(11) + +#define AR7240_REG_ATU 0x50 +#define AR7240_ATU_FLUSH_ALL 0x1 + +#define AR7240_REG_AT_CTRL 0x5c +#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) +#define AR7240_AT_CTRL_AGE_EN BIT(17) +#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) +#define AR7240_AT_CTRL_RESERVED BIT(19) +#define AR7240_AT_CTRL_ARP_EN BIT(20) + +#define AR7240_REG_TAG_PRIORITY 0x70 + +#define AR7240_REG_SERVICE_TAG 0x74 +#define AR7240_SERVICE_TAG_M BITM(16) + +#define AR7240_REG_CPU_PORT 0x78 +#define AR7240_MIRROR_PORT_S 4 +#define AR7240_CPU_PORT_EN BIT(8) + +#define AR7240_REG_MIB_FUNCTION0 0x80 +#define AR7240_MIB_TIMER_M BITM(16) +#define AR7240_MIB_AT_HALF_EN BIT(16) +#define AR7240_MIB_BUSY BIT(17) +#define AR7240_MIB_FUNC_S 24 +#define AR7240_MIB_FUNC_NO_OP 0x0 +#define AR7240_MIB_FUNC_FLUSH 0x1 +#define AR7240_MIB_FUNC_CAPTURE 0x3 + +#define AR7240_REG_MDIO_CTRL 0x98 +#define AR7240_MDIO_CTRL_DATA_M BITM(16) +#define AR7240_MDIO_CTRL_REG_ADDR_S 16 +#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 +#define AR7240_MDIO_CTRL_CMD_WRITE 0 +#define AR7240_MDIO_CTRL_CMD_READ BIT(27) +#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) +#define AR7240_MDIO_CTRL_BUSY BIT(31) + +#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) + +#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) +#define AR7240_PORT_STATUS_SPEED_S 0 +#define AR7240_PORT_STATUS_SPEED_M BITM(2) +#define AR7240_PORT_STATUS_SPEED_10 0 +#define AR7240_PORT_STATUS_SPEED_100 1 +#define AR7240_PORT_STATUS_SPEED_1000 2 +#define AR7240_PORT_STATUS_TXMAC BIT(2) +#define AR7240_PORT_STATUS_RXMAC BIT(3) +#define AR7240_PORT_STATUS_TXFLOW BIT(4) +#define AR7240_PORT_STATUS_RXFLOW BIT(5) +#define AR7240_PORT_STATUS_DUPLEX BIT(6) +#define AR7240_PORT_STATUS_LINK_UP BIT(8) +#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) +#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) + +#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) +#define AR7240_PORT_CTRL_STATE_M BITM(3) +#define AR7240_PORT_CTRL_STATE_DISABLED 0 +#define AR7240_PORT_CTRL_STATE_BLOCK 1 +#define AR7240_PORT_CTRL_STATE_LISTEN 2 +#define AR7240_PORT_CTRL_STATE_LEARN 3 +#define AR7240_PORT_CTRL_STATE_FORWARD 4 +#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) +#define AR7240_PORT_CTRL_VLAN_MODE_S 8 +#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 +#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 +#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 +#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 +#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) +#define AR7240_PORT_CTRL_HEADER BIT(11) +#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) +#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) +#define AR7240_PORT_CTRL_LEARN BIT(14) +#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) +#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) +#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) + +#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) + +#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 +#define AR7240_PORT_VLAN_DEST_PORTS_S 16 +#define AR7240_PORT_VLAN_MODE_S 30 +#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 +#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 +#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 +#define AR7240_PORT_VLAN_MODE_SECURE 3 + + +#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) + +#define AR7240_STATS_RXBROAD 0x00 +#define AR7240_STATS_RXPAUSE 0x04 +#define AR7240_STATS_RXMULTI 0x08 +#define AR7240_STATS_RXFCSERR 0x0c +#define AR7240_STATS_RXALIGNERR 0x10 +#define AR7240_STATS_RXRUNT 0x14 +#define AR7240_STATS_RXFRAGMENT 0x18 +#define AR7240_STATS_RX64BYTE 0x1c +#define AR7240_STATS_RX128BYTE 0x20 +#define AR7240_STATS_RX256BYTE 0x24 +#define AR7240_STATS_RX512BYTE 0x28 +#define AR7240_STATS_RX1024BYTE 0x2c +#define AR7240_STATS_RX1518BYTE 0x30 +#define AR7240_STATS_RXMAXBYTE 0x34 +#define AR7240_STATS_RXTOOLONG 0x38 +#define AR7240_STATS_RXGOODBYTE 0x3c +#define AR7240_STATS_RXBADBYTE 0x44 +#define AR7240_STATS_RXOVERFLOW 0x4c +#define AR7240_STATS_FILTERED 0x50 +#define AR7240_STATS_TXBROAD 0x54 +#define AR7240_STATS_TXPAUSE 0x58 +#define AR7240_STATS_TXMULTI 0x5c +#define AR7240_STATS_TXUNDERRUN 0x60 +#define AR7240_STATS_TX64BYTE 0x64 +#define AR7240_STATS_TX128BYTE 0x68 +#define AR7240_STATS_TX256BYTE 0x6c +#define AR7240_STATS_TX512BYTE 0x70 +#define AR7240_STATS_TX1024BYTE 0x74 +#define AR7240_STATS_TX1518BYTE 0x78 +#define AR7240_STATS_TXMAXBYTE 0x7c +#define AR7240_STATS_TXOVERSIZE 0x80 +#define AR7240_STATS_TXBYTE 0x84 +#define AR7240_STATS_TXCOLLISION 0x8c +#define AR7240_STATS_TXABORTCOL 0x90 +#define AR7240_STATS_TXMULTICOL 0x94 +#define AR7240_STATS_TXSINGLECOL 0x98 +#define AR7240_STATS_TXEXCDEFER 0x9c +#define AR7240_STATS_TXDEFER 0xa0 +#define AR7240_STATS_TXLATECOL 0xa4 + +#define AR7240_PORT_CPU 0 +#define AR7240_NUM_PORTS 6 +#define AR7240_NUM_PHYS 5 + +#define AR7240_PHY_ID1 0x004d +#define AR7240_PHY_ID2 0xd041 + +#define AR934X_PHY_ID1 0x004d +#define AR934X_PHY_ID2 0xd042 + +#define AR7240_MAX_VLANS 16 + +#define AR934X_REG_OPER_MODE0 0x04 +#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) +#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) + +#define AR934X_REG_OPER_MODE1 0x08 +#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) + +#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) + +#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) +#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 +#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) +#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) +#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) +#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) +#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 +#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) +#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 + +#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) +#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 +#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 +#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 +#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 +#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 +#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 + +#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) + +struct ar7240sw_port_stat { + unsigned long rx_broadcast; + unsigned long rx_pause; + unsigned long rx_multicast; + unsigned long rx_fcs_error; + unsigned long rx_align_error; + unsigned long rx_runt; + unsigned long rx_fragments; + unsigned long rx_64byte; + unsigned long rx_128byte; + unsigned long rx_256byte; + unsigned long rx_512byte; + unsigned long rx_1024byte; + unsigned long rx_1518byte; + unsigned long rx_maxbyte; + unsigned long rx_toolong; + unsigned long rx_good_byte; + unsigned long rx_bad_byte; + unsigned long rx_overflow; + unsigned long filtered; + + unsigned long tx_broadcast; + unsigned long tx_pause; + unsigned long tx_multicast; + unsigned long tx_underrun; + unsigned long tx_64byte; + unsigned long tx_128byte; + unsigned long tx_256byte; + unsigned long tx_512byte; + unsigned long tx_1024byte; + unsigned long tx_1518byte; + unsigned long tx_maxbyte; + unsigned long tx_oversize; + unsigned long tx_byte; + unsigned long tx_collision; + unsigned long tx_abortcol; + unsigned long tx_multicol; + unsigned long tx_singlecol; + unsigned long tx_excdefer; + unsigned long tx_defer; + unsigned long tx_xlatecol; +}; + +struct ar7240sw { + struct mii_bus *mii_bus; + struct ag71xx_switch_platform_data *swdata; + struct switch_dev swdev; + int num_ports; + u8 ver; + bool vlan; + u16 vlan_id[AR7240_MAX_VLANS]; + u8 vlan_table[AR7240_MAX_VLANS]; + u8 vlan_tagged; + u16 pvid[AR7240_NUM_PORTS]; + char buf[80]; + + rwlock_t stats_lock; + struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; +}; + +struct ar7240sw_hw_stat { + char string[ETH_GSTRING_LEN]; + int sizeof_stat; + int reg; +}; + +static DEFINE_MUTEX(reg_mutex); + +static inline int sw_is_ar7240(struct ar7240sw *as) +{ + return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; +} + +static inline int sw_is_ar934x(struct ar7240sw *as) +{ + return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; +} + +static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) +{ + return BIT(port); +} + +static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) +{ + return BIT(as->swdev.ports) - 1; +} + +static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) +{ + return ar7240sw_port_mask_all(as) & ~BIT(port); +} + +static inline u16 mk_phy_addr(u32 reg) +{ + return 0x17 & ((reg >> 4) | 0x10); +} + +static inline u16 mk_phy_reg(u32 reg) +{ + return (reg << 1) & 0x1e; +} + +static inline u16 mk_high_addr(u32 reg) +{ + return (reg >> 7) & 0x1ff; +} + +static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) +{ + unsigned long flags; + u16 phy_addr; + u16 phy_reg; + u32 hi, lo; + + reg = (reg & 0xfffffffc) >> 2; + phy_addr = mk_phy_addr(reg); + phy_reg = mk_phy_reg(reg); + + local_irq_save(flags); + ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); + lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg); + hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1); + local_irq_restore(flags); + + return (hi << 16) | lo; +} + +static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) +{ + unsigned long flags; + u16 phy_addr; + u16 phy_reg; + + reg = (reg & 0xfffffffc) >> 2; + phy_addr = mk_phy_addr(reg); + phy_reg = mk_phy_reg(reg); + + local_irq_save(flags); + ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg)); + ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16)); + ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff)); + local_irq_restore(flags); +} + +static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) +{ + u32 ret; + + mutex_lock(®_mutex); + ret = __ar7240sw_reg_read(mii, reg_addr); + mutex_unlock(®_mutex); + + return ret; +} + +static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) +{ + mutex_lock(®_mutex); + __ar7240sw_reg_write(mii, reg_addr, reg_val); + mutex_unlock(®_mutex); +} + +static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) +{ + u32 t; + + mutex_lock(®_mutex); + t = __ar7240sw_reg_read(mii, reg); + t &= ~mask; + t |= val; + __ar7240sw_reg_write(mii, reg, t); + mutex_unlock(®_mutex); + + return t; +} + +static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) +{ + u32 t; + + mutex_lock(®_mutex); + t = __ar7240sw_reg_read(mii, reg); + t |= val; + __ar7240sw_reg_write(mii, reg, t); + mutex_unlock(®_mutex); +} + +static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, + unsigned timeout) +{ + int i; + + for (i = 0; i < timeout; i++) { + u32 t; + + t = __ar7240sw_reg_read(mii, reg); + if ((t & mask) == val) + return 0; + + msleep(1); + } + + return -ETIMEDOUT; +} + +static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, + unsigned timeout) +{ + int ret; + + mutex_lock(®_mutex); + ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); + mutex_unlock(®_mutex); + return ret; +} + +u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr, + unsigned reg_addr) +{ + u32 t, val = 0xffff; + int err; + + if (phy_addr >= AR7240_NUM_PHYS) + return 0xffff; + + mutex_lock(®_mutex); + t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | + (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | + AR7240_MDIO_CTRL_MASTER_EN | + AR7240_MDIO_CTRL_BUSY | + AR7240_MDIO_CTRL_CMD_READ; + + __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); + err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, + AR7240_MDIO_CTRL_BUSY, 0, 5); + if (!err) + val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); + mutex_unlock(®_mutex); + + return val & AR7240_MDIO_CTRL_DATA_M; +} + +int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr, + unsigned reg_addr, u16 reg_val) +{ + u32 t; + int ret; + + if (phy_addr >= AR7240_NUM_PHYS) + return -EINVAL; + + mutex_lock(®_mutex); + t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | + (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | + AR7240_MDIO_CTRL_MASTER_EN | + AR7240_MDIO_CTRL_BUSY | + AR7240_MDIO_CTRL_CMD_WRITE | + reg_val; + + __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); + ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, + AR7240_MDIO_CTRL_BUSY, 0, 5); + mutex_unlock(®_mutex); + + return ret; +} + +static int ar7240sw_capture_stats(struct ar7240sw *as) +{ + struct mii_bus *mii = as->mii_bus; + int port; + int ret; + + write_lock(&as->stats_lock); + + /* Capture the hardware statistics for all ports */ + ar7240sw_reg_write(mii, AR7240_REG_MIB_FUNCTION0, + (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); + + /* Wait for the capturing to complete. */ + ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, + AR7240_MIB_BUSY, 0, 10); + + if (ret) + goto unlock; + + for (port = 0; port < AR7240_NUM_PORTS; port++) { + unsigned int base; + struct ar7240sw_port_stat *stats; + + base = AR7240_REG_STATS_BASE(port); + stats = &as->port_stats[port]; + +#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) + + stats->rx_good_byte += READ_STAT(RXGOODBYTE); + stats->tx_byte += READ_STAT(TXBYTE); + +#undef READ_STAT + } + + ret = 0; + +unlock: + write_unlock(&as->stats_lock); + return ret; +} + +static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) +{ + ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), + AR7240_PORT_CTRL_STATE_DISABLED); +} + +static void ar7240sw_setup(struct ar7240sw *as) +{ + struct mii_bus *mii = as->mii_bus; + + /* Enable CPU port, and disable mirror port */ + ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, + AR7240_CPU_PORT_EN | + (15 << AR7240_MIRROR_PORT_S)); + + /* Setup TAG priority mapping */ + ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); + + /* Enable ARP frame acknowledge, aging, MAC replacing */ + ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, + AR7240_AT_CTRL_RESERVED | + 0x2b /* 5 min age time */ | + AR7240_AT_CTRL_AGE_EN | + AR7240_AT_CTRL_ARP_EN | + AR7240_AT_CTRL_LEARN_CHANGE); + + /* Enable Broadcast frames transmitted to the CPU */ + ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, + AR7240_FLOOD_MASK_BROAD_TO_CPU); + + /* setup MTU */ + ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M, + 1536); + + /* setup Service TAG */ + ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); +} + +static int ar7240sw_reset(struct ar7240sw *as) +{ + struct mii_bus *mii = as->mii_bus; + int ret; + int i; + + /* Set all ports to disabled state. */ + for (i = 0; i < AR7240_NUM_PORTS; i++) + ar7240sw_disable_port(as, i); + + /* Wait for transmit queues to drain. */ + msleep(2); + + /* Reset the switch. */ + ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, + AR7240_MASK_CTRL_SOFT_RESET); + + ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, + AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); + + ar7240sw_setup(as); + return ret; +} + +static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) +{ + struct mii_bus *mii = as->mii_bus; + u32 ctrl; + u32 vid, mode; + + ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | + AR7240_PORT_CTRL_SINGLE_VLAN; + + if (port == AR7240_PORT_CPU) { + ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), + AR7240_PORT_STATUS_SPEED_1000 | + AR7240_PORT_STATUS_TXFLOW | + AR7240_PORT_STATUS_RXFLOW | + AR7240_PORT_STATUS_TXMAC | + AR7240_PORT_STATUS_RXMAC | + AR7240_PORT_STATUS_DUPLEX); + } else { + ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), + AR7240_PORT_STATUS_LINK_AUTO); + } + + /* Set the default VID for this port */ + if (as->vlan) { + vid = as->vlan_id[as->pvid[port]]; + mode = AR7240_PORT_VLAN_MODE_SECURE; + } else { + vid = port; + mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; + } + + if (as->vlan && (as->vlan_tagged & BIT(port))) { + ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << + AR7240_PORT_CTRL_VLAN_MODE_S; + } else { + ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << + AR7240_PORT_CTRL_VLAN_MODE_S; + } + + if (!portmask) { + if (port == AR7240_PORT_CPU) + portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); + else + portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); + } + + /* allow the port to talk to all other ports, but exclude its + * own ID to prevent frames from being reflected back to the + * port that they came from */ + portmask &= ar7240sw_port_mask_but(as, port); + + ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); + if (sw_is_ar934x(as)) { + u32 vlan1, vlan2; + + vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); + vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | + (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); + ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); + ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); + } else { + u32 vlan; + + vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | + (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); + + ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); + } +} + +static int ar7240_set_addr(struct ar7240sw *as, u8 *addr) +{ + struct mii_bus *mii = as->mii_bus; + u32 t; + + t = (addr[4] << 8) | addr[5]; + ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t); + + t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3]; + ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t); + + return 0; +} + +static int +ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + as->vlan_id[val->port_vlan] = val->value.i; + return 0; +} + +static int +ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + val->value.i = as->vlan_id[val->port_vlan]; + return 0; +} + +static int +ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + + /* make sure no invalid PVIDs get set */ + + if (vlan >= dev->vlans) + return -EINVAL; + + as->pvid[port] = vlan; + return 0; +} + +static int +ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + *vlan = as->pvid[port]; + return 0; +} + +static int +ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + u8 ports = as->vlan_table[val->port_vlan]; + int i; + + val->len = 0; + for (i = 0; i < as->swdev.ports; i++) { + struct switch_port *p; + + if (!(ports & (1 << i))) + continue; + + p = &val->value.ports[val->len++]; + p->id = i; + if (as->vlan_tagged & (1 << i)) + p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); + else + p->flags = 0; + } + return 0; +} + +static int +ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + u8 *vt = &as->vlan_table[val->port_vlan]; + int i, j; + + *vt = 0; + for (i = 0; i < val->len; i++) { + struct switch_port *p = &val->value.ports[i]; + + if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) + as->vlan_tagged |= (1 << p->id); + else { + as->vlan_tagged &= ~(1 << p->id); + as->pvid[p->id] = val->port_vlan; + + /* make sure that an untagged port does not + * appear in other vlans */ + for (j = 0; j < AR7240_MAX_VLANS; j++) { + if (j == val->port_vlan) + continue; + as->vlan_table[j] &= ~(1 << p->id); + } + } + + *vt |= 1 << p->id; + } + return 0; +} + +static int +ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + as->vlan = !!val->value.i; + return 0; +} + +static int +ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + val->value.i = as->vlan; + return 0; +} + +static const char * +ar7240_speed_str(u32 status) +{ + u32 speed; + + speed = (status >> AR7240_PORT_STATUS_SPEED_S) & + AR7240_PORT_STATUS_SPEED_M; + switch (speed) { + case AR7240_PORT_STATUS_SPEED_10: + return "10baseT"; + case AR7240_PORT_STATUS_SPEED_100: + return "100baseT"; + case AR7240_PORT_STATUS_SPEED_1000: + return "1000baseT"; + } + + return "unknown"; +} + +static int +ar7240_port_get_link(struct switch_dev *dev, const struct switch_attr *attr, + struct switch_val *val) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + struct mii_bus *mii = as->mii_bus; + u32 len; + u32 status; + int port; + + port = val->port_vlan; + + memset(as->buf, '\0', sizeof(as->buf)); + status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); + + if (status & AR7240_PORT_STATUS_LINK_UP) { + len = snprintf(as->buf, sizeof(as->buf), + "port:%d link:up speed:%s %s-duplex %s%s%s", + port, + ar7240_speed_str(status), + (status & AR7240_PORT_STATUS_DUPLEX) ? + "full" : "half", + (status & AR7240_PORT_STATUS_TXFLOW) ? + "txflow ": "", + (status & AR7240_PORT_STATUS_RXFLOW) ? + "rxflow " : "", + (status & AR7240_PORT_STATUS_LINK_AUTO) ? + "auto ": ""); + } else { + len = snprintf(as->buf, sizeof(as->buf), + "port:%d link:down", port); + } + + val->value.s = as->buf; + val->len = len; + + return 0; +} + +static void +ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) +{ + struct mii_bus *mii = as->mii_bus; + + if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) + return; + + if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { + val &= AR7240_VTUDATA_MEMBER; + val |= AR7240_VTUDATA_VALID; + ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); + } + op |= AR7240_VTU_ACTIVE; + ar7240sw_reg_write(mii, AR7240_REG_VTU, op); +} + +static int +ar7240_hw_apply(struct switch_dev *dev) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + u8 portmask[AR7240_NUM_PORTS]; + int i, j; + + /* flush all vlan translation unit entries */ + ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); + + memset(portmask, 0, sizeof(portmask)); + if (as->vlan) { + /* calculate the port destination masks and load vlans + * into the vlan translation unit */ + for (j = 0; j < AR7240_MAX_VLANS; j++) { + u8 vp = as->vlan_table[j]; + + if (!vp) + continue; + + for (i = 0; i < as->swdev.ports; i++) { + u8 mask = (1 << i); + if (vp & mask) + portmask[i] |= vp & ~mask; + } + + ar7240_vtu_op(as, + AR7240_VTU_OP_LOAD | + (as->vlan_id[j] << AR7240_VTU_VID_S), + as->vlan_table[j]); + } + } else { + /* vlan disabled: + * isolate all ports, but connect them to the cpu port */ + for (i = 0; i < as->swdev.ports; i++) { + if (i == AR7240_PORT_CPU) + continue; + + portmask[i] = 1 << AR7240_PORT_CPU; + portmask[AR7240_PORT_CPU] |= (1 << i); + } + } + + /* update the port destination mask registers and tag settings */ + for (i = 0; i < as->swdev.ports; i++) + ar7240sw_setup_port(as, i, portmask[i]); + + return 0; +} + +static int +ar7240_reset_switch(struct switch_dev *dev) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + ar7240sw_reset(as); + return 0; +} + +static int +ar7240_get_port_link(struct switch_dev *dev, int port, + struct switch_port_link *link) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + struct mii_bus *mii = as->mii_bus; + u32 status; + + if (port > AR7240_NUM_PORTS) + return -EINVAL; + + status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); + + link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); + link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); + link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); + link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); + link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); + switch (status & AR7240_PORT_STATUS_SPEED_M) { + case AR7240_PORT_STATUS_SPEED_10: + link->speed = SWITCH_PORT_SPEED_10; + break; + case AR7240_PORT_STATUS_SPEED_100: + link->speed = SWITCH_PORT_SPEED_100; + break; + case AR7240_PORT_STATUS_SPEED_1000: + link->speed = SWITCH_PORT_SPEED_1000; + break; + } + + return 0; +} + +static int +ar7240_get_port_stats(struct switch_dev *dev, int port, + struct switch_port_stats *stats) +{ + struct ar7240sw *as = sw_to_ar7240(dev); + + if (port > AR7240_NUM_PORTS) + return -EINVAL; + + ar7240sw_capture_stats(as); + + read_lock(&as->stats_lock); + stats->rx_bytes = as->port_stats[port].rx_good_byte; + stats->tx_bytes = as->port_stats[port].tx_byte; + read_unlock(&as->stats_lock); + + return 0; +} + +static struct switch_attr ar7240_globals[] = { + { + .type = SWITCH_TYPE_INT, + .name = "enable_vlan", + .description = "Enable VLAN mode", + .set = ar7240_set_vlan, + .get = ar7240_get_vlan, + .max = 1 + }, +}; + +static struct switch_attr ar7240_port[] = { + { + .type = SWITCH_TYPE_STRING, + .name = "link", + .description = "Get port link information", + .max = 1, + .set = NULL, + .get = ar7240_port_get_link, + }, +}; + +static struct switch_attr ar7240_vlan[] = { + { + .type = SWITCH_TYPE_INT, + .name = "vid", + .description = "VLAN ID", + .set = ar7240_set_vid, + .get = ar7240_get_vid, + .max = 4094, + }, +}; + +static const struct switch_dev_ops ar7240_ops = { + .attr_global = { + .attr = ar7240_globals, + .n_attr = ARRAY_SIZE(ar7240_globals), + }, + .attr_port = { + .attr = ar7240_port, + .n_attr = ARRAY_SIZE(ar7240_port), + }, + .attr_vlan = { + .attr = ar7240_vlan, + .n_attr = ARRAY_SIZE(ar7240_vlan), + }, + .get_port_pvid = ar7240_get_pvid, + .set_port_pvid = ar7240_set_pvid, + .get_vlan_ports = ar7240_get_ports, + .set_vlan_ports = ar7240_set_ports, + .apply_config = ar7240_hw_apply, + .reset_switch = ar7240_reset_switch, + .get_port_link = ar7240_get_port_link, + .get_port_stats = ar7240_get_port_stats, +}; + +static struct ar7240sw *ar7240_probe(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + struct mii_bus *mii = ag->mii_bus; + struct ar7240sw *as; + struct switch_dev *swdev; + u32 ctrl; + u16 phy_id1; + u16 phy_id2; + int i; + + phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1); + phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2); + if ((phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) && + (phy_id1 != AR934X_PHY_ID1 || phy_id2 != AR934X_PHY_ID2)) { + pr_err("%s: unknown phy id '%04x:%04x'\n", + ag->dev->name, phy_id1, phy_id2); + return NULL; + } + + as = kzalloc(sizeof(*as), GFP_KERNEL); + if (!as) + return NULL; + + as->mii_bus = mii; + as->swdata = pdata->switch_data; + + swdev = &as->swdev; + + ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); + as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & + AR7240_MASK_CTRL_VERSION_M; + + if (sw_is_ar7240(as)) { + swdev->name = "AR7240/AR9330 built-in switch"; + } else if (sw_is_ar934x(as)) { + swdev->name = "AR934X built-in switch"; + + if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { + ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, + AR934X_OPER_MODE0_MAC_GMII_EN); + } else if (pdata->phy_if_mode == PHY_INTERFACE_MODE_MII) { + ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, + AR934X_OPER_MODE0_PHY_MII_EN); + } else { + pr_err("%s: invalid PHY interface mode\n", + ag->dev->name); + goto err_free; + } + + if (as->swdata->phy4_mii_en) + ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, + AR934X_REG_OPER_MODE1_PHY4_MII_EN); + } else { + pr_err("%s: unsupported chip, ctrl=%08x\n", + ag->dev->name, ctrl); + goto err_free; + } + + swdev->ports = AR7240_NUM_PORTS - 1; + swdev->cpu_port = AR7240_PORT_CPU; + swdev->vlans = AR7240_MAX_VLANS; + swdev->ops = &ar7240_ops; + + if (register_switch(&as->swdev, ag->dev) < 0) + goto err_free; + + pr_info("%s: Found an %s\n", ag->dev->name, swdev->name); + + /* initialize defaults */ + for (i = 0; i < AR7240_MAX_VLANS; i++) + as->vlan_id[i] = i; + + as->vlan_table[0] = ar7240sw_port_mask_all(as); + + return as; + +err_free: + kfree(as); + return NULL; +} + +static void link_function(struct work_struct *work) { + struct ag71xx *ag = container_of(work, struct ag71xx, link_work.work); + unsigned long flags; + int i; + int status = 0; + + for (i = 0; i < 4; i++) { + int link = ar7240sw_phy_read(ag->mii_bus, i, MII_BMSR); + if(link & BMSR_LSTATUS) { + status = 1; + break; + } + } + + spin_lock_irqsave(&ag->lock, flags); + if(status != ag->link) { + ag->link = status; + ag71xx_link_adjust(ag); + } + spin_unlock_irqrestore(&ag->lock, flags); + + schedule_delayed_work(&ag->link_work, HZ / 2); +} + +void ag71xx_ar7240_start(struct ag71xx *ag) +{ + struct ar7240sw *as = ag->phy_priv; + + ar7240sw_reset(as); + + ag->speed = SPEED_1000; + ag->duplex = 1; + + ar7240_set_addr(as, ag->dev->dev_addr); + ar7240_hw_apply(&as->swdev); + + schedule_delayed_work(&ag->link_work, HZ / 10); +} + +void ag71xx_ar7240_stop(struct ag71xx *ag) +{ + cancel_delayed_work_sync(&ag->link_work); +} + +int __devinit ag71xx_ar7240_init(struct ag71xx *ag) +{ + struct ar7240sw *as; + + as = ar7240_probe(ag); + if (!as) + return -ENODEV; + + ag->phy_priv = as; + ar7240sw_reset(as); + + rwlock_init(&as->stats_lock); + INIT_DELAYED_WORK(&ag->link_work, link_function); + + return 0; +} + +void ag71xx_ar7240_cleanup(struct ag71xx *ag) +{ + struct ar7240sw *as = ag->phy_priv; + + if (!as) + return; + + unregister_switch(&as->swdev); + kfree(as); + ag->phy_priv = NULL; +} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c new file mode 100644 index 0000000000..7ec43b7221 --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar8216.c @@ -0,0 +1,44 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * Special support for the Atheros ar8216 switch chip + * + * Copyright (C) 2009-2010 Gabor Juhos + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ag71xx.h" + +#define AR8216_PACKET_TYPE_MASK 0xf +#define AR8216_PACKET_TYPE_NORMAL 0 + +#define AR8216_HEADER_LEN 2 + +void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) +{ + skb_push(skb, AR8216_HEADER_LEN); + skb->data[0] = 0x10; + skb->data[1] = 0x80; +} + +int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb, + int pktlen) +{ + u8 type; + + type = skb->data[1] & AR8216_PACKET_TYPE_MASK; + switch (type) { + case AR8216_PACKET_TYPE_NORMAL: + break; + + default: + return -EINVAL; + } + + skb_pull(skb, AR8216_HEADER_LEN); + return 0; +} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c new file mode 100644 index 0000000000..65f2be198f --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_debugfs.c @@ -0,0 +1,280 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include "ag71xx.h" + +static struct dentry *ag71xx_debugfs_root; + +static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file) +{ + file->private_data = inode->i_private; + return 0; +} + +void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status) +{ + if (status) + ag->debug.int_stats.total++; + if (status & AG71XX_INT_TX_PS) + ag->debug.int_stats.tx_ps++; + if (status & AG71XX_INT_TX_UR) + ag->debug.int_stats.tx_ur++; + if (status & AG71XX_INT_TX_BE) + ag->debug.int_stats.tx_be++; + if (status & AG71XX_INT_RX_PR) + ag->debug.int_stats.rx_pr++; + if (status & AG71XX_INT_RX_OF) + ag->debug.int_stats.rx_of++; + if (status & AG71XX_INT_RX_BE) + ag->debug.int_stats.rx_be++; +} + +static ssize_t read_file_int_stats(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ +#define PR_INT_STAT(_label, _field) \ + len += snprintf(buf + len, sizeof(buf) - len, \ + "%20s: %10lu\n", _label, ag->debug.int_stats._field); + + struct ag71xx *ag = file->private_data; + char buf[256]; + unsigned int len = 0; + + PR_INT_STAT("TX Packet Sent", tx_ps); + PR_INT_STAT("TX Underrun", tx_ur); + PR_INT_STAT("TX Bus Error", tx_be); + PR_INT_STAT("RX Packet Received", rx_pr); + PR_INT_STAT("RX Overflow", rx_of); + PR_INT_STAT("RX Bus Error", rx_be); + len += snprintf(buf + len, sizeof(buf) - len, "\n"); + PR_INT_STAT("Total", total); + + return simple_read_from_buffer(user_buf, count, ppos, buf, len); +#undef PR_INT_STAT +} + +static const struct file_operations ag71xx_fops_int_stats = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_int_stats, + .owner = THIS_MODULE +}; + +void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx) +{ + struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; + + if (rx) { + stats->rx_count++; + stats->rx_packets += rx; + if (rx <= AG71XX_NAPI_WEIGHT) + stats->rx[rx]++; + if (rx > stats->rx_packets_max) + stats->rx_packets_max = rx; + } + + if (tx) { + stats->tx_count++; + stats->tx_packets += tx; + if (tx <= AG71XX_NAPI_WEIGHT) + stats->tx[tx]++; + if (tx > stats->tx_packets_max) + stats->tx_packets_max = tx; + } +} + +static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + struct ag71xx_napi_stats *stats = &ag->debug.napi_stats; + char *buf; + unsigned int buflen; + unsigned int len = 0; + unsigned long rx_avg = 0; + unsigned long tx_avg = 0; + int ret; + int i; + + buflen = 2048; + buf = kmalloc(buflen, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + if (stats->rx_count) + rx_avg = stats->rx_packets / stats->rx_count; + + if (stats->tx_count) + tx_avg = stats->tx_packets / stats->tx_count; + + len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n", + "len", "rx", "tx"); + + for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++) + len += snprintf(buf + len, buflen - len, + "%3d: %10lu %10lu\n", + i, stats->rx[i], stats->tx[i]); + + len += snprintf(buf + len, buflen - len, "\n"); + + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "sum", stats->rx_count, stats->tx_count); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "avg", rx_avg, tx_avg); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "max", stats->rx_packets_max, stats->tx_packets_max); + len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n", + "pkt", stats->rx_packets, stats->tx_packets); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); + kfree(buf); + + return ret; +} + +static const struct file_operations ag71xx_fops_napi_stats = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_napi_stats, + .owner = THIS_MODULE +}; + +#define DESC_PRINT_LEN 64 + +static ssize_t read_file_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos, + struct ag71xx *ag, + struct ag71xx_ring *ring, + unsigned desc_reg) +{ + char *buf; + unsigned int buflen; + unsigned int len = 0; + unsigned long flags; + ssize_t ret; + int curr; + int dirty; + u32 desc_hw; + int i; + + buflen = (ring->size * DESC_PRINT_LEN); + buf = kmalloc(buflen, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + len += snprintf(buf + len, buflen - len, + "Idx ... %-8s %-8s %-8s %-8s . %-10s\n", + "desc", "next", "data", "ctrl", "timestamp"); + + spin_lock_irqsave(&ag->lock, flags); + + curr = (ring->curr % ring->size); + dirty = (ring->dirty % ring->size); + desc_hw = ag71xx_rr(ag, desc_reg); + for (i = 0; i < ring->size; i++) { + struct ag71xx_buf *ab = &ring->buf[i]; + u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size; + + len += snprintf(buf + len, buflen - len, + "%3d %c%c%c %08x %08x %08x %08x %c %10lu\n", + i, + (i == curr) ? 'C' : ' ', + (i == dirty) ? 'D' : ' ', + (desc_hw == desc_dma) ? 'H' : ' ', + desc_dma, + ab->desc->next, + ab->desc->data, + ab->desc->ctrl, + (ab->desc->ctrl & DESC_EMPTY) ? 'E' : '*', + ab->timestamp); + } + + spin_unlock_irqrestore(&ag->lock, flags); + + ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); + kfree(buf); + + return ret; +} + +static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + + return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring, + AG71XX_REG_TX_DESC); +} + +static const struct file_operations ag71xx_fops_tx_ring = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_tx_ring, + .owner = THIS_MODULE +}; + +static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf, + size_t count, loff_t *ppos) +{ + struct ag71xx *ag = file->private_data; + + return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring, + AG71XX_REG_RX_DESC); +} + +static const struct file_operations ag71xx_fops_rx_ring = { + .open = ag71xx_debugfs_generic_open, + .read = read_file_rx_ring, + .owner = THIS_MODULE +}; + +void ag71xx_debugfs_exit(struct ag71xx *ag) +{ + debugfs_remove_recursive(ag->debug.debugfs_dir); +} + +int ag71xx_debugfs_init(struct ag71xx *ag) +{ + ag->debug.debugfs_dir = debugfs_create_dir(ag->dev->name, + ag71xx_debugfs_root); + if (!ag->debug.debugfs_dir) + return -ENOMEM; + + debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_int_stats); + debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_napi_stats); + debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_tx_ring); + debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir, + ag, &ag71xx_fops_rx_ring); + + return 0; +} + +int ag71xx_debugfs_root_init(void) +{ + if (ag71xx_debugfs_root) + return -EBUSY; + + ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL); + if (!ag71xx_debugfs_root) + return -ENOENT; + + return 0; +} + +void ag71xx_debugfs_root_exit(void) +{ + debugfs_remove(ag71xx_debugfs_root); + ag71xx_debugfs_root = NULL; +} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c new file mode 100644 index 0000000000..498fbed1ff --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ethtool.c @@ -0,0 +1,124 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ag71xx.h" + +static int ag71xx_ethtool_get_settings(struct net_device *dev, + struct ethtool_cmd *cmd) +{ + struct ag71xx *ag = netdev_priv(dev); + struct phy_device *phydev = ag->phy_dev; + + if (!phydev) + return -ENODEV; + + return phy_ethtool_gset(phydev, cmd); +} + +static int ag71xx_ethtool_set_settings(struct net_device *dev, + struct ethtool_cmd *cmd) +{ + struct ag71xx *ag = netdev_priv(dev); + struct phy_device *phydev = ag->phy_dev; + + if (!phydev) + return -ENODEV; + + return phy_ethtool_sset(phydev, cmd); +} + +static void ag71xx_ethtool_get_drvinfo(struct net_device *dev, + struct ethtool_drvinfo *info) +{ + struct ag71xx *ag = netdev_priv(dev); + + strcpy(info->driver, ag->pdev->dev.driver->name); + strcpy(info->version, AG71XX_DRV_VERSION); + strcpy(info->bus_info, dev_name(&ag->pdev->dev)); +} + +static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + + return ag->msg_enable; +} + +static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level) +{ + struct ag71xx *ag = netdev_priv(dev); + + ag->msg_enable = msg_level; +} + +static void ag71xx_ethtool_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *er) +{ + struct ag71xx *ag = netdev_priv(dev); + + er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX; + er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX; + er->rx_mini_max_pending = 0; + er->rx_jumbo_max_pending = 0; + + er->tx_pending = ag->tx_ring.size; + er->rx_pending = ag->rx_ring.size; + er->rx_mini_pending = 0; + er->rx_jumbo_pending = 0; +} + +static int ag71xx_ethtool_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *er) +{ + struct ag71xx *ag = netdev_priv(dev); + unsigned tx_size; + unsigned rx_size; + int err; + + if (er->rx_mini_pending != 0|| + er->rx_jumbo_pending != 0 || + er->rx_pending == 0 || + er->tx_pending == 0) + return -EINVAL; + + tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ? + er->tx_pending : AG71XX_TX_RING_SIZE_MAX; + + rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ? + er->rx_pending : AG71XX_RX_RING_SIZE_MAX; + + if (netif_running(dev)) { + err = dev->netdev_ops->ndo_stop(dev); + if (err) + return err; + } + + ag->tx_ring.size = tx_size; + ag->rx_ring.size = rx_size; + + if (netif_running(dev)) + err = dev->netdev_ops->ndo_open(dev); + + return err; +} + +struct ethtool_ops ag71xx_ethtool_ops = { + .set_settings = ag71xx_ethtool_set_settings, + .get_settings = ag71xx_ethtool_get_settings, + .get_drvinfo = ag71xx_ethtool_get_drvinfo, + .get_msglevel = ag71xx_ethtool_get_msglevel, + .set_msglevel = ag71xx_ethtool_set_msglevel, + .get_ringparam = ag71xx_ethtool_get_ringparam, + .set_ringparam = ag71xx_ethtool_set_ringparam, + .get_link = ethtool_op_get_link, +}; diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c new file mode 100644 index 0000000000..a69ed27d76 --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -0,0 +1,1258 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ag71xx.h" + +#define AG71XX_DEFAULT_MSG_ENABLE \ + (NETIF_MSG_DRV \ + | NETIF_MSG_PROBE \ + | NETIF_MSG_LINK \ + | NETIF_MSG_TIMER \ + | NETIF_MSG_IFDOWN \ + | NETIF_MSG_IFUP \ + | NETIF_MSG_RX_ERR \ + | NETIF_MSG_TX_ERR) + +static int ag71xx_msg_level = -1; + +module_param_named(msg_level, ag71xx_msg_level, int, 0); +MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); + +static void ag71xx_dump_dma_regs(struct ag71xx *ag) +{ + DBG("%s: dma_tx_ctrl=%08x, dma_tx_desc=%08x, dma_tx_status=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_TX_CTRL), + ag71xx_rr(ag, AG71XX_REG_TX_DESC), + ag71xx_rr(ag, AG71XX_REG_TX_STATUS)); + + DBG("%s: dma_rx_ctrl=%08x, dma_rx_desc=%08x, dma_rx_status=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_RX_CTRL), + ag71xx_rr(ag, AG71XX_REG_RX_DESC), + ag71xx_rr(ag, AG71XX_REG_RX_STATUS)); +} + +static void ag71xx_dump_regs(struct ag71xx *ag) +{ + DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_MAC_CFG1), + ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), + ag71xx_rr(ag, AG71XX_REG_MAC_IPG), + ag71xx_rr(ag, AG71XX_REG_MAC_HDX), + ag71xx_rr(ag, AG71XX_REG_MAC_MFL)); + DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL), + ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1), + ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2)); + DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); + DBG("%s: fifo_cfg3=%08x, fifo_cfg4=%08x, fifo_cfg5=%08x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); +} + +static inline void ag71xx_dump_intr(struct ag71xx *ag, char *label, u32 intr) +{ + DBG("%s: %s intr=%08x %s%s%s%s%s%s\n", + ag->dev->name, label, intr, + (intr & AG71XX_INT_TX_PS) ? "TXPS " : "", + (intr & AG71XX_INT_TX_UR) ? "TXUR " : "", + (intr & AG71XX_INT_TX_BE) ? "TXBE " : "", + (intr & AG71XX_INT_RX_PR) ? "RXPR " : "", + (intr & AG71XX_INT_RX_OF) ? "RXOF " : "", + (intr & AG71XX_INT_RX_BE) ? "RXBE " : ""); +} + +static void ag71xx_ring_free(struct ag71xx_ring *ring) +{ + kfree(ring->buf); + + if (ring->descs_cpu) + dma_free_coherent(NULL, ring->size * ring->desc_size, + ring->descs_cpu, ring->descs_dma); +} + +static int ag71xx_ring_alloc(struct ag71xx_ring *ring) +{ + int err; + int i; + + ring->desc_size = sizeof(struct ag71xx_desc); + if (ring->desc_size % cache_line_size()) { + DBG("ag71xx: ring %p, desc size %u rounded to %u\n", + ring, ring->desc_size, + roundup(ring->desc_size, cache_line_size())); + ring->desc_size = roundup(ring->desc_size, cache_line_size()); + } + + ring->descs_cpu = dma_alloc_coherent(NULL, ring->size * ring->desc_size, + &ring->descs_dma, GFP_ATOMIC); + if (!ring->descs_cpu) { + err = -ENOMEM; + goto err; + } + + + ring->buf = kzalloc(ring->size * sizeof(*ring->buf), GFP_KERNEL); + if (!ring->buf) { + err = -ENOMEM; + goto err; + } + + for (i = 0; i < ring->size; i++) { + int idx = i * ring->desc_size; + ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx]; + DBG("ag71xx: ring %p, desc %d at %p\n", + ring, i, ring->buf[i].desc); + } + + return 0; + +err: + return err; +} + +static void ag71xx_ring_tx_clean(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->tx_ring; + struct net_device *dev = ag->dev; + + while (ring->curr != ring->dirty) { + u32 i = ring->dirty % ring->size; + + if (!ag71xx_desc_empty(ring->buf[i].desc)) { + ring->buf[i].desc->ctrl = 0; + dev->stats.tx_errors++; + } + + if (ring->buf[i].skb) + dev_kfree_skb_any(ring->buf[i].skb); + + ring->buf[i].skb = NULL; + + ring->dirty++; + } + + /* flush descriptors */ + wmb(); + +} + +static void ag71xx_ring_tx_init(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->tx_ring; + int i; + + for (i = 0; i < ring->size; i++) { + ring->buf[i].desc->next = (u32) (ring->descs_dma + + ring->desc_size * ((i + 1) % ring->size)); + + ring->buf[i].desc->ctrl = DESC_EMPTY; + ring->buf[i].skb = NULL; + } + + /* flush descriptors */ + wmb(); + + ring->curr = 0; + ring->dirty = 0; +} + +static void ag71xx_ring_rx_clean(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->rx_ring; + int i; + + if (!ring->buf) + return; + + for (i = 0; i < ring->size; i++) + if (ring->buf[i].skb) { + dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, + AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE); + kfree_skb(ring->buf[i].skb); + } +} + +static int ag71xx_rx_reserve(struct ag71xx *ag) +{ + int reserve = 0; + + if (ag71xx_get_pdata(ag)->is_ar724x) { + if (!ag71xx_has_ar8216(ag)) + reserve = 2; + + if (ag->phy_dev) + reserve += 4 - (ag->phy_dev->pkt_align % 4); + + reserve %= 4; + } + + return reserve + AG71XX_RX_PKT_RESERVE; +} + + +static int ag71xx_ring_rx_init(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->rx_ring; + unsigned int reserve = ag71xx_rx_reserve(ag); + unsigned int i; + int ret; + + ret = 0; + for (i = 0; i < ring->size; i++) { + ring->buf[i].desc->next = (u32) (ring->descs_dma + + ring->desc_size * ((i + 1) % ring->size)); + + DBG("ag71xx: RX desc at %p, next is %08x\n", + ring->buf[i].desc, + ring->buf[i].desc->next); + } + + for (i = 0; i < ring->size; i++) { + struct sk_buff *skb; + dma_addr_t dma_addr; + + skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + reserve); + if (!skb) { + ret = -ENOMEM; + break; + } + + skb->dev = ag->dev; + skb_reserve(skb, reserve); + + dma_addr = dma_map_single(&ag->dev->dev, skb->data, + AG71XX_RX_PKT_SIZE, + DMA_FROM_DEVICE); + ring->buf[i].skb = skb; + ring->buf[i].dma_addr = dma_addr; + ring->buf[i].desc->data = (u32) dma_addr; + ring->buf[i].desc->ctrl = DESC_EMPTY; + } + + /* flush descriptors */ + wmb(); + + ring->curr = 0; + ring->dirty = 0; + + return ret; +} + +static int ag71xx_ring_rx_refill(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->rx_ring; + unsigned int reserve = ag71xx_rx_reserve(ag); + unsigned int count; + + count = 0; + for (; ring->curr - ring->dirty > 0; ring->dirty++) { + unsigned int i; + + i = ring->dirty % ring->size; + + if (ring->buf[i].skb == NULL) { + dma_addr_t dma_addr; + struct sk_buff *skb; + + skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE + reserve); + if (skb == NULL) + break; + + skb_reserve(skb, reserve); + skb->dev = ag->dev; + + dma_addr = dma_map_single(&ag->dev->dev, skb->data, + AG71XX_RX_PKT_SIZE, + DMA_FROM_DEVICE); + + ring->buf[i].skb = skb; + ring->buf[i].dma_addr = dma_addr; + ring->buf[i].desc->data = (u32) dma_addr; + } + + ring->buf[i].desc->ctrl = DESC_EMPTY; + count++; + } + + /* flush descriptors */ + wmb(); + + DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count); + + return count; +} + +static int ag71xx_rings_init(struct ag71xx *ag) +{ + int ret; + + ret = ag71xx_ring_alloc(&ag->tx_ring); + if (ret) + return ret; + + ag71xx_ring_tx_init(ag); + + ret = ag71xx_ring_alloc(&ag->rx_ring); + if (ret) + return ret; + + ret = ag71xx_ring_rx_init(ag); + return ret; +} + +static void ag71xx_rings_cleanup(struct ag71xx *ag) +{ + ag71xx_ring_rx_clean(ag); + ag71xx_ring_free(&ag->rx_ring); + + ag71xx_ring_tx_clean(ag); + ag71xx_ring_free(&ag->tx_ring); +} + +static unsigned char *ag71xx_speed_str(struct ag71xx *ag) +{ + switch (ag->speed) { + case SPEED_1000: + return "1000"; + case SPEED_100: + return "100"; + case SPEED_10: + return "10"; + } + + return "?"; +} + +static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac) +{ + u32 t; + + t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16) + | (((u32) mac[3]) << 8) | ((u32) mac[2]); + + ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t); + + t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16); + ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t); +} + +static void ag71xx_dma_reset(struct ag71xx *ag) +{ + u32 val; + int i; + + ag71xx_dump_dma_regs(ag); + + /* stop RX and TX */ + ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); + ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); + + /* + * give the hardware some time to really stop all rx/tx activity + * clearing the descriptors too early causes random memory corruption + */ + mdelay(1); + + /* clear descriptor addresses */ + ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->stop_desc_dma); + ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->stop_desc_dma); + + /* clear pending RX/TX interrupts */ + for (i = 0; i < 256; i++) { + ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); + ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); + } + + /* clear pending errors */ + ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF); + ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR); + + val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); + if (val) + pr_alert("%s: unable to clear DMA Rx status: %08x\n", + ag->dev->name, val); + + val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); + + /* mask out reserved bits */ + val &= ~0xff000000; + + if (val) + pr_alert("%s: unable to clear DMA Tx status: %08x\n", + ag->dev->name, val); + + ag71xx_dump_dma_regs(ag); +} + +#define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | \ + MAC_CFG1_SRX | MAC_CFG1_STX) + +#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT) + +#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \ + FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \ + FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \ + FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \ + FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \ + FIFO_CFG4_VT) + +#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \ + FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \ + FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \ + FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \ + FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \ + FIFO_CFG5_17 | FIFO_CFG5_SF) + +static void ag71xx_hw_stop(struct ag71xx *ag) +{ + /* disable all interrupts and stop the rx/tx engine */ + ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0); + ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0); + ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0); +} + +static void ag71xx_hw_setup(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + /* setup MAC configuration registers */ + ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT); + + ag71xx_sb(ag, AG71XX_REG_MAC_CFG2, + MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK); + + /* setup max frame length */ + ag71xx_wr(ag, AG71XX_REG_MAC_MFL, AG71XX_TX_MTU_LEN); + + /* setup FIFO configuration registers */ + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT); + if (pdata->is_ar724x) { + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, pdata->fifo_cfg1); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, pdata->fifo_cfg2); + } else { + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff); + } + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT); +} + +static void ag71xx_hw_init(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + u32 reset_mask = pdata->reset_bit; + + ag71xx_hw_stop(ag); + + if (pdata->is_ar724x) { + u32 reset_phy = reset_mask; + + reset_phy &= AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY; + reset_mask &= ~(AR71XX_RESET_GE0_PHY | AR71XX_RESET_GE1_PHY); + + ath79_device_reset_set(reset_phy); + mdelay(50); + ath79_device_reset_clear(reset_phy); + mdelay(200); + } + + ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR); + udelay(20); + + ath79_device_reset_set(reset_mask); + mdelay(100); + ath79_device_reset_clear(reset_mask); + mdelay(200); + + ag71xx_hw_setup(ag); + + ag71xx_dma_reset(ag); +} + +static void ag71xx_fast_reset(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + struct net_device *dev = ag->dev; + u32 reset_mask = pdata->reset_bit; + u32 rx_ds, tx_ds; + u32 mii_reg; + + reset_mask &= AR71XX_RESET_GE0_MAC | AR71XX_RESET_GE1_MAC; + + mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); + rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); + tx_ds = ag71xx_rr(ag, AG71XX_REG_TX_DESC); + + ath79_device_reset_set(reset_mask); + udelay(10); + ath79_device_reset_clear(reset_mask); + udelay(10); + + ag71xx_dma_reset(ag); + ag71xx_hw_setup(ag); + + ag71xx_wr(ag, AG71XX_REG_RX_DESC, rx_ds); + ag71xx_wr(ag, AG71XX_REG_TX_DESC, tx_ds); + ag71xx_wr(ag, AG71XX_REG_MII_CFG, mii_reg); + + ag71xx_hw_set_macaddr(ag, dev->dev_addr); +} + +static void ag71xx_hw_start(struct ag71xx *ag) +{ + /* start RX engine */ + ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); + + /* enable interrupts */ + ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT); +} + +void ag71xx_link_adjust(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + u32 cfg2; + u32 ifctl; + u32 fifo5; + + if (!ag->link) { + ag71xx_hw_stop(ag); + netif_carrier_off(ag->dev); + if (netif_msg_link(ag)) + pr_info("%s: link down\n", ag->dev->name); + return; + } + + if (pdata->is_ar724x) + ag71xx_fast_reset(ag); + + cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2); + cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX); + cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0; + + ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL); + ifctl &= ~(MAC_IFCTL_SPEED); + + fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5); + fifo5 &= ~FIFO_CFG5_BM; + + switch (ag->speed) { + case SPEED_1000: + cfg2 |= MAC_CFG2_IF_1000; + fifo5 |= FIFO_CFG5_BM; + break; + case SPEED_100: + cfg2 |= MAC_CFG2_IF_10_100; + ifctl |= MAC_IFCTL_SPEED; + break; + case SPEED_10: + cfg2 |= MAC_CFG2_IF_10_100; + break; + default: + BUG(); + return; + } + + if (pdata->is_ar91xx) + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff); + else if (pdata->is_ar724x) + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, pdata->fifo_cfg3); + else + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x008001ff); + + if (pdata->set_speed) + pdata->set_speed(ag->speed); + + ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2); + ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5); + ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl); + ag71xx_hw_start(ag); + + netif_carrier_on(ag->dev); + if (netif_msg_link(ag)) + pr_info("%s: link up (%sMbps/%s duplex)\n", + ag->dev->name, + ag71xx_speed_str(ag), + (DUPLEX_FULL == ag->duplex) ? "Full" : "Half"); + + DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2)); + + DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4), + ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5)); + + DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x\n", + ag->dev->name, + ag71xx_rr(ag, AG71XX_REG_MAC_CFG2), + ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL)); +} + +static int ag71xx_open(struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + int ret; + + ret = ag71xx_rings_init(ag); + if (ret) + goto err; + + napi_enable(&ag->napi); + + netif_carrier_off(dev); + ag71xx_phy_start(ag); + + ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma); + ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma); + + ag71xx_hw_set_macaddr(ag, dev->dev_addr); + + netif_start_queue(dev); + + return 0; + +err: + ag71xx_rings_cleanup(ag); + return ret; +} + +static int ag71xx_stop(struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + unsigned long flags; + + netif_carrier_off(dev); + ag71xx_phy_stop(ag); + + spin_lock_irqsave(&ag->lock, flags); + + netif_stop_queue(dev); + + ag71xx_hw_stop(ag); + ag71xx_dma_reset(ag); + + napi_disable(&ag->napi); + del_timer_sync(&ag->oom_timer); + + spin_unlock_irqrestore(&ag->lock, flags); + + ag71xx_rings_cleanup(ag); + + return 0; +} + +static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + struct ag71xx_ring *ring = &ag->tx_ring; + struct ag71xx_desc *desc; + dma_addr_t dma_addr; + int i; + + i = ring->curr % ring->size; + desc = ring->buf[i].desc; + + if (!ag71xx_desc_empty(desc)) + goto err_drop; + + if (ag71xx_has_ar8216(ag)) + ag71xx_add_ar8216_header(ag, skb); + + if (skb->len <= 0) { + DBG("%s: packet len is too small\n", ag->dev->name); + goto err_drop; + } + + dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, + DMA_TO_DEVICE); + + ring->buf[i].skb = skb; + ring->buf[i].timestamp = jiffies; + + /* setup descriptor fields */ + desc->data = (u32) dma_addr; + desc->ctrl = (skb->len & DESC_PKTLEN_M); + + /* flush descriptor */ + wmb(); + + ring->curr++; + if (ring->curr == (ring->dirty + ring->size)) { + DBG("%s: tx queue full\n", ag->dev->name); + netif_stop_queue(dev); + } + + DBG("%s: packet injected into TX queue\n", ag->dev->name); + + /* enable TX engine */ + ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE); + + return NETDEV_TX_OK; + +err_drop: + dev->stats.tx_dropped++; + + dev_kfree_skb(skb); + return NETDEV_TX_OK; +} + +static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) +{ + struct ag71xx *ag = netdev_priv(dev); + int ret; + + switch (cmd) { + case SIOCETHTOOL: + if (ag->phy_dev == NULL) + break; + + spin_lock_irq(&ag->lock); + ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data); + spin_unlock_irq(&ag->lock); + return ret; + + case SIOCSIFHWADDR: + if (copy_from_user + (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) + return -EFAULT; + return 0; + + case SIOCGIFHWADDR: + if (copy_to_user + (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) + return -EFAULT; + return 0; + + case SIOCGMIIPHY: + case SIOCGMIIREG: + case SIOCSMIIREG: + if (ag->phy_dev == NULL) + break; + + return phy_mii_ioctl(ag->phy_dev, ifr, cmd); + + default: + break; + } + + return -EOPNOTSUPP; +} + +static void ag71xx_oom_timer_handler(unsigned long data) +{ + struct net_device *dev = (struct net_device *) data; + struct ag71xx *ag = netdev_priv(dev); + + napi_schedule(&ag->napi); +} + +static void ag71xx_tx_timeout(struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + + if (netif_msg_tx_err(ag)) + pr_info("%s: tx timeout\n", ag->dev->name); + + schedule_work(&ag->restart_work); +} + +static void ag71xx_restart_work_func(struct work_struct *work) +{ + struct ag71xx *ag = container_of(work, struct ag71xx, restart_work); + + if (ag71xx_get_pdata(ag)->is_ar724x) { + ag->link = 0; + ag71xx_link_adjust(ag); + return; + } + + ag71xx_stop(ag->dev); + ag71xx_open(ag->dev); +} + +static bool ag71xx_check_dma_stuck(struct ag71xx *ag, unsigned long timestamp) +{ + u32 rx_sm, tx_sm, rx_fd; + + if (likely(time_before(jiffies, timestamp + HZ/10))) + return false; + + if (!netif_carrier_ok(ag->dev)) + return false; + + rx_sm = ag71xx_rr(ag, AG71XX_REG_RX_SM); + if ((rx_sm & 0x7) == 0x3 && ((rx_sm >> 4) & 0x7) == 0x6) + return true; + + tx_sm = ag71xx_rr(ag, AG71XX_REG_TX_SM); + rx_fd = ag71xx_rr(ag, AG71XX_REG_FIFO_DEPTH); + if (((tx_sm >> 4) & 0x7) == 0 && ((rx_sm & 0x7) == 0) && + ((rx_sm >> 4) & 0x7) == 0 && rx_fd == 0) + return true; + + return false; +} + +static int ag71xx_tx_packets(struct ag71xx *ag) +{ + struct ag71xx_ring *ring = &ag->tx_ring; + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + int sent; + + DBG("%s: processing TX ring\n", ag->dev->name); + + sent = 0; + while (ring->dirty != ring->curr) { + unsigned int i = ring->dirty % ring->size; + struct ag71xx_desc *desc = ring->buf[i].desc; + struct sk_buff *skb = ring->buf[i].skb; + + if (!ag71xx_desc_empty(desc)) { + if (pdata->is_ar7240 && + ag71xx_check_dma_stuck(ag, ring->buf[i].timestamp)) + schedule_work(&ag->restart_work); + break; + } + + ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS); + + ag->dev->stats.tx_bytes += skb->len; + ag->dev->stats.tx_packets++; + + dev_kfree_skb_any(skb); + ring->buf[i].skb = NULL; + + ring->dirty++; + sent++; + } + + DBG("%s: %d packets sent out\n", ag->dev->name, sent); + + if ((ring->curr - ring->dirty) < (ring->size * 3) / 4) + netif_wake_queue(ag->dev); + + return sent; +} + +static int ag71xx_rx_packets(struct ag71xx *ag, int limit) +{ + struct net_device *dev = ag->dev; + struct ag71xx_ring *ring = &ag->rx_ring; + int done = 0; + + DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n", + dev->name, limit, ring->curr, ring->dirty); + + while (done < limit) { + unsigned int i = ring->curr % ring->size; + struct ag71xx_desc *desc = ring->buf[i].desc; + struct sk_buff *skb; + int pktlen; + int err = 0; + + if (ag71xx_desc_empty(desc)) + break; + + if ((ring->dirty + ring->size) == ring->curr) { + ag71xx_assert(0); + break; + } + + ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR); + + skb = ring->buf[i].skb; + pktlen = ag71xx_desc_pktlen(desc); + pktlen -= ETH_FCS_LEN; + + dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, + AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE); + + dev->last_rx = jiffies; + dev->stats.rx_packets++; + dev->stats.rx_bytes += pktlen; + + skb_put(skb, pktlen); + if (ag71xx_has_ar8216(ag)) + err = ag71xx_remove_ar8216_header(ag, skb, pktlen); + + if (err) { + dev->stats.rx_dropped++; + kfree_skb(skb); + } else { + skb->dev = dev; + skb->ip_summed = CHECKSUM_NONE; + if (ag->phy_dev) { + ag->phy_dev->netif_receive_skb(skb); + } else { + skb->protocol = eth_type_trans(skb, dev); + netif_receive_skb(skb); + } + } + + ring->buf[i].skb = NULL; + done++; + + ring->curr++; + } + + ag71xx_ring_rx_refill(ag); + + DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n", + dev->name, ring->curr, ring->dirty, done); + + return done; +} + +static int ag71xx_poll(struct napi_struct *napi, int limit) +{ + struct ag71xx *ag = container_of(napi, struct ag71xx, napi); + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + struct net_device *dev = ag->dev; + struct ag71xx_ring *rx_ring; + unsigned long flags; + u32 status; + int tx_done; + int rx_done; + + pdata->ddr_flush(); + tx_done = ag71xx_tx_packets(ag); + + DBG("%s: processing RX ring\n", dev->name); + rx_done = ag71xx_rx_packets(ag, limit); + + ag71xx_debugfs_update_napi_stats(ag, rx_done, tx_done); + + rx_ring = &ag->rx_ring; + if (rx_ring->buf[rx_ring->dirty % rx_ring->size].skb == NULL) + goto oom; + + status = ag71xx_rr(ag, AG71XX_REG_RX_STATUS); + if (unlikely(status & RX_STATUS_OF)) { + ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF); + dev->stats.rx_fifo_errors++; + + /* restart RX */ + ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE); + } + + if (rx_done < limit) { + if (status & RX_STATUS_PR) + goto more; + + status = ag71xx_rr(ag, AG71XX_REG_TX_STATUS); + if (status & TX_STATUS_PS) + goto more; + + DBG("%s: disable polling mode, rx=%d, tx=%d,limit=%d\n", + dev->name, rx_done, tx_done, limit); + + napi_complete(napi); + + /* enable interrupts */ + spin_lock_irqsave(&ag->lock, flags); + ag71xx_int_enable(ag, AG71XX_INT_POLL); + spin_unlock_irqrestore(&ag->lock, flags); + return rx_done; + } + +more: + DBG("%s: stay in polling mode, rx=%d, tx=%d, limit=%d\n", + dev->name, rx_done, tx_done, limit); + return rx_done; + +oom: + if (netif_msg_rx_err(ag)) + pr_info("%s: out of memory\n", dev->name); + + mod_timer(&ag->oom_timer, jiffies + AG71XX_OOM_REFILL); + napi_complete(napi); + return 0; +} + +static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) +{ + struct net_device *dev = dev_id; + struct ag71xx *ag = netdev_priv(dev); + u32 status; + + status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS); + ag71xx_dump_intr(ag, "raw", status); + + if (unlikely(!status)) + return IRQ_NONE; + + if (unlikely(status & AG71XX_INT_ERR)) { + if (status & AG71XX_INT_TX_BE) { + ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE); + dev_err(&dev->dev, "TX BUS error\n"); + } + if (status & AG71XX_INT_RX_BE) { + ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE); + dev_err(&dev->dev, "RX BUS error\n"); + } + } + + if (likely(status & AG71XX_INT_POLL)) { + ag71xx_int_disable(ag, AG71XX_INT_POLL); + DBG("%s: enable polling mode\n", dev->name); + napi_schedule(&ag->napi); + } + + ag71xx_debugfs_update_int_stats(ag, status); + + return IRQ_HANDLED; +} + +#ifdef CONFIG_NET_POLL_CONTROLLER +/* + * Polling 'interrupt' - used by things like netconsole to send skbs + * without having to re-enable interrupts. It's not called while + * the interrupt routine is executing. + */ +static void ag71xx_netpoll(struct net_device *dev) +{ + disable_irq(dev->irq); + ag71xx_interrupt(dev->irq, dev); + enable_irq(dev->irq); +} +#endif + +static const struct net_device_ops ag71xx_netdev_ops = { + .ndo_open = ag71xx_open, + .ndo_stop = ag71xx_stop, + .ndo_start_xmit = ag71xx_hard_start_xmit, + .ndo_do_ioctl = ag71xx_do_ioctl, + .ndo_tx_timeout = ag71xx_tx_timeout, + .ndo_change_mtu = eth_change_mtu, + .ndo_set_mac_address = eth_mac_addr, + .ndo_validate_addr = eth_validate_addr, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = ag71xx_netpoll, +#endif +}; + +static int __devinit ag71xx_probe(struct platform_device *pdev) +{ + struct net_device *dev; + struct resource *res; + struct ag71xx *ag; + struct ag71xx_platform_data *pdata; + int err; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "no platform data specified\n"); + err = -ENXIO; + goto err_out; + } + + if (pdata->mii_bus_dev == NULL) { + dev_err(&pdev->dev, "no MII bus device specified\n"); + err = -EINVAL; + goto err_out; + } + + dev = alloc_etherdev(sizeof(*ag)); + if (!dev) { + dev_err(&pdev->dev, "alloc_etherdev failed\n"); + err = -ENOMEM; + goto err_out; + } + + SET_NETDEV_DEV(dev, &pdev->dev); + + ag = netdev_priv(dev); + ag->pdev = pdev; + ag->dev = dev; + ag->msg_enable = netif_msg_init(ag71xx_msg_level, + AG71XX_DEFAULT_MSG_ENABLE); + spin_lock_init(&ag->lock); + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base"); + if (!res) { + dev_err(&pdev->dev, "no mac_base resource found\n"); + err = -ENXIO; + goto err_out; + } + + ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1); + if (!ag->mac_base) { + dev_err(&pdev->dev, "unable to ioremap mac_base\n"); + err = -ENOMEM; + goto err_free_dev; + } + + dev->irq = platform_get_irq(pdev, 0); + err = request_irq(dev->irq, ag71xx_interrupt, + IRQF_DISABLED, + dev->name, dev); + if (err) { + dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); + goto err_unmap_base; + } + + dev->base_addr = (unsigned long)ag->mac_base; + dev->netdev_ops = &ag71xx_netdev_ops; + dev->ethtool_ops = &ag71xx_ethtool_ops; + + INIT_WORK(&ag->restart_work, ag71xx_restart_work_func); + + init_timer(&ag->oom_timer); + ag->oom_timer.data = (unsigned long) dev; + ag->oom_timer.function = ag71xx_oom_timer_handler; + + ag->tx_ring.size = AG71XX_TX_RING_SIZE_DEFAULT; + ag->rx_ring.size = AG71XX_RX_RING_SIZE_DEFAULT; + + ag->stop_desc = dma_alloc_coherent(NULL, + sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); + + if (!ag->stop_desc) + goto err_free_irq; + + ag->stop_desc->data = 0; + ag->stop_desc->ctrl = 0; + ag->stop_desc->next = (u32) ag->stop_desc_dma; + + memcpy(dev->dev_addr, pdata->mac_addr, ETH_ALEN); + + netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT); + + err = register_netdev(dev); + if (err) { + dev_err(&pdev->dev, "unable to register net device\n"); + goto err_free_desc; + } + + pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d\n", + dev->name, dev->base_addr, dev->irq); + + ag71xx_dump_regs(ag); + + ag71xx_hw_init(ag); + + ag71xx_dump_regs(ag); + + err = ag71xx_phy_connect(ag); + if (err) + goto err_unregister_netdev; + + err = ag71xx_debugfs_init(ag); + if (err) + goto err_phy_disconnect; + + platform_set_drvdata(pdev, dev); + + return 0; + +err_phy_disconnect: + ag71xx_phy_disconnect(ag); +err_unregister_netdev: + unregister_netdev(dev); +err_free_desc: + dma_free_coherent(NULL, sizeof(struct ag71xx_desc), ag->stop_desc, + ag->stop_desc_dma); +err_free_irq: + free_irq(dev->irq, dev); +err_unmap_base: + iounmap(ag->mac_base); +err_free_dev: + kfree(dev); +err_out: + platform_set_drvdata(pdev, NULL); + return err; +} + +static int __devexit ag71xx_remove(struct platform_device *pdev) +{ + struct net_device *dev = platform_get_drvdata(pdev); + + if (dev) { + struct ag71xx *ag = netdev_priv(dev); + + ag71xx_debugfs_exit(ag); + ag71xx_phy_disconnect(ag); + unregister_netdev(dev); + free_irq(dev->irq, dev); + iounmap(ag->mac_base); + kfree(dev); + platform_set_drvdata(pdev, NULL); + } + + return 0; +} + +static struct platform_driver ag71xx_driver = { + .probe = ag71xx_probe, + .remove = __exit_p(ag71xx_remove), + .driver = { + .name = AG71XX_DRV_NAME, + } +}; + +static int __init ag71xx_module_init(void) +{ + int ret; + + ret = ag71xx_debugfs_root_init(); + if (ret) + goto err_out; + + ret = ag71xx_mdio_driver_init(); + if (ret) + goto err_debugfs_exit; + + ret = platform_driver_register(&ag71xx_driver); + if (ret) + goto err_mdio_exit; + + return 0; + +err_mdio_exit: + ag71xx_mdio_driver_exit(); +err_debugfs_exit: + ag71xx_debugfs_root_exit(); +err_out: + return ret; +} + +static void __exit ag71xx_module_exit(void) +{ + platform_driver_unregister(&ag71xx_driver); + ag71xx_mdio_driver_exit(); + ag71xx_debugfs_root_exit(); +} + +module_init(ag71xx_module_init); +module_exit(ag71xx_module_exit); + +MODULE_VERSION(AG71XX_DRV_VERSION); +MODULE_AUTHOR("Gabor Juhos "); +MODULE_AUTHOR("Imre Kaloz "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" AG71XX_DRV_NAME); diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c new file mode 100644 index 0000000000..552c7bfbac --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c @@ -0,0 +1,246 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ag71xx.h" + +#define AG71XX_MDIO_RETRY 1000 +#define AG71XX_MDIO_DELAY 5 + +static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg, + u32 value) +{ + void __iomem *r; + + r = am->mdio_base + reg; + __raw_writel(value, r); + + /* flush write */ + (void) __raw_readl(r); +} + +static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg) +{ + return __raw_readl(am->mdio_base + reg); +} + +static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am) +{ + DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n", + am->mii_bus->name, + ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG), + ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD), + ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR)); + DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n", + am->mii_bus->name, + ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL), + ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS), + ag71xx_mdio_rr(am, AG71XX_REG_MII_IND)); +} + +int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg) +{ + int ret; + int i; + + ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); + ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, + ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); + ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ); + + i = AG71XX_MDIO_RETRY; + while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) { + if (i-- == 0) { + pr_err("%s: mii_read timed out\n", am->mii_bus->name); + ret = 0xffff; + goto out; + } + udelay(AG71XX_MDIO_DELAY); + } + + ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff; + ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE); + + DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret); + +out: + return ret; +} + +void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val) +{ + int i; + + DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val); + + ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR, + ((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff)); + ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val); + + i = AG71XX_MDIO_RETRY; + while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) { + if (i-- == 0) { + pr_err("%s: mii_write timed out\n", am->mii_bus->name); + break; + } + udelay(AG71XX_MDIO_DELAY); + } +} + +static int ag71xx_mdio_reset(struct mii_bus *bus) +{ + struct ag71xx_mdio *am = bus->priv; + u32 t; + + if (am->pdata->is_ar7240) + t = MII_CFG_CLK_DIV_6; + else + t = MII_CFG_CLK_DIV_28; + + ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET); + udelay(100); + + ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t); + udelay(100); + + return 0; +} + +static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg) +{ + struct ag71xx_mdio *am = bus->priv; + + if (am->pdata->is_ar7240) + return ar7240sw_phy_read(bus, addr, reg); + else + return ag71xx_mdio_mii_read(am, addr, reg); +} + +static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val) +{ + struct ag71xx_mdio *am = bus->priv; + + if (am->pdata->is_ar7240) + ar7240sw_phy_write(bus, addr, reg, val); + else + ag71xx_mdio_mii_write(am, addr, reg, val); + return 0; +} + +static int __devinit ag71xx_mdio_probe(struct platform_device *pdev) +{ + struct ag71xx_mdio_platform_data *pdata; + struct ag71xx_mdio *am; + struct resource *res; + int i; + int err; + + pdata = pdev->dev.platform_data; + if (!pdata) { + dev_err(&pdev->dev, "no platform data specified\n"); + return -EINVAL; + } + + am = kzalloc(sizeof(*am), GFP_KERNEL); + if (!am) { + err = -ENOMEM; + goto err_out; + } + + am->pdata = pdata; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "no iomem resource found\n"); + err = -ENXIO; + goto err_out; + } + + am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1); + if (!am->mdio_base) { + dev_err(&pdev->dev, "unable to ioremap registers\n"); + err = -ENOMEM; + goto err_free_mdio; + } + + am->mii_bus = mdiobus_alloc(); + if (am->mii_bus == NULL) { + err = -ENOMEM; + goto err_iounmap; + } + + am->mii_bus->name = "ag71xx_mdio"; + am->mii_bus->read = ag71xx_mdio_read; + am->mii_bus->write = ag71xx_mdio_write; + am->mii_bus->reset = ag71xx_mdio_reset; + am->mii_bus->irq = am->mii_irq; + am->mii_bus->priv = am; + am->mii_bus->parent = &pdev->dev; + snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev)); + am->mii_bus->phy_mask = pdata->phy_mask; + + for (i = 0; i < PHY_MAX_ADDR; i++) + am->mii_irq[i] = PHY_POLL; + + ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0); + + err = mdiobus_register(am->mii_bus); + if (err) + goto err_free_bus; + + ag71xx_mdio_dump_regs(am); + + platform_set_drvdata(pdev, am); + return 0; + +err_free_bus: + mdiobus_free(am->mii_bus); +err_iounmap: + iounmap(am->mdio_base); +err_free_mdio: + kfree(am); +err_out: + return err; +} + +static int __devexit ag71xx_mdio_remove(struct platform_device *pdev) +{ + struct ag71xx_mdio *am = platform_get_drvdata(pdev); + + if (am) { + mdiobus_unregister(am->mii_bus); + mdiobus_free(am->mii_bus); + iounmap(am->mdio_base); + kfree(am); + platform_set_drvdata(pdev, NULL); + } + + return 0; +} + +static struct platform_driver ag71xx_mdio_driver = { + .probe = ag71xx_mdio_probe, + .remove = __exit_p(ag71xx_mdio_remove), + .driver = { + .name = "ag71xx-mdio", + } +}; + +int __init ag71xx_mdio_driver_init(void) +{ + return platform_driver_register(&ag71xx_mdio_driver); +} + +void ag71xx_mdio_driver_exit(void) +{ + platform_driver_unregister(&ag71xx_mdio_driver); +} diff --git a/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c new file mode 100644 index 0000000000..ebdbc5b9ac --- /dev/null +++ b/target/linux/ar71xx/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_phy.c @@ -0,0 +1,235 @@ +/* + * Atheros AR71xx built-in ethernet mac driver + * + * Copyright (C) 2008-2010 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Based on Atheros' AG7100 driver + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ag71xx.h" + +static void ag71xx_phy_link_adjust(struct net_device *dev) +{ + struct ag71xx *ag = netdev_priv(dev); + struct phy_device *phydev = ag->phy_dev; + unsigned long flags; + int status_change = 0; + + spin_lock_irqsave(&ag->lock, flags); + + if (phydev->link) { + if (ag->duplex != phydev->duplex + || ag->speed != phydev->speed) { + status_change = 1; + } + } + + if (phydev->link != ag->link) + status_change = 1; + + ag->link = phydev->link; + ag->duplex = phydev->duplex; + ag->speed = phydev->speed; + + if (status_change) + ag71xx_link_adjust(ag); + + spin_unlock_irqrestore(&ag->lock, flags); +} + +void ag71xx_phy_start(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + if (ag->phy_dev) { + phy_start(ag->phy_dev); + } else if (pdata->switch_data) { + ag71xx_ar7240_start(ag); + } else { + ag->link = 1; + ag71xx_link_adjust(ag); + } +} + +void ag71xx_phy_stop(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + unsigned long flags; + + if (ag->phy_dev) + phy_stop(ag->phy_dev); + else if (pdata->switch_data) + ag71xx_ar7240_stop(ag); + + spin_lock_irqsave(&ag->lock, flags); + if (ag->link) { + ag->link = 0; + ag71xx_link_adjust(ag); + } + spin_unlock_irqrestore(&ag->lock, flags); +} + +static int ag71xx_phy_connect_fixed(struct ag71xx *ag) +{ + struct net_device *dev = ag->dev; + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + int ret = 0; + + /* use fixed settings */ + switch (pdata->speed) { + case SPEED_10: + case SPEED_100: + case SPEED_1000: + break; + default: + netdev_err(dev, "invalid speed specified\n"); + ret = -EINVAL; + break; + } + + netdev_dbg(dev, "using fixed link parameters\n"); + + ag->duplex = pdata->duplex; + ag->speed = pdata->speed; + + return ret; +} + +static int ag71xx_phy_connect_multi(struct ag71xx *ag) +{ + struct net_device *dev = ag->dev; + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + struct phy_device *phydev = NULL; + int phy_addr; + int ret = 0; + + for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { + if (!(pdata->phy_mask & (1 << phy_addr))) + continue; + + if (ag->mii_bus->phy_map[phy_addr] == NULL) + continue; + + DBG("%s: PHY found at %s, uid=%08x\n", + dev->name, + dev_name(&ag->mii_bus->phy_map[phy_addr]->dev), + ag->mii_bus->phy_map[phy_addr]->phy_id); + + if (phydev == NULL) + phydev = ag->mii_bus->phy_map[phy_addr]; + } + + if (!phydev) { + netdev_err(dev, "no PHY found with phy_mask=%08x\n", + pdata->phy_mask); + return -ENODEV; + } + + ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev), + &ag71xx_phy_link_adjust, 0, + pdata->phy_if_mode); + + if (IS_ERR(ag->phy_dev)) { + netdev_err(dev, "could not connect to PHY at %s\n", + dev_name(&phydev->dev)); + return PTR_ERR(ag->phy_dev); + } + + /* mask with MAC supported features */ + if (pdata->has_gbit) + phydev->supported &= PHY_GBIT_FEATURES; + else + phydev->supported &= PHY_BASIC_FEATURES; + + phydev->advertising = phydev->supported; + + netdev_info(dev, "connected to PHY at %s [uid=%08x, driver=%s]\n", + dev_name(&phydev->dev), phydev->phy_id, phydev->drv->name); + + ag->link = 0; + ag->speed = 0; + ag->duplex = -1; + + return ret; +} + +static int dev_is_class(struct device *dev, void *class) +{ + if (dev->class != NULL && !strcmp(dev->class->name, class)) + return 1; + + return 0; +} + +static struct device *dev_find_class(struct device *parent, char *class) +{ + if (dev_is_class(parent, class)) { + get_device(parent); + return parent; + } + + return device_find_child(parent, class, dev_is_class); +} + +static struct mii_bus *dev_to_mii_bus(struct device *dev) +{ + struct device *d; + + d = dev_find_class(dev, "mdio_bus"); + if (d != NULL) { + struct mii_bus *bus; + + bus = to_mii_bus(d); + put_device(d); + + return bus; + } + + return NULL; +} + +int __devinit ag71xx_phy_connect(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + if (pdata->mii_bus_dev == NULL || + pdata->mii_bus_dev->bus == NULL ) + return ag71xx_phy_connect_fixed(ag); + + ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev); + if (ag->mii_bus == NULL) { + netdev_err(ag->dev, "unable to find MII bus on device '%s'\n", + dev_name(pdata->mii_bus_dev)); + return -ENODEV; + } + + /* Reset the mdio bus explicitly */ + if (ag->mii_bus->reset) { + mutex_lock(&ag->mii_bus->mdio_lock); + ag->mii_bus->reset(ag->mii_bus); + mutex_unlock(&ag->mii_bus->mdio_lock); + } + + if (pdata->switch_data) + return ag71xx_ar7240_init(ag); + + if (pdata->phy_mask) + return ag71xx_phy_connect_multi(ag); + + return ag71xx_phy_connect_fixed(ag); +} + +void ag71xx_phy_disconnect(struct ag71xx *ag) +{ + struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); + + if (pdata->switch_data) + ag71xx_ar7240_cleanup(ag); + else if (ag->phy_dev) + phy_disconnect(ag->phy_dev); +}