From: Evgeniy Didin Date: Tue, 13 Feb 2018 14:24:25 +0000 (+0300) Subject: archs38: add HSDK board X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d55a05fc9e92e4699f98216e0f01221796d9df9a;p=openwrt%2Fstaging%2Faparcar.git archs38: add HSDK board Synopsys DesignWare HSDK (which stands for ARC HS Development Kit) is the latest and greatest development platform that sports quad-core ARC HS38 in real silicon. Most noticeable features of the board are: * Quad-core ARC HS38 CPU running at 1GHz * 4Gb of DDR * Built-in Vivante GPU (well supported via open source Etnaviv drivers) * Built-in Wi-Fi/Bluetooth module (RedPine RS-9113) And as usual we have: * [micro] SD-card slot * 2 USB 2.0 ports * 1Gbit Ethernet port * Built-in Digilent JTAG probe * Serial port accessible via micro-USB port For more information about HSDK board visit: https://www.synopsys.com/dw/ipdir.php?ds=arc-hs-development-kit Signed-off-by: Evgeniy Didin CC: Alexey Brodkin CC: Hauke Mehrtens CC: John Crispin --- diff --git a/target/linux/archs38/config-4.14 b/target/linux/archs38/config-4.14 index 39db6a57d1..9a04154a20 100644 --- a/target/linux/archs38/config-4.14 +++ b/target/linux/archs38/config-4.14 @@ -40,12 +40,13 @@ CONFIG_ARC_PLAT_AXS10X=y # CONFIG_ARC_PLAT_EZNPS is not set # CONFIG_ARC_PLAT_TB10X is not set # CONFIG_ARC_SMP_HALT_ON_RESET is not set -# CONFIG_ARC_SOC_HSDK is not set +CONFIG_ARC_SOC_HSDK=y CONFIG_ARC_TIMERS=y CONFIG_ARC_TIMERS_64BIT=y CONFIG_ARC_UBOOT_SUPPORT=y CONFIG_AXS103=y CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLK_HSDK=y CONFIG_CLONE_BACKWARDS=y CONFIG_COMMON_CLK=y # CONFIG_CPU_BIG_ENDIAN is not set @@ -119,7 +120,7 @@ CONFIG_JBD2=y CONFIG_KALLSYMS=y CONFIG_KERNEL_GZIP=y CONFIG_LIBFDT=y -CONFIG_LINUX_LINK_BASE=0x80000000 +CONFIG_LINUX_LINK_BASE=0x90000000 CONFIG_LINUX_RAM_BASE=0x80000000 CONFIG_LOCK_SPIN_ON_OWNER=y CONFIG_MDIO_BUS=y @@ -152,6 +153,7 @@ CONFIG_NET_PTP_CLASSIFY=y # CONFIG_NET_VENDOR_SEEQ is not set # CONFIG_NET_VENDOR_VIA is not set # CONFIG_NET_VENDOR_WIZNET is not set +CONFIG_NLS=y CONFIG_NO_BOOTMEM=y CONFIG_NO_IOPORT_MAP=y CONFIG_NR_CPUS=4 @@ -182,6 +184,7 @@ CONFIG_RCU_STALL_COMMON=y CONFIG_REGMAP=y CONFIG_REGMAP_MMIO=y CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_HSDK=y CONFIG_RFS_ACCEL=y CONFIG_RPS=y # CONFIG_SCHED_INFO is not set diff --git a/target/linux/archs38/image/Makefile b/target/linux/archs38/image/Makefile index 5d941bc94b..1e0d3e99fd 100644 --- a/target/linux/archs38/image/Makefile +++ b/target/linux/archs38/image/Makefile @@ -33,8 +33,8 @@ TARGET_DEVICES += nsim_hs endif # Root FS on SD-card -KERNEL_LOADADDR := 0x80000000 -DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu +KERNEL_LOADADDR := 0x90000000 +DEVICE_DTS_LIST:= axs103_idu nsim_hs_idu hsdk FAT32_BLOCK_SIZE=1024 FAT32_BLOCKS=$(shell echo $$(($(CONFIG_AXS10X_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) @@ -49,9 +49,11 @@ define Image/Build/SDCard rm -f $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img mkfs.fat $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img -C $(FAT32_BLOCKS) mkimage -C none -A arc -T script -d uEnv.txt $(BIN_DIR)/uEnv.scr + mkenvimage -s 0x4000 -o $(BIN_DIR)/uboot.env ./uboot.env.txt mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uEnv.scr ::boot.scr mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(DTS_DIR)/*.dtb :: mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/$(IMG_PREFIX)-uImage ::uImage + mcopy -i $(KDIR_TMP)/$(IMG_PREFIX)-$(PROFILE)-boot.img $(BIN_DIR)/uboot.env ::uboot.env ./gen_axs10x_sdcard_img.sh \ $(BIN_DIR)/$(IMG_PREFIX)-$(PROFILE)-sdcard-vfat-$(1).img \ diff --git a/target/linux/archs38/image/uboot.env.txt b/target/linux/archs38/image/uboot.env.txt new file mode 100644 index 0000000000..9ae7bd0c62 --- /dev/null +++ b/target/linux/archs38/image/uboot.env.txt @@ -0,0 +1,29 @@ +baudrate=115200 +bootargs=console=ttyS0,115200n8 root=/dev/mmcblk0p2 rootwait +bootcmd=fatload mmc 0:1 0x82000000 uImage && fatload mmc 0:1 0x81000000 hsdk.dtb && bootm 0x82000000 - 0x81000000 +bootdelay=2 +bootfile=uImage +loadaddr=0x82000000 +stderr=serial0@f0005000 +stdin=serial0@f0005000 +stdout=serial0@f0005000 +core_dccm_0=0x10 +core_dccm_1=0x6 +core_dccm_2=0x10 +core_dccm_3=0x6 +core_iccm_0=0x10 +core_iccm_1=0x6 +core_iccm_2=0x10 +core_iccm_3=0x6 +core_mask=0xF +dcache_ena=0x1 +icache_ena=0x1 +non_volatile_limit=0xE +hsdk_hs34=setenv core_mask 0x2; setenv icache_ena 0x0; setenv dcache_ena 0x0; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0x0; +hsdk_hs36=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; +hsdk_hs36_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE; +hsdk_hs38=setenv core_mask 0x1; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; +hsdk_hs38_ccm=setenv core_mask 0x2; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_1 0x7; setenv core_dccm_1 0x8; setenv non_volatile_limit 0xE; +hsdk_hs38x2=setenv core_mask 0x3; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; +hsdk_hs38x3=setenv core_mask 0x7; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; +hsdk_hs38x4=setenv core_mask 0xF; setenv icache_ena 0x1; setenv dcache_ena 0x1; setenv core_iccm_0 0x10; setenv core_dccm_0 0x10; setenv non_volatile_limit 0xE; setenv core_iccm_1 0x6; setenv core_dccm_1 0x6; setenv core_iccm_2 0x10; setenv core_dccm_2 0x10; setenv core_iccm_3 0x6; setenv core_dccm_3 0x6;