From: Rafał Miłecki Date: Sat, 28 Jan 2017 17:51:57 +0000 (+0100) Subject: kernel: backport support for BCM54210E PHY X-Git-Tag: v17.01.0-rc1~6 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d46ce9498cf562cc9f0212152dcc8eebb20753ce;p=openwrt%2Fstaging%2Fpepe2k.git kernel: backport support for BCM54210E PHY Signed-off-by: Rafał Miłecki --- diff --git a/target/linux/generic/patches-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch b/target/linux/generic/patches-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch index 0aed5588fd..1186559bbc 100644 --- a/target/linux/generic/patches-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch +++ b/target/linux/generic/patches-4.4/078-0003-net-phy-cherry-pick-Broadcom-drivers-updates-from-v4.patch @@ -16,27 +16,14 @@ Signed-off-by: Rafał Miłecki #define BRCM_PHY_MODEL(phydev) \ ((phydev)->drv->phy_id & (phydev)->drv->phy_id_mask) -@@ -30,11 +30,49 @@ MODULE_DESCRIPTION("Broadcom PHY driver" +@@ -30,9 +30,32 @@ MODULE_DESCRIPTION("Broadcom PHY driver" MODULE_AUTHOR("Maciej W. Rozycki"); MODULE_LICENSE("GPL"); -+static int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum) -+{ -+ /* The register must be written to both the Shadow Register Select and -+ * the Shadow Read Register Selector -+ */ -+ phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | -+ regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT); -+ return phy_read(phydev, MII_BCM54XX_AUX_CTL); -+} -+ - static int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) - { - return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); - } - +-static int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) +static int bcm54810_config(struct phy_device *phydev) -+{ + { +- return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); + int rc, val; + + val = bcm_phy_read_exp(phydev, BCM54810_EXP_BROADREACH_LRE_MISC_CTL); @@ -61,12 +48,10 @@ Signed-off-by: Rafał Miłecki + return rc; + + return 0; -+} -+ + } + /* Needs SMDSP clock enabled via bcm54xx_phydsp_config() */ - static int bcm50610_a0_workaround(struct phy_device *phydev) - { -@@ -207,6 +245,12 @@ static int bcm54xx_config_init(struct ph +@@ -207,6 +230,12 @@ static int bcm54xx_config_init(struct ph (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) bcm54xx_adjust_rxrefclk(phydev); @@ -79,7 +64,7 @@ Signed-off-by: Rafał Miłecki bcm54xx_phydsp_config(phydev); return 0; -@@ -304,6 +348,7 @@ static int bcm5482_read_status(struct ph +@@ -304,6 +333,7 @@ static int bcm5482_read_status(struct ph static int bcm5481_config_aneg(struct phy_device *phydev) { @@ -87,7 +72,7 @@ Signed-off-by: Rafał Miłecki int ret; /* Aneg firsly. */ -@@ -334,6 +379,49 @@ static int bcm5481_config_aneg(struct ph +@@ -334,6 +364,49 @@ static int bcm5481_config_aneg(struct ph phy_write(phydev, 0x18, reg); } @@ -137,7 +122,7 @@ Signed-off-by: Rafał Miłecki return ret; } -@@ -488,6 +576,19 @@ static struct phy_driver broadcom_driver +@@ -488,6 +561,19 @@ static struct phy_driver broadcom_driver .config_intr = bcm_phy_config_intr, .driver = { .owner = THIS_MODULE }, }, { @@ -157,7 +142,7 @@ Signed-off-by: Rafał Miłecki .phy_id = PHY_ID_BCM54616S, .phy_id_mask = 0xfffffff0, .name = "Broadcom BCM54616S", -@@ -527,6 +628,19 @@ static struct phy_driver broadcom_driver +@@ -527,6 +613,19 @@ static struct phy_driver broadcom_driver .config_intr = bcm_phy_config_intr, .driver = { .owner = THIS_MODULE }, }, { @@ -177,7 +162,7 @@ Signed-off-by: Rafał Miłecki .phy_id = PHY_ID_BCM5482, .phy_id_mask = 0xfffffff0, .name = "Broadcom BCM5482", -@@ -612,9 +726,11 @@ static struct mdio_device_id __maybe_unu +@@ -612,9 +711,11 @@ static struct mdio_device_id __maybe_unu { PHY_ID_BCM5411, 0xfffffff0 }, { PHY_ID_BCM5421, 0xfffffff0 }, { PHY_ID_BCM5461, 0xfffffff0 }, @@ -253,3 +238,41 @@ Signed-off-by: Rafał Miłecki config BCM_CYGNUS_PHY tristate "Drivers for Broadcom Cygnus SoC internal PHY" +--- a/drivers/net/phy/bcm-phy-lib.c ++++ b/drivers/net/phy/bcm-phy-lib.c +@@ -50,6 +50,23 @@ int bcm_phy_read_exp(struct phy_device * + } + EXPORT_SYMBOL_GPL(bcm_phy_read_exp); + ++int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum) ++{ ++ /* The register must be written to both the Shadow Register Select and ++ * the Shadow Read Register Selector ++ */ ++ phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | ++ regnum << MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT); ++ return phy_read(phydev, MII_BCM54XX_AUX_CTL); ++} ++EXPORT_SYMBOL_GPL(bcm54xx_auxctl_read); ++ ++int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val) ++{ ++ return phy_write(phydev, MII_BCM54XX_AUX_CTL, regnum | val); ++} ++EXPORT_SYMBOL(bcm54xx_auxctl_write); ++ + int bcm_phy_write_misc(struct phy_device *phydev, + u16 reg, u16 chl, u16 val) + { +--- a/drivers/net/phy/bcm-phy-lib.h ++++ b/drivers/net/phy/bcm-phy-lib.h +@@ -19,6 +19,9 @@ + int bcm_phy_write_exp(struct phy_device *phydev, u16 reg, u16 val); + int bcm_phy_read_exp(struct phy_device *phydev, u16 reg); + ++int bcm54xx_auxctl_write(struct phy_device *phydev, u16 regnum, u16 val); ++int bcm54xx_auxctl_read(struct phy_device *phydev, u16 regnum); ++ + int bcm_phy_write_misc(struct phy_device *phydev, + u16 reg, u16 chl, u16 value); + int bcm_phy_read_misc(struct phy_device *phydev, diff --git a/target/linux/generic/patches-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch b/target/linux/generic/patches-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch new file mode 100644 index 0000000000..87d6c50069 --- /dev/null +++ b/target/linux/generic/patches-4.4/078-0004-net-phy-pick-Broadcom-drivers-updates-from-net-next-.patch @@ -0,0 +1,76 @@ +--- a/drivers/net/phy/broadcom.c ++++ b/drivers/net/phy/broadcom.c +@@ -30,6 +30,22 @@ MODULE_DESCRIPTION("Broadcom PHY driver" + MODULE_AUTHOR("Maciej W. Rozycki"); + MODULE_LICENSE("GPL"); + ++static int bcm54210e_config_init(struct phy_device *phydev) ++{ ++ int val; ++ ++ val = bcm54xx_auxctl_read(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC); ++ val &= ~MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN; ++ val |= MII_BCM54XX_AUXCTL_MISC_WREN; ++ bcm54xx_auxctl_write(phydev, MII_BCM54XX_AUXCTL_SHDWSEL_MISC, val); ++ ++ val = bcm_phy_read_shadow(phydev, BCM54810_SHD_CLK_CTL); ++ val &= ~BCM54810_SHD_CLK_CTL_GTXCLK_EN; ++ bcm_phy_write_shadow(phydev, BCM54810_SHD_CLK_CTL, val); ++ ++ return 0; ++} ++ + static int bcm54810_config(struct phy_device *phydev) + { + int rc, val; +@@ -230,7 +246,11 @@ static int bcm54xx_config_init(struct ph + (phydev->dev_flags & PHY_BRCM_AUTO_PWRDWN_ENABLE)) + bcm54xx_adjust_rxrefclk(phydev); + +- if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) { ++ if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54210E) { ++ err = bcm54210e_config_init(phydev); ++ if (err) ++ return err; ++ } else if (BRCM_PHY_MODEL(phydev) == PHY_ID_BCM54810) { + err = bcm54810_config(phydev); + if (err) + return err; +@@ -548,6 +568,19 @@ static struct phy_driver broadcom_driver + .config_intr = bcm_phy_config_intr, + .driver = { .owner = THIS_MODULE }, + }, { ++ .phy_id = PHY_ID_BCM54210E, ++ .phy_id_mask = 0xfffffff0, ++ .name = "Broadcom BCM54210E", ++ .features = PHY_GBIT_FEATURES | ++ SUPPORTED_Pause | SUPPORTED_Asym_Pause, ++ .flags = PHY_HAS_MAGICANEG | PHY_HAS_INTERRUPT, ++ .config_init = bcm54xx_config_init, ++ .config_aneg = genphy_config_aneg, ++ .read_status = genphy_read_status, ++ .ack_interrupt = bcm_phy_ack_intr, ++ .config_intr = bcm_phy_config_intr, ++ .driver = { .owner = THIS_MODULE }, ++}, { + .phy_id = PHY_ID_BCM5461, + .phy_id_mask = 0xfffffff0, + .name = "Broadcom BCM5461", +@@ -710,6 +743,7 @@ module_phy_driver(broadcom_drivers); + static struct mdio_device_id __maybe_unused broadcom_tbl[] = { + { PHY_ID_BCM5411, 0xfffffff0 }, + { PHY_ID_BCM5421, 0xfffffff0 }, ++ { PHY_ID_BCM54210E, 0xfffffff0 }, + { PHY_ID_BCM5461, 0xfffffff0 }, + { PHY_ID_BCM54612E, 0xfffffff0 }, + { PHY_ID_BCM54616S, 0xfffffff0 }, +--- a/include/linux/brcmphy.h ++++ b/include/linux/brcmphy.h +@@ -17,6 +17,7 @@ + #define PHY_ID_BCM5482 0x0143bcb0 + #define PHY_ID_BCM5411 0x00206070 + #define PHY_ID_BCM5421 0x002060e0 ++#define PHY_ID_BCM54210E 0x600d84a0 + #define PHY_ID_BCM5464 0x002060b0 + #define PHY_ID_BCM5461 0x002060c0 + #define PHY_ID_BCM54612E 0x03625e60