From: Piotr Dymacz Date: Sun, 28 Mar 2021 14:56:18 +0000 (+0200) Subject: imx6: rename target to 'imx' X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=d1c66eacabe11f8088f2d49e94b80dfa8a0f94f7;p=openwrt%2Fstaging%2Fwigyori.git imx6: rename target to 'imx' This is first step in migrating to a generic i.MX target which in the next steps will also get divided into arch-specific subtargets. In the result, this will make it possible to support, within a single target, also other modern NXP i.MX families, like the i.MX 7, i.MX 8 or recently introduced i.MX 9. Signed-off-by: Piotr Dymacz --- diff --git a/target/linux/imx/Makefile b/target/linux/imx/Makefile new file mode 100644 index 0000000000..6f00cba992 --- /dev/null +++ b/target/linux/imx/Makefile @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2013-2014 OpenWrt.org + +include $(TOPDIR)/rules.mk + +ARCH:=arm +BOARD:=imx +BOARDNAME:=NXP i.MX +FEATURES:=audio display fpu gpio pcie rtc usb usbgadget squashfs targz nand ubifs boot-part rootfs-part +CPU_TYPE:=cortex-a9 +CPU_SUBTYPE:=neon + +KERNEL_PATCHVER:=5.4 +KERNEL_TESTING_PATCHVER:=5.10 + +include $(INCLUDE_DIR)/target.mk + +KERNELNAME:=zImage dtbs + +DEFAULT_PACKAGES += uboot-envtools mkf2fs e2fsprogs blkid + +$(eval $(call BuildTarget)) diff --git a/target/linux/imx/base-files/etc/board.d/02_network b/target/linux/imx/base-files/etc/board.d/02_network new file mode 100644 index 0000000000..1668b86008 --- /dev/null +++ b/target/linux/imx/base-files/etc/board.d/02_network @@ -0,0 +1,46 @@ +# +# Copyright (C) 2013-2015 OpenWrt.org +# + +. /lib/functions/uci-defaults.sh + +board=$(board_name) + +board_config_update + +case "$board" in +gw,imx6dl-gw51xx |\ +gw,imx6dl-gw52xx |\ +gw,imx6dl-gw5904 |\ +gw,imx6dl-gw5907 |\ +gw,imx6dl-gw5910 |\ +gw,imx6dl-gw5912 |\ +gw,imx6dl-gw5913 |\ +gw,imx6q-gw51xx |\ +gw,imx6q-gw52xx |\ +gw,imx6q-gw5904 |\ +gw,imx6q-gw5907 |\ +gw,imx6q-gw5910 |\ +gw,imx6q-gw5912 |\ +gw,imx6q-gw5913 |\ +solidrun,cubox-i/dl |\ +solidrun,cubox-i/q ) + ucidef_set_interface_lan 'eth0' + ;; +gw,imx6dl-gw53xx |\ +gw,imx6dl-gw54xx |\ +gw,imx6dl-gw552x |\ +gw,imx6q-gw53xx |\ +gw,imx6q-gw5400-a |\ +gw,imx6q-gw54xx |\ +gw,imx6q-gw552x ) + ucidef_set_interfaces_lan_wan 'eth0' 'eth1' + ;; +wand,imx6dl-wandboard ) + ucidef_set_interface_wan 'eth0' + ;; +esac + +board_config_flush + +exit 0 diff --git a/target/linux/imx/base-files/etc/inittab b/target/linux/imx/base-files/etc/inittab new file mode 100644 index 0000000000..b944a93ada --- /dev/null +++ b/target/linux/imx/base-files/etc/inittab @@ -0,0 +1,4 @@ +::sysinit:/etc/init.d/rcS S boot +::shutdown:/etc/init.d/rcS K shutdown +::askconsole:/usr/libexec/login.sh +tty1::askfirst:/usr/libexec/login.sh diff --git a/target/linux/imx/base-files/lib/imx.sh b/target/linux/imx/base-files/lib/imx.sh new file mode 100644 index 0000000000..46d2eeb006 --- /dev/null +++ b/target/linux/imx/base-files/lib/imx.sh @@ -0,0 +1,30 @@ +# +# Copyright (C) 2010-2013 OpenWrt.org +# + +rootpartuuid() { + local cmdline=$(cat /proc/cmdline) + local bootpart=${cmdline##*root=} + bootpart=${bootpart%% *} + local uuid=${bootpart#PARTUUID=} + echo ${uuid%-02} +} + +bootdev_from_uuid() { + blkid | grep "PTUUID=\"$(rootpartuuid)\"" | cut -d : -f1 +} + +bootpart_from_uuid() { + blkid | grep $(rootpartuuid)-01 | cut -d : -f1 +} + +rootpart_from_uuid() { + blkid | grep $(rootpartuuid)-02 | cut -d : -f1 +} + +apalis_mount_boot() { + mkdir -p /boot + [ -f /boot/uImage ] || { + mount -o rw,noatime $(bootpart_from_uuid) /boot > /dev/null + } +} diff --git a/target/linux/imx/base-files/lib/preinit/79_move_config b/target/linux/imx/base-files/lib/preinit/79_move_config new file mode 100644 index 0000000000..6ed59320ac --- /dev/null +++ b/target/linux/imx/base-files/lib/preinit/79_move_config @@ -0,0 +1,21 @@ +. /lib/imx.sh +. /lib/functions.sh +. /lib/upgrade/common.sh + +move_config() { + local board=$(board_name) + + case "$board" in + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + if [ -b $(bootpart_from_uuid) ]; then + apalis_mount_boot + [ -f "/boot/$BACKUP_FILE" ] && mv -f "/boot/$BACKUP_FILE" / + umount /boot + fi + ;; + esac +} + +boot_hook_add preinit_mount_root move_config diff --git a/target/linux/imx/base-files/lib/upgrade/platform.sh b/target/linux/imx/base-files/lib/upgrade/platform.sh new file mode 100755 index 0000000000..e18d59c771 --- /dev/null +++ b/target/linux/imx/base-files/lib/upgrade/platform.sh @@ -0,0 +1,142 @@ +# +# Copyright (C) 2010-2015 OpenWrt.org +# + +. /lib/imx.sh + +RAMFS_COPY_BIN='blkid jffs2reset' + +enable_image_metadata_check() { + case "$(board_name)" in + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + REQUIRE_IMAGE_METADATA=1 + ;; + esac +} +enable_image_metadata_check + +apalis_copy_config() { + apalis_mount_boot + cp -af "$UPGRADE_BACKUP" "/boot/$BACKUP_FILE" + sync + umount /boot +} + +apalis_do_upgrade() { + apalis_mount_boot + get_image "$1" | tar Oxf - sysupgrade-apalis/kernel > /boot/uImage + get_image "$1" | tar Oxf - sysupgrade-apalis/root > $(rootpart_from_uuid) + sync + umount /boot +} + +platform_check_image() { + local board=$(board_name) + + case "$board" in + gw,imx6dl-gw51xx |\ + gw,imx6dl-gw52xx |\ + gw,imx6dl-gw53xx |\ + gw,imx6dl-gw54xx |\ + gw,imx6dl-gw551x |\ + gw,imx6dl-gw552x |\ + gw,imx6dl-gw553x |\ + gw,imx6dl-gw5904 |\ + gw,imx6dl-gw5907 |\ + gw,imx6dl-gw5910 |\ + gw,imx6dl-gw5912 |\ + gw,imx6dl-gw5913 |\ + gw,imx6q-gw51xx |\ + gw,imx6q-gw52xx |\ + gw,imx6q-gw53xx |\ + gw,imx6q-gw5400-a |\ + gw,imx6q-gw54xx |\ + gw,imx6q-gw551x |\ + gw,imx6q-gw552x |\ + gw,imx6q-gw553x |\ + gw,imx6q-gw5904 |\ + gw,imx6q-gw5907 |\ + gw,imx6q-gw5910 |\ + gw,imx6q-gw5912 |\ + gw,imx6q-gw5913 ) + nand_do_platform_check $board $1 + return $?; + ;; + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + return 0 + ;; + esac + + echo "Sysupgrade is not yet supported on $board." + return 1 +} + +platform_do_upgrade() { + local board=$(board_name) + + case "$board" in + gw,imx6dl-gw51xx |\ + gw,imx6dl-gw52xx |\ + gw,imx6dl-gw53xx |\ + gw,imx6dl-gw54xx |\ + gw,imx6dl-gw551x |\ + gw,imx6dl-gw552x |\ + gw,imx6dl-gw553x |\ + gw,imx6dl-gw5904 |\ + gw,imx6dl-gw5907 |\ + gw,imx6dl-gw5910 |\ + gw,imx6dl-gw5912 |\ + gw,imx6dl-gw5913 |\ + gw,imx6q-gw51xx |\ + gw,imx6q-gw52xx |\ + gw,imx6q-gw53xx |\ + gw,imx6q-gw5400-a |\ + gw,imx6q-gw54xx |\ + gw,imx6q-gw551x |\ + gw,imx6q-gw552x |\ + gw,imx6q-gw553x |\ + gw,imx6q-gw5904 |\ + gw,imx6q-gw5907 |\ + gw,imx6q-gw5910 |\ + gw,imx6q-gw5912 |\ + gw,imx6q-gw5913 ) + nand_do_upgrade "$1" + ;; + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + apalis_do_upgrade "$1" + ;; + esac +} + +platform_copy_config() { + local board=$(board_name) + + case "$board" in + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + apalis_copy_config + ;; + esac +} + +platform_pre_upgrade() { + local board=$(board_name) + + case "$board" in + toradex,apalis_imx6q-eval |\ + toradex,apalis_imx6q-ixora |\ + toradex,apalis_imx6q-ixora-v1.1 ) + [ -z "$UPGRADE_BACKUP" ] && { + jffs2reset -y + umount /overlay + } + ;; + esac +} diff --git a/target/linux/imx/config-5.10 b/target/linux/imx/config-5.10 new file mode 100644 index 0000000000..73ce01ebdd --- /dev/null +++ b/target/linux/imx/config-5.10 @@ -0,0 +1,483 @@ +CONFIG_AHCI_IMX=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MXC=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_CRYPTO=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_ERRATA_814220=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +# CONFIG_ARM_IMX_CPUFREQ_DT is not set +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ASN1=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_CACHE_L2X0=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_IMX_GPT=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_IMX6Q=y +CONFIG_CLK_IMX6SL=y +CONFIG_CLK_IMX6SX=y +# CONFIG_CLK_IMX8MM is not set +# CONFIG_CLK_IMX8MN is not set +# CONFIG_CLK_IMX8MP is not set +# CONFIG_CLK_IMX8MQ is not set +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMDLINE="pci=nomsi" +CONFIG_CMDLINE_EXTEND=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_AES_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CHACHA20=y +CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32_ARM_CE=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set +# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y +CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 +CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_ENGINE=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MISC=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DTC=y +CONFIG_E1000E=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ENCRYPTED_KEYS=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXTCON=y +CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" +CONFIG_EXTRA_FIRMWARE_DIR="firmware" +CONFIG_F2FS_FS=y +CONFIG_FEC=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FSL_GUTS=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_ENCRYPTION_ALGS=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +# CONFIG_GIANFAR is not set +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MXC=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_IMX_RNGC=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_IMX=y +# CONFIG_I2C_IMX_LPI2C is not set +CONFIG_IMX2_WDT=y +# CONFIG_IMX7ULP_WDT is not set +# CONFIG_IMX8MM_THERMAL is not set +CONFIG_IMX_DMA=y +# CONFIG_IMX_GPCV2_PM_DOMAINS is not set +CONFIG_IMX_INTMUX=y +CONFIG_IMX_IRQSTEER=y +CONFIG_IMX_SDMA=y +CONFIG_IMX_THERMAL=y +# CONFIG_IMX_WEIM is not set +# CONFIG_INITRAMFS_FORCE is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IO_URING=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +# CONFIG_JFFS2_FS is not set +CONFIG_KEYS=y +CONFIG_LIBFDT=y +CONFIG_LLD_VERSION=0 +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MICREL_PHY=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_MXC is not set +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MPILIB=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +# CONFIG_MX3_IPU is not set +CONFIG_MXC_CLK=y +CONFIG_MXS_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +# CONFIG_NET_DSA_MSCC_FELIX is not set +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +# CONFIG_NVMEM_IMX_IIM is not set +CONFIG_NVMEM_IMX_OCOTP=y +# CONFIG_NVMEM_SNVS_LPGPR is not set +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_PME=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_IMX6=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX=y +CONFIG_PINCTRL_IMX6Q=y +CONFIG_PINCTRL_IMX6SL=y +CONFIG_PINCTRL_IMX6SX=y +# CONFIG_PINCTRL_IMX8MM is not set +# CONFIG_PINCTRL_IMX8MN is not set +# CONFIG_PINCTRL_IMX8MP is not set +# CONFIG_PINCTRL_IMX8MQ is not set +CONFIG_PL310_ERRATA_769419=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_OPP=y +CONFIG_PPS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +# CONFIG_PWM_IMX1 is not set +# CONFIG_PWM_IMX27 is not set +# CONFIG_PWM_IMX_TPM is not set +CONFIG_PWM_SYSFS=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RD_LZO=y +CONFIG_RD_XZ=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_LTC3676=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_CMOS is not set +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_DS1672=y +# CONFIG_RTC_DRV_IMXDI is not set +# CONFIG_RTC_DRV_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_HOST=y +CONFIG_SCSI=y +CONFIG_SENSORS_AD7418=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_IMX_EARLYCON=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_IMX50 is not set +# CONFIG_SOC_IMX51 is not set +# CONFIG_SOC_IMX53 is not set +CONFIG_SOC_IMX6=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +# CONFIG_SOC_IMX6SLL is not set +CONFIG_SOC_IMX6SX=y +# CONFIG_SOC_IMX6UL is not set +# CONFIG_SOC_IMX7D is not set +# CONFIG_SOC_IMX7ULP is not set +# CONFIG_SOC_IMX8M is not set +# CONFIG_SOC_LS1021A is not set +# CONFIG_SOC_VF610 is not set +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_FSL_LPSPI is not set +# CONFIG_SPI_FSL_QUADSPI is not set +CONFIG_SPI_IMX=y +CONFIG_SPI_MASTER=y +CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y +CONFIG_SRCU=y +CONFIG_STMP_DEVICE=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_OF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +# CONFIG_UCLAMP_TASK is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_EHCI_MXC is not set +CONFIG_USB_GADGET=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_OTG=y +CONFIG_USB_PHY=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_3G is not set +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx/config-5.4 b/target/linux/imx/config-5.4 new file mode 100644 index 0000000000..6f5142b012 --- /dev/null +++ b/target/linux/imx/config-5.4 @@ -0,0 +1,468 @@ +CONFIG_AHCI_IMX=y +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_MXC=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_CRYPTO=y +CONFIG_ARM_ERRATA_754322=y +CONFIG_ARM_ERRATA_764369=y +CONFIG_ARM_ERRATA_775420=y +CONFIG_ARM_ERRATA_814220=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_IMX6Q_CPUFREQ=y +# CONFIG_ARM_IMX_CPUFREQ_DT is not set +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ASN1=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_CACHE_L2X0=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLKSRC_IMX_GPT=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CLZ_TAB=y +CONFIG_CMDLINE="pci=nomsi" +CONFIG_CMDLINE_EXTEND=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AES_ARM=y +CONFIG_CRYPTO_AES_ARM_BS=y +CONFIG_CRYPTO_AKCIPHER=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y +CONFIG_CRYPTO_AUTHENC=y +CONFIG_CRYPTO_CBC=y +CONFIG_CRYPTO_CHACHA20=y +CONFIG_CRYPTO_CHACHA20_NEON=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32_ARM_CE=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_CTR=y +CONFIG_CRYPTO_CTS=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_DEV_FSL_CAAM=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y +CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y +# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set +# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set +CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y +CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y +CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 +CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECB=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_RSA=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM=y +CONFIG_CRYPTO_SHA1_ARM_NEON=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA512_ARM=y +CONFIG_CRYPTO_SIMD=y +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MISC=y +CONFIG_DECOMPRESS_BZIP2=y +CONFIG_DECOMPRESS_GZIP=y +CONFIG_DECOMPRESS_LZO=y +CONFIG_DECOMPRESS_XZ=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DTC=y +CONFIG_E1000E=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ENCRYPTED_KEYS=y +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXT4_FS_SECURITY=y +CONFIG_EXTCON=y +CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" +CONFIG_EXTRA_FIRMWARE_DIR="firmware" +CONFIG_F2FS_FS=y +CONFIG_FEC=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FSL_GUTS=y +CONFIG_FS_ENCRYPTION=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GIANFAR is not set +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_MXC=y +CONFIG_GPIO_PCA953X=y +CONFIG_GPIO_PCA953X_IRQ=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_IMX_RNGC=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_IMX=y +# CONFIG_I2C_IMX_LPI2C is not set +CONFIG_IMX2_WDT=y +# CONFIG_IMX7ULP_WDT is not set +CONFIG_IMX_DMA=y +# CONFIG_IMX_GPCV2_PM_DOMAINS is not set +CONFIG_IMX_IRQSTEER=y +CONFIG_IMX_SDMA=y +CONFIG_IMX_THERMAL=y +# CONFIG_IMX_WEIM is not set +# CONFIG_INITRAMFS_FORCE is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IO_URING=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +# CONFIG_JFFS2_FS is not set +CONFIG_KEYS=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MARVELL_PHY=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MICREL_PHY=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +# CONFIG_MMC_MXC is not set +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_ESDHC_IMX=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_OF_ESDHC=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MPILIB=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +CONFIG_MTD_NAND_GPMI_NAND=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_MUTEX_SPIN_ON_OWNER=y +# CONFIG_MX3_IPU is not set +CONFIG_MXC_CLK=y +CONFIG_MXS_DMA=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_MV88E6XXX=y +CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y +CONFIG_NET_DSA_TAG_DSA=y +CONFIG_NET_DSA_TAG_EDSA=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NR_CPUS=4 +CONFIG_NVMEM=y +# CONFIG_NVMEM_IMX_IIM is not set +CONFIG_NVMEM_IMX_OCOTP=y +# CONFIG_NVMEM_SNVS_LPGPR is not set +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0x80000000 +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_PME=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DOMAINS_GENERIC=y +CONFIG_PCI_IMX6=y +CONFIG_PCI_MSI=y +CONFIG_PCI_MSI_IRQ_DOMAIN=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX=y +CONFIG_PINCTRL_IMX6Q=y +CONFIG_PINCTRL_IMX6SL=y +CONFIG_PINCTRL_IMX6SX=y +CONFIG_PL310_ERRATA_769419=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_OPP=y +CONFIG_PPS=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PWM=y +# CONFIG_PWM_IMX1 is not set +# CONFIG_PWM_IMX27 is not set +# CONFIG_PWM_IMX_TPM is not set +CONFIG_PWM_SYSFS=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +CONFIG_RD_BZIP2=y +CONFIG_RD_GZIP=y +CONFIG_RD_LZO=y +CONFIG_RD_XZ=y +CONFIG_REFCOUNT_FULL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_ANATOP=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_LTC3676=y +CONFIG_REGULATOR_PFUZE100=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +# CONFIG_RTC_DRV_CMOS is not set +CONFIG_RTC_DRV_DS1307=y +CONFIG_RTC_DRV_DS1672=y +# CONFIG_RTC_DRV_IMXDI is not set +# CONFIG_RTC_DRV_MXC is not set +# CONFIG_RTC_DRV_MXC_V2 is not set +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SCSI=y +CONFIG_SENSORS_AD7418=y +# CONFIG_SENSORS_DRIVETEMP is not set +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_IMX=y +CONFIG_SERIAL_IMX_CONSOLE=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SGL_ALLOC=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SOC_BUS=y +# CONFIG_SOC_IMX50 is not set +# CONFIG_SOC_IMX51 is not set +# CONFIG_SOC_IMX53 is not set +CONFIG_SOC_IMX6=y +CONFIG_SOC_IMX6Q=y +CONFIG_SOC_IMX6SL=y +# CONFIG_SOC_IMX6SLL is not set +CONFIG_SOC_IMX6SX=y +# CONFIG_SOC_IMX6UL is not set +# CONFIG_SOC_IMX7D is not set +# CONFIG_SOC_IMX7ULP is not set +# CONFIG_SOC_LS1021A is not set +# CONFIG_SOC_VF610 is not set +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_BITBANG=y +# CONFIG_SPI_FSL_LPSPI is not set +# CONFIG_SPI_FSL_QUADSPI is not set +CONFIG_SPI_IMX=y +CONFIG_SPI_MASTER=y +CONFIG_SRAM=y +CONFIG_SRAM_EXEC=y +CONFIG_SRCU=y +CONFIG_STMP_DEVICE=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_OF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +# CONFIG_UCLAMP_TASK is not set +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_OF=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_HCD_PLATFORM is not set +# CONFIG_USB_EHCI_MXC is not set +CONFIG_USB_GADGET=y +CONFIG_USB_MXS_PHY=y +CONFIG_USB_OTG=y +CONFIG_USB_PHY=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USE_OF=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VMSPLIT_2G=y +# CONFIG_VMSPLIT_3G is not set +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_ARMTHUMB=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx/files/firmware/imx/sdma/sdma-imx6q.bin b/target/linux/imx/files/firmware/imx/sdma/sdma-imx6q.bin new file mode 100644 index 0000000000..4d0593cec7 Binary files /dev/null and b/target/linux/imx/files/firmware/imx/sdma/sdma-imx6q.bin differ diff --git a/target/linux/imx/image/Makefile b/target/linux/imx/image/Makefile new file mode 100644 index 0000000000..5f8e5f1c04 --- /dev/null +++ b/target/linux/imx/image/Makefile @@ -0,0 +1,227 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2013 OpenWrt.org + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +################################################# +# Images +################################################# + +DEVICE_VARS += MKUBIFS_OPTS UBOOT + +define Build/boot-overlay + rm -rf $@.boot + mkdir -p $@.boot + + $(CP) $@ $@.boot/$(IMG_PREFIX)-uImage + ln -sf $(IMG_PREFIX)-uImage $@.boot/uImage + + $(foreach dts,$(DEVICE_DTS), \ + $(CP) \ + $(DTS_DIR)/$(dts).dtb \ + $@.boot/$(IMG_PREFIX)-$(dts).dtb; \ + ln -sf \ + $(IMG_PREFIX)-$(dts).dtb \ + $@.boot/$(dts).dtb; \ + ) + mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ + -n '$(DEVICE_ID) OpenWrt bootscript' \ + -d ./bootscript-$(DEVICE_NAME) \ + $@.boot/6x_bootscript-$(DEVICE_NAME) + + $(STAGING_DIR_HOST)/bin/mkfs.ubifs \ + --space-fixup --compr=zlib --squash-uids \ + $(MKUBIFS_OPTS) -c 16248 \ + -o $@.boot.ubifs -d $@.boot + + $(TAR) -C $@.boot -cf $@.boot.tar . +endef + +define Build/bootfs.tar.gz + rm -rf $@.boot + mkdir -p $@.boot + + $(TAR) -C $@.boot -xf $(IMAGE_KERNEL).boot.tar + $(TAR) -C $@.boot \ + --numeric-owner --owner=0 --group=0 --transform "s,./,./boot/," \ + -czvf $@ . +endef + +define Build/recovery-scr + mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ + -n '$(DEVICE_ID) OpenWrt recovery bootscript' \ + -d ./recovery-$(DEVICE_NAME) $@ +endef + +define Build/imx6-combined-image-prepare + rm -rf $@.boot + mkdir -p $@.boot +endef + +define Build/imx6-combined-image-clean + rm -rf $@.boot $@.fs +endef + +define Build/imx6-combined-image + $(CP) $(IMAGE_KERNEL) $@.boot/uImage + + $(foreach dts,$(DEVICE_DTS), \ + $(CP) \ + $(DTS_DIR)/$(dts).dtb \ + $@.boot/; + ) + + mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ + -n '$(DEVICE_ID) OpenWrt bootscript' \ + -d bootscript-$(DEVICE_NAME) \ + $@.boot/boot.scr + + cp $@ $@.fs + + $(SCRIPT_DIR)/gen_image_generic.sh $@ \ + $(CONFIG_TARGET_KERNEL_PARTSIZE) \ + $@.boot \ + $(CONFIG_TARGET_ROOTFS_PARTSIZE) \ + $@.fs \ + 1024 +endef + +define Build/imx6-sdcard + $(Build/imx6-combined-image-prepare) + + $(CP) $(STAGING_DIR_IMAGE)/$(UBOOT)-u-boot.img $@.boot/u-boot.img + $(Build/imx6-combined-image) + dd if=$(STAGING_DIR_IMAGE)/$(UBOOT)-SPL of=$@ bs=1024 seek=1 conv=notrunc + + $(Build/imx6-combined-image-clean) +endef + +define Build/apalis-emmc + $(Build/imx6-combined-image-prepare) + $(Build/imx6-combined-image) + $(Build/imx6-combined-image-clean) +endef + +################################################# +# Devices +################################################# + +KERNEL_LOADADDR=0x10008000 + +define Device/Default + PROFILES := Generic + FILESYSTEMS := squashfs ext4 + KERNEL_INSTALL := 1 + KERNEL_SUFFIX := -uImage + KERNEL_NAME := zImage + KERNEL := kernel-bin | uImage none + IMAGES := +endef + +define Device/gateworks_ventana + DEVICE_VENDOR := Gateworks + DEVICE_MODEL := Ventana family + DEVICE_VARIANT := normal NAND flash + DEVICE_NAME := ventana + DEVICE_DTS:= \ + imx6dl-gw51xx \ + imx6dl-gw52xx \ + imx6dl-gw53xx \ + imx6dl-gw54xx \ + imx6dl-gw551x \ + imx6dl-gw552x \ + imx6dl-gw553x \ + imx6dl-gw5904 \ + imx6dl-gw5907 \ + imx6dl-gw5910 \ + imx6dl-gw5912 \ + imx6dl-gw5913 \ + imx6q-gw51xx \ + imx6q-gw52xx \ + imx6q-gw53xx \ + imx6q-gw54xx \ + imx6q-gw5400-a \ + imx6q-gw551x \ + imx6q-gw552x \ + imx6q-gw553x \ + imx6q-gw5904 \ + imx6q-gw5907 \ + imx6q-gw5910 \ + imx6q-gw5912 \ + imx6q-gw5913 + DEVICE_PACKAGES := kmod-sky2 kmod-sound-core kmod-sound-soc-imx \ + kmod-sound-soc-imx-sgtl5000 kmod-can kmod-can-flexcan kmod-can-raw \ + kmod-hwmon-gsc kmod-leds-gpio kmod-pps-gpio kobs-ng + KERNEL += | boot-overlay + IMAGES := nand.ubi bootfs.tar.gz dtb + IMAGE/nand.ubi := append-ubi + IMAGE/bootfs.tar.gz := bootfs.tar.gz + IMAGE/dtb := install-dtb + UBINIZE_PARTS = boot=$$(KDIR_KERNEL_IMAGE).boot.ubifs=15 + PAGESIZE := 2048 + BLOCKSIZE := 128k + MKUBIFS_OPTS := -m $$(PAGESIZE) -e 124KiB +endef +TARGET_DEVICES += gateworks_ventana + +define Device/gateworks_ventana-large + $(Device/gateworks_ventana) + DEVICE_VARIANT := large NAND flash + IMAGES := nand.ubi + PAGESIZE := 4096 + BLOCKSIZE := 256k + MKUBIFS_OPTS := -m $$(PAGESIZE) -e 248KiB +endef +TARGET_DEVICES += gateworks_ventana-large + +define Device/solidrun_cubox-i + DEVICE_VENDOR := SolidRun + DEVICE_MODEL := CuBox-i + DEVICE_DTS := \ + imx6q-cubox-i \ + imx6dl-cubox-i \ + imx6q-hummingboard \ + imx6dl-hummingboard + DEVICE_PACKAGES := kmod-drm-imx kmod-drm-imx-hdmi kmod-usb-hid + UBOOT := mx6cuboxi + KERNEL := kernel-bin + KERNEL_SUFFIX := -zImage + FILESYSTEMS := squashfs + IMAGES := combined.bin dtb + IMAGE/combined.bin := append-rootfs | pad-extra 128k | imx6-sdcard + IMAGE/dtb := install-dtb +endef +TARGET_DEVICES += solidrun_cubox-i + +define Device/toradex_apalis + DEVICE_VENDOR := Toradex + DEVICE_MODEL := Apalis family + SUPPORTED_DEVICES := apalis,ixora apalis,eval + DEVICE_DTS := \ + imx6q-apalis-eval \ + imx6q-apalis-ixora \ + imx6q-apalis-ixora-v1.1 + DEVICE_PACKAGES := \ + kmod-can kmod-can-flexcan kmod-can-raw \ + kmod-leds-gpio kmod-gpio-button-hotplug \ + kmod-pps-gpio kmod-rtc-ds1307 + FILESYSTEMS := squashfs + IMAGES := combined.bin sysupgrade.bin + DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2) + IMAGE/combined.bin := append-rootfs | pad-extra 128k | apalis-emmc + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + ARTIFACTS := recovery.scr + ARTIFACT/recovery.scr := recovery-scr +endef +TARGET_DEVICES += toradex_apalis + +define Device/wandboard_dual + DEVICE_VENDOR := Wandboard + DEVICE_MODEL := Dual + DEVICE_DTS := imx6dl-wandboard +endef +TARGET_DEVICES += wandboard_dual + +$(eval $(call BuildImage)) diff --git a/target/linux/imx/image/bootscript-solidrun_cubox-i b/target/linux/imx/image/bootscript-solidrun_cubox-i new file mode 100644 index 0000000000..2ed48ab941 --- /dev/null +++ b/target/linux/imx/image/bootscript-solidrun_cubox-i @@ -0,0 +1,31 @@ +echo "CuBox OpenWrt Boot script" + +# Set console variable for both UART and HDMI +setenv console console=ttymxc0,115200 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 + +# Find correct dtb +if test ${board_rev} = MX6DL; then + setenv fdt_soc_type imx6dl; +elif test ${board_rev} = MX6Q; then + setenv fdt_soc_type imx6q; +fi +if test ${board_name} = CUBOXI; then + setenv fdt_name ${fdt_soc_type}-cubox-i.dtb; +elif test ${board_name} = HUMMINGBOARD; then + setenv fdt_name ${fdt_soc_type}-hummingboard.dtb; +fi + +# Set correct devtype and partition +if test ${devtype} != mmc; then setenv devtype mmc; fi +if mmc dev 0; then + setenv mmcdev 0 +elif mmc dev 1; then + setenv mmcdev 1 +fi + +# Boot from the SD card is supported at the moment +setenv bootargs "${console} root=/dev/mmcblk1p2 rw rootwait" +mmc dev ${mmcdev} +load ${devtype} ${mmcdev}:${devplist} ${kernel_addr_r} /uImage +load ${devtype} ${mmcdev}:${devplist} ${fdt_addr_r} /${fdt_name} +bootz ${kernel_addr_r} - ${fdt_addr_r} diff --git a/target/linux/imx/image/bootscript-toradex_apalis b/target/linux/imx/image/bootscript-toradex_apalis new file mode 100644 index 0000000000..3a3a6dadb1 --- /dev/null +++ b/target/linux/imx/image/bootscript-toradex_apalis @@ -0,0 +1,21 @@ +echo "Toradex Apalis OpenWrt Boot script v1.1" + +run emmcfinduuid + +setenv nextcon 0 +setenv boot_file uImage +setenv fdt_file imx6q-apalis-ixora.dtb +setenv root root=PARTUUID=${uuid} rootfstype=squashfs rootwait +setenv bootargs earlyprintk console=${console},${baudrate}n8 ${root} +setenv fsload ext4load mmc ${emmcdev}:${emmcbootpart} + +if ${fsload} ${kernel_addr_r} ${boot_file}; then + if ${fsload} ${fdt_addr_r} ${fdt_file}; then + test -n "$fdt_fixup" && run fdt_fixup + bootm ${kernel_addr_r} - ${fdt_addr_r} + else + echo "Error loading device-tree" + fi +else + echo "Error loading kernel image" +fi diff --git a/target/linux/imx/image/bootscript-ventana b/target/linux/imx/image/bootscript-ventana new file mode 100644 index 0000000000..734f74a30c --- /dev/null +++ b/target/linux/imx/image/bootscript-ventana @@ -0,0 +1,85 @@ +echo "Gateworks Ventana OpenWrt Boot script v1.02" + +# set some defaults +# set some defaults +test -n "$fs" || fs=ext2 +test -n "$disk" || disk=0 +setenv nextcon 0 +setenv bootargs console=${console},${baudrate} +setenv loadaddr 10800000 +setenv fdt_addr 18000000 + +# detect dtype by looking for kernel on media the bootloader +# has mounted (in order of preference: usb/mmc/sata) +# +# This assumes the bootloader has already started the respective subsystem +# or mounted the filesystem if appropriate to get to this bootscript +# +# To Speed up boot set dtype manually +if test -n "$dtype" ; then + echo "Using dtype from env: $dtype" +else + echo "Detecting boot device (dtype)..." + if ${fs}load usb ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then + dtype=usb + elif ${fs}load mmc ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then + dtype=mmc + elif ${fs}load sata ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then + dtype=sata + elif ubifsload ${loadaddr} ${bootdir}/uImage ; then + dtype=nand + fi + echo "detected dtype:$dtype" +fi + +echo "Booting from ${dtype}..." +if itest.s "x${dtype}" == "xnand" ; then + # fix partition name + # OpenWrt kernel bug prevents partition name of 'rootfs' from booting + # instead name the partition ubi which is what is looked for by + # procd sysupgrade + mtdparts del rootfs && mtdparts add nand0 - ubi + echo "mtdparts:${mtdparts}" + setenv fsload ubifsload + setenv root "ubi0:ubi ubi.mtd=2 rootfstype=squashfs,ubifs" +else + setenv fsload "${fs}load ${dtype} ${disk}:1" + part uuid ${dtype} ${disk}:1 uuid + if test -z "${uuid}"; then + # fallback to bootdev + if test -n "$bootdev" ; then + echo "Using bootdev from env: $bootdev" + else + if itest.s "x${dtype}" == "xmmc" ; then + bootdev=mmcblk0p1 + else + bootdev=sda1 + fi + fi + setenv root "root=/dev/${bootdev}" + else + setenv root "root=PARTUUID=${uuid}" + fi + setenv root "$root rootfstype=${fs} rootwait rw" +fi + +setenv bootargs "${bootargs}" "${root}" "${video}" "${extra}" +if ${fsload} ${loadaddr} ${bootdir}/uImage; then + if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then + echo Loaded DTB from ${bootdir}/${fdt_file} + test -n "$fixfdt" && run fixfdt + bootm ${loadaddr} - ${fdt_addr} + elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then + echo Loaded DTB from ${bootdir}/${fdt_file1} + test -n "$fixfdt" && run fixfdt + bootm ${loadaddr} - ${fdt_addr} + elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then + echo Loaded DTB from ${bootdir}/${fdt_file2} + test -n "$fixfdt" && run fixfdt + bootm ${loadaddr} - ${fdt_addr} + else + echo "Error loading device-tree" + fi +else + echo "Error loading kernel image" +fi diff --git a/target/linux/imx/image/recovery-toradex_apalis b/target/linux/imx/image/recovery-toradex_apalis new file mode 100644 index 0000000000..d75b954345 --- /dev/null +++ b/target/linux/imx/image/recovery-toradex_apalis @@ -0,0 +1,15 @@ +# flash u-boot-with-spl.imx +# using fixed size of 1M for U-Boot + SPL +mmc dev 0 1 +mmc write 0x12100000 0x2 0x800 + +# flash openwrt-imx6-apalis-squashfs.combined.bin +setenv set_blkcnt 'setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200' +run set_blkcnt +mmc dev 0 0 +mmc write 0x12500000 0 ${blkcnt} + +env default -f -a +saveenv + +reset diff --git a/target/linux/imx/patches-5.10/100-bootargs.patch b/target/linux/imx/patches-5.10/100-bootargs.patch new file mode 100644 index 0000000000..cf63a3bdb1 --- /dev/null +++ b/target/linux/imx/patches-5.10/100-bootargs.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/imx6dl-wandboard.dts ++++ b/arch/arm/boot/dts/imx6dl-wandboard.dts +@@ -16,4 +16,8 @@ + device_type = "memory"; + reg = <0x10000000 0x40000000>; + }; ++ ++ chosen { ++ bootargs = "console=ttymxc0,115200"; ++ }; + }; diff --git a/target/linux/imx/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch b/target/linux/imx/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch new file mode 100644 index 0000000000..e14dc484b0 --- /dev/null +++ b/target/linux/imx/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch @@ -0,0 +1,96 @@ +From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Petr=20=C5=A0tetiar?= +Date: Tue, 3 Mar 2020 15:14:40 +0100 +Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Petr Å tetiar +--- + arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------ + arch/arm/boot/dts/imx6q-apalis-ixora.dts | 12 ++++++++---- + 2 files changed, 18 insertions(+), 10 deletions(-) + +--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +@@ -25,6 +25,10 @@ + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; ++ led-boot = &led_boot; ++ led-failsafe = &led_failsafe; ++ led-running = &led_running; ++ led-upgrade = &led_upgrade; + }; + + chosen { +@@ -92,22 +96,22 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + +- led4-green { ++ led_running: led4-green { + label = "LED_4_GREEN"; +- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + }; + +- led4-red { ++ led_upgrade: led4-red { + label = "LED_4_RED"; +- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + }; + +- led5-green { ++ led_boot: led5-green { + label = "LED_5_GREEN"; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + }; + +- led5-red { ++ led_failsafe: led5-red { + label = "LED_5_RED"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + }; +--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts +@@ -24,6 +24,10 @@ + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; ++ led-boot = &led_boot; ++ led-failsafe = &led_failsafe; ++ led-running = &led_running; ++ led-upgrade = &led_upgrade; + }; + + chosen { +@@ -91,22 +95,22 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + +- led4-green { ++ led_running: led4-green { + label = "LED_4_GREEN"; + gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + }; + +- led4-red { ++ led_upgrade: led4-red { + label = "LED_4_RED"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + }; + +- led5-green { ++ led_boot: led5-green { + label = "LED_5_GREEN"; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + }; + +- led5-red { ++ led_failsafe: led5-red { + label = "LED_5_RED"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + }; diff --git a/target/linux/imx/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch b/target/linux/imx/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch new file mode 100644 index 0000000000..8f07f0b1a5 --- /dev/null +++ b/target/linux/imx/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch @@ -0,0 +1,86 @@ +From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Petr=20=C5=A0tetiar?= +Date: Tue, 3 Mar 2020 15:15:57 +0100 +Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Petr Å tetiar +--- + arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++- + arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 ++++++++++++++- + 2 files changed, 28 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +@@ -38,7 +38,7 @@ + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpio_keys>; ++ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; + + wakeup { + label = "Wake-Up"; +@@ -47,6 +47,13 @@ + debounce-interval = <10>; + wakeup-source; + }; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <10>; ++ }; + }; + + lcd_display: disp0 { +@@ -275,4 +282,10 @@ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; ++ ++ pinctrl_switch3_ixora: switch3ixora { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 ++ >; ++ }; + }; +--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts +@@ -37,7 +37,7 @@ + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpio_keys>; ++ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; + + wakeup { + label = "Wake-Up"; +@@ -46,6 +46,13 @@ + debounce-interval = <10>; + wakeup-source; + }; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <10>; ++ }; + }; + + lcd_display: disp0 { +@@ -276,4 +283,10 @@ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; ++ ++ pinctrl_switch3_ixora: switch3ixora { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 ++ >; ++ }; + }; diff --git a/target/linux/imx/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch b/target/linux/imx/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch new file mode 100644 index 0000000000..e830897704 --- /dev/null +++ b/target/linux/imx/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch @@ -0,0 +1,481 @@ +From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001 +From: Robert Jones +Date: Wed, 8 Jan 2020 07:44:21 -0800 +Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support + +The Gateworks GW5907 is an IMX6 SoC based single board computer with: + - IMX6Q or IMX6DL + - 32bit DDR3 DRAM + - FEC GbE Phy + - bi-color front-panel LED + - 256MB NAND boot device + - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) + - Digital IO expander (pca9555) + - Joystick 12bit adc (ads1015) + +Signed-off-by: Robert Jones +Reviewed-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/Makefile | 2 + + arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++ + arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++ + arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++ + 4 files changed, 429 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts + create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts + create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -418,6 +418,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6dl-gw560x.dtb \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ ++ imx6dl-gw5907.dtb \ + imx6dl-hummingboard.dtb \ + imx6dl-hummingboard-emmc-som-v15.dtb \ + imx6dl-hummingboard-som-v15.dtb \ +@@ -489,6 +490,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6q-gw560x.dtb \ + imx6q-gw5903.dtb \ + imx6q-gw5904.dtb \ ++ imx6q-gw5907.dtb \ + imx6q-h100.dtb \ + imx6q-hummingboard.dtb \ + imx6q-hummingboard-emmc-som-v15.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-gw5907.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6dl.dtsi" ++#include "imx6qdl-gw5907.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907"; ++ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-gw5907.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6q.dtsi" ++#include "imx6qdl-gw5907.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907"; ++ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi +@@ -0,0 +1,398 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++#include ++ ++/ { ++ /* these are used by bootloader for disabling nodes */ ++ aliases { ++ led0 = &led0; ++ led1 = &led1; ++ nand = &gpmi; ++ usb0 = &usbh1; ++ usb1 = &usbotg; ++ }; ++ ++ chosen { ++ stdout-path = &uart2; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_leds>; ++ ++ led0: user1 { ++ label = "user1"; ++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ ++ default-state = "on"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led1: user2 { ++ label = "user2"; ++ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ ++ }; ++ }; ++ ++ memory@10000000 { ++ device_type = "memory"; ++ reg = <0x10000000 0x20000000>; ++ }; ++ ++ pps { ++ compatible = "pps-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pps>; ++ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_5p0v: regulator-5p0v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5P0V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ reg_usb_otg_vbus: regulator-usb-otg-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; ++ enable-active-high; ++ }; ++}; ++ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii-id"; ++ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++&hdmi { ++ ddc-i2c-bus = <&i2c3>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ gpio@23 { ++ compatible = "nxp,pca9555"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ eeprom@50 { ++ compatible = "atmel,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@51 { ++ compatible = "atmel,24c02"; ++ reg = <0x51>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@52 { ++ compatible = "atmel,24c02"; ++ reg = <0x52>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@53 { ++ compatible = "atmel,24c02"; ++ reg = <0x53>; ++ pagesize = <16>; ++ }; ++ ++ rtc@68 { ++ compatible = "dallas,ds1672"; ++ reg = <0x68>; ++ }; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ gpio@20 { ++ compatible = "nxp,pca9555"; ++ reg = <0x20>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ adc@48 { ++ compatible = "ti,ads1015"; ++ reg = <0x48>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ channel@4 { ++ reg = <4>; ++ ti,gain = <0>; ++ ti,datarate = <5>; ++ }; ++ ++ channel@5 { ++ reg = <5>; ++ ti,gain = <0>; ++ ti,datarate = <5>; ++ }; ++ ++ channel@6 { ++ reg = <6>; ++ ti,gain = <0>; ++ ti,datarate = <5>; ++ }; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ ++ status = "disabled"; ++}; ++ ++&pwm4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ status = "okay"; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart3>; ++ status = "okay"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart5>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ status = "okay"; ++}; ++ ++&usbh1 { ++ status = "okay"; ++}; ++ ++&wdog1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++}; ++ ++&iomuxc { ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpio_leds: gpioledsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 ++ >; ++ }; ++ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_pps: ppsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm3: pwm3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm4: pwm4grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart3: uart3grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart5: uart5grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 ++ >; ++ }; ++}; diff --git a/target/linux/imx/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch b/target/linux/imx/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch new file mode 100644 index 0000000000..5c52bde70d --- /dev/null +++ b/target/linux/imx/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch @@ -0,0 +1,581 @@ +From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Wed, 8 Jan 2020 07:44:22 -0800 +Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support + +The Gateworks GW5910 is an IMX6 SoC based single board computer with: + - IMX6Q or IMX6DL + - 32bit DDR3 DRAM + - FEC GbE RJ45 front-panel + - 1x miniPCIe socket with PCI Gen2, USB2 + - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM + - 5V to 60V DC input barrel jack + - 3axis accelerometer (lis2de12) + - GPS (ublox ZOE-M8Q) + - bi-color front-panel LED + - 256MB NAND boot device + - microSD socket (with UHS-I support) + - user pushbutton + - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) + - Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6) + - WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6) + - RS232 transceiver (1x UART with flow-control or 2x UART (build option) + - off-board SPI connector (1x chip-select) + +Signed-off-by: Tim Harvey +Signed-off-by: Robert Jones +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/Makefile | 2 + + arch/arm/boot/dts/imx6dl-gw5910.dts | 14 + + arch/arm/boot/dts/imx6q-gw5910.dts | 14 + + arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++ + 4 files changed, 521 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts + create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts + create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -419,6 +419,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6dl-gw5903.dtb \ + imx6dl-gw5904.dtb \ + imx6dl-gw5907.dtb \ ++ imx6dl-gw5910.dtb \ + imx6dl-hummingboard.dtb \ + imx6dl-hummingboard-emmc-som-v15.dtb \ + imx6dl-hummingboard-som-v15.dtb \ +@@ -491,6 +492,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6q-gw5903.dtb \ + imx6q-gw5904.dtb \ + imx6q-gw5907.dtb \ ++ imx6q-gw5910.dtb \ + imx6q-h100.dtb \ + imx6q-hummingboard.dtb \ + imx6q-hummingboard-emmc-som-v15.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-gw5910.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6dl.dtsi" ++#include "imx6qdl-gw5910.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910"; ++ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-gw5910.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6q.dtsi" ++#include "imx6qdl-gw5910.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910"; ++ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +@@ -0,0 +1,489 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++#include ++ ++/ { ++ /* these are used by bootloader for disabling nodes */ ++ aliases { ++ led0 = &led0; ++ led1 = &led1; ++ led2 = &led2; ++ }; ++ ++ chosen { ++ stdout-path = &uart2; ++ }; ++ ++ memory@10000000 { ++ device_type = "memory"; ++ reg = <0x10000000 0x20000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_leds>; ++ ++ led0: user1 { ++ label = "user1"; ++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ ++ default-state = "on"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led1: user2 { ++ label = "user2"; ++ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ ++ }; ++ ++ led2: user3 { ++ label = "user3"; ++ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ ++ }; ++ }; ++ ++ pps { ++ compatible = "pps-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pps>; ++ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_5p0v: regulator-5p0v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5P0V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ reg_wl: regulator-wl { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_reg_wl>; ++ compatible = "regulator-fixed"; ++ regulator-name = "wl"; ++ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_bt: regulator-bt { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_reg_bt>; ++ compatible = "regulator-fixed"; ++ regulator-name = "bt"; ++ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++}; ++ ++ ++&ecspi3 { ++ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi3>; ++ status = "okay"; ++}; ++ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii-id"; ++ status = "okay"; ++}; ++ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ gpio@23 { ++ compatible = "nxp,pca9555"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ eeprom@50 { ++ compatible = "atmel,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@51 { ++ compatible = "atmel,24c02"; ++ reg = <0x51>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@52 { ++ compatible = "atmel,24c02"; ++ reg = <0x52>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@53 { ++ compatible = "atmel,24c02"; ++ reg = <0x53>; ++ pagesize = <16>; ++ }; ++ ++ rtc@68 { ++ compatible = "dallas,ds1672"; ++ reg = <0x68>; ++ }; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ accel@19 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_accel>; ++ compatible = "st,lis2de12"; ++ reg = <0x19>; ++ st,drdy-int-pin = <1>; ++ interrupt-parent = <&gpio7>; ++ interrupts = <13 0>; ++ interrupt-names = "INT1"; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ ++ status = "disabled"; ++}; ++ ++/* off-board RS232 */ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++ status = "okay"; ++}; ++ ++/* serial console */ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ status = "okay"; ++}; ++ ++/* Sterling-LWB Bluetooth */ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ uart-has-rtscts; ++ status = "okay"; ++}; ++ ++/* GPS */ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart5>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ vbus-supply = <®_5p0v>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ status = "okay"; ++}; ++ ++&usbh1 { ++ status = "okay"; ++}; ++ ++/* Sterling-LWB SDIO WiFi */ ++&usdhc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc2>; ++ vmmc-supply = <®_3p3v>; ++ non-removable; ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <®_3p3v>; ++ status = "okay"; ++}; ++ ++&wdog1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++}; ++ ++&iomuxc { ++ pinctrl_accel: accelmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_ecspi3: escpi3grp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 ++ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 ++ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 ++ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 ++ >; ++ }; ++ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpio_leds: gpioledsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 ++ >; ++ }; ++ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_pps: ppsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm3: pwm3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_reg_bt: regbtgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_reg_wl: regwlgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 ++ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart5: uart5grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 ++ >; ++ }; ++ ++ pinctrl_usdhc2: usdhc2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 ++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 ++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 ++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 ++ >; ++ }; ++}; diff --git a/target/linux/imx/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch b/target/linux/imx/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch new file mode 100644 index 0000000000..32f344c588 --- /dev/null +++ b/target/linux/imx/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch @@ -0,0 +1,434 @@ +From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001 +From: Robert Jones +Date: Wed, 8 Jan 2020 07:44:23 -0800 +Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support + +The Gateworks GW5913 is an IMX6 SoC based single board computer with: + - IMX6Q or IMX6DL + - 32bit DDR3 DRAM + - FEC GbE RJ45 front-panel + - 1x miniPCIe socket with PCI Gen2, USB2 + - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM + - 6V to 60V DC input connector + - GPS (ublox ZOE-M8Q) + - bi-color front-panel LED + - 256MB NAND boot device + - nanoSIM socket + - user pushbutton + - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) + +Signed-off-by: Robert Jones +Reviewed-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/Makefile | 2 + + arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++ + arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++ + arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++ + 4 files changed, 378 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts + create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts + create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6dl-gw5904.dtb \ + imx6dl-gw5907.dtb \ + imx6dl-gw5910.dtb \ ++ imx6dl-gw5913.dtb \ + imx6dl-hummingboard.dtb \ + imx6dl-hummingboard-emmc-som-v15.dtb \ + imx6dl-hummingboard-som-v15.dtb \ +@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6q-gw5904.dtb \ + imx6q-gw5907.dtb \ + imx6q-gw5910.dtb \ ++ imx6q-gw5913.dtb \ + imx6q-h100.dtb \ + imx6q-hummingboard.dtb \ + imx6q-hummingboard-emmc-som-v15.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-gw5913.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6dl.dtsi" ++#include "imx6qdl-gw5913.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913"; ++ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-gw5913.dts +@@ -0,0 +1,14 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++ ++#include "imx6q.dtsi" ++#include "imx6qdl-gw5913.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913"; ++ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi +@@ -0,0 +1,347 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++#include ++ ++/ { ++ /* these are used by bootloader for disabling nodes */ ++ aliases { ++ led0 = &led0; ++ led1 = &led1; ++ nand = &gpmi; ++ usb0 = &usbh1; ++ usb1 = &usbotg; ++ }; ++ ++ chosen { ++ stdout-path = &uart2; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_leds>; ++ ++ led0: user1 { ++ label = "user1"; ++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ ++ default-state = "on"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led1: user2 { ++ label = "user2"; ++ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ ++ }; ++ }; ++ ++ memory@10000000 { ++ device_type = "memory"; ++ reg = <0x10000000 0x20000000>; ++ }; ++ ++ pps { ++ compatible = "pps-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pps>; ++ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_5p0v: regulator-5p0v { ++ compatible = "regulator-fixed"; ++ regulator-name = "5P0V"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++}; ++ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii-id"; ++ status = "okay"; ++}; ++ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ gpio@23 { ++ compatible = "nxp,pca9555"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ eeprom@50 { ++ compatible = "atmel,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@51 { ++ compatible = "atmel,24c02"; ++ reg = <0x51>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@52 { ++ compatible = "atmel,24c02"; ++ reg = <0x52>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@53 { ++ compatible = "atmel,24c02"; ++ reg = <0x53>; ++ pagesize = <16>; ++ }; ++ ++ rtc@68 { ++ compatible = "dallas,ds1672"; ++ reg = <0x68>; ++ }; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ ++ status = "disabled"; ++}; ++ ++&pwm4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ status = "okay"; ++}; ++ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart3>; ++ status = "okay"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart5>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ status = "okay"; ++}; ++ ++&usbh1 { ++ status = "okay"; ++}; ++ ++&wdog1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++}; ++ ++&iomuxc { ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpio_leds: gpioledsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 ++ >; ++ }; ++ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_pps: ppsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm3: pwm3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm4: pwm4grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart3: uart3grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart5: uart5grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 ++ >; ++ }; ++}; diff --git a/target/linux/imx/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch b/target/linux/imx/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch new file mode 100644 index 0000000000..da733ff357 --- /dev/null +++ b/target/linux/imx/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch @@ -0,0 +1,549 @@ +From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001 +From: Robert Jones +Date: Wed, 8 Jan 2020 07:44:24 -0800 +Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support + +The Gateworks GW5912 is an IMX6 SoC based single board computer with: + - IMX6Q or IMX6DL + - 32bit DDR3 DRAM + - GbE RJ45 front-panel + - 4x miniPCIe socket with PCI Gen2, USB2 + - 1x miniPCIe socket with PCI Gen2, USB2, mSATA + - 1x miniPCIe socket with PCI Gen2, USB2, mezzanine + - 10V to 60V DC input barrel jack + - 3axis accelerometer (lis2de12) + - GPS (ublox ZOE-M8Q) + - bi-color front-panel LED + - 256MB NAND boot device + - nanoSIM/microSD socket (with UHS-I support) + - user pushbutton + - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) + - CAN Bus transceiver (mcp2562) + - RS232 transceiver (1x UART with flow-control or 2x UART (build option) + - off-board SPI connector (1x chip-select) + +Signed-off-by: Robert Jones +Reviewed-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/Makefile | 2 + + arch/arm/boot/dts/imx6dl-gw5912.dts | 13 + + arch/arm/boot/dts/imx6q-gw5912.dts | 13 + + arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++ + 4 files changed, 489 insertions(+) + create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts + create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts + create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6dl-gw5904.dtb \ + imx6dl-gw5907.dtb \ + imx6dl-gw5910.dtb \ ++ imx6dl-gw5912.dtb \ + imx6dl-gw5913.dtb \ + imx6dl-hummingboard.dtb \ + imx6dl-hummingboard-emmc-som-v15.dtb \ +@@ -494,6 +495,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6q-gw5904.dtb \ + imx6q-gw5907.dtb \ + imx6q-gw5910.dtb \ ++ imx6q-gw5912.dtb \ + imx6q-gw5913.dtb \ + imx6q-h100.dtb \ + imx6q-hummingboard.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/imx6dl-gw5912.dts +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++#include "imx6dl.dtsi" ++#include "imx6qdl-gw5912.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912"; ++ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-gw5912.dts +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++/dts-v1/; ++#include "imx6q.dtsi" ++#include "imx6qdl-gw5912.dtsi" ++ ++/ { ++ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912"; ++ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi +@@ -0,0 +1,459 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright 2019 Gateworks Corporation ++ */ ++ ++#include ++ ++/ { ++ /* these are used by bootloader for disabling nodes */ ++ aliases { ++ led0 = &led0; ++ led1 = &led1; ++ led2 = &led2; ++ nand = &gpmi; ++ usb0 = &usbh1; ++ usb1 = &usbotg; ++ }; ++ ++ chosen { ++ stdout-path = &uart2; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpio_leds>; ++ ++ led0: user1 { ++ label = "user1"; ++ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ ++ default-state = "on"; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ led1: user2 { ++ label = "user2"; ++ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ ++ }; ++ ++ led2: user3 { ++ label = "user3"; ++ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ ++ }; ++ }; ++ ++ memory@10000000 { ++ device_type = "memory"; ++ reg = <0x10000000 0x40000000>; ++ }; ++ ++ pps { ++ compatible = "pps-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pps>; ++ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; ++ }; ++ ++ reg_3p3v: regulator-3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ ++ reg_usb_vbus: regulator-5p0v { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++}; ++ ++&can1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_flexcan1>; ++ status = "okay"; ++}; ++ ++&ecspi2 { ++ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi2>; ++ status = "okay"; ++}; ++ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii-id"; ++ status = "okay"; ++}; ++ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++&i2c1 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ status = "okay"; ++ ++ gpio@23 { ++ compatible = "nxp,pca9555"; ++ reg = <0x23>; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ eeprom@50 { ++ compatible = "atmel,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@51 { ++ compatible = "atmel,24c02"; ++ reg = <0x51>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@52 { ++ compatible = "atmel,24c02"; ++ reg = <0x52>; ++ pagesize = <16>; ++ }; ++ ++ eeprom@53 { ++ compatible = "atmel,24c02"; ++ reg = <0x53>; ++ pagesize = <16>; ++ }; ++ ++ rtc@68 { ++ compatible = "dallas,ds1672"; ++ reg = <0x68>; ++ }; ++}; ++ ++&i2c2 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c2>; ++ status = "okay"; ++}; ++ ++&i2c3 { ++ clock-frequency = <100000>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ accel@19 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_accel>; ++ compatible = "st,lis2de12"; ++ reg = <0x19>; ++ st,drdy-int-pin = <1>; ++ interrupt-parent = <&gpio7>; ++ interrupts = <13 0>; ++ interrupt-names = "INT1"; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; ++ status = "okay"; ++}; ++ ++&pwm1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */ ++ status = "disabled"; ++}; ++ ++&pwm2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ ++ status = "disabled"; ++}; ++ ++&pwm3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ ++ status = "disabled"; ++}; ++ ++&pwm4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart1>; ++ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ status = "okay"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart5>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ vbus-supply = <®_usb_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ dr_mode = "host"; ++ status = "okay"; ++}; ++ ++&usbh1 { ++ vbus-supply = <®_usb_vbus>; ++ status = "okay"; ++}; ++ ++&usdhc3 { ++ pinctrl-names = "default", "state_100mhz", "state_200mhz"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; ++ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; ++ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; ++ vmmc-supply = <®_3p3v>; ++ no-1-8-v; /* firmware will remove if board revision supports */ ++ status = "okay"; ++}; ++ ++&wdog1 { ++ status = "disabled"; ++}; ++ ++&wdog2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_wdog>; ++ fsl,ext-reset-output; ++ status = "okay"; ++}; ++ ++&iomuxc { ++ pinctrl_accel: accelmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_ecspi2: escpi2grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 ++ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 ++ >; ++ }; ++ ++ pinctrl_flexcan1: flexcan1grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 ++ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 ++ >; ++ }; ++ ++ pinctrl_gpio_leds: gpioledsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 ++ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ >; ++ }; ++ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 ++ >; ++ }; ++ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 ++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_pps: ppsgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm1: pwm1grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm2: pwm2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm3: pwm3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_pwm4: pwm4grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart1: uart1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1 ++ >; ++ }; ++ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1 ++ >; ++ }; ++ ++ pinctrl_uart5: uart5grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 ++ >; ++ }; ++ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 ++ >; ++ }; ++ ++ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 ++ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ ++ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 ++ >; ++ }; ++ ++ pinctrl_wdog: wdoggrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0 ++ >; ++ }; ++}; diff --git a/target/linux/imx/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch new file mode 100644 index 0000000000..f05c1f1ec1 --- /dev/null +++ b/target/linux/imx/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch @@ -0,0 +1,68 @@ +From 62e7f0b553038e3a1a1b2b067dd1fbdacd634e37 Mon Sep 17 00:00:00 2001 +From: Robert Jones +Date: Fri, 14 Feb 2020 13:02:41 -0800 +Subject: [PATCH] ARM: dts: imx6qdl-gw553x: add lsm9ds1 iio imu/magn support + +Add one node for the accel/gyro i2c device and another for the separate +magnetometer device in the lsm9ds1. + +Signed-off-by: Robert Jones +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw553x.dtsi | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi +@@ -173,6 +173,25 @@ + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + ++ magn@1c { ++ compatible = "st,lsm9ds1-magn"; ++ reg = <0x1c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_mag>; ++ interrupt-parent = <&gpio1>; ++ interrupts = <2 IRQ_TYPE_EDGE_RISING>; ++ }; ++ ++ imu@6a { ++ compatible = "st,lsm9ds1-imu"; ++ reg = <0x6a>; ++ st,drdy-int-pin = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_imu>; ++ interrupt-parent = <&gpio7>; ++ interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; ++ }; ++ + ltc3676: pmic@3c { + compatible = "lltc,ltc3676"; + reg = <0x3c>; +@@ -426,6 +445,12 @@ + >; + }; + ++ pinctrl_imu: imugrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 ++ >; ++ }; ++ + pinctrl_ipu1_csi0: ipu1csi0grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 +@@ -449,6 +474,12 @@ + >; + }; + ++ pinctrl_mag: maggrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 ++ >; ++ }; ++ + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 diff --git a/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch b/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch new file mode 100644 index 0000000000..1d8844fb0d --- /dev/null +++ b/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch @@ -0,0 +1,57 @@ +From 66d19a4f8d0fa7539f90cad64d793b4dac6f6e5d Mon Sep 17 00:00:00 2001 +From: Robert Jones +Date: Fri, 14 Feb 2020 13:01:55 -0800 +Subject: [PATCH] ARM: dts: imx: ventana: add fxos8700 on gateworks boards + +Add fxos8700 iio imu entries for Gateworks ventana SBCs. + +Signed-off-by: Robert Jones +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 5 +++++ + arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 5 +++++ + arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 5 +++++ + 3 files changed, 15 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi +@@ -313,6 +313,11 @@ + interrupts = <12 2>; + wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + }; ++ ++ accel@1e { ++ compatible = "nxp,fxos8700"; ++ reg = <0x1e>; ++ }; + }; + + &ldb { +--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi +@@ -304,6 +304,11 @@ + interrupts = <11 2>; + wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; + }; ++ ++ accel@1e { ++ compatible = "nxp,fxos8700"; ++ reg = <0x1e>; ++ }; + }; + + &ldb { +--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi +@@ -361,6 +361,11 @@ + interrupts = <12 2>; + wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; + }; ++ ++ accel@1e { ++ compatible = "nxp,fxos8700"; ++ reg = <0x1e>; ++ }; + }; + + &ldb { diff --git a/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch b/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch new file mode 100644 index 0000000000..72a98a2b15 --- /dev/null +++ b/target/linux/imx/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch @@ -0,0 +1,54 @@ +From d2cf2f91ba5b6d7696b1870e28017a3e1a7a1bb8 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Fri, 28 Feb 2020 11:46:07 -0800 +Subject: [PATCH] ARM: dts: imx6qdl-gw5910: add CC1352 UART + +The GW5910-C revision adds a TI CC1352 connected to IMX UART4 + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +@@ -218,6 +218,14 @@ + status = "okay"; + }; + ++/* cc1352 */ ++&uart3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart3>; ++ uart-has-rtscts; ++ status = "okay"; ++}; ++ + /* Sterling-LWB Bluetooth */ + &uart4 { + pinctrl-names = "default"; +@@ -409,6 +417,23 @@ + >; + }; + ++ pinctrl_uart3: uart3grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */ ++ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x4001b0b1 /* DIO14 */ ++ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x4001b0b1 /* DIO15 */ ++ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1 /* TMS */ ++ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1 /* TCK */ ++ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1 /* TDO */ ++ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1 /* TDI */ ++ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x4001b0b1 /* RST# */ ++ >; ++ }; ++ + pinctrl_uart4: uart4grp { + fsl,pins = < + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 diff --git a/target/linux/imx/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch b/target/linux/imx/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch new file mode 100644 index 0000000000..8d436be631 --- /dev/null +++ b/target/linux/imx/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch @@ -0,0 +1,45 @@ +From 957743b79b1ebb710f5498b61a212cebc302e685 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Wed, 29 Apr 2020 08:22:35 -0700 +Subject: [PATCH 01/20] ARM: dts: imx6qdl-gw552x: add USB OTG support + +The GW552x-B board revision adds USB OTG support. + +Enable the device-tree node and configure the OTG_ID pin. + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi +@@ -258,6 +258,14 @@ + status = "okay"; + }; + ++&usbotg { ++ vbus-supply = <®_5p0v>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ disable-over-current; ++ status = "okay"; ++}; ++ + &wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; +@@ -359,6 +367,12 @@ + >; + }; + ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059 ++ >; ++ }; ++ + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 diff --git a/target/linux/imx/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch new file mode 100644 index 0000000000..537b6f4d67 --- /dev/null +++ b/target/linux/imx/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch @@ -0,0 +1,76 @@ +From 9e72702a3d9a967edac02d8e937bce2b68b77814 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Tue, 12 May 2020 13:59:37 -0700 +Subject: [PATCH 05/20] ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn + support + +Add one node for the accel/gyro i2c device and another for the separate +magnetometer device in the lsm9ds1. + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw560x.dtsi | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi +@@ -295,6 +295,15 @@ + VDDIO-supply = <®_3p3v>; + }; + ++ magn@1c { ++ compatible = "st,lsm9ds1-magn"; ++ reg = <0x1c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_mag>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <9 IRQ_TYPE_EDGE_RISING>; ++ }; ++ + tca8418: keypad@34 { + compatible = "ti,tca8418"; + pinctrl-names = "default"; +@@ -389,6 +398,16 @@ + }; + }; + }; ++ ++ imu@6a { ++ compatible = "st,lsm9ds1-imu"; ++ reg = <0x6a>; ++ st,drdy-int-pin = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_imu>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; ++ }; + }; + + &i2c3 { +@@ -609,6 +628,12 @@ + >; + }; + ++ pinctrl_imu: imugrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0 ++ >; ++ }; ++ + pinctrl_keypad: keypadgrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ +@@ -616,6 +641,12 @@ + >; + }; + ++ pinctrl_mag: maggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0 ++ >; ++ }; ++ + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ diff --git a/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch new file mode 100644 index 0000000000..4d24b40535 --- /dev/null +++ b/target/linux/imx/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch @@ -0,0 +1,69 @@ +From c8756cbad816954be912ba32277ccd55fe7acc01 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Tue, 12 May 2020 13:59:56 -0700 +Subject: [PATCH 06/20] ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn + support + +Add one node for the accel/gyro i2c device and another for the separate +magnetometer device in the lsm9ds1. + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 31 +++++++++++++++++++++++++++++++ + 1 file changed, 31 insertions(+) + +--- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi +@@ -248,6 +248,15 @@ + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + ++ magn@1c { ++ compatible = "st,lsm9ds1-magn"; ++ reg = <0x1c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_mag>; ++ interrupt-parent = <&gpio5>; ++ interrupts = <17 IRQ_TYPE_EDGE_RISING>; ++ }; ++ + ltc3676: pmic@3c { + compatible = "lltc,ltc3676"; + reg = <0x3c>; +@@ -320,6 +329,16 @@ + }; + }; + }; ++ ++ imu@6a { ++ compatible = "st,lsm9ds1-imu"; ++ reg = <0x6a>; ++ st,drdy-int-pin = <1>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_imu>; ++ interrupt-parent = <&gpio4>; ++ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; ++ }; + }; + + &i2c3 { +@@ -501,6 +520,18 @@ + >; + }; + ++ pinctrl_imu: imugrp { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_mag: maggrp { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 ++ >; ++ }; ++ + pinctrl_pcie: pciegrp { + fsl,pins = < + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ diff --git a/target/linux/imx/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch b/target/linux/imx/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch new file mode 100644 index 0000000000..545a6fddd5 --- /dev/null +++ b/target/linux/imx/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch @@ -0,0 +1,82 @@ +From d40edafe80569c5b4d8893c1cdd1060c54ef433c Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Tue, 12 May 2020 14:54:15 -0700 +Subject: [PATCH 07/20] ARM: dts: imx6qdl-gw5910: add support for bcm4330-bt + +The Sterling-LWB has a BCM4330 which has a UART based bluetooth +HCI. Add support for binding to the bcm_hci driver to take care +of handling the shutdown gpio and loading firmware. + +Because the shutdown gpio is more of an enable than a regulator +go ahead and replace the regulator with a shutdown-gpio. + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 32 ++++++++++++-------------------- + 1 file changed, 12 insertions(+), 20 deletions(-) + +--- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +@@ -81,19 +81,6 @@ + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +- +- reg_bt: regulator-bt { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_reg_bt>; +- compatible = "regulator-fixed"; +- regulator-name = "bt"; +- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; +- startup-delay-us = <100>; +- enable-active-high; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; + }; + + +@@ -229,9 +216,14 @@ + /* Sterling-LWB Bluetooth */ + &uart4 { + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; ++ pinctrl-0 = <&pinctrl_uart4>,<&pinctrl_bten>; + uart-has-rtscts; + status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm4330-bt"; ++ shutdown-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; ++ }; + }; + + /* GPS */ +@@ -286,6 +278,12 @@ + >; + }; + ++ pinctrl_bten: btengrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 ++ >; ++ }; ++ + pinctrl_ecspi3: escpi3grp { + fsl,pins = < + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 +@@ -391,12 +389,6 @@ + >; + }; + +- pinctrl_reg_bt: regbtgrp { +- fsl,pins = < +- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 +- >; +- }; +- + pinctrl_reg_wl: regwlgrp { + fsl,pins = < + MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 diff --git a/target/linux/imx/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch b/target/linux/imx/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch new file mode 100644 index 0000000000..ce2fa2ee90 --- /dev/null +++ b/target/linux/imx/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch @@ -0,0 +1,33 @@ +From 4792ff641cc8993606013d27d84cda59d8cc76c5 Mon Sep 17 00:00:00 2001 +From: Tim Harvey +Date: Tue, 12 May 2020 15:02:34 -0700 +Subject: [PATCH 08/20] ARM: dts: imx6qdl-gw5910: fix wlan regulator + +Connect the wl_reg regulator to usdhc2 such that it can be enabled +and disabled as needed. There is no need for this to be always-on. + +Signed-off-by: Tim Harvey +Signed-off-by: Shawn Guo +--- + arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi +@@ -79,7 +79,6 @@ + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; +- regulator-always-on; + }; + }; + +@@ -249,7 +248,7 @@ + &usdhc2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2>; +- vmmc-supply = <®_3p3v>; ++ vmmc-supply = <®_wl>; + non-removable; + bus-width = <4>; + status = "okay"; diff --git a/target/linux/imx/patches-5.4/100-bootargs.patch b/target/linux/imx/patches-5.4/100-bootargs.patch new file mode 100644 index 0000000000..cf63a3bdb1 --- /dev/null +++ b/target/linux/imx/patches-5.4/100-bootargs.patch @@ -0,0 +1,11 @@ +--- a/arch/arm/boot/dts/imx6dl-wandboard.dts ++++ b/arch/arm/boot/dts/imx6dl-wandboard.dts +@@ -16,4 +16,8 @@ + device_type = "memory"; + reg = <0x10000000 0x40000000>; + }; ++ ++ chosen { ++ bootargs = "console=ttymxc0,115200"; ++ }; + }; diff --git a/target/linux/imx/patches-5.4/301-apalis-ixora-dts-leds.patch b/target/linux/imx/patches-5.4/301-apalis-ixora-dts-leds.patch new file mode 100644 index 0000000000..bae9df1734 --- /dev/null +++ b/target/linux/imx/patches-5.4/301-apalis-ixora-dts-leds.patch @@ -0,0 +1,86 @@ +arm: dts: apalis-ixora: Add status LEDs aliases + +Signed-off-by: Petr Å tetiar + +--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts +@@ -60,6 +60,10 @@ + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; ++ led-boot = &led_boot; ++ led-failsafe = &led_failsafe; ++ led-running = &led_running; ++ led-upgrade = &led_upgrade; + }; + + chosen { +@@ -127,22 +131,22 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + +- led4-green { ++ led_running: led4-green { + label = "LED_4_GREEN"; + gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + }; + +- led4-red { ++ led_upgrade: led4-red { + label = "LED_4_RED"; + gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + }; + +- led5-green { ++ led_boot: led5-green { + label = "LED_5_GREEN"; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + }; + +- led5-red { ++ led_failsafe: led5-red { + label = "LED_5_RED"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + }; +--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +@@ -61,6 +61,10 @@ + i2c2 = &i2c2; + rtc0 = &rtc_i2c; + rtc1 = &snvs_rtc; ++ led-boot = &led_boot; ++ led-failsafe = &led_failsafe; ++ led-running = &led_running; ++ led-upgrade = &led_upgrade; + }; + + chosen { +@@ -128,22 +132,22 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds_ixora>; + +- led4-green { ++ led_running: led4-green { + label = "LED_4_GREEN"; +- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; + }; + +- led4-red { ++ led_upgrade: led4-red { + label = "LED_4_RED"; +- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; ++ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; + }; + +- led5-green { ++ led_boot: led5-green { + label = "LED_5_GREEN"; + gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; + }; + +- led5-red { ++ led_failsafe: led5-red { + label = "LED_5_RED"; + gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; + }; diff --git a/target/linux/imx/patches-5.4/302-apalis-ixora-dts-reset-button.patch b/target/linux/imx/patches-5.4/302-apalis-ixora-dts-reset-button.patch new file mode 100644 index 0000000000..f5afb66371 --- /dev/null +++ b/target/linux/imx/patches-5.4/302-apalis-ixora-dts-reset-button.patch @@ -0,0 +1,76 @@ +arm: dts: apalis-ixora: Add switch3 as reset button + +Signed-off-by: Petr Å tetiar + +--- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts +@@ -74,7 +74,7 @@ + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpio_keys>; ++ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; + + wakeup { + label = "Wake-Up"; +@@ -83,6 +83,13 @@ + debounce-interval = <10>; + wakeup-source; + }; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <10>; ++ }; + }; + + lcd_display: disp0 { +@@ -298,4 +305,10 @@ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; ++ ++ pinctrl_switch3_ixora: switch3ixora { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 ++ >; ++ }; + }; +--- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts ++++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts +@@ -73,7 +73,7 @@ + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpio_keys>; ++ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; + + wakeup { + label = "Wake-Up"; +@@ -82,6 +82,13 @@ + debounce-interval = <10>; + wakeup-source; + }; ++ ++ reset { ++ label = "reset"; ++ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; ++ linux,code = ; ++ debounce-interval = <10>; ++ }; + }; + + lcd_display: disp0 { +@@ -299,4 +306,10 @@ + MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 + >; + }; ++ ++ pinctrl_switch3_ixora: switch3ixora { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 ++ >; ++ }; + }; diff --git a/target/linux/imx/profiles/100-default.mk b/target/linux/imx/profiles/100-default.mk new file mode 100644 index 0000000000..5e90724a58 --- /dev/null +++ b/target/linux/imx/profiles/100-default.mk @@ -0,0 +1,14 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2013 OpenWrt.org + +define Profile/Default + PRIORITY:=1 + NAME:=Default Profile +endef + +define Profile/Default/Description + Package set compatible with most NXP i.MX based boards. +endef + +$(eval $(call Profile,Default)) diff --git a/target/linux/imx6/Makefile b/target/linux/imx6/Makefile deleted file mode 100644 index e735d1d885..0000000000 --- a/target/linux/imx6/Makefile +++ /dev/null @@ -1,23 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Copyright (C) 2013-2014 OpenWrt.org - -include $(TOPDIR)/rules.mk - -ARCH:=arm -BOARD:=imx6 -BOARDNAME:=NXP i.MX 6 -FEATURES:=audio display fpu gpio pcie rtc usb usbgadget squashfs targz nand ubifs boot-part rootfs-part -CPU_TYPE:=cortex-a9 -CPU_SUBTYPE:=neon - -KERNEL_PATCHVER:=5.4 -KERNEL_TESTING_PATCHVER:=5.10 - -include $(INCLUDE_DIR)/target.mk - -KERNELNAME:=zImage dtbs - -DEFAULT_PACKAGES += uboot-envtools mkf2fs e2fsprogs blkid - -$(eval $(call BuildTarget)) diff --git a/target/linux/imx6/base-files/etc/board.d/02_network b/target/linux/imx6/base-files/etc/board.d/02_network deleted file mode 100644 index 1668b86008..0000000000 --- a/target/linux/imx6/base-files/etc/board.d/02_network +++ /dev/null @@ -1,46 +0,0 @@ -# -# Copyright (C) 2013-2015 OpenWrt.org -# - -. /lib/functions/uci-defaults.sh - -board=$(board_name) - -board_config_update - -case "$board" in -gw,imx6dl-gw51xx |\ -gw,imx6dl-gw52xx |\ -gw,imx6dl-gw5904 |\ -gw,imx6dl-gw5907 |\ -gw,imx6dl-gw5910 |\ -gw,imx6dl-gw5912 |\ -gw,imx6dl-gw5913 |\ -gw,imx6q-gw51xx |\ -gw,imx6q-gw52xx |\ -gw,imx6q-gw5904 |\ -gw,imx6q-gw5907 |\ -gw,imx6q-gw5910 |\ -gw,imx6q-gw5912 |\ -gw,imx6q-gw5913 |\ -solidrun,cubox-i/dl |\ -solidrun,cubox-i/q ) - ucidef_set_interface_lan 'eth0' - ;; -gw,imx6dl-gw53xx |\ -gw,imx6dl-gw54xx |\ -gw,imx6dl-gw552x |\ -gw,imx6q-gw53xx |\ -gw,imx6q-gw5400-a |\ -gw,imx6q-gw54xx |\ -gw,imx6q-gw552x ) - ucidef_set_interfaces_lan_wan 'eth0' 'eth1' - ;; -wand,imx6dl-wandboard ) - ucidef_set_interface_wan 'eth0' - ;; -esac - -board_config_flush - -exit 0 diff --git a/target/linux/imx6/base-files/etc/inittab b/target/linux/imx6/base-files/etc/inittab deleted file mode 100644 index b944a93ada..0000000000 --- a/target/linux/imx6/base-files/etc/inittab +++ /dev/null @@ -1,4 +0,0 @@ -::sysinit:/etc/init.d/rcS S boot -::shutdown:/etc/init.d/rcS K shutdown -::askconsole:/usr/libexec/login.sh -tty1::askfirst:/usr/libexec/login.sh diff --git a/target/linux/imx6/base-files/lib/imx6.sh b/target/linux/imx6/base-files/lib/imx6.sh deleted file mode 100644 index 46d2eeb006..0000000000 --- a/target/linux/imx6/base-files/lib/imx6.sh +++ /dev/null @@ -1,30 +0,0 @@ -# -# Copyright (C) 2010-2013 OpenWrt.org -# - -rootpartuuid() { - local cmdline=$(cat /proc/cmdline) - local bootpart=${cmdline##*root=} - bootpart=${bootpart%% *} - local uuid=${bootpart#PARTUUID=} - echo ${uuid%-02} -} - -bootdev_from_uuid() { - blkid | grep "PTUUID=\"$(rootpartuuid)\"" | cut -d : -f1 -} - -bootpart_from_uuid() { - blkid | grep $(rootpartuuid)-01 | cut -d : -f1 -} - -rootpart_from_uuid() { - blkid | grep $(rootpartuuid)-02 | cut -d : -f1 -} - -apalis_mount_boot() { - mkdir -p /boot - [ -f /boot/uImage ] || { - mount -o rw,noatime $(bootpart_from_uuid) /boot > /dev/null - } -} diff --git a/target/linux/imx6/base-files/lib/preinit/79_move_config b/target/linux/imx6/base-files/lib/preinit/79_move_config deleted file mode 100644 index baa7ffe44b..0000000000 --- a/target/linux/imx6/base-files/lib/preinit/79_move_config +++ /dev/null @@ -1,21 +0,0 @@ -. /lib/imx6.sh -. /lib/functions.sh -. /lib/upgrade/common.sh - -move_config() { - local board=$(board_name) - - case "$board" in - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - if [ -b $(bootpart_from_uuid) ]; then - apalis_mount_boot - [ -f "/boot/$BACKUP_FILE" ] && mv -f "/boot/$BACKUP_FILE" / - umount /boot - fi - ;; - esac -} - -boot_hook_add preinit_mount_root move_config diff --git a/target/linux/imx6/base-files/lib/upgrade/platform.sh b/target/linux/imx6/base-files/lib/upgrade/platform.sh deleted file mode 100755 index 79f2a5078b..0000000000 --- a/target/linux/imx6/base-files/lib/upgrade/platform.sh +++ /dev/null @@ -1,142 +0,0 @@ -# -# Copyright (C) 2010-2015 OpenWrt.org -# - -. /lib/imx6.sh - -RAMFS_COPY_BIN='blkid jffs2reset' - -enable_image_metadata_check() { - case "$(board_name)" in - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - REQUIRE_IMAGE_METADATA=1 - ;; - esac -} -enable_image_metadata_check - -apalis_copy_config() { - apalis_mount_boot - cp -af "$UPGRADE_BACKUP" "/boot/$BACKUP_FILE" - sync - umount /boot -} - -apalis_do_upgrade() { - apalis_mount_boot - get_image "$1" | tar Oxf - sysupgrade-apalis/kernel > /boot/uImage - get_image "$1" | tar Oxf - sysupgrade-apalis/root > $(rootpart_from_uuid) - sync - umount /boot -} - -platform_check_image() { - local board=$(board_name) - - case "$board" in - gw,imx6dl-gw51xx |\ - gw,imx6dl-gw52xx |\ - gw,imx6dl-gw53xx |\ - gw,imx6dl-gw54xx |\ - gw,imx6dl-gw551x |\ - gw,imx6dl-gw552x |\ - gw,imx6dl-gw553x |\ - gw,imx6dl-gw5904 |\ - gw,imx6dl-gw5907 |\ - gw,imx6dl-gw5910 |\ - gw,imx6dl-gw5912 |\ - gw,imx6dl-gw5913 |\ - gw,imx6q-gw51xx |\ - gw,imx6q-gw52xx |\ - gw,imx6q-gw53xx |\ - gw,imx6q-gw5400-a |\ - gw,imx6q-gw54xx |\ - gw,imx6q-gw551x |\ - gw,imx6q-gw552x |\ - gw,imx6q-gw553x |\ - gw,imx6q-gw5904 |\ - gw,imx6q-gw5907 |\ - gw,imx6q-gw5910 |\ - gw,imx6q-gw5912 |\ - gw,imx6q-gw5913 ) - nand_do_platform_check $board $1 - return $?; - ;; - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - return 0 - ;; - esac - - echo "Sysupgrade is not yet supported on $board." - return 1 -} - -platform_do_upgrade() { - local board=$(board_name) - - case "$board" in - gw,imx6dl-gw51xx |\ - gw,imx6dl-gw52xx |\ - gw,imx6dl-gw53xx |\ - gw,imx6dl-gw54xx |\ - gw,imx6dl-gw551x |\ - gw,imx6dl-gw552x |\ - gw,imx6dl-gw553x |\ - gw,imx6dl-gw5904 |\ - gw,imx6dl-gw5907 |\ - gw,imx6dl-gw5910 |\ - gw,imx6dl-gw5912 |\ - gw,imx6dl-gw5913 |\ - gw,imx6q-gw51xx |\ - gw,imx6q-gw52xx |\ - gw,imx6q-gw53xx |\ - gw,imx6q-gw5400-a |\ - gw,imx6q-gw54xx |\ - gw,imx6q-gw551x |\ - gw,imx6q-gw552x |\ - gw,imx6q-gw553x |\ - gw,imx6q-gw5904 |\ - gw,imx6q-gw5907 |\ - gw,imx6q-gw5910 |\ - gw,imx6q-gw5912 |\ - gw,imx6q-gw5913 ) - nand_do_upgrade "$1" - ;; - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - apalis_do_upgrade "$1" - ;; - esac -} - -platform_copy_config() { - local board=$(board_name) - - case "$board" in - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - apalis_copy_config - ;; - esac -} - -platform_pre_upgrade() { - local board=$(board_name) - - case "$board" in - toradex,apalis_imx6q-eval |\ - toradex,apalis_imx6q-ixora |\ - toradex,apalis_imx6q-ixora-v1.1 ) - [ -z "$UPGRADE_BACKUP" ] && { - jffs2reset -y - umount /overlay - } - ;; - esac -} diff --git a/target/linux/imx6/config-5.10 b/target/linux/imx6/config-5.10 deleted file mode 100644 index 73ce01ebdd..0000000000 --- a/target/linux/imx6/config-5.10 +++ /dev/null @@ -1,483 +0,0 @@ -CONFIG_AHCI_IMX=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_ERRATA_814220=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -# CONFIG_ARM_IMX_CPUFREQ_DT is not set -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_IMX_GPT=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLK_IMX6Q=y -CONFIG_CLK_IMX6SL=y -CONFIG_CLK_IMX6SX=y -# CONFIG_CLK_IMX8MM is not set -# CONFIG_CLK_IMX8MN is not set -# CONFIG_CLK_IMX8MP is not set -# CONFIG_CLK_IMX8MQ is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="pci=nomsi" -CONFIG_CMDLINE_EXTEND=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32_ARM_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y -CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ENGINE=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MISC=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_OPS=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_E1000E=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXTCON=y -CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_F2FS_FS=y -CONFIG_FEC=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FSL_GUTS=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_ENCRYPTION_ALGS=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GENERIC_VDSO_32=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_SMP=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IMX_RNGC=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -# CONFIG_I2C_IMX_LPI2C is not set -CONFIG_IMX2_WDT=y -# CONFIG_IMX7ULP_WDT is not set -# CONFIG_IMX8MM_THERMAL is not set -CONFIG_IMX_DMA=y -# CONFIG_IMX_GPCV2_PM_DOMAINS is not set -CONFIG_IMX_INTMUX=y -CONFIG_IMX_IRQSTEER=y -CONFIG_IMX_SDMA=y -CONFIG_IMX_THERMAL=y -# CONFIG_IMX_WEIM is not set -# CONFIG_INITRAMFS_FORCE is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IO_URING=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEYS=y -CONFIG_LIBFDT=y -CONFIG_LLD_VERSION=0 -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_DEVRES=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICREL_PHY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -CONFIG_MXC_CLK=y -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -# CONFIG_NET_DSA_MSCC_FELIX is not set -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -# CONFIG_NVMEM_IMX_IIM is not set -CONFIG_NVMEM_IMX_OCOTP=y -# CONFIG_NVMEM_SNVS_LPGPR is not set -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -CONFIG_PINCTRL_IMX6SX=y -# CONFIG_PINCTRL_IMX8MM is not set -# CONFIG_PINCTRL_IMX8MN is not set -# CONFIG_PINCTRL_IMX8MP is not set -# CONFIG_PINCTRL_IMX8MQ is not set -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_PPS=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -# CONFIG_PWM_IMX1 is not set -# CONFIG_PWM_IMX27 is not set -# CONFIG_PWM_IMX_TPM is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_LTC3676=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1672=y -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SATA_HOST=y -CONFIG_SCSI=y -CONFIG_SENSORS_AD7418=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_IMX_EARLYCON=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX51 is not set -# CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -# CONFIG_SOC_IMX6SLL is not set -CONFIG_SOC_IMX6SX=y -# CONFIG_SOC_IMX6UL is not set -# CONFIG_SOC_IMX7D is not set -# CONFIG_SOC_IMX7ULP is not set -# CONFIG_SOC_IMX8M is not set -# CONFIG_SOC_LS1021A is not set -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_FSL_LPSPI is not set -# CONFIG_SPI_FSL_QUADSPI is not set -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STMP_DEVICE=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_GADGET=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_OTG=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx6/config-5.4 b/target/linux/imx6/config-5.4 deleted file mode 100644 index 6f5142b012..0000000000 --- a/target/linux/imx6/config-5.4 +++ /dev/null @@ -1,468 +0,0 @@ -CONFIG_AHCI_IMX=y -CONFIG_ALIGNMENT_TRAP=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y -CONFIG_ARCH_MXC=y -CONFIG_ARCH_NR_GPIO=0 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM=y -CONFIG_ARM_CPU_SUSPEND=y -CONFIG_ARM_CRYPTO=y -CONFIG_ARM_ERRATA_754322=y -CONFIG_ARM_ERRATA_764369=y -CONFIG_ARM_ERRATA_775420=y -CONFIG_ARM_ERRATA_814220=y -CONFIG_ARM_GIC=y -CONFIG_ARM_HAS_SG_CHAIN=y -CONFIG_ARM_HEAVY_MB=y -CONFIG_ARM_IMX6Q_CPUFREQ=y -# CONFIG_ARM_IMX_CPUFREQ_DT is not set -CONFIG_ARM_L1_CACHE_SHIFT=6 -CONFIG_ARM_L1_CACHE_SHIFT_6=y -CONFIG_ARM_PATCH_IDIV=y -CONFIG_ARM_PATCH_PHYS_VIRT=y -CONFIG_ARM_THUMB=y -CONFIG_ARM_UNWIND=y -CONFIG_ARM_VIRT_EXT=y -CONFIG_ASN1=y -CONFIG_ASSOCIATIVE_ARRAY=y -CONFIG_ATA=y -CONFIG_ATAGS=y -CONFIG_AUTO_ZRELADDR=y -CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_CACHE_L2X0=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_IMX_GPT=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="pci=nomsi" -CONFIG_CMDLINE_EXTEND=y -CONFIG_COMMON_CLK=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_32v6K=y -CONFIG_CPU_32v7=y -CONFIG_CPU_ABRT_EV7=y -CONFIG_CPU_CACHE_V7=y -CONFIG_CPU_CACHE_VIPT=y -CONFIG_CPU_COPY_V6=y -CONFIG_CPU_CP15=y -CONFIG_CPU_CP15_MMU=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -CONFIG_CPU_FREQ_GOV_COMMON=y -CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y -CONFIG_CPU_FREQ_GOV_ONDEMAND=y -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_USERSPACE=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_HAS_ASID=y -CONFIG_CPU_PABRT_V7=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_SPECTRE=y -CONFIG_CPU_THERMAL=y -CONFIG_CPU_THUMB_CAPABLE=y -CONFIG_CPU_TLB_V7=y -CONFIG_CPU_V7=y -CONFIG_CRC16=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES_ARM=y -CONFIG_CRYPTO_AES_ARM_BS=y -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_CHACHA20=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32_ARM_CE=y -CONFIG_CRYPTO_CRYPTD=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_CTS=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_FSL_CAAM=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y -CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y -# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set -# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set -CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y -CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y -CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9 -CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HASH_INFO=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_CHACHA_GENERIC=y -CONFIG_CRYPTO_LIB_DES=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_RSA=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA1_ARM=y -CONFIG_CRYPTO_SHA1_ARM_NEON=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA256_ARM=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA512_ARM=y -CONFIG_CRYPTO_SIMD=y -CONFIG_CRYPTO_XTS=y -CONFIG_CRYPTO_ZSTD=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" -CONFIG_DEBUG_MISC=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZO=y -CONFIG_DECOMPRESS_XZ=y -CONFIG_DMADEVICES=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_VIRTUAL_CHANNELS=y -CONFIG_DTC=y -CONFIG_E1000E=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENCRYPTED_KEYS=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXT4_FS_SECURITY=y -CONFIG_EXTCON=y -CONFIG_EXTRA_FIRMWARE="imx/sdma/sdma-imx6q.bin" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_F2FS_FS=y -CONFIG_FEC=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FSL_GUTS=y -CONFIG_FS_ENCRYPTION=y -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GIANFAR is not set -CONFIG_GLOB=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MXC=y -CONFIG_GPIO_PCA953X=y -CONFIG_GPIO_PCA953X_IRQ=y -CONFIG_GRO_CELLS=y -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_SMP=y -CONFIG_HWMON=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_IMX_RNGC=y -CONFIG_HZ_FIXED=0 -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IMX=y -# CONFIG_I2C_IMX_LPI2C is not set -CONFIG_IMX2_WDT=y -# CONFIG_IMX7ULP_WDT is not set -CONFIG_IMX_DMA=y -# CONFIG_IMX_GPCV2_PM_DOMAINS is not set -CONFIG_IMX_IRQSTEER=y -CONFIG_IMX_SDMA=y -CONFIG_IMX_THERMAL=y -# CONFIG_IMX_WEIM is not set -# CONFIG_INITRAMFS_FORCE is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IO_URING=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEYS=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -CONFIG_MARVELL_PHY=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MFD_SYSCON=y -CONFIG_MICREL_PHY=y -CONFIG_MIGHT_HAVE_CACHE_L2X0=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_CQHCI=y -# CONFIG_MMC_MXC is not set -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_ESDHC_IMX=y -CONFIG_MMC_SDHCI_IO_ACCESSORS=y -CONFIG_MMC_SDHCI_OF_ESDHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MPILIB=y -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_NAND_GPMI_NAND=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_UBI=y -CONFIG_MTD_UBI_BEB_LIMIT=20 -CONFIG_MTD_UBI_BLOCK=y -CONFIG_MTD_UBI_WL_THRESHOLD=4096 -CONFIG_MUTEX_SPIN_ON_OWNER=y -# CONFIG_MX3_IPU is not set -CONFIG_MXC_CLK=y -CONFIG_MXS_DMA=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEON=y -CONFIG_NET_DEVLINK=y -CONFIG_NET_DSA=y -CONFIG_NET_DSA_MV88E6XXX=y -CONFIG_NET_DSA_MV88E6XXX_GLOBAL2=y -CONFIG_NET_DSA_TAG_DSA=y -CONFIG_NET_DSA_TAG_EDSA=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NET_PTP_CLASSIFY=y -CONFIG_NET_SWITCHDEV=y -CONFIG_NLS=y -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NR_CPUS=4 -CONFIG_NVMEM=y -# CONFIG_NVMEM_IMX_IIM is not set -CONFIG_NVMEM_IMX_OCOTP=y -# CONFIG_NVMEM_SNVS_LPGPR is not set -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND3=y -CONFIG_OUTER_CACHE=y -CONFIG_OUTER_CACHE_SYNC=y -CONFIG_PADATA=y -CONFIG_PAGE_OFFSET=0x80000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_DW=y -CONFIG_PCIE_DW_HOST=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_IMX6=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PINCTRL=y -CONFIG_PINCTRL_IMX=y -CONFIG_PINCTRL_IMX6Q=y -CONFIG_PINCTRL_IMX6SL=y -CONFIG_PINCTRL_IMX6SX=y -CONFIG_PL310_ERRATA_769419=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_PPS=y -CONFIG_PTP_1588_CLOCK=y -CONFIG_PWM=y -# CONFIG_PWM_IMX1 is not set -# CONFIG_PWM_IMX27 is not set -# CONFIG_PWM_IMX_TPM is not set -CONFIG_PWM_SYSFS=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RD_LZO=y -CONFIG_RD_XZ=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_ANATOP=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_LTC3676=y -CONFIG_REGULATOR_PFUZE100=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_RPS=y -CONFIG_RTC_CLASS=y -# CONFIG_RTC_DRV_CMOS is not set -CONFIG_RTC_DRV_DS1307=y -CONFIG_RTC_DRV_DS1672=y -# CONFIG_RTC_DRV_IMXDI is not set -# CONFIG_RTC_DRV_MXC is not set -# CONFIG_RTC_DRV_MXC_V2 is not set -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCSI=y -CONFIG_SENSORS_AD7418=y -# CONFIG_SENSORS_DRIVETEMP is not set -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_IMX=y -CONFIG_SERIAL_IMX_CONSOLE=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SGL_ALLOC=y -CONFIG_SG_POOL=y -CONFIG_SMP=y -CONFIG_SMP_ON_UP=y -CONFIG_SOC_BUS=y -# CONFIG_SOC_IMX50 is not set -# CONFIG_SOC_IMX51 is not set -# CONFIG_SOC_IMX53 is not set -CONFIG_SOC_IMX6=y -CONFIG_SOC_IMX6Q=y -CONFIG_SOC_IMX6SL=y -# CONFIG_SOC_IMX6SLL is not set -CONFIG_SOC_IMX6SX=y -# CONFIG_SOC_IMX6UL is not set -# CONFIG_SOC_IMX7D is not set -# CONFIG_SOC_IMX7ULP is not set -# CONFIG_SOC_LS1021A is not set -# CONFIG_SOC_VF610 is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -# CONFIG_SPI_FSL_LPSPI is not set -# CONFIG_SPI_FSL_QUADSPI is not set -CONFIG_SPI_IMX=y -CONFIG_SPI_MASTER=y -CONFIG_SRAM=y -CONFIG_SRAM_EXEC=y -CONFIG_SRCU=y -CONFIG_STMP_DEVICE=y -CONFIG_SWPHY=y -CONFIG_SWP_EMULATE=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_OF=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TREE_RCU=y -CONFIG_TREE_SRCU=y -CONFIG_UBIFS_FS=y -# CONFIG_UCLAMP_TASK is not set -CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" -CONFIG_UNWINDER_ARM=y -CONFIG_USB=y -CONFIG_USB_CHIPIDEA=y -CONFIG_USB_CHIPIDEA_HOST=y -CONFIG_USB_CHIPIDEA_OF=y -CONFIG_USB_CHIPIDEA_UDC=y -CONFIG_USB_COMMON=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_HCD_PLATFORM is not set -# CONFIG_USB_EHCI_MXC is not set -CONFIG_USB_GADGET=y -CONFIG_USB_MXS_PHY=y -CONFIG_USB_OTG=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USE_OF=y -CONFIG_VFP=y -CONFIG_VFPv3=y -CONFIG_VMSPLIT_2G=y -# CONFIG_VMSPLIT_3G is not set -CONFIG_WATCHDOG_CORE=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZBOOT_ROM_BSS=0 -CONFIG_ZBOOT_ROM_TEXT=0 -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZSTD_COMPRESS=y -CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/imx6/files/firmware/imx/sdma/sdma-imx6q.bin b/target/linux/imx6/files/firmware/imx/sdma/sdma-imx6q.bin deleted file mode 100644 index 4d0593cec7..0000000000 Binary files a/target/linux/imx6/files/firmware/imx/sdma/sdma-imx6q.bin and /dev/null differ diff --git a/target/linux/imx6/image/Makefile b/target/linux/imx6/image/Makefile deleted file mode 100644 index 5f8e5f1c04..0000000000 --- a/target/linux/imx6/image/Makefile +++ /dev/null @@ -1,227 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Copyright (C) 2013 OpenWrt.org - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -################################################# -# Images -################################################# - -DEVICE_VARS += MKUBIFS_OPTS UBOOT - -define Build/boot-overlay - rm -rf $@.boot - mkdir -p $@.boot - - $(CP) $@ $@.boot/$(IMG_PREFIX)-uImage - ln -sf $(IMG_PREFIX)-uImage $@.boot/uImage - - $(foreach dts,$(DEVICE_DTS), \ - $(CP) \ - $(DTS_DIR)/$(dts).dtb \ - $@.boot/$(IMG_PREFIX)-$(dts).dtb; \ - ln -sf \ - $(IMG_PREFIX)-$(dts).dtb \ - $@.boot/$(dts).dtb; \ - ) - mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ - -n '$(DEVICE_ID) OpenWrt bootscript' \ - -d ./bootscript-$(DEVICE_NAME) \ - $@.boot/6x_bootscript-$(DEVICE_NAME) - - $(STAGING_DIR_HOST)/bin/mkfs.ubifs \ - --space-fixup --compr=zlib --squash-uids \ - $(MKUBIFS_OPTS) -c 16248 \ - -o $@.boot.ubifs -d $@.boot - - $(TAR) -C $@.boot -cf $@.boot.tar . -endef - -define Build/bootfs.tar.gz - rm -rf $@.boot - mkdir -p $@.boot - - $(TAR) -C $@.boot -xf $(IMAGE_KERNEL).boot.tar - $(TAR) -C $@.boot \ - --numeric-owner --owner=0 --group=0 --transform "s,./,./boot/," \ - -czvf $@ . -endef - -define Build/recovery-scr - mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ - -n '$(DEVICE_ID) OpenWrt recovery bootscript' \ - -d ./recovery-$(DEVICE_NAME) $@ -endef - -define Build/imx6-combined-image-prepare - rm -rf $@.boot - mkdir -p $@.boot -endef - -define Build/imx6-combined-image-clean - rm -rf $@.boot $@.fs -endef - -define Build/imx6-combined-image - $(CP) $(IMAGE_KERNEL) $@.boot/uImage - - $(foreach dts,$(DEVICE_DTS), \ - $(CP) \ - $(DTS_DIR)/$(dts).dtb \ - $@.boot/; - ) - - mkimage -A arm -O linux -T script -C none -a 0 -e 0 \ - -n '$(DEVICE_ID) OpenWrt bootscript' \ - -d bootscript-$(DEVICE_NAME) \ - $@.boot/boot.scr - - cp $@ $@.fs - - $(SCRIPT_DIR)/gen_image_generic.sh $@ \ - $(CONFIG_TARGET_KERNEL_PARTSIZE) \ - $@.boot \ - $(CONFIG_TARGET_ROOTFS_PARTSIZE) \ - $@.fs \ - 1024 -endef - -define Build/imx6-sdcard - $(Build/imx6-combined-image-prepare) - - $(CP) $(STAGING_DIR_IMAGE)/$(UBOOT)-u-boot.img $@.boot/u-boot.img - $(Build/imx6-combined-image) - dd if=$(STAGING_DIR_IMAGE)/$(UBOOT)-SPL of=$@ bs=1024 seek=1 conv=notrunc - - $(Build/imx6-combined-image-clean) -endef - -define Build/apalis-emmc - $(Build/imx6-combined-image-prepare) - $(Build/imx6-combined-image) - $(Build/imx6-combined-image-clean) -endef - -################################################# -# Devices -################################################# - -KERNEL_LOADADDR=0x10008000 - -define Device/Default - PROFILES := Generic - FILESYSTEMS := squashfs ext4 - KERNEL_INSTALL := 1 - KERNEL_SUFFIX := -uImage - KERNEL_NAME := zImage - KERNEL := kernel-bin | uImage none - IMAGES := -endef - -define Device/gateworks_ventana - DEVICE_VENDOR := Gateworks - DEVICE_MODEL := Ventana family - DEVICE_VARIANT := normal NAND flash - DEVICE_NAME := ventana - DEVICE_DTS:= \ - imx6dl-gw51xx \ - imx6dl-gw52xx \ - imx6dl-gw53xx \ - imx6dl-gw54xx \ - imx6dl-gw551x \ - imx6dl-gw552x \ - imx6dl-gw553x \ - imx6dl-gw5904 \ - imx6dl-gw5907 \ - imx6dl-gw5910 \ - imx6dl-gw5912 \ - imx6dl-gw5913 \ - imx6q-gw51xx \ - imx6q-gw52xx \ - imx6q-gw53xx \ - imx6q-gw54xx \ - imx6q-gw5400-a \ - imx6q-gw551x \ - imx6q-gw552x \ - imx6q-gw553x \ - imx6q-gw5904 \ - imx6q-gw5907 \ - imx6q-gw5910 \ - imx6q-gw5912 \ - imx6q-gw5913 - DEVICE_PACKAGES := kmod-sky2 kmod-sound-core kmod-sound-soc-imx \ - kmod-sound-soc-imx-sgtl5000 kmod-can kmod-can-flexcan kmod-can-raw \ - kmod-hwmon-gsc kmod-leds-gpio kmod-pps-gpio kobs-ng - KERNEL += | boot-overlay - IMAGES := nand.ubi bootfs.tar.gz dtb - IMAGE/nand.ubi := append-ubi - IMAGE/bootfs.tar.gz := bootfs.tar.gz - IMAGE/dtb := install-dtb - UBINIZE_PARTS = boot=$$(KDIR_KERNEL_IMAGE).boot.ubifs=15 - PAGESIZE := 2048 - BLOCKSIZE := 128k - MKUBIFS_OPTS := -m $$(PAGESIZE) -e 124KiB -endef -TARGET_DEVICES += gateworks_ventana - -define Device/gateworks_ventana-large - $(Device/gateworks_ventana) - DEVICE_VARIANT := large NAND flash - IMAGES := nand.ubi - PAGESIZE := 4096 - BLOCKSIZE := 256k - MKUBIFS_OPTS := -m $$(PAGESIZE) -e 248KiB -endef -TARGET_DEVICES += gateworks_ventana-large - -define Device/solidrun_cubox-i - DEVICE_VENDOR := SolidRun - DEVICE_MODEL := CuBox-i - DEVICE_DTS := \ - imx6q-cubox-i \ - imx6dl-cubox-i \ - imx6q-hummingboard \ - imx6dl-hummingboard - DEVICE_PACKAGES := kmod-drm-imx kmod-drm-imx-hdmi kmod-usb-hid - UBOOT := mx6cuboxi - KERNEL := kernel-bin - KERNEL_SUFFIX := -zImage - FILESYSTEMS := squashfs - IMAGES := combined.bin dtb - IMAGE/combined.bin := append-rootfs | pad-extra 128k | imx6-sdcard - IMAGE/dtb := install-dtb -endef -TARGET_DEVICES += solidrun_cubox-i - -define Device/toradex_apalis - DEVICE_VENDOR := Toradex - DEVICE_MODEL := Apalis family - SUPPORTED_DEVICES := apalis,ixora apalis,eval - DEVICE_DTS := \ - imx6q-apalis-eval \ - imx6q-apalis-ixora \ - imx6q-apalis-ixora-v1.1 - DEVICE_PACKAGES := \ - kmod-can kmod-can-flexcan kmod-can-raw \ - kmod-leds-gpio kmod-gpio-button-hotplug \ - kmod-pps-gpio kmod-rtc-ds1307 - FILESYSTEMS := squashfs - IMAGES := combined.bin sysupgrade.bin - DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(1).$$(2) - IMAGE/combined.bin := append-rootfs | pad-extra 128k | apalis-emmc - IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata - ARTIFACTS := recovery.scr - ARTIFACT/recovery.scr := recovery-scr -endef -TARGET_DEVICES += toradex_apalis - -define Device/wandboard_dual - DEVICE_VENDOR := Wandboard - DEVICE_MODEL := Dual - DEVICE_DTS := imx6dl-wandboard -endef -TARGET_DEVICES += wandboard_dual - -$(eval $(call BuildImage)) diff --git a/target/linux/imx6/image/bootscript-solidrun_cubox-i b/target/linux/imx6/image/bootscript-solidrun_cubox-i deleted file mode 100644 index 2ed48ab941..0000000000 --- a/target/linux/imx6/image/bootscript-solidrun_cubox-i +++ /dev/null @@ -1,31 +0,0 @@ -echo "CuBox OpenWrt Boot script" - -# Set console variable for both UART and HDMI -setenv console console=ttymxc0,115200 video=mxcfb0:dev=hdmi,1920x1080M@60,if=RGB24,bpp=32 - -# Find correct dtb -if test ${board_rev} = MX6DL; then - setenv fdt_soc_type imx6dl; -elif test ${board_rev} = MX6Q; then - setenv fdt_soc_type imx6q; -fi -if test ${board_name} = CUBOXI; then - setenv fdt_name ${fdt_soc_type}-cubox-i.dtb; -elif test ${board_name} = HUMMINGBOARD; then - setenv fdt_name ${fdt_soc_type}-hummingboard.dtb; -fi - -# Set correct devtype and partition -if test ${devtype} != mmc; then setenv devtype mmc; fi -if mmc dev 0; then - setenv mmcdev 0 -elif mmc dev 1; then - setenv mmcdev 1 -fi - -# Boot from the SD card is supported at the moment -setenv bootargs "${console} root=/dev/mmcblk1p2 rw rootwait" -mmc dev ${mmcdev} -load ${devtype} ${mmcdev}:${devplist} ${kernel_addr_r} /uImage -load ${devtype} ${mmcdev}:${devplist} ${fdt_addr_r} /${fdt_name} -bootz ${kernel_addr_r} - ${fdt_addr_r} diff --git a/target/linux/imx6/image/bootscript-toradex_apalis b/target/linux/imx6/image/bootscript-toradex_apalis deleted file mode 100644 index 3a3a6dadb1..0000000000 --- a/target/linux/imx6/image/bootscript-toradex_apalis +++ /dev/null @@ -1,21 +0,0 @@ -echo "Toradex Apalis OpenWrt Boot script v1.1" - -run emmcfinduuid - -setenv nextcon 0 -setenv boot_file uImage -setenv fdt_file imx6q-apalis-ixora.dtb -setenv root root=PARTUUID=${uuid} rootfstype=squashfs rootwait -setenv bootargs earlyprintk console=${console},${baudrate}n8 ${root} -setenv fsload ext4load mmc ${emmcdev}:${emmcbootpart} - -if ${fsload} ${kernel_addr_r} ${boot_file}; then - if ${fsload} ${fdt_addr_r} ${fdt_file}; then - test -n "$fdt_fixup" && run fdt_fixup - bootm ${kernel_addr_r} - ${fdt_addr_r} - else - echo "Error loading device-tree" - fi -else - echo "Error loading kernel image" -fi diff --git a/target/linux/imx6/image/bootscript-ventana b/target/linux/imx6/image/bootscript-ventana deleted file mode 100644 index 734f74a30c..0000000000 --- a/target/linux/imx6/image/bootscript-ventana +++ /dev/null @@ -1,85 +0,0 @@ -echo "Gateworks Ventana OpenWrt Boot script v1.02" - -# set some defaults -# set some defaults -test -n "$fs" || fs=ext2 -test -n "$disk" || disk=0 -setenv nextcon 0 -setenv bootargs console=${console},${baudrate} -setenv loadaddr 10800000 -setenv fdt_addr 18000000 - -# detect dtype by looking for kernel on media the bootloader -# has mounted (in order of preference: usb/mmc/sata) -# -# This assumes the bootloader has already started the respective subsystem -# or mounted the filesystem if appropriate to get to this bootscript -# -# To Speed up boot set dtype manually -if test -n "$dtype" ; then - echo "Using dtype from env: $dtype" -else - echo "Detecting boot device (dtype)..." - if ${fs}load usb ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then - dtype=usb - elif ${fs}load mmc ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then - dtype=mmc - elif ${fs}load sata ${disk}:1 ${loadaddr} ${bootdir}/uImage ; then - dtype=sata - elif ubifsload ${loadaddr} ${bootdir}/uImage ; then - dtype=nand - fi - echo "detected dtype:$dtype" -fi - -echo "Booting from ${dtype}..." -if itest.s "x${dtype}" == "xnand" ; then - # fix partition name - # OpenWrt kernel bug prevents partition name of 'rootfs' from booting - # instead name the partition ubi which is what is looked for by - # procd sysupgrade - mtdparts del rootfs && mtdparts add nand0 - ubi - echo "mtdparts:${mtdparts}" - setenv fsload ubifsload - setenv root "ubi0:ubi ubi.mtd=2 rootfstype=squashfs,ubifs" -else - setenv fsload "${fs}load ${dtype} ${disk}:1" - part uuid ${dtype} ${disk}:1 uuid - if test -z "${uuid}"; then - # fallback to bootdev - if test -n "$bootdev" ; then - echo "Using bootdev from env: $bootdev" - else - if itest.s "x${dtype}" == "xmmc" ; then - bootdev=mmcblk0p1 - else - bootdev=sda1 - fi - fi - setenv root "root=/dev/${bootdev}" - else - setenv root "root=PARTUUID=${uuid}" - fi - setenv root "$root rootfstype=${fs} rootwait rw" -fi - -setenv bootargs "${bootargs}" "${root}" "${video}" "${extra}" -if ${fsload} ${loadaddr} ${bootdir}/uImage; then - if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then - echo Loaded DTB from ${bootdir}/${fdt_file} - test -n "$fixfdt" && run fixfdt - bootm ${loadaddr} - ${fdt_addr} - elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then - echo Loaded DTB from ${bootdir}/${fdt_file1} - test -n "$fixfdt" && run fixfdt - bootm ${loadaddr} - ${fdt_addr} - elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then - echo Loaded DTB from ${bootdir}/${fdt_file2} - test -n "$fixfdt" && run fixfdt - bootm ${loadaddr} - ${fdt_addr} - else - echo "Error loading device-tree" - fi -else - echo "Error loading kernel image" -fi diff --git a/target/linux/imx6/image/recovery-toradex_apalis b/target/linux/imx6/image/recovery-toradex_apalis deleted file mode 100644 index d75b954345..0000000000 --- a/target/linux/imx6/image/recovery-toradex_apalis +++ /dev/null @@ -1,15 +0,0 @@ -# flash u-boot-with-spl.imx -# using fixed size of 1M for U-Boot + SPL -mmc dev 0 1 -mmc write 0x12100000 0x2 0x800 - -# flash openwrt-imx6-apalis-squashfs.combined.bin -setenv set_blkcnt 'setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt ${blkcnt} / 0x200' -run set_blkcnt -mmc dev 0 0 -mmc write 0x12500000 0 ${blkcnt} - -env default -f -a -saveenv - -reset diff --git a/target/linux/imx6/patches-5.10/100-bootargs.patch b/target/linux/imx6/patches-5.10/100-bootargs.patch deleted file mode 100644 index cf63a3bdb1..0000000000 --- a/target/linux/imx6/patches-5.10/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -16,4 +16,8 @@ - device_type = "memory"; - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; diff --git a/target/linux/imx6/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch b/target/linux/imx6/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch deleted file mode 100644 index e14dc484b0..0000000000 --- a/target/linux/imx6/patches-5.10/300-ARM-dts-imx6q-apalis-ixora-add-status-LEDs-aliases.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 68604e89335ccb3e893b5a05b2c0d5cd2eaaf6ec Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Tue, 3 Mar 2020 15:14:40 +0100 -Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: add status LEDs aliases -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Petr Å tetiar ---- - arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 16 ++++++++++------ - arch/arm/boot/dts/imx6q-apalis-ixora.dts | 12 ++++++++---- - 2 files changed, 18 insertions(+), 10 deletions(-) - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -25,6 +25,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -92,22 +96,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; -- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; -- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -24,6 +24,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -91,22 +95,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx6/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch b/target/linux/imx6/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch deleted file mode 100644 index 8f07f0b1a5..0000000000 --- a/target/linux/imx6/patches-5.10/301-ARM-dts-imx6q-apalis-ixora-make-switch3-reset-button.patch +++ /dev/null @@ -1,86 +0,0 @@ -From b6764bb27c819cdcf854371db485a43d71f579f3 Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Petr=20=C5=A0tetiar?= -Date: Tue, 3 Mar 2020 15:15:57 +0100 -Subject: [PATCH] ARM: dts: imx6q-apalis: ixora: make switch3 reset button -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Signed-off-by: Petr Å tetiar ---- - arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts | 15 ++++++++++++++- - arch/arm/boot/dts/imx6q-apalis-ixora.dts | 15 ++++++++++++++- - 2 files changed, 28 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -38,7 +38,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -47,6 +47,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -275,4 +282,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -37,7 +37,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -46,6 +46,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -276,4 +283,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; diff --git a/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch b/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch deleted file mode 100644 index e830897704..0000000000 --- a/target/linux/imx6/patches-5.4/001-ARM-dts-imx-Add-GW5907-board-support.patch +++ /dev/null @@ -1,481 +0,0 @@ -From 125120298dc05bb55a8874f07aa3f4bb6056bfb3 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:21 -0800 -Subject: [PATCH 1/4] ARM: dts: imx: Add GW5907 board support - -The Gateworks GW5907 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE Phy - - bi-color front-panel LED - - 256MB NAND boot device - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Digital IO expander (pca9555) - - Joystick 12bit adc (ads1015) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5907.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5907.dtsi | 399 ++++++++++++++++++++++++++++++++++ - 4 files changed, 429 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5907.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5907.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -418,6 +418,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw560x.dtb \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ -+ imx6dl-gw5907.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -489,6 +490,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw560x.dtb \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ -+ imx6q-gw5907.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5907"; -+ compatible = "gw,imx6dl-gw5907", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5907.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5907.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5907"; -+ compatible = "gw,imx6q-gw5907", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5907.dtsi -@@ -0,0 +1,398 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_otg_vbus: regulator-usb-otg-vbus { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_otg_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; -+ enable-active-high; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ phy-reset-gpios = <&gpio1 30 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&hdmi { -+ ddc-i2c-bus = <&i2c3>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ gpio@20 { -+ compatible = "nxp,pca9555"; -+ reg = <0x20>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ adc@48 { -+ compatible = "ti,ads1015"; -+ reg = <0x48>; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ channel@4 { -+ reg = <4>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@5 { -+ reg = <5>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ -+ channel@6 { -+ reg = <6>; -+ ti,gain = <0>; -+ ti,datarate = <5>; -+ }; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_otg_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 -+ MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch b/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch deleted file mode 100644 index 5c52bde70d..0000000000 --- a/target/linux/imx6/patches-5.4/002-ARM-dts-imx-Add-GW5910-board-support.patch +++ /dev/null @@ -1,581 +0,0 @@ -From a1fb69366bb16753f0fba6a891fbef5cdd97cfbe Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Wed, 8 Jan 2020 07:44:22 -0800 -Subject: [PATCH 2/4] ARM: dts: imx: Add GW5910 board support - -The Gateworks GW5910 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 5V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - Dual-Band Wireless MCU (CC1352, UART/I2S interrconnect to IMX6) - - WiFi/Bluetooth/BLE module (Sterling-LSW, SDIO/UART interconnect to IMX6) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Tim Harvey -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5910.dts | 14 + - arch/arm/boot/dts/imx6q-gw5910.dts | 14 + - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 491 ++++++++++++++++++++++++++++++++++ - 4 files changed, 521 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5910.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5910.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -419,6 +419,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5903.dtb \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ -+ imx6dl-gw5910.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -491,6 +492,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5903.dtb \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ -+ imx6q-gw5910.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5910"; -+ compatible = "gw,imx6dl-gw5910", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5910.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5910.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5910"; -+ compatible = "gw,imx6q-gw5910", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -0,0 +1,489 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ }; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+ -+ reg_wl: regulator-wl { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_wl>; -+ compatible = "regulator-fixed"; -+ regulator-name = "wl"; -+ gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_bt: regulator-bt { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_reg_bt>; -+ compatible = "regulator-fixed"; -+ regulator-name = "bt"; -+ gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ startup-delay-us = <100>; -+ enable-active-high; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+}; -+ -+ -+&ecspi3 { -+ cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi3>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio3 20 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+/* off-board RS232 */ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+/* serial console */ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+/* Sterling-LWB Bluetooth */ -+&uart4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart4>; -+ uart-has-rtscts; -+ status = "okay"; -+}; -+ -+/* GPS */ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_5p0v>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+/* Sterling-LWB SDIO WiFi */ -+&usdhc2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usdhc2>; -+ vmmc-supply = <®_3p3v>; -+ non-removable; -+ bus-width = <4>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_ecspi3: escpi3grp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -+ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 -+ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 -+ MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x100b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_bt: regbtgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_reg_wl: regwlgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart4: uart4grp { -+ fsl,pins = < -+ MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 -+ MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc2: usdhc2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 -+ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 -+ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 -+ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 -+ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 -+ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x170b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch b/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch deleted file mode 100644 index 32f344c588..0000000000 --- a/target/linux/imx6/patches-5.4/003-ARM-dts-imx-Add-GW5913-board-support.patch +++ /dev/null @@ -1,434 +0,0 @@ -From 169e12f99cf9d5fce752564f32fd8df96461de43 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:23 -0800 -Subject: [PATCH 3/4] ARM: dts: imx: Add GW5913 board support - -The Gateworks GW5913 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - FEC GbE RJ45 front-panel - - 1x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, nanoSIM - - 6V to 60V DC input connector - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM socket - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6q-gw5913.dts | 14 ++ - arch/arm/boot/dts/imx6qdl-gw5913.dtsi | 348 ++++++++++++++++++++++++++++++++++ - 4 files changed, 378 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5913.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5913.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ - imx6dl-hummingboard-som-v15.dtb \ -@@ -493,6 +494,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ - imx6q-hummingboard-emmc-som-v15.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5913"; -+ compatible = "gw,imx6dl-gw5913", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5913.dts -@@ -0,0 +1,14 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+ -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5913.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5913"; -+ compatible = "gw,imx6q-gw5913", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5913.dtsi -@@ -0,0 +1,347 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x20000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_5p0v: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "5P0V"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ status = "okay"; -+}; -+ -+&wdog1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+}; -+ -+&iomuxc { -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 -+ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch b/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch deleted file mode 100644 index da733ff357..0000000000 --- a/target/linux/imx6/patches-5.4/004-ARM-dts-imx-Add-GW5912-board-support.patch +++ /dev/null @@ -1,549 +0,0 @@ -From 9a820b55817011f53771e6bfebae5fe059f0a534 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Wed, 8 Jan 2020 07:44:24 -0800 -Subject: [PATCH 4/4] ARM: dts: imx: Add GW5912 board support - -The Gateworks GW5912 is an IMX6 SoC based single board computer with: - - IMX6Q or IMX6DL - - 32bit DDR3 DRAM - - GbE RJ45 front-panel - - 4x miniPCIe socket with PCI Gen2, USB2 - - 1x miniPCIe socket with PCI Gen2, USB2, mSATA - - 1x miniPCIe socket with PCI Gen2, USB2, mezzanine - - 10V to 60V DC input barrel jack - - 3axis accelerometer (lis2de12) - - GPS (ublox ZOE-M8Q) - - bi-color front-panel LED - - 256MB NAND boot device - - nanoSIM/microSD socket (with UHS-I support) - - user pushbutton - - Gateworks System Controller (hwmon, pushbutton controller, EEPROM) - - CAN Bus transceiver (mcp2562) - - RS232 transceiver (1x UART with flow-control or 2x UART (build option) - - off-board SPI connector (1x chip-select) - -Signed-off-by: Robert Jones -Reviewed-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/Makefile | 2 + - arch/arm/boot/dts/imx6dl-gw5912.dts | 13 + - arch/arm/boot/dts/imx6q-gw5912.dts | 13 + - arch/arm/boot/dts/imx6qdl-gw5912.dtsi | 461 ++++++++++++++++++++++++++++++++++ - 4 files changed, 489 insertions(+) - create mode 100644 arch/arm/boot/dts/imx6dl-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6q-gw5912.dts - create mode 100644 arch/arm/boot/dts/imx6qdl-gw5912.dtsi - ---- a/arch/arm/boot/dts/Makefile -+++ b/arch/arm/boot/dts/Makefile -@@ -420,6 +420,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6dl-gw5904.dtb \ - imx6dl-gw5907.dtb \ - imx6dl-gw5910.dtb \ -+ imx6dl-gw5912.dtb \ - imx6dl-gw5913.dtb \ - imx6dl-hummingboard.dtb \ - imx6dl-hummingboard-emmc-som-v15.dtb \ -@@ -494,6 +495,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ - imx6q-gw5904.dtb \ - imx6q-gw5907.dtb \ - imx6q-gw5910.dtb \ -+ imx6q-gw5912.dtb \ - imx6q-gw5913.dtb \ - imx6q-h100.dtb \ - imx6q-hummingboard.dtb \ ---- /dev/null -+++ b/arch/arm/boot/dts/imx6dl-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6dl.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 DualLite/Solo GW5912"; -+ compatible = "gw,imx6dl-gw5912", "gw,ventana", "fsl,imx6dl"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6q-gw5912.dts -@@ -0,0 +1,13 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+/dts-v1/; -+#include "imx6q.dtsi" -+#include "imx6qdl-gw5912.dtsi" -+ -+/ { -+ model = "Gateworks Ventana i.MX6 Dual/Quad GW5912"; -+ compatible = "gw,imx6q-gw5912", "gw,ventana", "fsl,imx6q"; -+}; ---- /dev/null -+++ b/arch/arm/boot/dts/imx6qdl-gw5912.dtsi -@@ -0,0 +1,459 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright 2019 Gateworks Corporation -+ */ -+ -+#include -+ -+/ { -+ /* these are used by bootloader for disabling nodes */ -+ aliases { -+ led0 = &led0; -+ led1 = &led1; -+ led2 = &led2; -+ nand = &gpmi; -+ usb0 = &usbh1; -+ usb1 = &usbotg; -+ }; -+ -+ chosen { -+ stdout-path = &uart2; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpio_leds>; -+ -+ led0: user1 { -+ label = "user1"; -+ gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ -+ default-state = "on"; -+ linux,default-trigger = "heartbeat"; -+ }; -+ -+ led1: user2 { -+ label = "user2"; -+ gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ -+ }; -+ -+ led2: user3 { -+ label = "user3"; -+ gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ -+ }; -+ }; -+ -+ memory@10000000 { -+ device_type = "memory"; -+ reg = <0x10000000 0x40000000>; -+ }; -+ -+ pps { -+ compatible = "pps-gpio"; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pps>; -+ gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; -+ }; -+ -+ reg_3p3v: regulator-3p3v { -+ compatible = "regulator-fixed"; -+ regulator-name = "3P3V"; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; -+ -+ reg_usb_vbus: regulator-5p0v { -+ compatible = "regulator-fixed"; -+ regulator-name = "usb_vbus"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ regulator-always-on; -+ }; -+}; -+ -+&can1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_flexcan1>; -+ status = "okay"; -+}; -+ -+&ecspi2 { -+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_ecspi2>; -+ status = "okay"; -+}; -+ -+&fec { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_enet>; -+ phy-mode = "rgmii-id"; -+ status = "okay"; -+}; -+ -+&gpmi { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_gpmi_nand>; -+ status = "okay"; -+}; -+ -+&i2c1 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c1>; -+ status = "okay"; -+ -+ gpio@23 { -+ compatible = "nxp,pca9555"; -+ reg = <0x23>; -+ gpio-controller; -+ #gpio-cells = <2>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c02"; -+ reg = <0x50>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@51 { -+ compatible = "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c02"; -+ reg = <0x52>; -+ pagesize = <16>; -+ }; -+ -+ eeprom@53 { -+ compatible = "atmel,24c02"; -+ reg = <0x53>; -+ pagesize = <16>; -+ }; -+ -+ rtc@68 { -+ compatible = "dallas,ds1672"; -+ reg = <0x68>; -+ }; -+}; -+ -+&i2c2 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c2>; -+ status = "okay"; -+}; -+ -+&i2c3 { -+ clock-frequency = <100000>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_i2c3>; -+ status = "okay"; -+ -+ accel@19 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_accel>; -+ compatible = "st,lis2de12"; -+ reg = <0x19>; -+ st,drdy-int-pin = <1>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 0>; -+ interrupt-names = "INT1"; -+ }; -+}; -+ -+&pcie { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pcie>; -+ reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; -+ status = "okay"; -+}; -+ -+&pwm1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */ -+ status = "disabled"; -+}; -+ -+&pwm2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ -+ status = "disabled"; -+}; -+ -+&pwm3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ -+ status = "disabled"; -+}; -+ -+&pwm4 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */ -+ status = "disabled"; -+}; -+ -+&uart1 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart1>; -+ rts-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>; -+ status = "okay"; -+}; -+ -+&uart2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart2>; -+ status = "okay"; -+}; -+ -+&uart5 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart5>; -+ status = "okay"; -+}; -+ -+&usbotg { -+ vbus-supply = <®_usb_vbus>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ dr_mode = "host"; -+ status = "okay"; -+}; -+ -+&usbh1 { -+ vbus-supply = <®_usb_vbus>; -+ status = "okay"; -+}; -+ -+&usdhc3 { -+ pinctrl-names = "default", "state_100mhz", "state_200mhz"; -+ pinctrl-0 = <&pinctrl_usdhc3>; -+ pinctrl-1 = <&pinctrl_usdhc3_100mhz>; -+ pinctrl-2 = <&pinctrl_usdhc3_200mhz>; -+ cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>; -+ vmmc-supply = <®_3p3v>; -+ no-1-8-v; /* firmware will remove if board revision supports */ -+ status = "okay"; -+}; -+ -+&wdog1 { -+ status = "disabled"; -+}; -+ -+&wdog2 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_wdog>; -+ fsl,ext-reset-output; -+ status = "okay"; -+}; -+ -+&iomuxc { -+ pinctrl_accel: accelmuxgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_enet: enetgrp { -+ fsl,pins = < -+ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 -+ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 -+ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 -+ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 -+ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 -+ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 -+ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 -+ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 -+ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 -+ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 -+ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 -+ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 -+ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 -+ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 -+ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_ecspi2: escpi2grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 -+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 -+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 -+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1 -+ >; -+ }; -+ -+ pinctrl_flexcan1: flexcan1grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 -+ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 -+ >; -+ }; -+ -+ pinctrl_gpio_leds: gpioledsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 -+ MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_gpmi_nand: gpminandgrp { -+ fsl,pins = < -+ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 -+ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 -+ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 -+ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 -+ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 -+ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 -+ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 -+ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 -+ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 -+ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 -+ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 -+ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 -+ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 -+ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 -+ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 -+ >; -+ }; -+ -+ pinctrl_i2c1: i2c1grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 -+ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 -+ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 -+ >; -+ }; -+ -+ pinctrl_i2c2: i2c2grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 -+ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_i2c3: i2c3grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 -+ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 -+ >; -+ }; -+ -+ pinctrl_pcie: pciegrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b0 -+ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_pps: ppsgrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm1: pwm1grp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm2: pwm2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm3: pwm3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_pwm4: pwm4grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_uart1: uart1grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart2: uart2grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x4001b0b1 -+ >; -+ }; -+ -+ pinctrl_uart5: uart5grp { -+ fsl,pins = < -+ MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 -+ >; -+ }; -+ -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059 -+ >; -+ }; -+ -+ pinctrl_usdhc3: usdhc3grp { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x17059 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x17059 -+ >; -+ }; -+ -+ pinctrl_usdhc3_100mhz: usdhc3grp100mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170b9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170b9 -+ >; -+ }; -+ -+ pinctrl_usdhc3_200mhz: usdhc3grp200mhz { -+ fsl,pins = < -+ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 -+ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 -+ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 -+ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 -+ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 -+ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 -+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x170f9 /* CD */ -+ MX6QDL_PAD_NANDF_CS1__SD3_VSELECT 0x170f9 -+ >; -+ }; -+ -+ pinctrl_wdog: wdoggrp { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT3__WDOG2_B 0x1b0b0 -+ >; -+ }; -+}; diff --git a/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index f05c1f1ec1..0000000000 --- a/target/linux/imx6/patches-5.4/005-v5.7-ARM-dts-imx6qdl-gw553x-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 62e7f0b553038e3a1a1b2b067dd1fbdacd634e37 Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Fri, 14 Feb 2020 13:02:41 -0800 -Subject: [PATCH] ARM: dts: imx6qdl-gw553x: add lsm9ds1 iio imu/magn support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw553x.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw553x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw553x.dtsi -@@ -173,6 +173,25 @@ - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <2 IRQ_TYPE_EDGE_RISING>; -+ }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio7>; -+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH>; -+ }; -+ - ltc3676: pmic@3c { - compatible = "lltc,ltc3676"; - reg = <0x3c>; -@@ -426,6 +445,12 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b0b0 -+ >; -+ }; -+ - pinctrl_ipu1_csi0: ipu1csi0grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 -@@ -449,6 +474,12 @@ - >; - }; - -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 diff --git a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch b/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch deleted file mode 100644 index 1d8844fb0d..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx-ventana-add-fxos8700-on-gateworks-boards.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 66d19a4f8d0fa7539f90cad64d793b4dac6f6e5d Mon Sep 17 00:00:00 2001 -From: Robert Jones -Date: Fri, 14 Feb 2020 13:01:55 -0800 -Subject: [PATCH] ARM: dts: imx: ventana: add fxos8700 on gateworks boards - -Add fxos8700 iio imu entries for Gateworks ventana SBCs. - -Signed-off-by: Robert Jones -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw52xx.dtsi | 5 +++++ - arch/arm/boot/dts/imx6qdl-gw53xx.dtsi | 5 +++++ - arch/arm/boot/dts/imx6qdl-gw54xx.dtsi | 5 +++++ - 3 files changed, 15 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi -@@ -313,6 +313,11 @@ - interrupts = <12 2>; - wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { ---- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi -@@ -304,6 +304,11 @@ - interrupts = <11 2>; - wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { ---- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi -@@ -361,6 +361,11 @@ - interrupts = <12 2>; - wakeup-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>; - }; -+ -+ accel@1e { -+ compatible = "nxp,fxos8700"; -+ reg = <0x1e>; -+ }; - }; - - &ldb { diff --git a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch b/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch deleted file mode 100644 index 72a98a2b15..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.7-ARM-dts-imx6qdl-gw5910-add-CC1352-UART.patch +++ /dev/null @@ -1,54 +0,0 @@ -From d2cf2f91ba5b6d7696b1870e28017a3e1a7a1bb8 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Fri, 28 Feb 2020 11:46:07 -0800 -Subject: [PATCH] ARM: dts: imx6qdl-gw5910: add CC1352 UART - -The GW5910-C revision adds a TI CC1352 connected to IMX UART4 - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 25 +++++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -218,6 +218,14 @@ - status = "okay"; - }; - -+/* cc1352 */ -+&uart3 { -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_uart3>; -+ uart-has-rtscts; -+ status = "okay"; -+}; -+ - /* Sterling-LWB Bluetooth */ - &uart4 { - pinctrl-names = "default"; -@@ -409,6 +417,23 @@ - >; - }; - -+ pinctrl_uart3: uart3grp { -+ fsl,pins = < -+ MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 -+ MX6QDL_PAD_EIM_D23__UART3_RTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 -+ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x4001b0b1 /* DIO20 */ -+ MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x4001b0b1 /* DIO14 */ -+ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x4001b0b1 /* DIO15 */ -+ MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x1b0b1 /* TMS */ -+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b1 /* TCK */ -+ MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x1b0b1 /* TDO */ -+ MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x1b0b1 /* TDI */ -+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x4001b0b1 /* RST# */ -+ >; -+ }; -+ - pinctrl_uart4: uart4grp { - fsl,pins = < - MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 diff --git a/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch b/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch deleted file mode 100644 index 8d436be631..0000000000 --- a/target/linux/imx6/patches-5.4/006-v5.8-ARM-dts-imx6qdl-gw552x-add-USB-OTG-support.patch +++ /dev/null @@ -1,45 +0,0 @@ -From 957743b79b1ebb710f5498b61a212cebc302e685 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Wed, 29 Apr 2020 08:22:35 -0700 -Subject: [PATCH 01/20] ARM: dts: imx6qdl-gw552x: add USB OTG support - -The GW552x-B board revision adds USB OTG support. - -Enable the device-tree node and configure the OTG_ID pin. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw552x.dtsi | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw552x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw552x.dtsi -@@ -258,6 +258,14 @@ - status = "okay"; - }; - -+&usbotg { -+ vbus-supply = <®_5p0v>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_usbotg>; -+ disable-over-current; -+ status = "okay"; -+}; -+ - &wdog1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_wdog>; -@@ -359,6 +367,12 @@ - >; - }; - -+ pinctrl_usbotg: usbotggrp { -+ fsl,pins = < -+ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059 -+ >; -+ }; -+ - pinctrl_wdog: wdoggrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 diff --git a/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index 537b6f4d67..0000000000 --- a/target/linux/imx6/patches-5.4/007-v5.8-ARM-dts-imx6qdl-gw560x-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 9e72702a3d9a967edac02d8e937bce2b68b77814 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 13:59:37 -0700 -Subject: [PATCH 05/20] ARM: dts: imx6qdl-gw560x: add lsm9ds1 iio imu/magn - support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw560x.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw560x.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw560x.dtsi -@@ -295,6 +295,15 @@ - VDDIO-supply = <®_3p3v>; - }; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <9 IRQ_TYPE_EDGE_RISING>; -+ }; -+ - tca8418: keypad@34 { - compatible = "ti,tca8418"; - pinctrl-names = "default"; -@@ -389,6 +398,16 @@ - }; - }; - }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <6 IRQ_TYPE_LEVEL_HIGH>; -+ }; - }; - - &i2c3 { -@@ -609,6 +628,12 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x1b0b0 -+ >; -+ }; -+ - pinctrl_keypad: keypadgrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x0001b0b0 /* KEYPAD_IRQ# */ -@@ -616,6 +641,12 @@ - >; - }; - -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0 /* PCI_RST# */ diff --git a/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch b/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch deleted file mode 100644 index 4d24b40535..0000000000 --- a/target/linux/imx6/patches-5.4/008-v5.8-ARM-dts-imx6qdl-gw5904-add-lsm9ds1-iio-imu-magn-supp.patch +++ /dev/null @@ -1,69 +0,0 @@ -From c8756cbad816954be912ba32277ccd55fe7acc01 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 13:59:56 -0700 -Subject: [PATCH 06/20] ARM: dts: imx6qdl-gw5904: add lsm9ds1 iio imu/magn - support - -Add one node for the accel/gyro i2c device and another for the separate -magnetometer device in the lsm9ds1. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5904.dtsi | 31 +++++++++++++++++++++++++++++++ - 1 file changed, 31 insertions(+) - ---- a/arch/arm/boot/dts/imx6qdl-gw5904.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5904.dtsi -@@ -248,6 +248,15 @@ - pinctrl-0 = <&pinctrl_i2c2>; - status = "okay"; - -+ magn@1c { -+ compatible = "st,lsm9ds1-magn"; -+ reg = <0x1c>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_mag>; -+ interrupt-parent = <&gpio5>; -+ interrupts = <17 IRQ_TYPE_EDGE_RISING>; -+ }; -+ - ltc3676: pmic@3c { - compatible = "lltc,ltc3676"; - reg = <0x3c>; -@@ -320,6 +329,16 @@ - }; - }; - }; -+ -+ imu@6a { -+ compatible = "st,lsm9ds1-imu"; -+ reg = <0x6a>; -+ st,drdy-int-pin = <1>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&pinctrl_imu>; -+ interrupt-parent = <&gpio4>; -+ interrupts = <18 IRQ_TYPE_LEVEL_HIGH>; -+ }; - }; - - &i2c3 { -@@ -501,6 +520,18 @@ - >; - }; - -+ pinctrl_imu: imugrp { -+ fsl,pins = < -+ MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 -+ >; -+ }; -+ -+ pinctrl_mag: maggrp { -+ fsl,pins = < -+ MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x1b0b0 -+ >; -+ }; -+ - pinctrl_pcie: pciegrp { - fsl,pins = < - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ diff --git a/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch b/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch deleted file mode 100644 index 545a6fddd5..0000000000 --- a/target/linux/imx6/patches-5.4/009-v5.8-ARM-dts-imx6qdl-gw5910-add-support-for-bcm4330-bt.patch +++ /dev/null @@ -1,82 +0,0 @@ -From d40edafe80569c5b4d8893c1cdd1060c54ef433c Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 14:54:15 -0700 -Subject: [PATCH 07/20] ARM: dts: imx6qdl-gw5910: add support for bcm4330-bt - -The Sterling-LWB has a BCM4330 which has a UART based bluetooth -HCI. Add support for binding to the bcm_hci driver to take care -of handling the shutdown gpio and loading firmware. - -Because the shutdown gpio is more of an enable than a regulator -go ahead and replace the regulator with a shutdown-gpio. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 32 ++++++++++++-------------------- - 1 file changed, 12 insertions(+), 20 deletions(-) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -81,19 +81,6 @@ - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; -- -- reg_bt: regulator-bt { -- pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_reg_bt>; -- compatible = "regulator-fixed"; -- regulator-name = "bt"; -- gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; -- startup-delay-us = <100>; -- enable-active-high; -- regulator-min-microvolt = <3300000>; -- regulator-max-microvolt = <3300000>; -- regulator-always-on; -- }; - }; - - -@@ -229,9 +216,14 @@ - /* Sterling-LWB Bluetooth */ - &uart4 { - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_uart4>; -+ pinctrl-0 = <&pinctrl_uart4>,<&pinctrl_bten>; - uart-has-rtscts; - status = "okay"; -+ -+ bluetooth { -+ compatible = "brcm,bcm4330-bt"; -+ shutdown-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; -+ }; - }; - - /* GPS */ -@@ -286,6 +278,12 @@ - >; - }; - -+ pinctrl_bten: btengrp { -+ fsl,pins = < -+ MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -+ >; -+ }; -+ - pinctrl_ecspi3: escpi3grp { - fsl,pins = < - MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 -@@ -391,12 +389,6 @@ - >; - }; - -- pinctrl_reg_bt: regbtgrp { -- fsl,pins = < -- MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b1 -- >; -- }; -- - pinctrl_reg_wl: regwlgrp { - fsl,pins = < - MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x1b0b1 diff --git a/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch b/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch deleted file mode 100644 index ce2fa2ee90..0000000000 --- a/target/linux/imx6/patches-5.4/010-v5.8-ARM-dts-imx6qdl-gw5910-fix-wlan-regulator.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 4792ff641cc8993606013d27d84cda59d8cc76c5 Mon Sep 17 00:00:00 2001 -From: Tim Harvey -Date: Tue, 12 May 2020 15:02:34 -0700 -Subject: [PATCH 08/20] ARM: dts: imx6qdl-gw5910: fix wlan regulator - -Connect the wl_reg regulator to usdhc2 such that it can be enabled -and disabled as needed. There is no need for this to be always-on. - -Signed-off-by: Tim Harvey -Signed-off-by: Shawn Guo ---- - arch/arm/boot/dts/imx6qdl-gw5910.dtsi | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -+++ b/arch/arm/boot/dts/imx6qdl-gw5910.dtsi -@@ -79,7 +79,6 @@ - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; -- regulator-always-on; - }; - }; - -@@ -249,7 +248,7 @@ - &usdhc2 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_usdhc2>; -- vmmc-supply = <®_3p3v>; -+ vmmc-supply = <®_wl>; - non-removable; - bus-width = <4>; - status = "okay"; diff --git a/target/linux/imx6/patches-5.4/100-bootargs.patch b/target/linux/imx6/patches-5.4/100-bootargs.patch deleted file mode 100644 index cf63a3bdb1..0000000000 --- a/target/linux/imx6/patches-5.4/100-bootargs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/arm/boot/dts/imx6dl-wandboard.dts -+++ b/arch/arm/boot/dts/imx6dl-wandboard.dts -@@ -16,4 +16,8 @@ - device_type = "memory"; - reg = <0x10000000 0x40000000>; - }; -+ -+ chosen { -+ bootargs = "console=ttymxc0,115200"; -+ }; - }; diff --git a/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch b/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch deleted file mode 100644 index bae9df1734..0000000000 --- a/target/linux/imx6/patches-5.4/301-apalis-ixora-dts-leds.patch +++ /dev/null @@ -1,86 +0,0 @@ -arm: dts: apalis-ixora: Add status LEDs aliases - -Signed-off-by: Petr Å tetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -60,6 +60,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -127,22 +131,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; - gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; - gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -61,6 +61,10 @@ - i2c2 = &i2c2; - rtc0 = &rtc_i2c; - rtc1 = &snvs_rtc; -+ led-boot = &led_boot; -+ led-failsafe = &led_failsafe; -+ led-running = &led_running; -+ led-upgrade = &led_upgrade; - }; - - chosen { -@@ -128,22 +132,22 @@ - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_leds_ixora>; - -- led4-green { -+ led_running: led4-green { - label = "LED_4_GREEN"; -- gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>; - }; - -- led4-red { -+ led_upgrade: led4-red { - label = "LED_4_RED"; -- gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; -+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; - }; - -- led5-green { -+ led_boot: led5-green { - label = "LED_5_GREEN"; - gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; - }; - -- led5-red { -+ led_failsafe: led5-red { - label = "LED_5_RED"; - gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; - }; diff --git a/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch b/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch deleted file mode 100644 index f5afb66371..0000000000 --- a/target/linux/imx6/patches-5.4/302-apalis-ixora-dts-reset-button.patch +++ /dev/null @@ -1,76 +0,0 @@ -arm: dts: apalis-ixora: Add switch3 as reset button - -Signed-off-by: Petr Å tetiar - ---- a/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora-v1.1.dts -@@ -74,7 +74,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -83,6 +83,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -298,4 +305,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; ---- a/arch/arm/boot/dts/imx6q-apalis-ixora.dts -+++ b/arch/arm/boot/dts/imx6q-apalis-ixora.dts -@@ -73,7 +73,7 @@ - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; -- pinctrl-0 = <&pinctrl_gpio_keys>; -+ pinctrl-0 = <&pinctrl_gpio_keys &pinctrl_switch3_ixora>; - - wakeup { - label = "Wake-Up"; -@@ -82,6 +82,13 @@ - debounce-interval = <10>; - wakeup-source; - }; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio1 16 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <10>; -+ }; - }; - - lcd_display: disp0 { -@@ -299,4 +306,10 @@ - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 - >; - }; -+ -+ pinctrl_switch3_ixora: switch3ixora { -+ fsl,pins = < -+ MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x1b0b0 -+ >; -+ }; - }; diff --git a/target/linux/imx6/profiles/100-default.mk b/target/linux/imx6/profiles/100-default.mk deleted file mode 100644 index a025b88888..0000000000 --- a/target/linux/imx6/profiles/100-default.mk +++ /dev/null @@ -1,14 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -# -# Copyright (C) 2013 OpenWrt.org - -define Profile/Default - PRIORITY:=1 - NAME:=Default Profile -endef - -define Profile/Default/Description - Package set compatible with most NXP i.MX 6 based boards. -endef - -$(eval $(call Profile,Default))