From: Ulrich Hecht Date: Wed, 14 Sep 2016 16:45:47 +0000 (+0200) Subject: clk: renesas: r8a7796: Add SYS-DMAC clocks X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=cf8fe97cad4a248bc7baaf39ecde2aece72f8618;p=openwrt%2Fstaging%2Fblogic.git clk: renesas: r8a7796: Add SYS-DMAC clocks Signed-off-by: Ulrich Hecht Signed-off-by: Geert Uytterhoeven --- diff --git a/drivers/clk/renesas/r8a7796-cpg-mssr.c b/drivers/clk/renesas/r8a7796-cpg-mssr.c index eb347ed265f2..d94a870de746 100644 --- a/drivers/clk/renesas/r8a7796-cpg-mssr.c +++ b/drivers/clk/renesas/r8a7796-cpg-mssr.c @@ -109,6 +109,9 @@ static const struct cpg_core_clk r8a7796_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a7796_mod_clks[] __initconst = { + DEF_MOD("sys-dmac2", 217, R8A7796_CLK_S0D3), + DEF_MOD("sys-dmac1", 218, R8A7796_CLK_S0D3), + DEF_MOD("sys-dmac0", 219, R8A7796_CLK_S0D3), DEF_MOD("cmt3", 300, R8A7796_CLK_R), DEF_MOD("cmt2", 301, R8A7796_CLK_R), DEF_MOD("cmt1", 302, R8A7796_CLK_R),