From: Stefan Roese <sr@denx.de>
Date: Tue, 25 Feb 2014 10:07:22 +0000 (+0100)
Subject: arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=cc07294bc704694ae33db75b25ac557e5917a83f;p=project%2Fbcm63xx%2Fu-boot.git

arm: am335x: DXR2: Reset SMSC LAN9303 switch via GPIO upon bootup

Since the switch may be re-configured for VLAN usage in Linux (or any
other OS), lets reset the switch to its default register values upon
power-up. Otherwise network might not be available in U-Boot.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Roger Meier <r.meier@siemens.com>
Cc: Lukas Stockmann <lukas.stockmann@siemens.com>
Cc: Tom Rini <trini@ti.com>
---

diff --git a/board/siemens/dxr2/board.c b/board/siemens/dxr2/board.c
index 9b8f538312..217237900e 100644
--- a/board/siemens/dxr2/board.c
+++ b/board/siemens/dxr2/board.c
@@ -232,6 +232,13 @@ int board_eth_init(bd_t *bis)
 
 	factoryset_setenv();
 
+	/* Reset SMSC LAN9303 switch for default configuration */
+	gpio_request(GPIO_LAN9303_NRST, "nRST");
+	gpio_direction_output(GPIO_LAN9303_NRST, 0);
+	/* assert active low reset for 200us */
+	udelay(200);
+	gpio_set_value(GPIO_LAN9303_NRST, 1);
+
 	/* Set rgmii mode and enable rmii clock to be sourced from chip */
 	writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel);
 
diff --git a/board/siemens/dxr2/mux.c b/board/siemens/dxr2/mux.c
index 5c22999bb8..f2314b5d3e 100644
--- a/board/siemens/dxr2/mux.c
+++ b/board/siemens/dxr2/mux.c
@@ -221,6 +221,8 @@ static struct module_pin_mux gpios_pin_mux[] = {
 	{OFFSET(ain0), MODE(7) | RXACTIVE | PULLUDDIS},
 	{OFFSET(vrefp), MODE(7) | RXACTIVE | PULLUDDIS},
 	{OFFSET(vrefn), MODE(7) | RXACTIVE | PULLUDDIS},
+	/* nRST for SMSC LAN9303 switch - GPIO2_24 */
+	{OFFSET(lcd_pclk), MODE(7) },			/* LAN9303 nRST */
 	{-1},
 };
 
diff --git a/include/configs/dxr2.h b/include/configs/dxr2.h
index e95d74c04c..75f7812e7d 100644
--- a/include/configs/dxr2.h
+++ b/include/configs/dxr2.h
@@ -26,6 +26,7 @@
 
 #define BOARD_DFU_BUTTON_GPIO	27
 #define BOARD_DFU_BUTTON_LED	64
+#define GPIO_LAN9303_NRST	88	/* GPIO2_24 = gpio88 */
 
 #undef CONFIG_DOS_PARTITION
 #undef CONFIG_CMD_FAT