From: Ido Schimmel Date: Sun, 20 Jan 2019 06:50:39 +0000 (+0000) Subject: mlxsw: reg: Add underlay egress RIF field in RTDP register X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c9417498a6fe7090f9b93834bc3296154bed98bf;p=openwrt%2Fstaging%2Fblogic.git mlxsw: reg: Add underlay egress RIF field in RTDP register In Spectrum-2 we need to specify the underlay egress router interface when performing IP-in-IP and NVE packet decapsulation in the underlay router. Signed-off-by: Ido Schimmel Reviewed-by: Petr Machata Signed-off-by: David S. Miller --- diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h index fb75d7ad0716..5f8066ab7d40 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/reg.h +++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h @@ -7210,6 +7210,13 @@ MLXSW_ITEM32(reg, rtdp, type, 0x00, 28, 4); */ MLXSW_ITEM32(reg, rtdp, tunnel_index, 0x00, 0, 24); +/* reg_rtdp_egress_router_interface + * Underlay egress router interface. + * Valid range is from 0 to cap_max_router_interfaces - 1 + * Access: RW + */ +MLXSW_ITEM32(reg, rtdp, egress_router_interface, 0x40, 0, 16); + /* IPinIP */ /* reg_rtdp_ipip_irif