From: Felipe Balbi <balbi@ti.com>
Date: Thu, 31 May 2012 08:00:28 +0000 (+0300)
Subject: usb: dwc3: ep0: be careful with endianness on SetSEL command
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c8cf7af452ad2eb49cad13450090cdc432b5a06d;p=openwrt%2Fstaging%2Fblogic.git

usb: dwc3: ep0: be careful with endianness on SetSEL command

USB is always little endian, but this driver
could run on non little endian cpus. Let's
be carefull with that.

Signed-off-by: Felipe Balbi <balbi@ti.com>
---

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index 83fcf392dda7..3185fe14591b 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -515,8 +515,8 @@ static void dwc3_ep0_set_sel_cmpl(struct usb_ep *ep, struct usb_request *req)
 
 	dwc->u1sel = timing.u1sel;
 	dwc->u1pel = timing.u1pel;
-	dwc->u2sel = timing.u2sel;
-	dwc->u2pel = timing.u2pel;
+	dwc->u2sel = le16_to_cpu(timing.u2sel);
+	dwc->u2pel = le16_to_cpu(timing.u2pel);
 
 	reg = dwc3_readl(dwc->regs, DWC3_DCTL);
 	if (reg & DWC3_DCTL_INITU2ENA)