From: J. German Rivera <German.Rivera@freescale.com>
Date: Fri, 4 Dec 2015 22:56:04 +0000 (-0600)
Subject: arm64: dts: Added syscon-reboot node for FSL's LS2080A SoC
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c7a5675f525c668ec4dabd06705d5243f0d9da90;p=openwrt%2Fstaging%2Fblogic.git

arm64: dts: Added syscon-reboot node for FSL's LS2080A SoC

Added sys-reboot node to the FSL's LS2080A SoC DT to leverage
the ARM-generic reboot mechanism for this SoC. This mechanism
is enabled through CONFIG_POWER_RESET_SYSCON.

Signed-off-by: J. German Rivera <German.Rivera@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
---

diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
index e81cd48d6245..65ac35f12fc4 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi
@@ -153,6 +153,18 @@
 		};
 	};
 
+	rstcr: syscon@1e60000 {
+		compatible = "fsl,ls2080a-rstcr", "syscon";
+		reg = <0x0 0x1e60000 0x0 0x4>;
+	};
+
+	reboot {
+		compatible ="syscon-reboot";
+		regmap = <&rstcr>;
+		offset = <0x0>;
+		mask = <0x2>;
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <1 13 0x8>, /* Physical Secure PPI, active-low */