From: Shiji Yang Date: Sun, 19 Feb 2023 01:06:32 +0000 (+0800) Subject: ramips: correct the PCIe port number for Zbtlink ZBT-WE1326 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c77913be5be5f11a0f20dba1b45b96470099e8a8;p=openwrt%2Fstaging%2Fthess.git ramips: correct the PCIe port number for Zbtlink ZBT-WE1326 MT7621 gets a new PCIe driver in the 5.15+ kernel. Allocating wrong PCIe port will cause the PCIe NIC to not work properly. This commit fixes the wrong port numbers on Zbtlink ZBT-WE1326. According to the bootlog, MT7612E (5 GHz) is connected to pcie1, and MT7603E (2 GHz) is connected to pcie2: [4.197658] mt7621-pci 1e140000.pcie: pcie0 no card, disable it (RST & CLK) [4.204609] mt7621-pci 1e140000.pcie: PCIE1 enabled [4.209476] mt7621-pci 1e140000.pcie: PCIE2 enabled ... [4.307988] pci 0000:01:00.0: [14c3:7662] type 00 class 0x028000 [4.367206] pci 0000:02:00.0: [14c3:7603] type 00 class 0x028000 Signed-off-by: Shiji Yang --- diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts index 4e30dfb6c9..99b9652b7a 100644 --- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts +++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-we1326.dts @@ -121,7 +121,7 @@ status = "okay"; }; -&pcie0 { +&pcie1 { wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>; @@ -135,7 +135,7 @@ }; }; -&pcie1 { +&pcie2 { wifi1: wifi@0,0 { compatible = "mediatek,mt76"; reg = <0x0000 0 0 0 0>;