From: Felix Fietkau Date: Mon, 24 Dec 2007 22:47:27 +0000 (+0000) Subject: watchdog driver for RB 532 X-Git-Tag: reboot~27417 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c65e66ac49dfecf55bfbf61a10eebf2443b82b92;p=openwrt%2Fstaging%2Fblogic.git watchdog driver for RB 532 Here is the driver for the hardware watchdog timer integrated in RB 532 (as part of the SoC IDT 79RC32434). File include/asm-mips/rc32434/integ.h is taken from Mikrotik RB 532 kernel patch. Signed-off-by: Ondrej Zajicek SVN-Revision: 9896 --- diff --git a/target/linux/rb532/files/drivers/char/watchdog/rc32434_wdt.c b/target/linux/rb532/files/drivers/char/watchdog/rc32434_wdt.c new file mode 100644 index 000000000000..2266329defc3 --- /dev/null +++ b/target/linux/rb532/files/drivers/char/watchdog/rc32434_wdt.c @@ -0,0 +1,240 @@ +/* + * RC32434_WDT 0.01: IDT Interprise 79RC32434 watchdog driver + * Copyright (c) Ondrej Zajicek , 2006 + * + * based on + * + * SoftDog 0.05: A Software Watchdog Device + * + * (c) Copyright 1996 Alan Cox , All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define DEFAULT_TIMEOUT 15 /* (secs) Default is 15 seconds */ +#define MAX_TIMEOUT 20 +/* + * (secs) Max is 20 seconds + * (max frequency of counter is ~200 MHz, counter is 32-bit unsigned int) + */ + +#define NAME "rc32434_wdt" +#define VERSION "0.1" + +static INTEG_t rc_wdt = (INTEG_t) INTEG_VirtualAddress; + +static int expect_close = 0; +static int access = 0; +static int timeout = 0; + +static int nowayout = WATCHDOG_NOWAYOUT; +module_param(nowayout, int, 0); +MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); +MODULE_LICENSE("GPL"); + + +static inline void start_wdt(void) +{ + rc_wdt -> wtcount = 0; + rc_wdt -> errcs |= ERRCS_wre_m; + rc_wdt -> wtc |= WTC_en_m; +} + +static inline void stop_wdt(void) +{ + rc_wdt -> wtc &= ~WTC_en_m; + rc_wdt -> errcs &= ~ERRCS_wre_m; +} + +static inline void set_wdt(int new_timeout) +{ + u32 cmp = new_timeout * mips_hpt_frequency; + u32 state; + + timeout = new_timeout; + /* + * store and disable WTC + */ + state = rc_wdt -> wtc & WTC_en_m; + rc_wdt -> wtc &= ~WTC_en_m; + + rc_wdt -> wtcount = 0; + rc_wdt -> wtcompare = cmp; + + /* + * restore WTC + */ + rc_wdt -> wtc |= state; +} + +static inline void update_wdt(void) +{ + rc_wdt -> wtcount = 0; +} + +/* + * Allow only one person to hold it open + */ + +static int wdt_open(struct inode *inode, struct file *file) +{ + if (access) + return -EBUSY; + if (nowayout) { + __module_get(THIS_MODULE); + } + /* + * Activate timer + */ + start_wdt(); + printk(KERN_INFO NAME ": enabling watchdog timer\n"); + access = 1; + return 0; +} + +static int wdt_release(struct inode *inode, struct file *file) +{ + /* + * Shut off the timer. + * Lock it in if it's a module and we set nowayout + */ + if (expect_close && nowayout == 0) { + stop_wdt (); + printk(KERN_INFO NAME ": disabling watchdog timer\n"); + module_put(THIS_MODULE); + } else { + printk (KERN_CRIT NAME ": device closed unexpectedly. WDT will not stop!\n"); + } + access = 0; + return 0; +} + +static ssize_t wdt_write(struct file *file, const char *data, size_t len, loff_t *ppos) +{ + /* + * Refresh the timer. + */ + if (len) { + if (!nowayout) { + size_t i; + + /* In case it was set long ago */ + expect_close = 0; + + for (i = 0; i != len; i++) { + char c; + if (get_user(c, data + i)) + return -EFAULT; + if (c == 'V') + expect_close = 1; + } + } + update_wdt (); + return len; + } + return 0; +} + +static int wdt_ioctl(struct inode *inode, struct file *file, + unsigned int cmd, unsigned long arg) +{ + int new_timeout; + static struct watchdog_info ident = { + .options = WDIOF_SETTIMEOUT | + WDIOF_KEEPALIVEPING | + WDIOF_MAGICCLOSE, + .firmware_version = 0, + .identity = "RC32434_WDT Watchdog", + }; + switch (cmd) { + default: + return -ENOTTY; + case WDIOC_GETSUPPORT: + if(copy_to_user((struct watchdog_info *)arg, &ident, sizeof(ident))) + return -EFAULT; + return 0; + case WDIOC_GETSTATUS: + case WDIOC_GETBOOTSTATUS: + return put_user(0,(int *)arg); + case WDIOC_KEEPALIVE: + update_wdt(); + return 0; + case WDIOC_SETTIMEOUT: + if (get_user(new_timeout, (int *)arg)) + return -EFAULT; + if (new_timeout < 1) + return -EINVAL; + if (new_timeout > MAX_TIMEOUT) + return -EINVAL; + set_wdt(new_timeout); + /* Fall */ + case WDIOC_GETTIMEOUT: + return put_user(timeout, (int *)arg); + } +} + +static struct file_operations wdt_fops = { + owner: THIS_MODULE, + llseek: no_llseek, + write: wdt_write, + ioctl: wdt_ioctl, + open: wdt_open, + release: wdt_release, +}; + +static struct miscdevice wdt_miscdev = { + minor: WATCHDOG_MINOR, + name: "watchdog", + fops: &wdt_fops, +}; + +static char banner[] __initdata = KERN_INFO NAME ": Watchdog Timer version " VERSION ", timer margin: %d sec\n"; + +static int __init watchdog_init(void) +{ + int ret; + + /* + * There should be check for RC32434 SoC + */ + if (mips_machgroup != MACH_GROUP_MIKROTIK) return -1; + + ret = misc_register(&wdt_miscdev); + + if (ret) + return ret; + + stop_wdt(); + set_wdt(DEFAULT_TIMEOUT); + + printk(banner, timeout); + + return 0; +} + +static void __exit watchdog_exit(void) +{ + misc_deregister(&wdt_miscdev); +} + +module_init(watchdog_init); +module_exit(watchdog_exit); diff --git a/target/linux/rb532/files/include/asm-mips/rc32434/integ.h b/target/linux/rb532/files/include/asm-mips/rc32434/integ.h new file mode 100644 index 000000000000..a9e99e4be71b --- /dev/null +++ b/target/linux/rb532/files/include/asm-mips/rc32434/integ.h @@ -0,0 +1,76 @@ +#ifndef __IDT_INTEG_H__ +#define __IDT_INTEG_H__ + +/******************************************************************************* + * + * Copyright 2002 Integrated Device Technology, Inc. + * All rights reserved. + * + * System Integrity register definition. + * + * File : $Id: integ.h,v 1.3 2002/06/06 18:34:04 astichte Exp $ + * + * Author : ryan.holmQVist@idt.com + * Date : 20011005 + * Update : + * $Log: integ.h,v $ + * Revision 1.3 2002/06/06 18:34:04 astichte + * Added XXX_PhysicalAddress and XXX_VirtualAddress + * + * Revision 1.2 2002/06/05 18:32:33 astichte + * Removed IDTField + * + * Revision 1.1 2002/05/29 17:33:22 sysarch + * jba File moved from vcode/include/idt/acacia + * + ******************************************************************************/ + +enum +{ + INTEG0_PhysicalAddress = 0x18030000, + INTEG_PhysicalAddress = INTEG0_PhysicalAddress, // Default + + INTEG0_VirtualAddress = 0xb8030000, + INTEG_VirtualAddress = INTEG0_VirtualAddress, // Default +} ; + +// if you are looing for CEA, try rst.h +typedef struct +{ + u32 filler [0xc] ; // 0x30 bytes unused. + u32 errcs ; // sticky use ERRCS_ + u32 wtcount ; // Watchdog timer count reg. + u32 wtcompare ; // Watchdog timer timeout value. + u32 wtc ; // Watchdog timer control. use WTC_ +} volatile *INTEG_t ; + +enum +{ + ERRCS_wto_b = 0, // In INTEG_t -> errcs + ERRCS_wto_m = 0x00000001, + ERRCS_wne_b = 1, // In INTEG_t -> errcs + ERRCS_wne_m = 0x00000002, + ERRCS_ucw_b = 2, // In INTEG_t -> errcs + ERRCS_ucw_m = 0x00000004, + ERRCS_ucr_b = 3, // In INTEG_t -> errcs + ERRCS_ucr_m = 0x00000008, + ERRCS_upw_b = 4, // In INTEG_t -> errcs + ERRCS_upw_m = 0x00000010, + ERRCS_upr_b = 5, // In INTEG_t -> errcs + ERRCS_upr_m = 0x00000020, + ERRCS_udw_b = 6, // In INTEG_t -> errcs + ERRCS_udw_m = 0x00000040, + ERRCS_udr_b = 7, // In INTEG_t -> errcs + ERRCS_udr_m = 0x00000080, + ERRCS_sae_b = 8, // In INTEG_t -> errcs + ERRCS_sae_m = 0x00000100, + ERRCS_wre_b = 9, // In INTEG_t -> errcs + ERRCS_wre_m = 0x00000200, + + WTC_en_b = 0, // In INTEG_t -> wtc + WTC_en_m = 0x00000001, + WTC_to_b = 1, // In INTEG_t -> wtc + WTC_to_m = 0x00000002, +} ; + +#endif // __IDT_INTEG_H__ diff --git a/target/linux/rb532/patches/520-rc32434_wdt.patch b/target/linux/rb532/patches/520-rc32434_wdt.patch new file mode 100644 index 000000000000..7864d1536bdc --- /dev/null +++ b/target/linux/rb532/patches/520-rc32434_wdt.patch @@ -0,0 +1,43 @@ +diff -ur linux-2.6.22.4.old/arch/mips/kernel/time.c linux-2.6.22.4.new/arch/mips/kernel/time.c +--- linux-2.6.22.4.old/arch/mips/kernel/time.c 2007-08-21 06:33:06.000000000 +0200 ++++ linux-2.6.22.4.new/arch/mips/kernel/time.c 2007-12-24 17:13:43.000000000 +0100 +@@ -478,3 +478,5 @@ + EXPORT_SYMBOL(to_tm); + EXPORT_SYMBOL(rtc_mips_set_time); + EXPORT_SYMBOL(rtc_mips_get_time); ++EXPORT_SYMBOL(mips_hpt_frequency); ++ +diff -ur linux-2.6.22.4.old/drivers/char/watchdog/Kconfig linux-2.6.22.4.new/drivers/char/watchdog/Kconfig +--- linux-2.6.22.4.old/drivers/char/watchdog/Kconfig 2007-08-21 06:33:06.000000000 +0200 ++++ linux-2.6.22.4.new/drivers/char/watchdog/Kconfig 2007-12-24 17:13:43.000000000 +0100 +@@ -575,6 +575,19 @@ + To compile this driver as a module, choose M here: the + module will be called rm9k_wdt. + ++config RC32434_WDT ++ tristate "IDT Interprise 79RC32434 SoC hardware watchdog" ++ depends on WATCHDOG && MIKROTIK_RB500 ++ help ++ This is a driver for hardware watchdog integrated in IDT Interprise ++ 79RC32434 SoC. This watchdog simply watches your kernel to make sure ++ it doesn't freeze, and if it does, it reboots your computer after a ++ certain amount of time. ++ ++ To compile this driver as a module, choose M here: the module will be ++ called rc32434_wdt. ++ ++ + # S390 Architecture + + config ZVM_WATCHDOG +diff -ur linux-2.6.22.4.old/drivers/char/watchdog/Makefile linux-2.6.22.4.new/drivers/char/watchdog/Makefile +--- linux-2.6.22.4.old/drivers/char/watchdog/Makefile 2007-08-21 06:33:06.000000000 +0200 ++++ linux-2.6.22.4.new/drivers/char/watchdog/Makefile 2007-12-24 17:13:43.000000000 +0100 +@@ -75,6 +75,7 @@ + obj-$(CONFIG_INDYDOG) += indydog.o + obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o + obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o ++obj-$(CONFIG_RC32434_WDT) += rc32434_wdt.o + + # S390 Architecture +