From: Mathieu Malaterre Date: Wed, 6 Jun 2018 19:37:30 +0000 (+0200) Subject: MIPS: jz4780: DTS: Probe the spi-gpio driver from devicetree X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c24f5762d374b7f2aae31b7a393bdfa66ed06d8b;p=openwrt%2Fstaging%2Fblogic.git MIPS: jz4780: DTS: Probe the spi-gpio driver from devicetree Make use of the spi-gpio driver to provide SPI support on the Ingenic JZ4780 SoC using the pins that can be used with the SSI0 device as GPIOs, until such time as we have support for the Ingenic SPI/SSI controller. [paul.burton@mips.com: Rewrite commit message.] Signed-off-by: Mathieu Malaterre Signed-off-by: Paul Burton Patchwork: https://patchwork.linux-mips.org/patch/19489/ Cc: James Hogan Cc: Rob Herring Cc: Mark Rutland Cc: Ralf Baechle Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org --- diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index aa4e8f75ff5d..ce93d57f1b4d 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -155,6 +155,25 @@ }; }; + spi_gpio { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + num-chipselects = <2>; + + gpio-miso = <&gpe 14 0>; + gpio-sck = <&gpe 15 0>; + gpio-mosi = <&gpe 17 0>; + cs-gpios = <&gpe 16 0 + &gpe 18 0>; + + spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + uart0: serial@10030000 { compatible = "ingenic,jz4780-uart"; reg = <0x10030000 0x100>;