From: Ander Conselvan de Oliveira Date: Mon, 14 Nov 2016 14:25:26 +0000 (+0200) Subject: drm/i915/glk: Introduce Geminilake platform definition X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c22097fa47697f2f8fa1407ad012d3b987621e6a;p=openwrt%2Fstaging%2Fblogic.git drm/i915/glk: Introduce Geminilake platform definition Geminilake is an Intel® Processor containing Intel® HD Graphics following Broxton. Let's start by adding the platform definition. PCI IDs and plaform specific code will follow. v2: Rebase (don't allow dev to be used with the new macro). v3: Update ddb size. (Matt) Rebase on s/preliminary_hw/alpha/ Cc: Matt Roper Cc: Rodrigo Vivi Signed-off-by: Ander Conselvan de Oliveira Reviewed-by: Rodrigo Vivi Link: http://patchwork.freedesktop.org/patch/msgid/1479133526-32389-1-git-send-email-ander.conselvan.de.oliveira@intel.com --- diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 297ad03ab0c2..9a76b90c25a5 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -703,6 +703,7 @@ struct intel_csr { func(is_broadwell); \ func(is_skylake); \ func(is_broxton); \ + func(is_geminilake); \ func(is_kabylake); \ func(is_alpha_support); \ /* Keep has_* in alphabetical order */ \ @@ -2522,6 +2523,7 @@ intel_info(const struct drm_i915_private *dev_priv) #define IS_BROADWELL(dev_priv) ((dev_priv)->info.is_broadwell) #define IS_SKYLAKE(dev_priv) ((dev_priv)->info.is_skylake) #define IS_BROXTON(dev_priv) ((dev_priv)->info.is_broxton) +#define IS_GEMINILAKE(dev_priv) ((dev_priv)->info.is_geminilake) #define IS_KABYLAKE(dev_priv) ((dev_priv)->info.is_kabylake) #define IS_MOBILE(dev_priv) ((dev_priv)->info.is_mobile) #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \ diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c index 2797dec5c9f1..a3cc0e7d0ac8 100644 --- a/drivers/gpu/drm/i915/i915_pci.c +++ b/drivers/gpu/drm/i915/i915_pci.c @@ -373,6 +373,13 @@ static const struct intel_device_info intel_broxton_info = { .ddb_size = 512, }; +static const struct intel_device_info intel_geminilake_info = { + .is_alpha_support = 1, + .is_geminilake = 1, + GEN9_LP_FEATURES, + .ddb_size = 1024, +}; + static const struct intel_device_info intel_kabylake_info = { BDW_FEATURES, .is_kabylake = 1,