From: John Audia Date: Tue, 28 Nov 2023 19:34:53 +0000 (-0500) Subject: kernel: bump 6.1 to 6.1.64 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c20bedf1f59712f6380a8e184b6ca0bb635d22e6;p=openwrt%2Fstaging%2Fxback.git kernel: bump 6.1 to 6.1.64 Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.64 Removed upstreamed: ixp4xx/patches-6.1/0001-mtd-cfi_cmdset_0001-Byte-swap-OTP-info.patch[1] mvebu/patches-6.1/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch[2] qualcommax/patches-6.1/0026-v6.7-clk-qcom-ipq8074-drop-the-CLK_SET_RATE_PARENT-flag-f.patch[3] Manually rebased: bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.64&id=3b93096d29c5b9ca2af94be4ee9949c1767acf17 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.64&id=b3fd9db79e30d5eb5f76ef1f5b7e4f444af574ea 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.64&id=877080a3490102da26b8d969588159b2385f739e Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia --- diff --git a/include/kernel-6.1 b/include/kernel-6.1 index 01ed1d1707..d8f63bc1a3 100644 --- a/include/kernel-6.1 +++ b/include/kernel-6.1 @@ -1,2 +1,2 @@ -LINUX_VERSION-6.1 = .63 -LINUX_KERNEL_HASH-6.1.63 = c29d043b01dd4fcc61a24fd027c5c7912b15b1f10d8e3c83a0cb935885f0758d +LINUX_VERSION-6.1 = .64 +LINUX_KERNEL_HASH-6.1.64 = 629daa38f3ea67f29610bfbd53f9f38f46834d3654451e9474100490c66dc7e7 diff --git a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch index 53bed0d57f..b7940da9e4 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch @@ -266,7 +266,7 @@ Signed-off-by: Phil Elwell static inline int mmc_blk_part_switch(struct mmc_card *card, unsigned int part_type); static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, -@@ -2994,6 +3001,8 @@ static int mmc_blk_probe(struct mmc_card +@@ -2996,6 +3003,8 @@ static int mmc_blk_probe(struct mmc_card { struct mmc_blk_data *md; int ret = 0; @@ -275,7 +275,7 @@ Signed-off-by: Phil Elwell /* * Check that the card supports the command class(es) we need. -@@ -3001,7 +3010,16 @@ static int mmc_blk_probe(struct mmc_card +@@ -3003,7 +3012,16 @@ static int mmc_blk_probe(struct mmc_card if (!(card->csd.cmdclass & CCC_BLOCK_READ)) return -ENODEV; @@ -293,7 +293,7 @@ Signed-off-by: Phil Elwell card->complete_wq = alloc_workqueue("mmc_complete", WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); -@@ -3016,6 +3034,17 @@ static int mmc_blk_probe(struct mmc_card +@@ -3018,6 +3036,17 @@ static int mmc_blk_probe(struct mmc_card goto out_free; } @@ -325,7 +325,7 @@ Signed-off-by: Phil Elwell } --- a/drivers/mmc/core/quirks.h +++ b/drivers/mmc/core/quirks.h -@@ -129,6 +129,14 @@ static const struct mmc_fixup __maybe_un +@@ -130,6 +130,14 @@ static const struct mmc_fixup __maybe_un MMC_FIXUP(CID_NAME_ANY, CID_MANFID_SANDISK_SD, 0x5344, add_quirk_sd, MMC_QUIRK_BROKEN_SD_DISCARD), @@ -2007,12 +2007,12 @@ Signed-off-by: Phil Elwell sdhci_dumpregs(host); --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h -@@ -296,6 +296,8 @@ struct mmc_card { - #define MMC_QUIRK_BROKEN_SD_DISCARD (1<<14) /* Disable broken SD discard support */ +@@ -297,6 +297,8 @@ struct mmc_card { #define MMC_QUIRK_BROKEN_SD_CACHE (1<<15) /* Disable broken SD cache support */ + #define MMC_QUIRK_BROKEN_CACHE_FLUSH (1<<16) /* Don't flush cache until the write has occurred */ +#define MMC_QUIRK_ERASE_BROKEN (1<<31) /* Skip erase */ + + bool written_flag; /* Indicates eMMC has been written since power on */ bool reenable_cmdq; /* Re-enable Command Queue */ - unsigned int erase_size; /* erase size in sectors */ diff --git a/target/linux/bcm27xx/patches-6.1/950-0188-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch b/target/linux/bcm27xx/patches-6.1/950-0188-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch index f237c581be..f8bdac6654 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0188-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0188-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch @@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell #define USB_VENDOR_ID_BELKIN 0x050d #define USB_DEVICE_ID_FLIP_KVM 0x3201 -@@ -1368,6 +1371,9 @@ +@@ -1369,6 +1372,9 @@ #define USB_VENDOR_ID_XIAOMI 0x2717 #define USB_DEVICE_ID_MI_SILENT_MOUSE 0x5014 @@ -53,7 +53,7 @@ Signed-off-by: Jonathan Bell { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_MULTI_TOUCH), HID_QUIRK_MULTI_INPUT }, { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE), HID_QUIRK_ALWAYS_POLL }, { HID_USB_DEVICE(USB_VENDOR_ID_CHICONY, USB_DEVICE_ID_CHICONY_PIXART_USB_OPTICAL_MOUSE2), HID_QUIRK_ALWAYS_POLL }, -@@ -198,6 +199,7 @@ static const struct hid_device_id hid_qu +@@ -199,6 +200,7 @@ static const struct hid_device_id hid_qu { HID_USB_DEVICE(USB_VENDOR_ID_WISEGROUP, USB_DEVICE_ID_QUAD_USB_JOYPAD), HID_QUIRK_NOGET | HID_QUIRK_MULTI_INPUT }, { HID_USB_DEVICE(USB_VENDOR_ID_XIN_MO, USB_DEVICE_ID_XIN_MO_DUAL_ARCADE), HID_QUIRK_MULTI_INPUT }, { HID_USB_DEVICE(USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_GROUP_AUDIO), HID_QUIRK_NOGET }, diff --git a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch index 612ed6f6ba..10fee0adf6 100644 --- a/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch +++ b/target/linux/generic/backport-6.1/020-v6.3-06-BACKPORT-mm-multi-gen-LRU-per-node-lru_gen_folio-lis.patch @@ -325,7 +325,7 @@ Signed-off-by: T.J. Mercier mctz = soft_limit_tree.rb_tree_per_node[nid]; if (!mctz) return; -@@ -3523,6 +3533,9 @@ unsigned long mem_cgroup_soft_limit_recl +@@ -3524,6 +3534,9 @@ unsigned long mem_cgroup_soft_limit_recl struct mem_cgroup_tree_per_node *mctz; unsigned long excess; @@ -335,7 +335,7 @@ Signed-off-by: T.J. Mercier if (order > 0) return 0; -@@ -5386,6 +5399,7 @@ static int mem_cgroup_css_online(struct +@@ -5387,6 +5400,7 @@ static int mem_cgroup_css_online(struct if (unlikely(mem_cgroup_is_root(memcg))) queue_delayed_work(system_unbound_wq, &stats_flush_dwork, 2UL*HZ); @@ -343,7 +343,7 @@ Signed-off-by: T.J. Mercier return 0; offline_kmem: memcg_offline_kmem(memcg); -@@ -5417,6 +5431,7 @@ static void mem_cgroup_css_offline(struc +@@ -5418,6 +5432,7 @@ static void mem_cgroup_css_offline(struc memcg_offline_kmem(memcg); reparent_shrinker_deferred(memcg); wb_memcg_offline(memcg); @@ -351,7 +351,7 @@ Signed-off-by: T.J. Mercier drain_all_stock(memcg); -@@ -5428,6 +5443,7 @@ static void mem_cgroup_css_released(stru +@@ -5429,6 +5444,7 @@ static void mem_cgroup_css_released(stru struct mem_cgroup *memcg = mem_cgroup_from_css(css); invalidate_reclaim_iterators(memcg); diff --git a/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch b/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch index 6ade45ee3e..eac8966a48 100644 --- a/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch +++ b/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch @@ -76,7 +76,7 @@ Signed-off-by: David S. Miller if (pl->pcs) { err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, state->interface, -@@ -1498,6 +1524,7 @@ struct phylink *phylink_create(struct ph +@@ -1499,6 +1525,7 @@ struct phylink *phylink_create(struct ph pl->link_config.speed = SPEED_UNKNOWN; pl->link_config.duplex = DUPLEX_UNKNOWN; pl->link_config.an_enabled = true; @@ -84,7 +84,7 @@ Signed-off-by: David S. Miller pl->mac_ops = mac_ops; __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); timer_setup(&pl->link_poll, phylink_fixed_poll, 0); -@@ -1899,6 +1926,8 @@ void phylink_start(struct phylink *pl) +@@ -1900,6 +1927,8 @@ void phylink_start(struct phylink *pl) if (pl->netdev) netif_carrier_off(pl->netdev); @@ -93,7 +93,7 @@ Signed-off-by: David S. Miller /* Apply the link configuration to the MAC when starting. This allows * a fixed-link to start with the correct parameters, and also * ensures that we set the appropriate advertisement for Serdes links. -@@ -1909,6 +1938,8 @@ void phylink_start(struct phylink *pl) +@@ -1910,6 +1939,8 @@ void phylink_start(struct phylink *pl) */ phylink_mac_initial_config(pl, true); @@ -102,7 +102,7 @@ Signed-off-by: David S. Miller phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { -@@ -1927,15 +1958,9 @@ void phylink_start(struct phylink *pl) +@@ -1928,15 +1959,9 @@ void phylink_start(struct phylink *pl) poll = true; } @@ -120,7 +120,7 @@ Signed-off-by: David S. Miller if (poll) mod_timer(&pl->link_poll, jiffies + HZ); if (pl->phydev) -@@ -1972,6 +1997,10 @@ void phylink_stop(struct phylink *pl) +@@ -1973,6 +1998,10 @@ void phylink_stop(struct phylink *pl) } phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); diff --git a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch index 0d6adff4ea..8c508e3657 100644 --- a/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch +++ b/target/linux/generic/pending-6.1/701-netfilter-nf_tables-ignore-EOPNOTSUPP-on-flowtable-d.patch @@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c -@@ -7878,7 +7878,7 @@ static int nft_register_flowtable_net_ho +@@ -7883,7 +7883,7 @@ static int nft_register_flowtable_net_ho err = flowtable->data.type->setup(&flowtable->data, hook->ops.dev, FLOW_BLOCK_BIND); diff --git a/target/linux/generic/pending-6.1/920-mangle_bootargs.patch b/target/linux/generic/pending-6.1/920-mangle_bootargs.patch index 1015266084..db7274e7aa 100644 --- a/target/linux/generic/pending-6.1/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-6.1/920-mangle_bootargs.patch @@ -31,7 +31,7 @@ Signed-off-by: Imre Kaloz help --- a/init/main.c +++ b/init/main.c -@@ -607,6 +607,29 @@ static inline void setup_nr_cpu_ids(void +@@ -611,6 +611,29 @@ static inline void setup_nr_cpu_ids(void static inline void smp_prepare_cpus(unsigned int maxcpus) { } #endif @@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter -@@ -954,6 +977,7 @@ asmlinkage __visible void __init __no_sa +@@ -958,6 +981,7 @@ asmlinkage __visible void __init __no_sa pr_notice("%s", linux_banner); early_security_init(); setup_arch(&command_line); diff --git a/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch index 1ef46d9be3..ae7e9f97c0 100644 --- a/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch +++ b/target/linux/ipq40xx/patches-6.1/004-v6.7-firmware-qcom_scm-disable-SDI-if-required.patch @@ -27,7 +27,7 @@ Signed-off-by: Bjorn Andersson --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -400,6 +400,29 @@ int qcom_scm_set_remote_state(u32 state, +@@ -407,6 +407,29 @@ int qcom_scm_set_remote_state(u32 state, } EXPORT_SYMBOL(qcom_scm_set_remote_state); @@ -57,7 +57,7 @@ Signed-off-by: Bjorn Andersson static int __qcom_scm_set_dload_mode(struct device *dev, bool enable) { struct qcom_scm_desc desc = { -@@ -1404,6 +1427,13 @@ static int qcom_scm_probe(struct platfor +@@ -1411,6 +1434,13 @@ static int qcom_scm_probe(struct platfor __get_convention(); diff --git a/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch b/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch index a92342215e..cb06ff353c 100644 --- a/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch +++ b/target/linux/ipq40xx/patches-6.1/422-firmware-qcom-scm-fix-SCM-cold-boot-address.patch @@ -118,7 +118,7 @@ Signed-off-by: Brian Norris } --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -305,6 +305,17 @@ static int qcom_scm_set_boot_addr(void * +@@ -312,6 +312,17 @@ static int qcom_scm_set_boot_addr(void * desc.args[0] = flags; desc.args[1] = virt_to_phys(entry); diff --git a/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch b/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch index f08ff04137..c73e40429c 100644 --- a/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch +++ b/target/linux/ipq40xx/patches-6.1/910-Revert-firmware-qcom_scm-Clear-download-bit-during-r.patch @@ -15,7 +15,7 @@ Signed-off-by: Robert Marko --- a/drivers/firmware/qcom_scm.c +++ b/drivers/firmware/qcom_scm.c -@@ -1459,7 +1459,8 @@ static int qcom_scm_probe(struct platfor +@@ -1466,7 +1466,8 @@ static int qcom_scm_probe(struct platfor static void qcom_scm_shutdown(struct platform_device *pdev) { /* Clean shutdown, disable download mode to allow normal restart */ diff --git a/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch index 0305b7e484..4e47c390a2 100644 --- a/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/ipq806x/patches-6.1/0067-generic-Mangle-bootloader-s-kernel-arguments.patch @@ -259,7 +259,7 @@ Signed-off-by: Adrian Panella static int kernel_init(void *); extern void init_IRQ(void); -@@ -991,6 +995,18 @@ asmlinkage __visible void __init __no_sa +@@ -995,6 +999,18 @@ asmlinkage __visible void __init __no_sa pr_notice("Kernel command line: %s\n", saved_command_line); /* parameters may set static keys */ jump_label_init(); diff --git a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch index 2b52398425..085d38a79a 100644 --- a/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch +++ b/target/linux/ipq806x/patches-6.1/700-02-net-stmmac-move-TX-timer-arm-after-DMA-enable.patch @@ -36,7 +36,7 @@ Signed-off-by: Christian Marangi __netif_tx_unlock_bh(netdev_get_tx_queue(priv->dev, queue)); -@@ -5474,12 +5475,13 @@ static int stmmac_napi_poll_tx(struct na +@@ -5475,12 +5476,13 @@ static int stmmac_napi_poll_tx(struct na struct stmmac_channel *ch = container_of(napi, struct stmmac_channel, tx_napi); struct stmmac_priv *priv = ch->priv_data; @@ -51,7 +51,7 @@ Signed-off-by: Christian Marangi work_done = min(work_done, budget); if (work_done < budget && napi_complete_done(napi, work_done)) { -@@ -5490,6 +5492,10 @@ static int stmmac_napi_poll_tx(struct na +@@ -5491,6 +5493,10 @@ static int stmmac_napi_poll_tx(struct na spin_unlock_irqrestore(&ch->lock, flags); } @@ -62,7 +62,7 @@ Signed-off-by: Christian Marangi return work_done; } -@@ -5499,11 +5505,12 @@ static int stmmac_napi_poll_rxtx(struct +@@ -5500,11 +5506,12 @@ static int stmmac_napi_poll_rxtx(struct container_of(napi, struct stmmac_channel, rxtx_napi); struct stmmac_priv *priv = ch->priv_data; int rx_done, tx_done, rxtx_done; @@ -76,7 +76,7 @@ Signed-off-by: Christian Marangi tx_done = min(tx_done, budget); rx_done = stmmac_rx_zc(priv, budget, chan); -@@ -5528,6 +5535,10 @@ static int stmmac_napi_poll_rxtx(struct +@@ -5529,6 +5536,10 @@ static int stmmac_napi_poll_rxtx(struct spin_unlock_irqrestore(&ch->lock, flags); } diff --git a/target/linux/ixp4xx/patches-6.1/0001-mtd-cfi_cmdset_0001-Byte-swap-OTP-info.patch b/target/linux/ixp4xx/patches-6.1/0001-mtd-cfi_cmdset_0001-Byte-swap-OTP-info.patch deleted file mode 100644 index 1c5e44bb72..0000000000 --- a/target/linux/ixp4xx/patches-6.1/0001-mtd-cfi_cmdset_0001-Byte-swap-OTP-info.patch +++ /dev/null @@ -1,74 +0,0 @@ -From 4e242d6e08ad1d85b832e158cd0eafcb8f3f76a1 Mon Sep 17 00:00:00 2001 -From: Linus Walleij -Date: Tue, 30 May 2023 22:40:31 +0200 -Subject: [PATCH v3] mtd: cfi_cmdset_0001: Byte swap OTP info - -Currently the offset into the device when looking for OTP -bits can go outside of the address of the MTD NOR devices, -and if that memory isn't readable, bad things happen -on the IXP4xx (added prints that illustrate the problem before -the crash): - -cfi_intelext_otp_walk walk OTP on chip 0 start at reg_prot_offset 0x00000100 -ixp4xx_copy_from copy from 0x00000100 to 0xc880dd78 -cfi_intelext_otp_walk walk OTP on chip 0 start at reg_prot_offset 0x12000000 -ixp4xx_copy_from copy from 0x12000000 to 0xc880dd78 -8<--- cut here --- -Unable to handle kernel paging request at virtual address db000000 -[db000000] *pgd=00000000 -(...) - -This happens in this case because the IXP4xx is big endian and -the 32- and 16-bit fields in the struct cfi_intelext_otpinfo are not -properly byteswapped. Compare to how the code in read_pri_intelext() -byteswaps the fields in struct cfi_pri_intelext. - -Adding a small byte swapping loop for the OTP in read_pri_intelext() -and the crash goes away. - -The problem went unnoticed for many years until I enabled -CONFIG_MTD_OTP on the IXP4xx as well, triggering the bug. - -Cc: Nicolas Pitre -Cc: stable@vger.kernel.org -Signed-off-by: Linus Walleij ---- -ChangeLog v2->v3: -- Move the byte swapping to a small loop in read_pri_intelext() - so all bytes are swapped as we reach cfi_intelext_otp_walk(). -ChangeLog v1->v2: -- Drill deeper and discover a big endian compatibility issue. ---- - drivers/mtd/chips/cfi_cmdset_0001.c | 20 ++++++++++++++++++-- - 1 file changed, 18 insertions(+), 2 deletions(-) - ---- a/drivers/mtd/chips/cfi_cmdset_0001.c -+++ b/drivers/mtd/chips/cfi_cmdset_0001.c -@@ -421,9 +421,25 @@ read_pri_intelext(struct map_info *map, - extra_size = 0; - - /* Protection Register info */ -- if (extp->NumProtectionFields) -+ if (extp->NumProtectionFields) { -+ struct cfi_intelext_otpinfo *otp = -+ (struct cfi_intelext_otpinfo *)&extp->extra[0]; -+ - extra_size += (extp->NumProtectionFields - 1) * -- sizeof(struct cfi_intelext_otpinfo); -+ sizeof(struct cfi_intelext_otpinfo); -+ -+ if (extp_size >= sizeof(*extp) + extra_size) { -+ int i; -+ -+ /* Do some byteswapping if necessary */ -+ for (i = 0; i < extp->NumProtectionFields - 1; i++) { -+ otp->ProtRegAddr = le32_to_cpu(otp->ProtRegAddr); -+ otp->FactGroups = le16_to_cpu(otp->FactGroups); -+ otp->UserGroups = le16_to_cpu(otp->UserGroups); -+ otp++; -+ } -+ } -+ } - } - - if (extp->MinorVersion >= '1') { diff --git a/target/linux/mediatek/patches-6.1/500-gsw-rtl8367s-mt7622-support.patch b/target/linux/mediatek/patches-6.1/500-gsw-rtl8367s-mt7622-support.patch index e37705f388..9c575d694b 100644 --- a/target/linux/mediatek/patches-6.1/500-gsw-rtl8367s-mt7622-support.patch +++ b/target/linux/mediatek/patches-6.1/500-gsw-rtl8367s-mt7622-support.patch @@ -1,6 +1,6 @@ --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -389,6 +389,12 @@ config ROCKCHIP_PHY +@@ -386,6 +386,12 @@ config ROCKCHIP_PHY help Currently supports the integrated Ethernet PHY. @@ -15,7 +15,7 @@ help --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile -@@ -98,6 +98,7 @@ obj-$(CONFIG_QSEMI_PHY) += qsemi.o +@@ -94,6 +94,7 @@ obj-$(CONFIG_QSEMI_PHY) += qsemi.o obj-$(CONFIG_REALTEK_PHY) += realtek.o obj-$(CONFIG_RENESAS_PHY) += uPD60620.o obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o diff --git a/target/linux/mediatek/patches-6.1/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch b/target/linux/mediatek/patches-6.1/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch index eb2a40f5c1..389b2e4c99 100644 --- a/target/linux/mediatek/patches-6.1/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch +++ b/target/linux/mediatek/patches-6.1/730-v6.5-net-phy-add-driver-for-MediaTek-SoC-built-in-GE-PHYs.patch @@ -42,7 +42,7 @@ Signed-off-by: David S. Miller L: linux-i2c@vger.kernel.org --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -314,6 +314,18 @@ config MEDIATEK_GE_PHY +@@ -311,6 +311,18 @@ config MEDIATEK_GE_PHY help Supports the MediaTek Gigabit Ethernet PHYs. @@ -63,7 +63,7 @@ Signed-off-by: David S. Miller depends on PTP_1588_CLOCK_OPTIONAL --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile -@@ -84,6 +84,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o +@@ -80,6 +80,7 @@ obj-$(CONFIG_MARVELL_PHY) += marvell.o obj-$(CONFIG_MARVELL_88X2222_PHY) += marvell-88x2222.o obj-$(CONFIG_MAXLINEAR_GPHY) += mxl-gpy.o obj-$(CONFIG_MEDIATEK_GE_PHY) += mediatek-ge.o diff --git a/target/linux/mediatek/patches-6.1/733-net-phy-add-driver-for-MediaTek-2.5G-PHY.patch b/target/linux/mediatek/patches-6.1/733-net-phy-add-driver-for-MediaTek-2.5G-PHY.patch index 125bd9b0b3..a3dcefd3f1 100644 --- a/target/linux/mediatek/patches-6.1/733-net-phy-add-driver-for-MediaTek-2.5G-PHY.patch +++ b/target/linux/mediatek/patches-6.1/733-net-phy-add-driver-for-MediaTek-2.5G-PHY.patch @@ -13,7 +13,7 @@ Signed-off-by: Daniel Golle --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -326,6 +326,13 @@ config MEDIATEK_GE_SOC_PHY +@@ -323,6 +323,13 @@ config MEDIATEK_GE_SOC_PHY present in the SoCs efuse and will dynamically calibrate VCM (common-mode voltage) during startup. @@ -29,7 +29,7 @@ Signed-off-by: Daniel Golle depends on PTP_1588_CLOCK_OPTIONAL --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile -@@ -83,6 +83,7 @@ obj-$(CONFIG_MARVELL_10G_PHY) += marvell +@@ -79,6 +79,7 @@ obj-$(CONFIG_MARVELL_10G_PHY) += marvell obj-$(CONFIG_MARVELL_PHY) += marvell.o obj-$(CONFIG_MARVELL_88X2222_PHY) += marvell-88x2222.o obj-$(CONFIG_MAXLINEAR_GPHY) += mxl-gpy.o diff --git a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch index f9fc450277..72e4d15009 100644 --- a/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch +++ b/target/linux/mediatek/patches-6.1/901-arm-add-cmdline-override.patch @@ -37,7 +37,7 @@ * CONFIG_CMDLINE is meant to be a default in case nothing else --- a/arch/arm64/Kconfig +++ b/arch/arm64/Kconfig -@@ -2234,6 +2234,14 @@ config CMDLINE_FORCE +@@ -2236,6 +2236,14 @@ config CMDLINE_FORCE endchoice diff --git a/target/linux/mvebu/patches-6.1/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch b/target/linux/mvebu/patches-6.1/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch deleted file mode 100644 index 7a0dc15ff6..0000000000 --- a/target/linux/mvebu/patches-6.1/106-Revert-i2c-pxa-move-to-generic-GPIO-recovery.patch +++ /dev/null @@ -1,139 +0,0 @@ -From ea8444b6fa5955c16b713dc83310882b93b44e62 Mon Sep 17 00:00:00 2001 -From: Robert Marko -Date: Fri, 10 Nov 2023 10:10:29 +0100 -Subject: [PATCH] Revert "i2c: pxa: move to generic GPIO recovery" - -This reverts commit 0b01392c18b9993a584f36ace1d61118772ad0ca. - -Conversion of PXA to generic I2C recovery, makes the I2C bus completely -lock up if recovery pinctrl is present in the DT and I2C recovery is -enabled. - -So, until the generic I2C recovery can also work with PXA lets revert -to have working I2C and I2C recovery again. - -Signed-off-by: Robert Marko -Cc: stable@vger.kernel.org # 5.11+ ---- - drivers/i2c/busses/i2c-pxa.c | 76 ++++++++++++++++++++++++++++++++---- - 1 file changed, 68 insertions(+), 8 deletions(-) - ---- a/drivers/i2c/busses/i2c-pxa.c -+++ b/drivers/i2c/busses/i2c-pxa.c -@@ -264,6 +264,9 @@ struct pxa_i2c { - u32 hs_mask; - - struct i2c_bus_recovery_info recovery; -+ struct pinctrl *pinctrl; -+ struct pinctrl_state *pinctrl_default; -+ struct pinctrl_state *pinctrl_recovery; - }; - - #define _IBMR(i2c) ((i2c)->reg_ibmr) -@@ -1302,12 +1305,13 @@ static void i2c_pxa_prepare_recovery(str - */ - gpiod_set_value(i2c->recovery.scl_gpiod, ibmr & IBMR_SCLS); - gpiod_set_value(i2c->recovery.sda_gpiod, ibmr & IBMR_SDAS); -+ -+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery)); - } - - static void i2c_pxa_unprepare_recovery(struct i2c_adapter *adap) - { - struct pxa_i2c *i2c = adap->algo_data; -- struct i2c_bus_recovery_info *bri = adap->bus_recovery_info; - u32 isr; - - /* -@@ -1321,7 +1325,7 @@ static void i2c_pxa_unprepare_recovery(s - i2c_pxa_do_reset(i2c); - } - -- WARN_ON(pinctrl_select_state(bri->pinctrl, bri->pins_default)); -+ WARN_ON(pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default)); - - dev_dbg(&i2c->adap.dev, "recovery: IBMR 0x%08x ISR 0x%08x\n", - readl(_IBMR(i2c)), readl(_ISR(i2c))); -@@ -1343,20 +1347,76 @@ static int i2c_pxa_init_recovery(struct - if (IS_ENABLED(CONFIG_I2C_PXA_SLAVE)) - return 0; - -- bri->pinctrl = devm_pinctrl_get(dev); -- if (PTR_ERR(bri->pinctrl) == -ENODEV) { -- bri->pinctrl = NULL; -+ i2c->pinctrl = devm_pinctrl_get(dev); -+ if (PTR_ERR(i2c->pinctrl) == -ENODEV) -+ i2c->pinctrl = NULL; -+ if (IS_ERR(i2c->pinctrl)) -+ return PTR_ERR(i2c->pinctrl); -+ -+ if (!i2c->pinctrl) -+ return 0; -+ -+ i2c->pinctrl_default = pinctrl_lookup_state(i2c->pinctrl, -+ PINCTRL_STATE_DEFAULT); -+ i2c->pinctrl_recovery = pinctrl_lookup_state(i2c->pinctrl, "recovery"); -+ -+ if (IS_ERR(i2c->pinctrl_default) || IS_ERR(i2c->pinctrl_recovery)) { -+ dev_info(dev, "missing pinmux recovery information: %ld %ld\n", -+ PTR_ERR(i2c->pinctrl_default), -+ PTR_ERR(i2c->pinctrl_recovery)); -+ return 0; -+ } -+ -+ /* -+ * Claiming GPIOs can influence the pinmux state, and may glitch the -+ * I2C bus. Do this carefully. -+ */ -+ bri->scl_gpiod = devm_gpiod_get(dev, "scl", GPIOD_OUT_HIGH_OPEN_DRAIN); -+ if (bri->scl_gpiod == ERR_PTR(-EPROBE_DEFER)) -+ return -EPROBE_DEFER; -+ if (IS_ERR(bri->scl_gpiod)) { -+ dev_info(dev, "missing scl gpio recovery information: %pe\n", -+ bri->scl_gpiod); -+ return 0; -+ } -+ -+ /* -+ * We have SCL. Pull SCL low and wait a bit so that SDA glitches -+ * have no effect. -+ */ -+ gpiod_direction_output(bri->scl_gpiod, 0); -+ udelay(10); -+ bri->sda_gpiod = devm_gpiod_get(dev, "sda", GPIOD_OUT_HIGH_OPEN_DRAIN); -+ -+ /* Wait a bit in case of a SDA glitch, and then release SCL. */ -+ udelay(10); -+ gpiod_direction_output(bri->scl_gpiod, 1); -+ -+ if (bri->sda_gpiod == ERR_PTR(-EPROBE_DEFER)) -+ return -EPROBE_DEFER; -+ -+ if (IS_ERR(bri->sda_gpiod)) { -+ dev_info(dev, "missing sda gpio recovery information: %pe\n", -+ bri->sda_gpiod); - return 0; - } -- if (IS_ERR(bri->pinctrl)) -- return PTR_ERR(bri->pinctrl); - - bri->prepare_recovery = i2c_pxa_prepare_recovery; - bri->unprepare_recovery = i2c_pxa_unprepare_recovery; -+ bri->recover_bus = i2c_generic_scl_recovery; - - i2c->adap.bus_recovery_info = bri; - -- return 0; -+ /* -+ * Claiming GPIOs can change the pinmux state, which confuses the -+ * pinctrl since pinctrl's idea of the current setting is unaffected -+ * by the pinmux change caused by claiming the GPIO. Work around that -+ * by switching pinctrl to the GPIO state here. We do it this way to -+ * avoid glitching the I2C bus. -+ */ -+ pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_recovery); -+ -+ return pinctrl_select_state(i2c->pinctrl, i2c->pinctrl_default); - } - - static int i2c_pxa_probe(struct platform_device *dev) diff --git a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index 7d40019020..f3881a0d25 100644 --- a/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-6.1/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -258,7 +258,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -989,6 +993,18 @@ asmlinkage __visible void __init __no_sa +@@ -993,6 +997,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch index 307c46e7b8..15762be81d 100644 --- a/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch +++ b/target/linux/mvebu/patches-6.1/700-mvneta-tx-queue-workaround.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- --- a/drivers/net/ethernet/marvell/mvneta.c +++ b/drivers/net/ethernet/marvell/mvneta.c -@@ -5222,6 +5222,16 @@ static int mvneta_setup_tc(struct net_de +@@ -5234,6 +5234,16 @@ static int mvneta_setup_tc(struct net_de } } @@ -26,7 +26,7 @@ Signed-off-by: Felix Fietkau static const struct net_device_ops mvneta_netdev_ops = { .ndo_open = mvneta_open, .ndo_stop = mvneta_stop, -@@ -5232,6 +5242,9 @@ static const struct net_device_ops mvnet +@@ -5244,6 +5254,9 @@ static const struct net_device_ops mvnet .ndo_fix_features = mvneta_fix_features, .ndo_get_stats64 = mvneta_get_stats64, .ndo_eth_ioctl = mvneta_ioctl, diff --git a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch index 9162ea538d..c209adbc06 100644 --- a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch +++ b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch @@ -390,8 +390,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &gpll0_main.clkr.hw }, .num_parents = 1, .ops = &clk_fixed_factor_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -429,9 +86,8 @@ static struct clk_alpha_pll_postdiv gpll + }, +@@ -428,9 +85,8 @@ static struct clk_alpha_pll_postdiv gpll .width = 4, .clkr.hw.init = &(struct clk_init_data){ .name = "gpll0", @@ -403,7 +403,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, }, -@@ -445,8 +101,9 @@ static struct clk_alpha_pll gpll2_main = +@@ -444,8 +100,9 @@ static struct clk_alpha_pll gpll2_main = .enable_mask = BIT(2), .hw.init = &(struct clk_init_data){ .name = "gpll2_main", @@ -415,7 +415,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_alpha_pll_ops, -@@ -461,9 +118,8 @@ static struct clk_alpha_pll_postdiv gpll +@@ -460,9 +117,8 @@ static struct clk_alpha_pll_postdiv gpll .width = 4, .clkr.hw.init = &(struct clk_init_data){ .name = "gpll2", @@ -426,8 +426,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &gpll2_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -478,8 +134,9 @@ static struct clk_alpha_pll gpll4_main = + }, +@@ -476,8 +132,9 @@ static struct clk_alpha_pll gpll4_main = .enable_mask = BIT(5), .hw.init = &(struct clk_init_data){ .name = "gpll4_main", @@ -439,7 +439,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_alpha_pll_ops, -@@ -494,9 +151,8 @@ static struct clk_alpha_pll_postdiv gpll +@@ -492,9 +149,8 @@ static struct clk_alpha_pll_postdiv gpll .width = 4, .clkr.hw.init = &(struct clk_init_data){ .name = "gpll4", @@ -450,8 +450,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &gpll4_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -512,8 +168,9 @@ static struct clk_alpha_pll gpll6_main = + }, +@@ -509,8 +165,9 @@ static struct clk_alpha_pll gpll6_main = .enable_mask = BIT(7), .hw.init = &(struct clk_init_data){ .name = "gpll6_main", @@ -463,7 +463,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_alpha_pll_ops, -@@ -528,9 +185,8 @@ static struct clk_alpha_pll_postdiv gpll +@@ -525,9 +182,8 @@ static struct clk_alpha_pll_postdiv gpll .width = 2, .clkr.hw.init = &(struct clk_init_data){ .name = "gpll6", @@ -474,8 +474,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &gpll6_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -542,9 +198,8 @@ static struct clk_fixed_factor gpll6_out + }, +@@ -538,9 +194,8 @@ static struct clk_fixed_factor gpll6_out .div = 2, .hw.init = &(struct clk_init_data){ .name = "gpll6_out_main_div2", @@ -486,8 +486,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &gpll6_main.clkr.hw }, .num_parents = 1, .ops = &clk_fixed_factor_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -560,8 +215,9 @@ static struct clk_alpha_pll ubi32_pll_ma + }, +@@ -555,8 +210,9 @@ static struct clk_alpha_pll ubi32_pll_ma .enable_mask = BIT(6), .hw.init = &(struct clk_init_data){ .name = "ubi32_pll_main", @@ -499,7 +499,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_alpha_pll_huayra_ops, -@@ -575,9 +231,8 @@ static struct clk_alpha_pll_postdiv ubi3 +@@ -570,9 +226,8 @@ static struct clk_alpha_pll_postdiv ubi3 .width = 2, .clkr.hw.init = &(struct clk_init_data){ .name = "ubi32_pll", @@ -511,7 +511,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -592,8 +247,9 @@ static struct clk_alpha_pll nss_crypto_p +@@ -587,8 +242,9 @@ static struct clk_alpha_pll nss_crypto_p .enable_mask = BIT(4), .hw.init = &(struct clk_init_data){ .name = "nss_crypto_pll_main", @@ -523,7 +523,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_alpha_pll_ops, -@@ -607,9 +263,8 @@ static struct clk_alpha_pll_postdiv nss_ +@@ -602,9 +258,8 @@ static struct clk_alpha_pll_postdiv nss_ .width = 4, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_crypto_pll", @@ -534,8 +534,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com + &nss_crypto_pll_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, -@@ -623,6 +278,18 @@ static const struct freq_tbl ftbl_pcnoc_ + }, +@@ -617,6 +272,18 @@ static const struct freq_tbl ftbl_pcnoc_ { } }; @@ -554,7 +554,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 pcnoc_bfdcd_clk_src = { .cmd_rcgr = 0x27000, .freq_tbl = ftbl_pcnoc_bfdcd_clk_src, -@@ -630,8 +297,8 @@ static struct clk_rcg2 pcnoc_bfdcd_clk_s +@@ -624,8 +291,8 @@ static struct clk_rcg2 pcnoc_bfdcd_clk_s .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcnoc_bfdcd_clk_src", @@ -565,7 +565,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_IS_CRITICAL, }, -@@ -642,9 +309,8 @@ static struct clk_fixed_factor pcnoc_clk +@@ -636,9 +303,8 @@ static struct clk_fixed_factor pcnoc_clk .div = 1, .hw.init = &(struct clk_init_data){ .name = "pcnoc_clk_src", @@ -577,7 +577,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -658,8 +324,9 @@ static struct clk_branch gcc_sleep_clk_s +@@ -652,8 +318,9 @@ static struct clk_branch gcc_sleep_clk_s .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_sleep_clk_src", @@ -589,7 +589,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .ops = &clk_branch2_ops, -@@ -682,8 +349,8 @@ static struct clk_rcg2 blsp1_qup1_i2c_ap +@@ -676,8 +343,8 @@ static struct clk_rcg2 blsp1_qup1_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup1_i2c_apps_clk_src", @@ -600,7 +600,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -708,8 +375,8 @@ static struct clk_rcg2 blsp1_qup1_spi_ap +@@ -702,8 +369,8 @@ static struct clk_rcg2 blsp1_qup1_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup1_spi_apps_clk_src", @@ -611,7 +611,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -721,8 +388,8 @@ static struct clk_rcg2 blsp1_qup2_i2c_ap +@@ -715,8 +382,8 @@ static struct clk_rcg2 blsp1_qup2_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup2_i2c_apps_clk_src", @@ -622,7 +622,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -735,8 +402,8 @@ static struct clk_rcg2 blsp1_qup2_spi_ap +@@ -729,8 +396,8 @@ static struct clk_rcg2 blsp1_qup2_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup2_spi_apps_clk_src", @@ -633,7 +633,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -748,8 +415,8 @@ static struct clk_rcg2 blsp1_qup3_i2c_ap +@@ -742,8 +409,8 @@ static struct clk_rcg2 blsp1_qup3_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup3_i2c_apps_clk_src", @@ -644,7 +644,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -762,8 +429,8 @@ static struct clk_rcg2 blsp1_qup3_spi_ap +@@ -756,8 +423,8 @@ static struct clk_rcg2 blsp1_qup3_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup3_spi_apps_clk_src", @@ -655,7 +655,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -775,8 +442,8 @@ static struct clk_rcg2 blsp1_qup4_i2c_ap +@@ -769,8 +436,8 @@ static struct clk_rcg2 blsp1_qup4_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup4_i2c_apps_clk_src", @@ -666,7 +666,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -789,8 +456,8 @@ static struct clk_rcg2 blsp1_qup4_spi_ap +@@ -783,8 +450,8 @@ static struct clk_rcg2 blsp1_qup4_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup4_spi_apps_clk_src", @@ -677,7 +677,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -802,8 +469,8 @@ static struct clk_rcg2 blsp1_qup5_i2c_ap +@@ -796,8 +463,8 @@ static struct clk_rcg2 blsp1_qup5_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup5_i2c_apps_clk_src", @@ -688,7 +688,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -816,8 +483,8 @@ static struct clk_rcg2 blsp1_qup5_spi_ap +@@ -810,8 +477,8 @@ static struct clk_rcg2 blsp1_qup5_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup5_spi_apps_clk_src", @@ -699,7 +699,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -829,8 +496,8 @@ static struct clk_rcg2 blsp1_qup6_i2c_ap +@@ -823,8 +490,8 @@ static struct clk_rcg2 blsp1_qup6_i2c_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup6_i2c_apps_clk_src", @@ -710,7 +710,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -843,8 +510,8 @@ static struct clk_rcg2 blsp1_qup6_spi_ap +@@ -837,8 +504,8 @@ static struct clk_rcg2 blsp1_qup6_spi_ap .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup6_spi_apps_clk_src", @@ -721,7 +721,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -877,8 +544,8 @@ static struct clk_rcg2 blsp1_uart1_apps_ +@@ -871,8 +538,8 @@ static struct clk_rcg2 blsp1_uart1_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart1_apps_clk_src", @@ -732,7 +732,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -891,8 +558,8 @@ static struct clk_rcg2 blsp1_uart2_apps_ +@@ -885,8 +552,8 @@ static struct clk_rcg2 blsp1_uart2_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart2_apps_clk_src", @@ -743,7 +743,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -905,8 +572,8 @@ static struct clk_rcg2 blsp1_uart3_apps_ +@@ -899,8 +566,8 @@ static struct clk_rcg2 blsp1_uart3_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart3_apps_clk_src", @@ -754,7 +754,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -919,8 +586,8 @@ static struct clk_rcg2 blsp1_uart4_apps_ +@@ -913,8 +580,8 @@ static struct clk_rcg2 blsp1_uart4_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart4_apps_clk_src", @@ -765,7 +765,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -933,8 +600,8 @@ static struct clk_rcg2 blsp1_uart5_apps_ +@@ -927,8 +594,8 @@ static struct clk_rcg2 blsp1_uart5_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart5_apps_clk_src", @@ -776,7 +776,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -947,8 +614,8 @@ static struct clk_rcg2 blsp1_uart6_apps_ +@@ -941,8 +608,8 @@ static struct clk_rcg2 blsp1_uart6_apps_ .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart6_apps_clk_src", @@ -787,7 +787,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -958,6 +625,11 @@ static const struct clk_parent_data gcc_ +@@ -952,6 +619,11 @@ static const struct clk_parent_data gcc_ { .hw = &gpll0.clkr.hw }, }; @@ -799,7 +799,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static const struct freq_tbl ftbl_pcie_axi_clk_src[] = { F(19200000, P_XO, 1, 0, 0), F(200000000, P_GPLL0, 4, 0, 0), -@@ -972,7 +644,7 @@ static struct clk_rcg2 pcie0_axi_clk_src +@@ -966,7 +638,7 @@ static struct clk_rcg2 pcie0_axi_clk_src .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_axi_clk_src", .parent_data = gcc_xo_gpll0, @@ -808,7 +808,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -981,6 +653,18 @@ static const struct freq_tbl ftbl_pcie_a +@@ -975,6 +647,18 @@ static const struct freq_tbl ftbl_pcie_a F(19200000, P_XO, 1, 0, 0), }; @@ -827,7 +827,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 pcie0_aux_clk_src = { .cmd_rcgr = 0x75024, .freq_tbl = ftbl_pcie_aux_clk_src, -@@ -989,12 +673,22 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -983,12 +667,22 @@ static struct clk_rcg2 pcie0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_aux_clk_src", @@ -852,7 +852,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie0_pipe_clk_src = { .reg = 0x7501c, .shift = 8, -@@ -1003,8 +697,8 @@ static struct clk_regmap_mux pcie0_pipe_ +@@ -997,8 +691,8 @@ static struct clk_regmap_mux pcie0_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie0_pipe_clk_src", @@ -863,7 +863,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1019,7 +713,7 @@ static struct clk_rcg2 pcie1_axi_clk_src +@@ -1013,7 +707,7 @@ static struct clk_rcg2 pcie1_axi_clk_src .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_axi_clk_src", .parent_data = gcc_xo_gpll0, @@ -872,7 +872,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1032,12 +726,22 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -1026,12 +720,22 @@ static struct clk_rcg2 pcie1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_aux_clk_src", @@ -897,7 +897,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie1_pipe_clk_src = { .reg = 0x7601c, .shift = 8, -@@ -1046,8 +750,8 @@ static struct clk_regmap_mux pcie1_pipe_ +@@ -1040,8 +744,8 @@ static struct clk_regmap_mux pcie1_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie1_pipe_clk_src", @@ -908,7 +908,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1066,6 +770,20 @@ static const struct freq_tbl ftbl_sdcc_a +@@ -1060,6 +764,20 @@ static const struct freq_tbl ftbl_sdcc_a { } }; @@ -929,7 +929,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_apps_clk_src = { .cmd_rcgr = 0x42004, .freq_tbl = ftbl_sdcc_apps_clk_src, -@@ -1074,8 +792,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr +@@ -1068,8 +786,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_apps_clk_src", @@ -940,7 +940,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1086,6 +804,20 @@ static const struct freq_tbl ftbl_sdcc_i +@@ -1080,6 +798,20 @@ static const struct freq_tbl ftbl_sdcc_i F(308570000, P_GPLL6, 3.5, 0, 0), }; @@ -961,7 +961,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_ice_core_clk_src = { .cmd_rcgr = 0x5d000, .freq_tbl = ftbl_sdcc_ice_core_clk_src, -@@ -1094,8 +826,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl +@@ -1088,8 +820,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl .parent_map = gcc_xo_gpll0_gpll6_gpll0_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_ice_core_clk_src", @@ -972,7 +972,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1108,8 +840,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr +@@ -1102,8 +834,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc2_apps_clk_src", @@ -983,7 +983,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1121,6 +853,18 @@ static const struct freq_tbl ftbl_usb_ma +@@ -1115,6 +847,18 @@ static const struct freq_tbl ftbl_usb_ma { } }; @@ -1002,7 +1002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_master_clk_src = { .cmd_rcgr = 0x3e00c, .freq_tbl = ftbl_usb_master_clk_src, -@@ -1129,8 +873,8 @@ static struct clk_rcg2 usb0_master_clk_s +@@ -1123,8 +867,8 @@ static struct clk_rcg2 usb0_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_master_clk_src", @@ -1013,7 +1013,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1148,8 +892,8 @@ static struct clk_rcg2 usb0_aux_clk_src +@@ -1142,8 +886,8 @@ static struct clk_rcg2 usb0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_aux_clk_src", @@ -1024,7 +1024,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1161,6 +905,20 @@ static const struct freq_tbl ftbl_usb_mo +@@ -1155,6 +899,20 @@ static const struct freq_tbl ftbl_usb_mo { } }; @@ -1045,7 +1045,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_mock_utmi_clk_src = { .cmd_rcgr = 0x3e020, .freq_tbl = ftbl_usb_mock_utmi_clk_src, -@@ -1169,12 +927,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -1163,12 +921,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_mock_utmi_clk_src", @@ -1070,7 +1070,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb0_pipe_clk_src = { .reg = 0x3e048, .shift = 8, -@@ -1183,8 +951,8 @@ static struct clk_regmap_mux usb0_pipe_c +@@ -1177,8 +945,8 @@ static struct clk_regmap_mux usb0_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb0_pipe_clk_src", @@ -1081,7 +1081,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1199,8 +967,8 @@ static struct clk_rcg2 usb1_master_clk_s +@@ -1193,8 +961,8 @@ static struct clk_rcg2 usb1_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_master_clk_src", @@ -1092,7 +1092,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1213,8 +981,8 @@ static struct clk_rcg2 usb1_aux_clk_src +@@ -1207,8 +975,8 @@ static struct clk_rcg2 usb1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_aux_clk_src", @@ -1103,7 +1103,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1227,12 +995,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -1221,12 +989,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_mock_utmi_clk_src", @@ -1128,7 +1128,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb1_pipe_clk_src = { .reg = 0x3f048, .shift = 8, -@@ -1241,8 +1019,8 @@ static struct clk_regmap_mux usb1_pipe_c +@@ -1235,8 +1013,8 @@ static struct clk_regmap_mux usb1_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb1_pipe_clk_src", @@ -1139,7 +1139,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1256,8 +1034,9 @@ static struct clk_branch gcc_xo_clk_src +@@ -1250,8 +1028,9 @@ static struct clk_branch gcc_xo_clk_src .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_xo_clk_src", @@ -1151,7 +1151,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, -@@ -1271,9 +1050,8 @@ static struct clk_fixed_factor gcc_xo_di +@@ -1265,9 +1044,8 @@ static struct clk_fixed_factor gcc_xo_di .div = 4, .hw.init = &(struct clk_init_data){ .name = "gcc_xo_div4_clk_src", @@ -1163,7 +1163,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1291,6 +1069,20 @@ static const struct freq_tbl ftbl_system +@@ -1285,6 +1063,20 @@ static const struct freq_tbl ftbl_system { } }; @@ -1184,7 +1184,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 system_noc_bfdcd_clk_src = { .cmd_rcgr = 0x26004, .freq_tbl = ftbl_system_noc_bfdcd_clk_src, -@@ -1298,8 +1090,8 @@ static struct clk_rcg2 system_noc_bfdcd_ +@@ -1292,8 +1084,8 @@ static struct clk_rcg2 system_noc_bfdcd_ .parent_map = gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "system_noc_bfdcd_clk_src", @@ -1195,7 +1195,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_IS_CRITICAL, }, -@@ -1310,9 +1102,8 @@ static struct clk_fixed_factor system_no +@@ -1304,9 +1096,8 @@ static struct clk_fixed_factor system_no .div = 1, .hw.init = &(struct clk_init_data){ .name = "system_noc_clk_src", @@ -1207,7 +1207,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1333,7 +1124,7 @@ static struct clk_rcg2 nss_ce_clk_src = +@@ -1327,7 +1118,7 @@ static struct clk_rcg2 nss_ce_clk_src = .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ce_clk_src", .parent_data = gcc_xo_gpll0, @@ -1216,7 +1216,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1344,6 +1135,20 @@ static const struct freq_tbl ftbl_nss_no +@@ -1338,6 +1129,20 @@ static const struct freq_tbl ftbl_nss_no { } }; @@ -1237,7 +1237,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_noc_bfdcd_clk_src = { .cmd_rcgr = 0x68088, .freq_tbl = ftbl_nss_noc_bfdcd_clk_src, -@@ -1351,8 +1156,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk +@@ -1345,8 +1150,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk .parent_map = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_noc_bfdcd_clk_src", @@ -1248,7 +1248,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1362,9 +1167,8 @@ static struct clk_fixed_factor nss_noc_c +@@ -1356,9 +1161,8 @@ static struct clk_fixed_factor nss_noc_c .div = 1, .hw.init = &(struct clk_init_data){ .name = "nss_noc_clk_src", @@ -1260,7 +1260,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1377,6 +1181,18 @@ static const struct freq_tbl ftbl_nss_cr +@@ -1371,6 +1175,18 @@ static const struct freq_tbl ftbl_nss_cr { } }; @@ -1279,7 +1279,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_crypto_clk_src = { .cmd_rcgr = 0x68144, .freq_tbl = ftbl_nss_crypto_clk_src, -@@ -1385,8 +1201,8 @@ static struct clk_rcg2 nss_crypto_clk_sr +@@ -1379,8 +1195,8 @@ static struct clk_rcg2 nss_crypto_clk_sr .parent_map = gcc_xo_nss_crypto_pll_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_crypto_clk_src", @@ -1290,7 +1290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1400,6 +1216,24 @@ static const struct freq_tbl ftbl_nss_ub +@@ -1394,6 +1210,24 @@ static const struct freq_tbl ftbl_nss_ub { } }; @@ -1315,7 +1315,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ubi0_clk_src = { .cmd_rcgr = 0x68104, .freq_tbl = ftbl_nss_ubi_clk_src, -@@ -1407,8 +1241,8 @@ static struct clk_rcg2 nss_ubi0_clk_src +@@ -1401,8 +1235,8 @@ static struct clk_rcg2 nss_ubi0_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi0_clk_src", @@ -1326,7 +1326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1421,9 +1255,8 @@ static struct clk_regmap_div nss_ubi0_di +@@ -1415,9 +1249,8 @@ static struct clk_regmap_div nss_ubi0_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi0_div_clk_src", @@ -1338,7 +1338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1438,8 +1271,8 @@ static struct clk_rcg2 nss_ubi1_clk_src +@@ -1432,8 +1265,8 @@ static struct clk_rcg2 nss_ubi1_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi1_clk_src", @@ -1349,7 +1349,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1452,9 +1285,8 @@ static struct clk_regmap_div nss_ubi1_di +@@ -1446,9 +1279,8 @@ static struct clk_regmap_div nss_ubi1_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi1_div_clk_src", @@ -1361,7 +1361,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1468,6 +1300,16 @@ static const struct freq_tbl ftbl_ubi_mp +@@ -1462,6 +1294,16 @@ static const struct freq_tbl ftbl_ubi_mp { } }; @@ -1378,7 +1378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 ubi_mpt_clk_src = { .cmd_rcgr = 0x68090, .freq_tbl = ftbl_ubi_mpt_clk_src, -@@ -1475,8 +1317,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = +@@ -1469,8 +1311,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = .parent_map = gcc_xo_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "ubi_mpt_clk_src", @@ -1389,7 +1389,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1487,6 +1329,18 @@ static const struct freq_tbl ftbl_nss_im +@@ -1481,6 +1323,18 @@ static const struct freq_tbl ftbl_nss_im { } }; @@ -1408,7 +1408,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_imem_clk_src = { .cmd_rcgr = 0x68158, .freq_tbl = ftbl_nss_imem_clk_src, -@@ -1494,8 +1348,8 @@ static struct clk_rcg2 nss_imem_clk_src +@@ -1488,8 +1342,8 @@ static struct clk_rcg2 nss_imem_clk_src .parent_map = gcc_xo_gpll0_gpll4_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_imem_clk_src", @@ -1419,7 +1419,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1506,6 +1360,24 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1500,6 +1354,24 @@ static const struct freq_tbl ftbl_nss_pp { } }; @@ -1444,7 +1444,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ppe_clk_src = { .cmd_rcgr = 0x68080, .freq_tbl = ftbl_nss_ppe_clk_src, -@@ -1513,8 +1385,8 @@ static struct clk_rcg2 nss_ppe_clk_src = +@@ -1507,8 +1379,8 @@ static struct clk_rcg2 nss_ppe_clk_src = .parent_map = gcc_xo_bias_gpll0_gpll4_nss_ubi32_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ppe_clk_src", @@ -1455,7 +1455,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1524,9 +1396,8 @@ static struct clk_fixed_factor nss_ppe_c +@@ -1518,9 +1390,8 @@ static struct clk_fixed_factor nss_ppe_c .div = 4, .hw.init = &(struct clk_init_data){ .name = "nss_ppe_cdiv_clk_src", @@ -1467,7 +1467,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1540,6 +1411,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1534,6 +1405,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1490,7 +1490,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_rx_clk_src = { .cmd_rcgr = 0x68020, .freq_tbl = ftbl_nss_port1_rx_clk_src, -@@ -1547,8 +1434,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ +@@ -1541,8 +1428,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_clk_src", @@ -1501,7 +1501,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1560,9 +1447,8 @@ static struct clk_regmap_div nss_port1_r +@@ -1554,9 +1441,8 @@ static struct clk_regmap_div nss_port1_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_div_clk_src", @@ -1513,7 +1513,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1577,6 +1463,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1571,6 +1457,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1536,7 +1536,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_tx_clk_src = { .cmd_rcgr = 0x68028, .freq_tbl = ftbl_nss_port1_tx_clk_src, -@@ -1584,8 +1486,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ +@@ -1578,8 +1480,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_clk_src", @@ -1547,7 +1547,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1597,9 +1499,8 @@ static struct clk_regmap_div nss_port1_t +@@ -1591,9 +1493,8 @@ static struct clk_regmap_div nss_port1_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_div_clk_src", @@ -1559,7 +1559,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1614,8 +1515,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ +@@ -1608,8 +1509,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_clk_src", @@ -1570,7 +1570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1627,9 +1528,8 @@ static struct clk_regmap_div nss_port2_r +@@ -1621,9 +1522,8 @@ static struct clk_regmap_div nss_port2_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_div_clk_src", @@ -1582,7 +1582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1644,8 +1544,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ +@@ -1638,8 +1538,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_clk_src", @@ -1593,7 +1593,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1657,9 +1557,8 @@ static struct clk_regmap_div nss_port2_t +@@ -1651,9 +1551,8 @@ static struct clk_regmap_div nss_port2_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_div_clk_src", @@ -1605,7 +1605,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1674,8 +1573,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ +@@ -1668,8 +1567,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_clk_src", @@ -1616,7 +1616,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1687,9 +1586,8 @@ static struct clk_regmap_div nss_port3_r +@@ -1681,9 +1580,8 @@ static struct clk_regmap_div nss_port3_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_div_clk_src", @@ -1628,7 +1628,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1704,8 +1602,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ +@@ -1698,8 +1596,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_clk_src", @@ -1639,7 +1639,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1717,9 +1615,8 @@ static struct clk_regmap_div nss_port3_t +@@ -1711,9 +1609,8 @@ static struct clk_regmap_div nss_port3_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_div_clk_src", @@ -1651,7 +1651,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1734,8 +1631,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ +@@ -1728,8 +1625,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_clk_src", @@ -1662,7 +1662,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1747,9 +1644,8 @@ static struct clk_regmap_div nss_port4_r +@@ -1741,9 +1638,8 @@ static struct clk_regmap_div nss_port4_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_div_clk_src", @@ -1674,7 +1674,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1764,8 +1660,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ +@@ -1758,8 +1654,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_clk_src", @@ -1685,7 +1685,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1777,9 +1673,8 @@ static struct clk_regmap_div nss_port4_t +@@ -1771,9 +1667,8 @@ static struct clk_regmap_div nss_port4_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_div_clk_src", @@ -1697,7 +1697,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1799,6 +1694,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1793,6 +1688,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1725,7 +1725,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_rx_clk_src = { .cmd_rcgr = 0x68060, .freq_tbl = ftbl_nss_port5_rx_clk_src, -@@ -1806,8 +1722,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ +@@ -1800,8 +1716,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_clk_src", @@ -1736,7 +1736,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1819,9 +1735,8 @@ static struct clk_regmap_div nss_port5_r +@@ -1813,9 +1729,8 @@ static struct clk_regmap_div nss_port5_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_div_clk_src", @@ -1748,7 +1748,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1841,6 +1756,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1835,6 +1750,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1776,7 +1776,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_tx_clk_src = { .cmd_rcgr = 0x68068, .freq_tbl = ftbl_nss_port5_tx_clk_src, -@@ -1848,8 +1784,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ +@@ -1842,8 +1778,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_clk_src", @@ -1787,7 +1787,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1861,9 +1797,8 @@ static struct clk_regmap_div nss_port5_t +@@ -1855,9 +1791,8 @@ static struct clk_regmap_div nss_port5_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_div_clk_src", @@ -1799,7 +1799,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1883,6 +1818,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1877,6 +1812,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1822,7 +1822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_rx_clk_src = { .cmd_rcgr = 0x68070, .freq_tbl = ftbl_nss_port6_rx_clk_src, -@@ -1890,8 +1841,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ +@@ -1884,8 +1835,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ .parent_map = gcc_xo_uniphy2_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_clk_src", @@ -1833,7 +1833,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1903,9 +1854,8 @@ static struct clk_regmap_div nss_port6_r +@@ -1897,9 +1848,8 @@ static struct clk_regmap_div nss_port6_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_div_clk_src", @@ -1845,7 +1845,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1925,6 +1875,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1919,6 +1869,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1868,7 +1868,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_tx_clk_src = { .cmd_rcgr = 0x68078, .freq_tbl = ftbl_nss_port6_tx_clk_src, -@@ -1932,8 +1898,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ +@@ -1926,8 +1892,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ .parent_map = gcc_xo_uniphy2_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_clk_src", @@ -1879,7 +1879,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1945,9 +1911,8 @@ static struct clk_regmap_div nss_port6_t +@@ -1939,9 +1905,8 @@ static struct clk_regmap_div nss_port6_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_div_clk_src", @@ -1891,7 +1891,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1970,8 +1935,8 @@ static struct clk_rcg2 crypto_clk_src = +@@ -1964,8 +1929,8 @@ static struct clk_rcg2 crypto_clk_src = .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "crypto_clk_src", @@ -1902,7 +1902,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1981,6 +1946,22 @@ static struct freq_tbl ftbl_gp_clk_src[] +@@ -1975,6 +1940,22 @@ static struct freq_tbl ftbl_gp_clk_src[] { } }; @@ -1925,7 +1925,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 gp1_clk_src = { .cmd_rcgr = 0x08004, .freq_tbl = ftbl_gp_clk_src, -@@ -1989,8 +1970,8 @@ static struct clk_rcg2 gp1_clk_src = { +@@ -1983,8 +1964,8 @@ static struct clk_rcg2 gp1_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp1_clk_src", @@ -1936,7 +1936,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2003,8 +1984,8 @@ static struct clk_rcg2 gp2_clk_src = { +@@ -1997,8 +1978,8 @@ static struct clk_rcg2 gp2_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp2_clk_src", @@ -1947,7 +1947,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2017,8 +1998,8 @@ static struct clk_rcg2 gp3_clk_src = { +@@ -2011,8 +1992,8 @@ static struct clk_rcg2 gp3_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp3_clk_src", @@ -1958,7 +1958,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2030,9 +2011,8 @@ static struct clk_branch gcc_blsp1_ahb_c +@@ -2024,9 +2005,8 @@ static struct clk_branch gcc_blsp1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_ahb_clk", @@ -1970,7 +1970,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2047,9 +2027,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2041,9 +2021,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_i2c_apps_clk", @@ -1982,7 +1982,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2064,9 +2043,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2058,9 +2037,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_spi_apps_clk", @@ -1994,7 +1994,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2081,9 +2059,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2075,9 +2053,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_i2c_apps_clk", @@ -2006,7 +2006,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2098,9 +2075,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2092,9 +2069,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_spi_apps_clk", @@ -2018,7 +2018,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2115,9 +2091,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2109,9 +2085,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_i2c_apps_clk", @@ -2030,7 +2030,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2132,9 +2107,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2126,9 +2101,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_spi_apps_clk", @@ -2042,7 +2042,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2149,9 +2123,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2143,9 +2117,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_i2c_apps_clk", @@ -2054,7 +2054,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2166,9 +2139,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2160,9 +2133,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_spi_apps_clk", @@ -2066,7 +2066,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2183,9 +2155,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2177,9 +2149,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_i2c_apps_clk", @@ -2078,7 +2078,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2200,9 +2171,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2194,9 +2165,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_spi_apps_clk", @@ -2090,7 +2090,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2217,9 +2187,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2211,9 +2181,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_i2c_apps_clk", @@ -2102,7 +2102,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2234,9 +2203,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2228,9 +2197,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_spi_apps_clk", @@ -2114,7 +2114,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2251,9 +2219,8 @@ static struct clk_branch gcc_blsp1_uart1 +@@ -2245,9 +2213,8 @@ static struct clk_branch gcc_blsp1_uart1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart1_apps_clk", @@ -2126,7 +2126,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2268,9 +2235,8 @@ static struct clk_branch gcc_blsp1_uart2 +@@ -2262,9 +2229,8 @@ static struct clk_branch gcc_blsp1_uart2 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart2_apps_clk", @@ -2138,7 +2138,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2285,9 +2251,8 @@ static struct clk_branch gcc_blsp1_uart3 +@@ -2279,9 +2245,8 @@ static struct clk_branch gcc_blsp1_uart3 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart3_apps_clk", @@ -2150,7 +2150,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2302,9 +2267,8 @@ static struct clk_branch gcc_blsp1_uart4 +@@ -2296,9 +2261,8 @@ static struct clk_branch gcc_blsp1_uart4 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart4_apps_clk", @@ -2162,7 +2162,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2319,9 +2283,8 @@ static struct clk_branch gcc_blsp1_uart5 +@@ -2313,9 +2277,8 @@ static struct clk_branch gcc_blsp1_uart5 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart5_apps_clk", @@ -2174,7 +2174,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2336,9 +2299,8 @@ static struct clk_branch gcc_blsp1_uart6 +@@ -2330,9 +2293,8 @@ static struct clk_branch gcc_blsp1_uart6 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart6_apps_clk", @@ -2186,7 +2186,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2354,9 +2316,8 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -2348,9 +2310,8 @@ static struct clk_branch gcc_prng_ahb_cl .enable_mask = BIT(8), .hw.init = &(struct clk_init_data){ .name = "gcc_prng_ahb_clk", @@ -2198,7 +2198,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2371,9 +2332,8 @@ static struct clk_branch gcc_qpic_ahb_cl +@@ -2365,9 +2326,8 @@ static struct clk_branch gcc_qpic_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_ahb_clk", @@ -2210,7 +2210,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2388,9 +2348,8 @@ static struct clk_branch gcc_qpic_clk = +@@ -2382,9 +2342,8 @@ static struct clk_branch gcc_qpic_clk = .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_clk", @@ -2222,7 +2222,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2405,9 +2364,8 @@ static struct clk_branch gcc_pcie0_ahb_c +@@ -2399,9 +2358,8 @@ static struct clk_branch gcc_pcie0_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_ahb_clk", @@ -2234,7 +2234,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2422,9 +2380,8 @@ static struct clk_branch gcc_pcie0_aux_c +@@ -2416,9 +2374,8 @@ static struct clk_branch gcc_pcie0_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_aux_clk", @@ -2246,7 +2246,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2439,9 +2396,8 @@ static struct clk_branch gcc_pcie0_axi_m +@@ -2433,9 +2390,8 @@ static struct clk_branch gcc_pcie0_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_m_clk", @@ -2258,7 +2258,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2456,9 +2412,8 @@ static struct clk_branch gcc_pcie0_axi_s +@@ -2450,9 +2406,8 @@ static struct clk_branch gcc_pcie0_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_s_clk", @@ -2270,7 +2270,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2474,9 +2429,8 @@ static struct clk_branch gcc_pcie0_pipe_ +@@ -2468,9 +2423,8 @@ static struct clk_branch gcc_pcie0_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_pipe_clk", @@ -2282,7 +2282,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2491,9 +2445,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2485,9 +2439,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie0_axi_clk", @@ -2294,7 +2294,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2508,9 +2461,8 @@ static struct clk_branch gcc_pcie1_ahb_c +@@ -2502,9 +2455,8 @@ static struct clk_branch gcc_pcie1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_ahb_clk", @@ -2306,7 +2306,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2525,9 +2477,8 @@ static struct clk_branch gcc_pcie1_aux_c +@@ -2519,9 +2471,8 @@ static struct clk_branch gcc_pcie1_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_aux_clk", @@ -2318,7 +2318,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2542,9 +2493,8 @@ static struct clk_branch gcc_pcie1_axi_m +@@ -2536,9 +2487,8 @@ static struct clk_branch gcc_pcie1_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_m_clk", @@ -2330,7 +2330,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2559,9 +2509,8 @@ static struct clk_branch gcc_pcie1_axi_s +@@ -2553,9 +2503,8 @@ static struct clk_branch gcc_pcie1_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_s_clk", @@ -2342,7 +2342,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2577,9 +2526,8 @@ static struct clk_branch gcc_pcie1_pipe_ +@@ -2571,9 +2520,8 @@ static struct clk_branch gcc_pcie1_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_pipe_clk", @@ -2354,7 +2354,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2594,9 +2542,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2588,9 +2536,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie1_axi_clk", @@ -2366,7 +2366,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2611,9 +2558,8 @@ static struct clk_branch gcc_usb0_aux_cl +@@ -2605,9 +2552,8 @@ static struct clk_branch gcc_usb0_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_aux_clk", @@ -2378,7 +2378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2628,9 +2574,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2622,9 +2568,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb0_axi_clk", @@ -2390,7 +2390,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2645,9 +2590,8 @@ static struct clk_branch gcc_usb0_master +@@ -2639,9 +2584,8 @@ static struct clk_branch gcc_usb0_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_master_clk", @@ -2402,7 +2402,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2662,9 +2606,8 @@ static struct clk_branch gcc_usb0_mock_u +@@ -2656,9 +2600,8 @@ static struct clk_branch gcc_usb0_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_mock_utmi_clk", @@ -2414,7 +2414,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2679,9 +2622,8 @@ static struct clk_branch gcc_usb0_phy_cf +@@ -2673,9 +2616,8 @@ static struct clk_branch gcc_usb0_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_phy_cfg_ahb_clk", @@ -2426,7 +2426,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2697,9 +2639,8 @@ static struct clk_branch gcc_usb0_pipe_c +@@ -2691,9 +2633,8 @@ static struct clk_branch gcc_usb0_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_pipe_clk", @@ -2438,7 +2438,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2714,9 +2655,8 @@ static struct clk_branch gcc_usb0_sleep_ +@@ -2708,9 +2649,8 @@ static struct clk_branch gcc_usb0_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_sleep_clk", @@ -2450,7 +2450,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2731,9 +2671,8 @@ static struct clk_branch gcc_usb1_aux_cl +@@ -2725,9 +2665,8 @@ static struct clk_branch gcc_usb1_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_aux_clk", @@ -2462,7 +2462,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2748,9 +2687,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2742,9 +2681,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb1_axi_clk", @@ -2474,7 +2474,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2765,9 +2703,8 @@ static struct clk_branch gcc_usb1_master +@@ -2759,9 +2697,8 @@ static struct clk_branch gcc_usb1_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_master_clk", @@ -2486,7 +2486,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2782,9 +2719,8 @@ static struct clk_branch gcc_usb1_mock_u +@@ -2776,9 +2713,8 @@ static struct clk_branch gcc_usb1_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_mock_utmi_clk", @@ -2498,7 +2498,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2799,9 +2735,8 @@ static struct clk_branch gcc_usb1_phy_cf +@@ -2793,9 +2729,8 @@ static struct clk_branch gcc_usb1_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_phy_cfg_ahb_clk", @@ -2510,7 +2510,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2817,9 +2752,8 @@ static struct clk_branch gcc_usb1_pipe_c +@@ -2811,9 +2746,8 @@ static struct clk_branch gcc_usb1_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_pipe_clk", @@ -2522,7 +2522,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2834,9 +2768,8 @@ static struct clk_branch gcc_usb1_sleep_ +@@ -2828,9 +2762,8 @@ static struct clk_branch gcc_usb1_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_sleep_clk", @@ -2534,7 +2534,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2851,9 +2784,8 @@ static struct clk_branch gcc_sdcc1_ahb_c +@@ -2845,9 +2778,8 @@ static struct clk_branch gcc_sdcc1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ahb_clk", @@ -2546,7 +2546,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2868,9 +2800,8 @@ static struct clk_branch gcc_sdcc1_apps_ +@@ -2862,9 +2794,8 @@ static struct clk_branch gcc_sdcc1_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_apps_clk", @@ -2558,7 +2558,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2885,9 +2816,8 @@ static struct clk_branch gcc_sdcc1_ice_c +@@ -2879,9 +2810,8 @@ static struct clk_branch gcc_sdcc1_ice_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ice_core_clk", @@ -2570,7 +2570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2902,9 +2832,8 @@ static struct clk_branch gcc_sdcc2_ahb_c +@@ -2896,9 +2826,8 @@ static struct clk_branch gcc_sdcc2_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_ahb_clk", @@ -2582,7 +2582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2919,9 +2848,8 @@ static struct clk_branch gcc_sdcc2_apps_ +@@ -2913,9 +2842,8 @@ static struct clk_branch gcc_sdcc2_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_apps_clk", @@ -2594,7 +2594,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2936,9 +2864,8 @@ static struct clk_branch gcc_mem_noc_nss +@@ -2930,9 +2858,8 @@ static struct clk_branch gcc_mem_noc_nss .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mem_noc_nss_axi_clk", @@ -2606,7 +2606,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2953,9 +2880,8 @@ static struct clk_branch gcc_nss_ce_apb_ +@@ -2947,9 +2874,8 @@ static struct clk_branch gcc_nss_ce_apb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_apb_clk", @@ -2618,7 +2618,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2970,9 +2896,8 @@ static struct clk_branch gcc_nss_ce_axi_ +@@ -2964,9 +2890,8 @@ static struct clk_branch gcc_nss_ce_axi_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_axi_clk", @@ -2630,7 +2630,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2987,9 +2912,8 @@ static struct clk_branch gcc_nss_cfg_clk +@@ -2981,9 +2906,8 @@ static struct clk_branch gcc_nss_cfg_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_cfg_clk", @@ -2642,7 +2642,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3004,9 +2928,8 @@ static struct clk_branch gcc_nss_crypto_ +@@ -2998,9 +2922,8 @@ static struct clk_branch gcc_nss_crypto_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_crypto_clk", @@ -2654,7 +2654,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3021,9 +2944,8 @@ static struct clk_branch gcc_nss_csr_clk +@@ -3015,9 +2938,8 @@ static struct clk_branch gcc_nss_csr_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_csr_clk", @@ -2666,7 +2666,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3038,9 +2960,8 @@ static struct clk_branch gcc_nss_edma_cf +@@ -3032,9 +2954,8 @@ static struct clk_branch gcc_nss_edma_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_cfg_clk", @@ -2678,7 +2678,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3055,9 +2976,8 @@ static struct clk_branch gcc_nss_edma_cl +@@ -3049,9 +2970,8 @@ static struct clk_branch gcc_nss_edma_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_clk", @@ -2690,7 +2690,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3072,9 +2992,8 @@ static struct clk_branch gcc_nss_imem_cl +@@ -3066,9 +2986,8 @@ static struct clk_branch gcc_nss_imem_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_imem_clk", @@ -2702,7 +2702,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3089,9 +3008,8 @@ static struct clk_branch gcc_nss_noc_clk +@@ -3083,9 +3002,8 @@ static struct clk_branch gcc_nss_noc_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_noc_clk", @@ -2714,7 +2714,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3106,9 +3024,8 @@ static struct clk_branch gcc_nss_ppe_btq +@@ -3100,9 +3018,8 @@ static struct clk_branch gcc_nss_ppe_btq .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_btq_clk", @@ -2726,7 +2726,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3123,9 +3040,8 @@ static struct clk_branch gcc_nss_ppe_cfg +@@ -3117,9 +3034,8 @@ static struct clk_branch gcc_nss_ppe_cfg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_cfg_clk", @@ -2738,7 +2738,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3140,9 +3056,8 @@ static struct clk_branch gcc_nss_ppe_clk +@@ -3134,9 +3050,8 @@ static struct clk_branch gcc_nss_ppe_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_clk", @@ -2750,7 +2750,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3157,9 +3072,8 @@ static struct clk_branch gcc_nss_ppe_ipe +@@ -3151,9 +3066,8 @@ static struct clk_branch gcc_nss_ppe_ipe .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_ipe_clk", @@ -2762,7 +2762,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3174,9 +3088,8 @@ static struct clk_branch gcc_nss_ptp_ref +@@ -3168,9 +3082,8 @@ static struct clk_branch gcc_nss_ptp_ref .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ptp_ref_clk", @@ -2774,7 +2774,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3192,9 +3105,8 @@ static struct clk_branch gcc_crypto_ppe_ +@@ -3186,9 +3099,8 @@ static struct clk_branch gcc_crypto_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ppe_clk", @@ -2786,7 +2786,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3209,9 +3121,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3203,9 +3115,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_apb_clk", @@ -2798,7 +2798,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3226,9 +3137,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3220,9 +3131,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_axi_clk", @@ -2810,7 +2810,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3243,9 +3153,8 @@ static struct clk_branch gcc_nssnoc_cryp +@@ -3237,9 +3147,8 @@ static struct clk_branch gcc_nssnoc_cryp .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_crypto_clk", @@ -2822,7 +2822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3260,9 +3169,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3254,9 +3163,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_cfg_clk", @@ -2834,7 +2834,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3277,9 +3185,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3271,9 +3179,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_clk", @@ -2846,7 +2846,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3294,9 +3201,8 @@ static struct clk_branch gcc_nssnoc_qosg +@@ -3288,9 +3195,8 @@ static struct clk_branch gcc_nssnoc_qosg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_qosgen_ref_clk", @@ -2858,7 +2858,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3311,9 +3217,8 @@ static struct clk_branch gcc_nssnoc_snoc +@@ -3305,9 +3211,8 @@ static struct clk_branch gcc_nssnoc_snoc .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_snoc_clk", @@ -2870,7 +2870,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3328,9 +3233,8 @@ static struct clk_branch gcc_nssnoc_time +@@ -3322,9 +3227,8 @@ static struct clk_branch gcc_nssnoc_time .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_timeout_ref_clk", @@ -2882,7 +2882,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3345,9 +3249,8 @@ static struct clk_branch gcc_nssnoc_ubi0 +@@ -3339,9 +3243,8 @@ static struct clk_branch gcc_nssnoc_ubi0 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi0_ahb_clk", @@ -2894,7 +2894,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3362,9 +3265,8 @@ static struct clk_branch gcc_nssnoc_ubi1 +@@ -3356,9 +3259,8 @@ static struct clk_branch gcc_nssnoc_ubi1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi1_ahb_clk", @@ -2906,7 +2906,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3380,9 +3282,8 @@ static struct clk_branch gcc_ubi0_ahb_cl +@@ -3374,9 +3276,8 @@ static struct clk_branch gcc_ubi0_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_ahb_clk", @@ -2918,7 +2918,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3398,9 +3299,8 @@ static struct clk_branch gcc_ubi0_axi_cl +@@ -3392,9 +3293,8 @@ static struct clk_branch gcc_ubi0_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_axi_clk", @@ -2930,7 +2930,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3416,9 +3316,8 @@ static struct clk_branch gcc_ubi0_nc_axi +@@ -3410,9 +3310,8 @@ static struct clk_branch gcc_ubi0_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_nc_axi_clk", @@ -2942,7 +2942,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3434,9 +3333,8 @@ static struct clk_branch gcc_ubi0_core_c +@@ -3428,9 +3327,8 @@ static struct clk_branch gcc_ubi0_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_core_clk", @@ -2954,7 +2954,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3452,9 +3350,8 @@ static struct clk_branch gcc_ubi0_mpt_cl +@@ -3446,9 +3344,8 @@ static struct clk_branch gcc_ubi0_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_mpt_clk", @@ -2966,7 +2966,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3470,9 +3367,8 @@ static struct clk_branch gcc_ubi1_ahb_cl +@@ -3464,9 +3361,8 @@ static struct clk_branch gcc_ubi1_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_ahb_clk", @@ -2978,7 +2978,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3488,9 +3384,8 @@ static struct clk_branch gcc_ubi1_axi_cl +@@ -3482,9 +3378,8 @@ static struct clk_branch gcc_ubi1_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_axi_clk", @@ -2990,7 +2990,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3506,9 +3401,8 @@ static struct clk_branch gcc_ubi1_nc_axi +@@ -3500,9 +3395,8 @@ static struct clk_branch gcc_ubi1_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_nc_axi_clk", @@ -3002,7 +3002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3524,9 +3418,8 @@ static struct clk_branch gcc_ubi1_core_c +@@ -3518,9 +3412,8 @@ static struct clk_branch gcc_ubi1_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_core_clk", @@ -3014,7 +3014,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3542,9 +3435,8 @@ static struct clk_branch gcc_ubi1_mpt_cl +@@ -3536,9 +3429,8 @@ static struct clk_branch gcc_ubi1_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_mpt_clk", @@ -3026,7 +3026,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3559,9 +3451,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3553,9 +3445,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_ahb_clk", @@ -3038,7 +3038,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3576,9 +3467,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3570,9 +3461,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_sys_clk", @@ -3050,7 +3050,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3593,9 +3483,8 @@ static struct clk_branch gcc_mdio_ahb_cl +@@ -3587,9 +3477,8 @@ static struct clk_branch gcc_mdio_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mdio_ahb_clk", @@ -3062,7 +3062,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3610,9 +3499,8 @@ static struct clk_branch gcc_uniphy0_ahb +@@ -3604,9 +3493,8 @@ static struct clk_branch gcc_uniphy0_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_ahb_clk", @@ -3074,7 +3074,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3627,9 +3515,8 @@ static struct clk_branch gcc_uniphy0_sys +@@ -3621,9 +3509,8 @@ static struct clk_branch gcc_uniphy0_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_sys_clk", @@ -3086,7 +3086,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3644,9 +3531,8 @@ static struct clk_branch gcc_uniphy1_ahb +@@ -3638,9 +3525,8 @@ static struct clk_branch gcc_uniphy1_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_ahb_clk", @@ -3098,7 +3098,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3661,9 +3547,8 @@ static struct clk_branch gcc_uniphy1_sys +@@ -3655,9 +3541,8 @@ static struct clk_branch gcc_uniphy1_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_sys_clk", @@ -3110,7 +3110,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3678,9 +3563,8 @@ static struct clk_branch gcc_uniphy2_ahb +@@ -3672,9 +3557,8 @@ static struct clk_branch gcc_uniphy2_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_ahb_clk", @@ -3122,7 +3122,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3695,9 +3579,8 @@ static struct clk_branch gcc_uniphy2_sys +@@ -3689,9 +3573,8 @@ static struct clk_branch gcc_uniphy2_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_sys_clk", @@ -3134,7 +3134,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3712,9 +3595,8 @@ static struct clk_branch gcc_nss_port1_r +@@ -3706,9 +3589,8 @@ static struct clk_branch gcc_nss_port1_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_rx_clk", @@ -3146,7 +3146,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3729,9 +3611,8 @@ static struct clk_branch gcc_nss_port1_t +@@ -3723,9 +3605,8 @@ static struct clk_branch gcc_nss_port1_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_tx_clk", @@ -3158,7 +3158,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3746,9 +3627,8 @@ static struct clk_branch gcc_nss_port2_r +@@ -3740,9 +3621,8 @@ static struct clk_branch gcc_nss_port2_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_rx_clk", @@ -3170,7 +3170,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3763,9 +3643,8 @@ static struct clk_branch gcc_nss_port2_t +@@ -3757,9 +3637,8 @@ static struct clk_branch gcc_nss_port2_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_tx_clk", @@ -3182,7 +3182,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3780,9 +3659,8 @@ static struct clk_branch gcc_nss_port3_r +@@ -3774,9 +3653,8 @@ static struct clk_branch gcc_nss_port3_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_rx_clk", @@ -3194,7 +3194,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3797,9 +3675,8 @@ static struct clk_branch gcc_nss_port3_t +@@ -3791,9 +3669,8 @@ static struct clk_branch gcc_nss_port3_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_tx_clk", @@ -3206,7 +3206,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3814,9 +3691,8 @@ static struct clk_branch gcc_nss_port4_r +@@ -3808,9 +3685,8 @@ static struct clk_branch gcc_nss_port4_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_rx_clk", @@ -3218,7 +3218,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3831,9 +3707,8 @@ static struct clk_branch gcc_nss_port4_t +@@ -3825,9 +3701,8 @@ static struct clk_branch gcc_nss_port4_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_tx_clk", @@ -3230,7 +3230,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3848,9 +3723,8 @@ static struct clk_branch gcc_nss_port5_r +@@ -3842,9 +3717,8 @@ static struct clk_branch gcc_nss_port5_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_rx_clk", @@ -3242,7 +3242,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3865,9 +3739,8 @@ static struct clk_branch gcc_nss_port5_t +@@ -3859,9 +3733,8 @@ static struct clk_branch gcc_nss_port5_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_tx_clk", @@ -3254,7 +3254,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3882,9 +3755,8 @@ static struct clk_branch gcc_nss_port6_r +@@ -3876,9 +3749,8 @@ static struct clk_branch gcc_nss_port6_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_rx_clk", @@ -3266,7 +3266,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3899,9 +3771,8 @@ static struct clk_branch gcc_nss_port6_t +@@ -3893,9 +3765,8 @@ static struct clk_branch gcc_nss_port6_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_tx_clk", @@ -3278,7 +3278,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3916,9 +3787,8 @@ static struct clk_branch gcc_port1_mac_c +@@ -3910,9 +3781,8 @@ static struct clk_branch gcc_port1_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port1_mac_clk", @@ -3290,7 +3290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3933,9 +3803,8 @@ static struct clk_branch gcc_port2_mac_c +@@ -3927,9 +3797,8 @@ static struct clk_branch gcc_port2_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port2_mac_clk", @@ -3302,7 +3302,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3950,9 +3819,8 @@ static struct clk_branch gcc_port3_mac_c +@@ -3944,9 +3813,8 @@ static struct clk_branch gcc_port3_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port3_mac_clk", @@ -3314,7 +3314,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3967,9 +3835,8 @@ static struct clk_branch gcc_port4_mac_c +@@ -3961,9 +3829,8 @@ static struct clk_branch gcc_port4_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port4_mac_clk", @@ -3326,7 +3326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3984,9 +3851,8 @@ static struct clk_branch gcc_port5_mac_c +@@ -3978,9 +3845,8 @@ static struct clk_branch gcc_port5_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port5_mac_clk", @@ -3338,7 +3338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4001,9 +3867,8 @@ static struct clk_branch gcc_port6_mac_c +@@ -3995,9 +3861,8 @@ static struct clk_branch gcc_port6_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port6_mac_clk", @@ -3350,7 +3350,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4018,9 +3883,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4012,9 +3877,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_rx_clk", @@ -3362,7 +3362,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4035,9 +3899,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4029,9 +3893,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_tx_clk", @@ -3374,7 +3374,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4052,9 +3915,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4046,9 +3909,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_rx_clk", @@ -3386,7 +3386,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4069,9 +3931,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4063,9 +3925,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_tx_clk", @@ -3398,7 +3398,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4086,9 +3947,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4080,9 +3941,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_rx_clk", @@ -3410,7 +3410,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4103,9 +3963,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4097,9 +3957,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_tx_clk", @@ -3422,7 +3422,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4120,9 +3979,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4114,9 +3973,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_rx_clk", @@ -3434,7 +3434,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4137,9 +3995,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4131,9 +3989,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_tx_clk", @@ -3446,7 +3446,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4154,9 +4011,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4148,9 +4005,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_rx_clk", @@ -3458,7 +3458,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4171,9 +4027,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4165,9 +4021,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_tx_clk", @@ -3470,7 +3470,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4188,9 +4043,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4182,9 +4037,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_rx_clk", @@ -3482,7 +3482,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4205,9 +4059,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4199,9 +4053,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_tx_clk", @@ -3494,7 +3494,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4222,9 +4075,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4216,9 +4069,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_rx_clk", @@ -3506,7 +3506,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4239,9 +4091,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4233,9 +4085,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_tx_clk", @@ -3518,7 +3518,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4257,9 +4108,8 @@ static struct clk_branch gcc_crypto_ahb_ +@@ -4251,9 +4102,8 @@ static struct clk_branch gcc_crypto_ahb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ahb_clk", @@ -3530,7 +3530,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4275,9 +4125,8 @@ static struct clk_branch gcc_crypto_axi_ +@@ -4269,9 +4119,8 @@ static struct clk_branch gcc_crypto_axi_ .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_axi_clk", @@ -3542,7 +3542,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4293,9 +4142,8 @@ static struct clk_branch gcc_crypto_clk +@@ -4287,9 +4136,8 @@ static struct clk_branch gcc_crypto_clk .enable_mask = BIT(2), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_clk", @@ -3554,7 +3554,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4310,9 +4158,8 @@ static struct clk_branch gcc_gp1_clk = { +@@ -4304,9 +4152,8 @@ static struct clk_branch gcc_gp1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp1_clk", @@ -3566,7 +3566,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4327,9 +4174,8 @@ static struct clk_branch gcc_gp2_clk = { +@@ -4321,9 +4168,8 @@ static struct clk_branch gcc_gp2_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp2_clk", @@ -3578,7 +3578,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4344,9 +4190,8 @@ static struct clk_branch gcc_gp3_clk = { +@@ -4338,9 +4184,8 @@ static struct clk_branch gcc_gp3_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp3_clk", @@ -3590,7 +3590,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4368,7 +4213,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s +@@ -4362,7 +4207,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_rchng_clk_src", .parent_data = gcc_xo_gpll0, diff --git a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch index 212fc84869..81014ab24c 100644 --- a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch +++ b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch @@ -18,7 +18,7 @@ Link: https://lore.kernel.org/r/20221107132901.489240-3-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -4671,6 +4671,20 @@ static const struct qcom_reset_map gcc_i +@@ -4665,6 +4665,20 @@ static const struct qcom_reset_map gcc_i [GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 }, [GCC_PCIE1_AHB_ARES] = { 0x76040, 5 }, [GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 }, diff --git a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch index 7372b1da8e..35a0a07c70 100644 --- a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch +++ b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch @@ -22,7 +22,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -680,7 +680,7 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -674,7 +674,7 @@ static struct clk_rcg2 pcie0_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy0_pipe_clk_xo[] = { @@ -31,7 +31,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -733,7 +733,7 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -727,7 +727,7 @@ static struct clk_rcg2 pcie1_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy1_pipe_clk_xo[] = { @@ -40,7 +40,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -1137,7 +1137,7 @@ static const struct freq_tbl ftbl_nss_no +@@ -1131,7 +1131,7 @@ static const struct freq_tbl ftbl_nss_no static const struct clk_parent_data gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = { { .fw_name = "xo", .name = "xo" }, @@ -49,7 +49,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll2.clkr.hw }, }; -@@ -1362,7 +1362,7 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1356,7 +1356,7 @@ static const struct freq_tbl ftbl_nss_pp static const struct clk_parent_data gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = { { .fw_name = "xo", .name = "xo" }, @@ -58,7 +58,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &nss_crypto_pll.clkr.hw }, -@@ -1413,10 +1413,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1407,10 +1407,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -72,7 +72,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = { -@@ -1465,10 +1465,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1459,10 +1459,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -86,7 +86,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = { -@@ -1696,12 +1696,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1690,12 +1690,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -104,7 +104,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1758,12 +1758,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1752,12 +1752,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -122,7 +122,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1820,10 +1820,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1814,10 +1814,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -136,7 +136,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = { -@@ -1877,10 +1877,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1871,10 +1871,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, diff --git a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch index eb772be4ce..e0e8125ba6 100644 --- a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch +++ b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch @@ -18,7 +18,7 @@ Signed-off-by: Robert Marko --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -934,7 +934,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -928,7 +928,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = { @@ -27,7 +27,7 @@ Signed-off-by: Robert Marko { .fw_name = "xo", .name = "xo" }, }; -@@ -1002,7 +1002,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -996,7 +996,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_1_cc_pipe_clk_xo[] = { diff --git a/target/linux/qualcommax/patches-6.1/0026-v6.7-clk-qcom-ipq8074-drop-the-CLK_SET_RATE_PARENT-flag-f.patch b/target/linux/qualcommax/patches-6.1/0026-v6.7-clk-qcom-ipq8074-drop-the-CLK_SET_RATE_PARENT-flag-f.patch deleted file mode 100644 index a3e0c20f03..0000000000 --- a/target/linux/qualcommax/patches-6.1/0026-v6.7-clk-qcom-ipq8074-drop-the-CLK_SET_RATE_PARENT-flag-f.patch +++ /dev/null @@ -1,71 +0,0 @@ -From 007ad475ba7f0d5d4d3e43a06e46a8a46d31c9d2 Mon Sep 17 00:00:00 2001 -From: Kathiravan Thirumoorthy -Date: Thu, 14 Sep 2023 12:29:51 +0530 -Subject: [PATCH] clk: qcom: ipq8074: drop the CLK_SET_RATE_PARENT flag from - PLL clocks -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -GPLL, NSS crypto PLL clock rates are fixed and shouldn't be scaled based -on the request from dependent clocks. Doing so will result in the -unexpected behaviour. So drop the CLK_SET_RATE_PARENT flag from the PLL -clocks. - -Cc: stable@vger.kernel.org -Fixes: b8e7e519625f ("clk: qcom: ipq8074: add remaining PLL’s") -Signed-off-by: Kathiravan Thirumoorthy ---- - drivers/clk/qcom/gcc-ipq8074.c | 6 ------ - 1 file changed, 6 deletions(-) - ---- a/drivers/clk/qcom/gcc-ipq8074.c -+++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -76,7 +76,6 @@ static struct clk_fixed_factor gpll0_out - &gpll0_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_fixed_factor_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; - -@@ -122,7 +121,6 @@ static struct clk_alpha_pll_postdiv gpll - &gpll2_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_alpha_pll_postdiv_ro_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; - -@@ -155,7 +153,6 @@ static struct clk_alpha_pll_postdiv gpll - &gpll4_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_alpha_pll_postdiv_ro_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; - -@@ -189,7 +186,6 @@ static struct clk_alpha_pll_postdiv gpll - &gpll6_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_alpha_pll_postdiv_ro_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; - -@@ -202,7 +198,6 @@ static struct clk_fixed_factor gpll6_out - &gpll6_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_fixed_factor_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; - -@@ -267,7 +262,6 @@ static struct clk_alpha_pll_postdiv nss_ - &nss_crypto_pll_main.clkr.hw }, - .num_parents = 1, - .ops = &clk_alpha_pll_postdiv_ro_ops, -- .flags = CLK_SET_RATE_PARENT, - }, - }; -