From: Martin Schiller Date: Fri, 12 Apr 2024 08:37:58 +0000 (+0200) Subject: lantiq: ltq-atm: use platform_get_irq to get irqs X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c143fd9091cc60e38c040588ea32db3acabaf8ed;p=openwrt%2Fstaging%2Fsvanheule.git lantiq: ltq-atm: use platform_get_irq to get irqs This is required for linux-6.1 compatibility. IRQs are not automatically mapped from HW to virtual IRQ numbers when the IRQ domain is registered. This happens when the IRQ number is read from the device tree based on the IRQ domain from the device tree now. In kernel 5.15 it was done when the IRQ domain was registered. Signed-off-by: Martin Schiller --- diff --git a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h index 31b80cf86f..20aa14445a 100644 --- a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h +++ b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_core.h @@ -25,8 +25,6 @@ #define IFXMIPS_ATM_CORE_H -#define INT_NUM_IM2_IRL24 (INT_NUM_IM2_IRL0 + 24) -#define INT_NUM_IM2_IRL13 (INT_NUM_IM2_IRL0 + 13) #define CONFIG_IFXMIPS_DSL_CPE_MEI #define IFX_REG_W32(_v, _r) __raw_writel((_v), (volatile unsigned int *)(_r)) #define IFX_REG_R32(_r) __raw_readl((volatile unsigned int *)(_r)) @@ -239,6 +237,8 @@ struct atm_priv_data { void *oam_buf_base; void *tx_desc_base; void *tx_skb_base; + + int irq; }; #include "ifxmips_atm_ppe_common.h" diff --git a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h index 412f605b2b..a8520300a0 100644 --- a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h +++ b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_amazon_se.h @@ -111,11 +111,6 @@ #define EMA_ALIGNMENT 4 -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL13 - #endif // IFXMIPS_ATM_PPE_AMAZON_SE_H diff --git a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h index fae0252c31..ff5602aa61 100644 --- a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h +++ b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_ar9.h @@ -178,11 +178,6 @@ #define EMA_ALIGNMENT 4 -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 - #endif // IFXMIPS_ATM_PPE_AR9_H diff --git a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h index 7aaaa8db1e..eff1a98819 100644 --- a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h +++ b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_danube.h @@ -119,11 +119,6 @@ #define EMA_ALIGNMENT 4 -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 - #endif // IFXMIPS_ATM_PPE_DANUBE_H diff --git a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h index 144c39656c..943350a1b4 100644 --- a/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h +++ b/package/kernel/lantiq/ltq-atm/src/ifxmips_atm_ppe_vr9.h @@ -182,11 +182,6 @@ #define PDMA_ALIGNMENT 4 #define EMA_ALIGNMENT PDMA_ALIGNMENT -/* - * Mailbox IGU1 Interrupt - */ -#define PPE_MAILBOX_IGU1_INT INT_NUM_IM2_IRL24 - #endif // IFXMIPS_ATM_PPE_VR9_H diff --git a/package/kernel/lantiq/ltq-atm/src/ltq_atm.c b/package/kernel/lantiq/ltq-atm/src/ltq_atm.c index 5d23b5ec48..bf2a4a50ec 100644 --- a/package/kernel/lantiq/ltq-atm/src/ltq_atm.c +++ b/package/kernel/lantiq/ltq-atm/src/ltq_atm.c @@ -435,7 +435,7 @@ static int ppe_open(struct atm_vcc *vcc) *MBOX_IGU1_ISRC = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); *MBOX_IGU1_IER = (1 << RX_DMA_CH_AAL) | (1 << RX_DMA_CH_OAM); - enable_irq(PPE_MAILBOX_IGU1_INT); + enable_irq(g_atm_priv_data.irq); } /* set port */ @@ -481,7 +481,7 @@ static void ppe_close(struct atm_vcc *vcc) /* disable irq */ if ( g_atm_priv_data.conn_table == 0 ) - disable_irq(PPE_MAILBOX_IGU1_INT); + disable_irq(g_atm_priv_data.irq); /* release bandwidth */ switch ( vcc->qos.txtp.traffic_class ) @@ -1022,7 +1022,7 @@ static void do_ppe_tasklet(unsigned long data) else if (*MBOX_IGU1_ISR >> (FIRST_QSB_QID + 16)) /* TX queue */ tasklet_schedule(&g_dma_tasklet); else - enable_irq(PPE_MAILBOX_IGU1_INT); + enable_irq(g_atm_priv_data.irq); } static irqreturn_t mailbox_irq_handler(int irq, void *dev_id) @@ -1030,7 +1030,7 @@ static irqreturn_t mailbox_irq_handler(int irq, void *dev_id) if ( !*MBOX_IGU1_ISR ) return IRQ_HANDLED; - disable_irq_nosync(PPE_MAILBOX_IGU1_INT); + disable_irq_nosync(g_atm_priv_data.irq); tasklet_schedule(&g_dma_tasklet); return IRQ_HANDLED; @@ -1805,17 +1805,23 @@ static int ltq_atm_probe(struct platform_device *pdev) } } + g_atm_priv_data.irq = platform_get_irq(pdev, 0); + if (g_atm_priv_data.irq < 0) { + pr_err("platform_get_irq fail"); + goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL; + } + /* register interrupt handler */ - ret = request_irq(PPE_MAILBOX_IGU1_INT, mailbox_irq_handler, 0, "atm_mailbox_isr", &g_atm_priv_data); + ret = request_irq(g_atm_priv_data.irq, mailbox_irq_handler, 0, "atm_mailbox_isr", &g_atm_priv_data); if ( ret ) { if ( ret == -EBUSY ) { pr_err("IRQ may be occupied by other driver, please reconfig to disable it.\n"); } else { - pr_err("request_irq fail irq:%d\n", PPE_MAILBOX_IGU1_INT); + pr_err("request_irq fail irq:%d\n", g_atm_priv_data.irq); } goto REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL; } - disable_irq(PPE_MAILBOX_IGU1_INT); + disable_irq(g_atm_priv_data.irq); ret = ops->start(0); @@ -1845,7 +1851,7 @@ static int ltq_atm_probe(struct platform_device *pdev) return 0; PP32_START_FAIL: - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); + free_irq(g_atm_priv_data.irq, &g_atm_priv_data); REQUEST_IRQ_PPE_MAILBOX_IGU1_INT_FAIL: ATM_DEV_REGISTER_FAIL: while ( port_num-- > 0 ) @@ -1868,7 +1874,7 @@ static int ltq_atm_remove(struct platform_device *pdev) ops->stop(0); - free_irq(PPE_MAILBOX_IGU1_INT, &g_atm_priv_data); + free_irq(g_atm_priv_data.irq, &g_atm_priv_data); for ( port_num = 0; port_num < ATM_PORT_NUMBER; port_num++ ) atm_dev_deregister(g_atm_priv_data.port[port_num].dev);