From: Daniel Golle Date: Thu, 18 Feb 2021 19:17:22 +0000 (+0000) Subject: mediatek: move out-of-tree DTS files to dedicated dts folder X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=c067b1e79badf94d7a01fbb8737a8134879afd1a;p=openwrt%2Fstaging%2Fansuel.git mediatek: move out-of-tree DTS files to dedicated dts folder Use dedicated dts folder like on ramips to store device tree source files for boards not already supported in vanilla Linux. Doing so instead of having them in files-* has several advantages: * we don't need to duplicate them for several kernel versions * changes to a device tree don't trigger a complete kernel rebuild * the files are more obvious to find Signed-off-by: Daniel Golle --- diff --git a/include/image.mk b/include/image.mk index 2530108211..adb2734597 100644 --- a/include/image.mk +++ b/include/image.mk @@ -31,7 +31,7 @@ mkfs_target_dir = $(if $(call param_get,pkg,$(1)),$(KDIR)/target-dir-$(call para KDIR=$(KERNEL_BUILD_DIR) KDIR_TMP=$(KDIR)/tmp -DTS_DIR:=$(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/dts +DTS_DIR:=$(LINUX_DIR)/arch/$(LINUX_KARCH)/boot/dts$$(if $$(DTS_VENDOR),/$$(DTS_VENDOR)) IMG_PREFIX_EXTRA:=$(if $(EXTRA_IMAGE_NAME),$(call sanitize,$(EXTRA_IMAGE_NAME))-) IMG_PREFIX_VERNUM:=$(if $(CONFIG_VERSION_FILENAMES),$(call sanitize,$(VERSION_NUMBER))-) @@ -416,7 +416,7 @@ DEFAULT_DEVICE_VARS := \ DEVICE_NAME KERNEL KERNEL_INITRAMFS KERNEL_INITRAMFS_IMAGE KERNEL_SIZE \ CMDLINE UBOOTENV_IN_UBI KERNEL_IN_UBI BLOCKSIZE PAGESIZE SUBPAGESIZE \ VID_HDR_OFFSET UBINIZE_OPTS UBINIZE_PARTS MKUBIFS_OPTS DEVICE_DTS \ - DEVICE_DTS_CONFIG DEVICE_DTS_DIR DEVICE_FDT_NUM SOC BOARD_NAME \ + DEVICE_DTS_CONFIG DEVICE_DTS_DIR DEVICE_FDT_NUM DTS_VENDOR SOC BOARD_NAME \ UIMAGE_MAGIC UIMAGE_NAME \ SUPPORTED_DEVICES IMAGE_METADATA KERNEL_ENTRY KERNEL_LOADADDR \ UBOOT_PATH IMAGE_SIZE \ diff --git a/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts new file mode 100644 index 0000000000..2235306b2b --- /dev/null +++ b/target/linux/mediatek/dts/mt7622-bananapi-bpi-r64-rootdisk.dts @@ -0,0 +1,593 @@ +/* + * Copyright (c) 2018 MediaTek Inc. + * Author: Ryder Lee + * + * SPDX-License-Identifier: (GPL-2.0-only OR MIT) + */ + +/dts-v1/; +#include +#include + +#include "mt7622.dtsi" +#include "mt6380.dtsi" + +/ { + model = "Bananapi BPI-R64"; + compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs"; + }; + + cpus { + cpu@0 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + + cpu@1 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + factory { + label = "factory"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 102 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + green { + label = "bpi-r64:pio:green"; + gpios = <&pio 89 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + + red { + label = "bpi-r64:pio:red"; + gpios = <&pio 88 GPIO_ACTIVE_HIGH>; + default-state = "off"; + }; + }; + + memory { + reg = <0 0x40000000 0 0x40000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible = "regulator-fixed"; + regulator-name = "fixed-5V"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&bch { + status = "disabled"; +}; + +&btif { + status = "okay"; +}; + +&cir { + pinctrl-names = "default"; + pinctrl-0 = <&irrx_pins>; + status = "okay"; +}; + +ð { + status = "okay"; + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + switch@1f { + compatible = "mediatek,mt7531"; + reg = <0x1f>; + reset-gpios = <&pio 54 0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + wan: port@0 { + reg = <0>; + label = "wan"; + }; + + port@1 { + reg = <1>; + label = "lan0"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; +}; + +&mmc0 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&emmc_pins_default>; + pinctrl-1 = <&emmc_pins_uhs>; + status = "okay"; + bus-width = <8>; + max-frequency = <50000000>; + cap-mmc-highspeed; + mmc-hs200-1_8v; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_1p8v>; + assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; + non-removable; +}; + +&mmc1 { + pinctrl-names = "default", "state_uhs"; + pinctrl-0 = <&sd0_pins_default>; + pinctrl-1 = <&sd0_pins_uhs>; + status = "okay"; + bus-width = <4>; + max-frequency = <50000000>; + cap-sd-highspeed; + r_smpl = <1>; + cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; + vmmc-supply = <®_3p3v>; + vqmmc-supply = <®_3p3v>; + assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; + assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; +}; + +&nandc { + pinctrl-names = "default"; + pinctrl-0 = <¶llel_nand_pins>; + status = "disabled"; +}; + +&nor_flash { + pinctrl-names = "default"; + pinctrl-0 = <&spi_nor_pins>; + status = "disabled"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_pins>; + status = "okay"; +}; + +&pcie1 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie1_pins>; + status = "okay"; +}; + +&pio { + /* Attention: GPIO 90 is used to switch between PCIe@1,0 and + * SATA functions. i.e. output-high: PCIe, output-low: SATA + */ + asm_sel { + gpio-hog; + gpios = <90 GPIO_ACTIVE_HIGH>; + output-high; + }; + + /* eMMC is shared pin with parallel NAND */ + emmc_pins_default: emmc-pins-default { + mux { + function = "emmc", "emmc_rst"; + groups = "emmc"; + }; + + /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", + * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, + * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively + */ + conf-cmd-dat { + pins = "NDL0", "NDL1", "NDL2", + "NDL3", "NDL4", "NDL5", + "NDL6", "NDL7", "NRB"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "NCLE"; + bias-pull-down; + }; + }; + + emmc_pins_uhs: emmc-pins-uhs { + mux { + function = "emmc"; + groups = "emmc"; + }; + + conf-cmd-dat { + pins = "NDL0", "NDL1", "NDL2", + "NDL3", "NDL4", "NDL5", + "NDL6", "NDL7", "NRB"; + input-enable; + drive-strength = <4>; + bias-pull-up; + }; + + conf-clk { + pins = "NCLE"; + drive-strength = <4>; + bias-pull-down; + }; + }; + + eth_pins: eth-pins { + mux { + function = "eth"; + groups = "mdc_mdio", "rgmii_via_gmac2"; + }; + }; + + i2c1_pins: i2c1-pins { + mux { + function = "i2c"; + groups = "i2c1_0"; + }; + }; + + i2c2_pins: i2c2-pins { + mux { + function = "i2c"; + groups = "i2c2_0"; + }; + }; + + i2s1_pins: i2s1-pins { + mux { + function = "i2s"; + groups = "i2s_out_mclk_bclk_ws", + "i2s1_in_data", + "i2s1_out_data"; + }; + + conf { + pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", + "I2S_WS", "I2S_MCLK"; + drive-strength = <12>; + bias-pull-down; + }; + }; + + irrx_pins: irrx-pins { + mux { + function = "ir"; + groups = "ir_1_rx"; + }; + }; + + irtx_pins: irtx-pins { + mux { + function = "ir"; + groups = "ir_1_tx"; + }; + }; + + /* Parallel nand is shared pin with eMMC */ + parallel_nand_pins: parallel-nand-pins { + mux { + function = "flash"; + groups = "par_nand"; + }; + }; + + pcie0_pins: pcie0-pins { + mux { + function = "pcie"; + groups = "pcie0_pad_perst", + "pcie0_1_waken", + "pcie0_1_clkreq"; + }; + }; + + pcie1_pins: pcie1-pins { + mux { + function = "pcie"; + groups = "pcie1_pad_perst", + "pcie1_0_waken", + "pcie1_0_clkreq"; + }; + }; + + pmic_bus_pins: pmic-bus-pins { + mux { + function = "pmic"; + groups = "pmic_bus"; + }; + }; + + pwm7_pins: pwm1-2-pins { + mux { + function = "pwm"; + groups = "pwm_ch7_2"; + }; + }; + + wled_pins: wled-pins { + mux { + function = "led"; + groups = "wled"; + }; + }; + + sd0_pins_default: sd0-pins-default { + mux { + function = "sd"; + groups = "sd_0"; + }; + + /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", + * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, + * DAT2, DAT3, CMD, CLK for SD respectively. + */ + conf-cmd-data { + pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", + "I2S2_IN","I2S4_OUT"; + input-enable; + drive-strength = <8>; + bias-pull-up; + }; + conf-clk { + pins = "I2S3_OUT"; + drive-strength = <12>; + bias-pull-down; + }; + conf-cd { + pins = "TXD3"; + bias-pull-up; + }; + }; + + sd0_pins_uhs: sd0-pins-uhs { + mux { + function = "sd"; + groups = "sd_0"; + }; + + conf-cmd-data { + pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", + "I2S2_IN","I2S4_OUT"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "I2S3_OUT"; + bias-pull-down; + }; + }; + + /* Serial NAND is shared pin with SPI-NOR */ + serial_nand_pins: serial-nand-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + spic0_pins: spic0-pins { + mux { + function = "spi"; + groups = "spic0_0"; + }; + }; + + spic1_pins: spic1-pins { + mux { + function = "spi"; + groups = "spic1_0"; + }; + }; + + /* SPI-NOR is shared pin with serial NAND */ + spi_nor_pins: spi-nor-pins { + mux { + function = "flash"; + groups = "spi_nor"; + }; + }; + + /* serial NAND is shared pin with SPI-NOR */ + serial_nand_pins: serial-nand-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0_0_tx_rx" ; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2_1_tx_rx" ; + }; + }; + + watchdog_pins: watchdog-pins { + mux { + function = "watchdog"; + groups = "watchdog"; + }; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pins>; + status = "okay"; +}; + +&pwrap { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_bus_pins>; + + status = "okay"; +}; + +&sata { + status = "disable"; +}; + +&sata_phy { + status = "disable"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spic0_pins>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic1_pins>; + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_5v>; + status = "okay"; +}; + +&u3phy { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; + status = "okay"; +}; diff --git a/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts new file mode 100644 index 0000000000..48865ada40 --- /dev/null +++ b/target/linux/mediatek/dts/mt7622-elecom-wrc-2533gent.dts @@ -0,0 +1,608 @@ +/* + * Copyright (c) 2017 MediaTek Inc. + * Author: Ming Huang + * Sean Wang + * + * SPDX-License-Identifier: (GPL-2.0-only OR MIT) + */ + +/dts-v1/; +#include +#include + +#include "mt7622.dtsi" +#include "mt6380.dtsi" + +/ { + model = "Elecom WRC-2533"; + compatible = "elecom,wrc-2533gent", "mediatek,mt7622"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8"; + }; + + cpus { + cpu@0 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + + cpu@1 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + poll-interval = <100>; + + wps { + label = "wps"; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + }; + + factory { + label = "factory"; + linux,code = ; + gpios = <&pio 102 GPIO_ACTIVE_LOW>; + }; + + switch0 { + label = "switch0"; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + switch1 { + label = "switch1"; + gpios = <&pio 16 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + switch2 { + label = "switch2"; + gpios = <&pio 17 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + + switch3 { + label = "switch3"; + gpios = <&pio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power_g { + label = "wrc-2533:green:power"; + gpios = <&pio 2 GPIO_ACTIVE_HIGH>; + }; + + power_b { + label = "wrc-2533:blue:power"; + gpios = <&pio 19 GPIO_ACTIVE_HIGH>; + }; + + power_r { + label = "wrc-2533:red:power"; + gpios = <&pio 73 GPIO_ACTIVE_HIGH>; + }; + + usb { + label = "wrc-2533:blue:usb"; + gpios = <&pio 74 GPIO_ACTIVE_HIGH>; + }; + + wps { + label = "wrc-2533:red:wps"; + gpios = <&pio 76 GPIO_ACTIVE_LOW>; + }; + + wifi2 { + label = "wrc-2533:blue:wifi2g"; + gpios = <&pio 85 GPIO_ACTIVE_LOW>; + }; + + wifi5 { + label = "wrc-2533:blue:wifi5g"; + gpios = <&pio 91 GPIO_ACTIVE_LOW>; + }; + }; + + reg_usb_vbus: regulator { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 22 GPIO_ACTIVE_LOW>; + enable-active-high; + }; + + memory { + reg = <0 0x40000000 0 0x3F000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + rtkgsw: rtkgsw@0 { + compatible = "mediatek,rtk-gsw"; + mediatek,ethsys = <ðsys>; + mediatek,mdio = <&mdio>; + mediatek,reset-pin = <&pio 54 0>; + status = "okay"; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_pins>; + status = "okay"; +}; + +&slot0 { + mt7615@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x05000>; + }; +}; + +&pio { + /* eMMC is shared pin with parallel NAND */ + emmc_pins_default: emmc-pins-default { + mux { + function = "emmc", "emmc_rst"; + groups = "emmc"; + }; + + /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", + * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, + * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively + */ + conf-cmd-dat { + pins = "NDL0", "NDL1", "NDL2", + "NDL3", "NDL4", "NDL5", + "NDL6", "NDL7", "NRB"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "NCLE"; + bias-pull-down; + }; + }; + + emmc_pins_uhs: emmc-pins-uhs { + mux { + function = "emmc"; + groups = "emmc"; + }; + + conf-cmd-dat { + pins = "NDL0", "NDL1", "NDL2", + "NDL3", "NDL4", "NDL5", + "NDL6", "NDL7", "NRB"; + input-enable; + drive-strength = <4>; + bias-pull-up; + }; + + conf-clk { + pins = "NCLE"; + drive-strength = <4>; + bias-pull-down; + }; + }; + + eth_pins: eth-pins { + mux { + function = "eth"; + groups = "mdc_mdio", "rgmii_via_gmac2"; + }; + }; + + i2c1_pins: i2c1-pins { + mux { + function = "i2c"; + groups = "i2c1_0"; + }; + }; + + i2c2_pins: i2c2-pins { + mux { + function = "i2c"; + groups = "i2c2_0"; + }; + }; + + i2s1_pins: i2s1-pins { + mux { + function = "i2s"; + groups = "i2s_out_mclk_bclk_ws", + "i2s1_in_data", + "i2s1_out_data"; + }; + + conf { + pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", + "I2S_WS", "I2S_MCLK"; + drive-strength = <12>; + bias-pull-down; + }; + }; + + irrx_pins: irrx-pins { + mux { + function = "ir"; + groups = "ir_1_rx"; + }; + }; + + irtx_pins: irtx-pins { + mux { + function = "ir"; + groups = "ir_1_tx"; + }; + }; + + /* Parallel nand is shared pin with eMMC */ + parallel_nand_pins: parallel-nand-pins { + mux { + function = "flash"; + groups = "par_nand"; + }; + }; + + pcie0_pins: pcie0-pins { + mux { + function = "pcie"; + groups = "pcie0_pad_perst", + "pcie0_1_waken", + "pcie0_1_clkreq"; + }; + }; + + pcie1_pins: pcie1-pins { + mux { + function = "pcie"; + groups = "pcie1_pad_perst", + "pcie1_0_waken", + "pcie1_0_clkreq"; + }; + }; + + pmic_bus_pins: pmic-bus-pins { + mux { + function = "pmic"; + groups = "pmic_bus"; + }; + }; + + pwm7_pins: pwm1-2-pins { + mux { + function = "pwm"; + groups = "pwm_ch7_2"; + }; + }; + + wled_pins: wled-pins { + mux { + function = "led"; + groups = "wled"; + }; + }; + + sd0_pins_default: sd0-pins-default { + mux { + function = "sd"; + groups = "sd_0"; + }; + + /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", + * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, + * DAT2, DAT3, CMD, CLK for SD respectively. + */ + conf-cmd-data { + pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", + "I2S2_IN","I2S4_OUT"; + input-enable; + drive-strength = <8>; + bias-pull-up; + }; + conf-clk { + pins = "I2S3_OUT"; + drive-strength = <12>; + bias-pull-down; + }; + conf-cd { + pins = "TXD3"; + bias-pull-up; + }; + }; + + sd0_pins_uhs: sd0-pins-uhs { + mux { + function = "sd"; + groups = "sd_0"; + }; + + conf-cmd-data { + pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", + "I2S2_IN","I2S4_OUT"; + input-enable; + bias-pull-up; + }; + + conf-clk { + pins = "I2S3_OUT"; + bias-pull-down; + }; + }; + + /* Serial NAND is shared pin with SPI-NOR */ + serial_nand_pins: serial-nand-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + spic0_pins: spic0-pins { + mux { + function = "spi"; + groups = "spic0_0"; + }; + }; + + spic1_pins: spic1-pins { + mux { + function = "spi"; + groups = "spic1_0"; + }; + }; + + /* SPI-NOR is shared pin with serial NAND */ + spi_nor_pins: spi-nor-pins { + mux { + function = "flash"; + groups = "spi_nor"; + }; + }; + + /* serial NAND is shared pin with SPI-NOR */ + serial_nand_pins: serial-nand-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0_0_tx_rx" ; + }; + }; + + uart2_pins: uart2-pins { + mux { + function = "uart"; + groups = "uart2_1_tx_rx" ; + }; + }; + + watchdog_pins: watchdog-pins { + mux { + function = "watchdog"; + groups = "watchdog"; + }; + }; +}; + +&bch { + status = "okay"; +}; + +&btif { + status = "disabled"; +}; + +&cir { + pinctrl-names = "default"; + pinctrl-0 = <&irrx_pins>; + status = "okay"; +}; + +ð { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <ð_pins>; + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "sgmii"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "rgmii"; + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + status = "okay"; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pins>; + status = "okay"; +}; + +&pwrap { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_bus_pins>; + + status = "okay"; +}; + +&snfi { + pinctrl-names = "default"; + pinctrl-0 = <&serial_nand_pins>; + status = "okay"; + + spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <104000000>; + reg = <0>; + + mediatek,bmt-v2; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Preloader"; + reg = <0x00000 0x0080000>; + read-only; + }; + + partition@80000 { + label = "ATF"; + reg = <0x80000 0x0040000>; + read-only; + }; + + partition@c0000 { + label = "uboot"; + reg = <0xc0000 0x0080000>; + read-only; + }; + + partition@140000 { + label = "uboot-env"; + reg = <0x140000 0x0080000>; + read-only; + }; + + factory: partition@1c0000 { + label = "factory"; + reg = <0x1c0000 0x0040000>; + read-only; + }; + + partition@200000 { + label = "firmware"; + reg = <0x200000 0x2000000>; + }; + + partition@2200000 { + label = "reserved"; + reg = <0x2200000 0x4000000>; + }; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spic0_pins>; + status = "okay"; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spic1_pins>; + status = "okay"; +}; + +&ssusb { + vusb33-supply = <®_3p3v>; + vbus-supply = <®_usb_vbus>; + status = "okay"; +}; + +&u3phy { + status = "okay"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; + status = "okay"; +}; + +&wmac { + mediatek,mtd-eeprom = <&factory 0x0000>; + status = "okay"; +}; diff --git a/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts b/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts new file mode 100644 index 0000000000..a54e710924 --- /dev/null +++ b/target/linux/mediatek/dts/mt7622-rfb1-ubi.dts @@ -0,0 +1,68 @@ +/dts-v1/; + +#include "mt7622-rfb1.dts" +/ { + model = "MT7622_MT7531 RFB (UBI)"; + compatible = "mediatek,mt7622,ubi"; +}; + +&snfi { + pinctrl-names = "default"; + pinctrl-0 = <&serial_nand_pins>; + status = "okay"; + + spi_nand@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + spi-max-frequency = <104000000>; + reg = <0>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Preloader"; + reg = <0x00000 0x0080000>; + read-only; + }; + + partition@80000 { + label = "ATF"; + reg = <0x80000 0x0040000>; + }; + + partition@c0000 { + label = "Bootloader"; + reg = <0xc0000 0x0080000>; + }; + + partition@140000 { + label = "Config"; + reg = <0x140000 0x0080000>; + }; + + factory: partition@1c0000 { + label = "Factory"; + reg = <0x1c0000 0x0040000>; + }; + + partition@200000 { + label = "kernel"; + reg = <0x200000 0x400000>; + }; + + partition@600000 { + label = "ubi"; + reg = <0x600000 0x1C00000>; + }; + + partition@2200000 { + label = "User_data"; + reg = <0x2200000 0x4000000>; + }; + }; + }; +}; diff --git a/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dts b/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dts new file mode 100644 index 0000000000..1f410b1d47 --- /dev/null +++ b/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dts @@ -0,0 +1,327 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; +#include +#include +#include + +#include "mt7622.dtsi" +#include "mt6380.dtsi" + +/ { + model = "Ubiquiti UniFi 6 LR"; + compatible = "ubnt,unifi-6-lr", "mediatek,mt7622"; + + aliases { + led-boot = &led_blue; + led-failsafe = &led_blue; + led-running = &led_blue; + led-upgrade = &led_blue; + label-mac-device = &gmac0; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8"; + }; + + cpus { + cpu@0 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + + cpu@1 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 62 GPIO_ACTIVE_LOW>; + }; + }; + + memory { + reg = <0 0x40000000 0 0x3f000000>; + }; + + reg_1p8v: regulator-1p8v { + compatible = "regulator-fixed"; + regulator-name = "fixed-1.8V"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible = "regulator-fixed"; + regulator-name = "fixed-3.3V"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_pins>; + status = "okay"; +}; + +&slot0 { + wifi@0,0 { + reg = <0x0 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x20000>; + mtd-mac-address = <&eeprom 0x6>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&pio { + eth_pins: eth-pins { + mux { + function = "eth"; + groups = "mdc_mdio", "rgmii_via_gmac2"; + }; + }; + + pcie0_pins: pcie0-pins { + mux { + function = "pcie"; + groups = "pcie0_pad_perst", + "pcie0_1_waken", + "pcie0_1_clkreq"; + }; + }; + + pcie1_pins: pcie1-pins { + mux { + function = "pcie"; + groups = "pcie1_pad_perst", + "pcie1_0_waken", + "pcie1_0_clkreq"; + }; + }; + + pmic_bus_pins: pmic-bus-pins { + mux { + function = "pmic"; + groups = "pmic_bus"; + }; + }; + + spi_nor_pins: spi-nor-pins { + mux { + function = "flash"; + groups = "spi_nor"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0_0_tx_rx" ; + }; + }; + + uart3_pins: uart3-pins { + mux { + function = "uart"; + groups = "uart3_1_tx_rx" ; + }; + }; + + i2c0_pins: i2c0-pins { + mux { + function = "i2c"; + groups = "i2c0"; + }; + }; + + watchdog_pins: watchdog-pins { + mux { + function = "watchdog"; + groups = "watchdog"; + }; + }; +}; + +&bch { + status = "okay"; +}; + +&btif { + status = "disabled"; +}; + +ð { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <ð_pins>; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + + phy-mode = "2500base-x"; + mtd-mac-address = <&eeprom 0x0>; + + fixed-link { + speed = <2500>; + full-duplex; + }; + }; + + mdio: mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-phy@8 { + /* Marvell AQRate AQR112W - no driver */ + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0x8>; + }; + }; +}; + +&pwrap { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_bus_pins>; + + status = "okay"; +}; + +&nor_flash { + pinctrl-names = "default"; + pinctrl-0 = <&spi_nor_pins>; + + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "preloader"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "atf"; + reg = <0x40000 0x20000>; + read-only; + }; + + partition@60000 { + label = "u-boot"; + reg = <0x60000 0x60000>; + read-only; + }; + + partition@c0000 { + label = "u-boot-env"; + reg = <0xc0000 0x10000>; + }; + + factory: partition@d0000 { + label = "factory"; + reg = <0xd0000 0x40000>; + read-only; + }; + + eeprom: partition@110000 { + label = "eeprom"; + reg = <0x110000 0x10000>; + read-only; + }; + + partition@120000 { + label = "bs"; + reg = <0x120000 0x10000>; + }; + + partition@130000 { + label = "cfg"; + reg = <0x130000 0x100000>; + read-only; + }; + + partition@230000 { + compatible = "denx,fit"; + label = "firmware"; + reg = <0x230000 0x1ee0000>; + }; + + partition@2110000 { + label = "kernel1"; + reg = <0x2110000 0x1ee0000>; + }; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "okay"; + + /* MT7915 Bluetooth */ +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + + led-controller@30 { + compatible = "ubnt,ledbar"; + reg = <0x30>; + + enable-gpio = <&pio 59 0>; + + red { + label = "red"; + }; + + green { + label = "green"; + }; + + led_blue: blue { + label = "blue"; + }; + }; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; + status = "okay"; +}; + +&wmac { + mediatek,mtd-eeprom = <&factory 0x0>; + mtd-mac-address = <&eeprom 0x0>; + status = "okay"; +}; diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts deleted file mode 100644 index 36d908652d..0000000000 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts +++ /dev/null @@ -1,591 +0,0 @@ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Ryder Lee - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "Bananapi BPI-R64"; - compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 0 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 102 GPIO_ACTIVE_HIGH>; - }; - }; - - leds { - compatible = "gpio-leds"; - - green { - label = "bpi-r64:pio:green"; - gpios = <&pio 89 GPIO_ACTIVE_HIGH>; - }; - - red { - label = "bpi-r64:pio:red"; - gpios = <&pio 88 GPIO_ACTIVE_HIGH>; - }; - }; - - memory { - reg = <0 0x40000000 0 0x40000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&bch { - status = "disabled"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - switch@1f { - compatible = "mediatek,mt7531"; - reg = <0x1f>; - reset-gpios = <&pio 54 0>; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - wan: port@0 { - reg = <0>; - label = "wan"; - }; - - port@1 { - reg = <1>; - label = "lan0"; - }; - - port@2 { - reg = <2>; - label = "lan1"; - }; - - port@3 { - reg = <3>; - label = "lan2"; - }; - - port@4 { - reg = <4>; - label = "lan3"; - }; - - port@6 { - reg = <6>; - label = "cpu"; - ethernet = <&gmac0>; - phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - }; - }; - - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&emmc_pins_default>; - pinctrl-1 = <&emmc_pins_uhs>; - status = "okay"; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sd0_pins_default>; - pinctrl-1 = <&sd0_pins_uhs>; - status = "okay"; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - r_smpl = <1>; - cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_3p3v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -}; - -&nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; - status = "disabled"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; -}; - -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pins>; - status = "okay"; -}; - -&pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie1_pins>; - status = "okay"; -}; - -&pio { - /* Attention: GPIO 90 is used to switch between PCIe@1,0 and - * SATA functions. i.e. output-high: PCIe, output-low: SATA - */ - asm_sel { - gpio-hog; - gpios = <90 GPIO_ACTIVE_HIGH>; - output-high; - }; - - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&sata { - status = "disable"; -}; - -&sata_phy { - status = "disable"; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts deleted file mode 100644 index 2ac1c6a671..0000000000 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-elecom-wrc-2533gent.dts +++ /dev/null @@ -1,608 +0,0 @@ -/* - * Copyright (c) 2017 MediaTek Inc. - * Author: Ming Huang - * Sean Wang - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "Elecom WRC-2533"; - compatible = "elecom,wrc-2533gent", "mediatek,mt7622"; - - aliases { - led-boot = &led_power; - led-failsafe = &led_power; - led-running = &led_power; - led-upgrade = &led_power; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - poll-interval = <100>; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 0 GPIO_ACTIVE_HIGH>; - }; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 102 GPIO_ACTIVE_LOW>; - }; - - switch0 { - label = "switch0"; - gpios = <&pio 1 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch1 { - label = "switch1"; - gpios = <&pio 16 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch2 { - label = "switch2"; - gpios = <&pio 17 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - - switch3 { - label = "switch3"; - gpios = <&pio 18 GPIO_ACTIVE_LOW>; - linux,code = ; - linux,input-type = ; - }; - }; - - leds { - compatible = "gpio-leds"; - - led_power: power_g { - label = "wrc-2533:green:power"; - gpios = <&pio 2 GPIO_ACTIVE_HIGH>; - }; - - power_b { - label = "wrc-2533:blue:power"; - gpios = <&pio 19 GPIO_ACTIVE_HIGH>; - }; - - power_r { - label = "wrc-2533:red:power"; - gpios = <&pio 73 GPIO_ACTIVE_HIGH>; - }; - - usb { - label = "wrc-2533:blue:usb"; - gpios = <&pio 74 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "wrc-2533:red:wps"; - gpios = <&pio 76 GPIO_ACTIVE_LOW>; - }; - - wifi2 { - label = "wrc-2533:blue:wifi2g"; - gpios = <&pio 85 GPIO_ACTIVE_LOW>; - }; - - wifi5 { - label = "wrc-2533:blue:wifi5g"; - gpios = <&pio 91 GPIO_ACTIVE_LOW>; - }; - }; - - reg_usb_vbus: regulator { - compatible = "regulator-fixed"; - regulator-name = "usb_vbus"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - gpio = <&pio 22 GPIO_ACTIVE_LOW>; - enable-active-high; - }; - - memory { - reg = <0 0x40000000 0 0x3F000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - rtkgsw: rtkgsw@0 { - compatible = "mediatek,rtk-gsw"; - mediatek,ethsys = <ðsys>; - mediatek,mdio = <&mdio>; - mediatek,reset-pin = <&pio 54 0>; - status = "okay"; - }; -}; - -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pins>; - status = "okay"; -}; - -&slot0 { - mt7615@0,0 { - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x05000>; - }; -}; - -&pio { - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "disabled"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <ð_pins>; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "sgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&snfi { - pinctrl-names = "default"; - pinctrl-0 = <&serial_nand_pins>; - status = "okay"; - - spi_nand@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <104000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "Preloader"; - reg = <0x00000 0x0080000>; - read-only; - }; - - partition@80000 { - label = "ATF"; - reg = <0x80000 0x0040000>; - read-only; - }; - - partition@c0000 { - label = "uboot"; - reg = <0xc0000 0x0080000>; - read-only; - }; - - partition@140000 { - label = "uboot-env"; - reg = <0x140000 0x0080000>; - read-only; - }; - - factory: partition@1c0000 { - label = "factory"; - reg = <0x1c0000 0x0040000>; - read-only; - }; - - partition@200000 { - label = "firmware"; - reg = <0x200000 0x2000000>; - }; - - partition@2200000 { - label = "reserved"; - reg = <0x2200000 0x4000000>; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_usb_vbus>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - mediatek,mtd-eeprom = <&factory 0x0000>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts deleted file mode 100644 index 8b58c1e12f..0000000000 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-rfb1-ubi.dts +++ /dev/null @@ -1,644 +0,0 @@ -/* - * Copyright (c) 2018 MediaTek Inc. - * Author: Ryder Lee - * - * SPDX-License-Identifier: (GPL-2.0-only OR MIT) - */ - -/dts-v1/; -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "MT7622_MT7531 RFB"; - compatible = "mediatek,mt7622,ubi"; - - aliases { - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - factory { - label = "factory"; - linux,code = ; - gpios = <&pio 0 GPIO_ACTIVE_HIGH>; - }; - - wps { - label = "wps"; - linux,code = ; - gpios = <&pio 102 GPIO_ACTIVE_HIGH>; - }; - }; - - gsw: gsw@0 { - compatible = "mediatek,mt753x"; - mediatek,ethsys = <ðsys>; - #address-cells = <1>; - #size-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - green { - label = "bpi-r64:pio:green"; - gpios = <&pio 89 GPIO_ACTIVE_HIGH>; - }; - - red { - label = "bpi-r64:pio:red"; - gpios = <&pio 88 GPIO_ACTIVE_HIGH>; - }; - }; - - memory { - reg = <0 0x40000000 0 0x40000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_5v: regulator-5v { - compatible = "regulator-fixed"; - regulator-name = "fixed-5V"; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "okay"; -}; - -&cir { - pinctrl-names = "default"; - pinctrl-0 = <&irrx_pins>; - status = "okay"; -}; - -ð { - status = "okay"; - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - pause; - }; - }; - - gmac1: mac@1 { - compatible = "mediatek,eth-mac"; - reg = <1>; - phy-mode = "rgmii"; - - fixed-link { - speed = <1000>; - full-duplex; - pause; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - }; -}; - -&gsw { - mediatek,mdio = <&mdio>; - mediatek,portmap = "llllw"; - mediatek,mdio_master_pinmux = <0>; - reset-gpios = <&pio 54 0>; - interrupt-parent = <&pio>; - interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; - status = "okay"; - - port5: port@5 { - compatible = "mediatek,mt753x-port"; - reg = <5>; - phy-mode = "rgmii"; - fixed-link { - speed = <1000>; - full-duplex; - }; - }; - - port6: port@6 { - compatible = "mediatek,mt753x-port"; - reg = <6>; - phy-mode = "sgmii"; - fixed-link { - speed = <2500>; - full-duplex; - }; - }; -}; - -&i2c1 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c1_pins>; - status = "okay"; -}; - -&i2c2 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c2_pins>; - status = "okay"; -}; - -&mmc0 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&emmc_pins_default>; - pinctrl-1 = <&emmc_pins_uhs>; - status = "okay"; - bus-width = <8>; - max-frequency = <50000000>; - cap-mmc-highspeed; - mmc-hs200-1_8v; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_1p8v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; - non-removable; -}; - -&mmc1 { - pinctrl-names = "default", "state_uhs"; - pinctrl-0 = <&sd0_pins_default>; - pinctrl-1 = <&sd0_pins_uhs>; - status = "okay"; - bus-width = <4>; - max-frequency = <50000000>; - cap-sd-highspeed; - r_smpl = <1>; - cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>; - vmmc-supply = <®_3p3v>; - vqmmc-supply = <®_3p3v>; - assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>; - assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>; -}; - -&nandc { - pinctrl-names = "default"; - pinctrl-0 = <¶llel_nand_pins>; - status = "disabled"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - status = "disabled"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - }; -}; - -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pins>; - status = "okay"; -}; - -&pcie1 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie1_pins>; - status = "okay"; -}; - -&pio { - /* Attention: GPIO 90 is used to switch between PCIe@1,0 and - * SATA functions. i.e. output-high: PCIe, output-low: SATA - */ - asm_sel { - gpio-hog; - gpios = <90 GPIO_ACTIVE_HIGH>; - output-high; - }; - - /* eMMC is shared pin with parallel NAND */ - emmc_pins_default: emmc-pins-default { - mux { - function = "emmc", "emmc_rst"; - groups = "emmc"; - }; - - /* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7", - * "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4, - * DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively - */ - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - bias-pull-down; - }; - }; - - emmc_pins_uhs: emmc-pins-uhs { - mux { - function = "emmc"; - groups = "emmc"; - }; - - conf-cmd-dat { - pins = "NDL0", "NDL1", "NDL2", - "NDL3", "NDL4", "NDL5", - "NDL6", "NDL7", "NRB"; - input-enable; - drive-strength = <4>; - bias-pull-up; - }; - - conf-clk { - pins = "NCLE"; - drive-strength = <4>; - bias-pull-down; - }; - }; - - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - i2c1_pins: i2c1-pins { - mux { - function = "i2c"; - groups = "i2c1_0"; - }; - }; - - i2c2_pins: i2c2-pins { - mux { - function = "i2c"; - groups = "i2c2_0"; - }; - }; - - i2s1_pins: i2s1-pins { - mux { - function = "i2s"; - groups = "i2s_out_mclk_bclk_ws", - "i2s1_in_data", - "i2s1_out_data"; - }; - - conf { - pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK", - "I2S_WS", "I2S_MCLK"; - drive-strength = <12>; - bias-pull-down; - }; - }; - - irrx_pins: irrx-pins { - mux { - function = "ir"; - groups = "ir_1_rx"; - }; - }; - - irtx_pins: irtx-pins { - mux { - function = "ir"; - groups = "ir_1_tx"; - }; - }; - - /* Parallel nand is shared pin with eMMC */ - parallel_nand_pins: parallel-nand-pins { - mux { - function = "flash"; - groups = "par_nand"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - pwm7_pins: pwm1-2-pins { - mux { - function = "pwm"; - groups = "pwm_ch7_2"; - }; - }; - - wled_pins: wled-pins { - mux { - function = "led"; - groups = "wled"; - }; - }; - - sd0_pins_default: sd0-pins-default { - mux { - function = "sd"; - groups = "sd_0"; - }; - - /* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN", - * "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1, - * DAT2, DAT3, CMD, CLK for SD respectively. - */ - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - drive-strength = <8>; - bias-pull-up; - }; - conf-clk { - pins = "I2S3_OUT"; - drive-strength = <12>; - bias-pull-down; - }; - conf-cd { - pins = "TXD3"; - bias-pull-up; - }; - }; - - sd0_pins_uhs: sd0-pins-uhs { - mux { - function = "sd"; - groups = "sd_0"; - }; - - conf-cmd-data { - pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN", - "I2S2_IN","I2S4_OUT"; - input-enable; - bias-pull-up; - }; - - conf-clk { - pins = "I2S3_OUT"; - bias-pull-down; - }; - }; - - /* Serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - spic0_pins: spic0-pins { - mux { - function = "spi"; - groups = "spic0_0"; - }; - }; - - spic1_pins: spic1-pins { - mux { - function = "spi"; - groups = "spic1_0"; - }; - }; - - /* SPI-NOR is shared pin with serial NAND */ - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - /* serial NAND is shared pin with SPI-NOR */ - serial_nand_pins: serial-nand-pins { - mux { - function = "flash"; - groups = "snfi"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart2_pins: uart2-pins { - mux { - function = "uart"; - groups = "uart2_1_tx_rx" ; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&pwm { - pinctrl-names = "default"; - pinctrl-0 = <&pwm7_pins>; - status = "okay"; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&sata { - status = "disable"; -}; - -&sata_phy { - status = "disable"; -}; - -&snfi { - pinctrl-names = "default"; - pinctrl-0 = <&serial_nand_pins>; - status = "okay"; - - spi_nand@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "spi-nand"; - spi-max-frequency = <104000000>; - reg = <0>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "Preloader"; - reg = <0x00000 0x0080000>; - read-only; - }; - - partition@80000 { - label = "ATF"; - reg = <0x80000 0x0040000>; - }; - - partition@c0000 { - label = "Bootloader"; - reg = <0xc0000 0x0080000>; - }; - - partition@140000 { - label = "Config"; - reg = <0x140000 0x0080000>; - }; - - factory: partition@1c0000 { - label = "Factory"; - reg = <0x1c0000 0x0040000>; - }; - - partition@200000 { - label = "kernel"; - reg = <0x200000 0x400000>; - }; - - partition@600000 { - label = "ubi"; - reg = <0x600000 0x1C00000>; - }; - - partition@2200000 { - label = "User_data"; - reg = <0x2200000 0x4000000>; - }; - }; - }; -}; - -&spi0 { - pinctrl-names = "default"; - pinctrl-0 = <&spic0_pins>; - status = "okay"; -}; - -&spi1 { - pinctrl-names = "default"; - pinctrl-0 = <&spic1_pins>; - status = "okay"; -}; - -&ssusb { - vusb33-supply = <®_3p3v>; - vbus-supply = <®_5v>; - status = "okay"; -}; - -&u3phy { - status = "okay"; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart2 { - pinctrl-names = "default"; - pinctrl-0 = <&uart2_pins>; - status = "okay"; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - mediatek,mtd-eeprom = <&factory 0x0000>; - status = "okay"; -}; diff --git a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-ubnt-unifi-6-lr.dts b/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-ubnt-unifi-6-lr.dts deleted file mode 100644 index 1f410b1d47..0000000000 --- a/target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-ubnt-unifi-6-lr.dts +++ /dev/null @@ -1,327 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -/dts-v1/; -#include -#include -#include - -#include "mt7622.dtsi" -#include "mt6380.dtsi" - -/ { - model = "Ubiquiti UniFi 6 LR"; - compatible = "ubnt,unifi-6-lr", "mediatek,mt7622"; - - aliases { - led-boot = &led_blue; - led-failsafe = &led_blue; - led-running = &led_blue; - led-upgrade = &led_blue; - label-mac-device = &gmac0; - serial0 = &uart0; - }; - - chosen { - stdout-path = "serial0:115200n8"; - bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512 console=ttyS0,115200n8"; - }; - - cpus { - cpu@0 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - - cpu@1 { - proc-supply = <&mt6380_vcpu_reg>; - sram-supply = <&mt6380_vm_reg>; - }; - }; - - gpio-keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - linux,code = ; - gpios = <&pio 62 GPIO_ACTIVE_LOW>; - }; - }; - - memory { - reg = <0 0x40000000 0 0x3f000000>; - }; - - reg_1p8v: regulator-1p8v { - compatible = "regulator-fixed"; - regulator-name = "fixed-1.8V"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible = "regulator-fixed"; - regulator-name = "fixed-3.3V"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; -}; - -&pcie0 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie0_pins>; - status = "okay"; -}; - -&slot0 { - wifi@0,0 { - reg = <0x0 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x20000>; - mtd-mac-address = <&eeprom 0x6>; - ieee80211-freq-limit = <5000000 6000000>; - }; -}; - -&pio { - eth_pins: eth-pins { - mux { - function = "eth"; - groups = "mdc_mdio", "rgmii_via_gmac2"; - }; - }; - - pcie0_pins: pcie0-pins { - mux { - function = "pcie"; - groups = "pcie0_pad_perst", - "pcie0_1_waken", - "pcie0_1_clkreq"; - }; - }; - - pcie1_pins: pcie1-pins { - mux { - function = "pcie"; - groups = "pcie1_pad_perst", - "pcie1_0_waken", - "pcie1_0_clkreq"; - }; - }; - - pmic_bus_pins: pmic-bus-pins { - mux { - function = "pmic"; - groups = "pmic_bus"; - }; - }; - - spi_nor_pins: spi-nor-pins { - mux { - function = "flash"; - groups = "spi_nor"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function = "uart"; - groups = "uart0_0_tx_rx" ; - }; - }; - - uart3_pins: uart3-pins { - mux { - function = "uart"; - groups = "uart3_1_tx_rx" ; - }; - }; - - i2c0_pins: i2c0-pins { - mux { - function = "i2c"; - groups = "i2c0"; - }; - }; - - watchdog_pins: watchdog-pins { - mux { - function = "watchdog"; - groups = "watchdog"; - }; - }; -}; - -&bch { - status = "okay"; -}; - -&btif { - status = "disabled"; -}; - -ð { - status = "okay"; - pinctrl-names = "default"; - pinctrl-0 = <ð_pins>; - - gmac0: mac@0 { - compatible = "mediatek,eth-mac"; - reg = <0>; - - phy-mode = "2500base-x"; - mtd-mac-address = <&eeprom 0x0>; - - fixed-link { - speed = <2500>; - full-duplex; - }; - }; - - mdio: mdio-bus { - #address-cells = <1>; - #size-cells = <0>; - - ethernet-phy@8 { - /* Marvell AQRate AQR112W - no driver */ - compatible = "ethernet-phy-ieee802.3-c45"; - reg = <0x8>; - }; - }; -}; - -&pwrap { - pinctrl-names = "default"; - pinctrl-0 = <&pmic_bus_pins>; - - status = "okay"; -}; - -&nor_flash { - pinctrl-names = "default"; - pinctrl-0 = <&spi_nor_pins>; - - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <50000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "preloader"; - reg = <0x0 0x40000>; - read-only; - }; - - partition@40000 { - label = "atf"; - reg = <0x40000 0x20000>; - read-only; - }; - - partition@60000 { - label = "u-boot"; - reg = <0x60000 0x60000>; - read-only; - }; - - partition@c0000 { - label = "u-boot-env"; - reg = <0xc0000 0x10000>; - }; - - factory: partition@d0000 { - label = "factory"; - reg = <0xd0000 0x40000>; - read-only; - }; - - eeprom: partition@110000 { - label = "eeprom"; - reg = <0x110000 0x10000>; - read-only; - }; - - partition@120000 { - label = "bs"; - reg = <0x120000 0x10000>; - }; - - partition@130000 { - label = "cfg"; - reg = <0x130000 0x100000>; - read-only; - }; - - partition@230000 { - compatible = "denx,fit"; - label = "firmware"; - reg = <0x230000 0x1ee0000>; - }; - - partition@2110000 { - label = "kernel1"; - reg = <0x2110000 0x1ee0000>; - }; - }; - }; -}; - -&uart0 { - pinctrl-names = "default"; - pinctrl-0 = <&uart0_pins>; - status = "okay"; -}; - -&uart3 { - pinctrl-names = "default"; - pinctrl-0 = <&uart3_pins>; - status = "okay"; - - /* MT7915 Bluetooth */ -}; - -&i2c0 { - pinctrl-names = "default"; - pinctrl-0 = <&i2c0_pins>; - status = "okay"; - - led-controller@30 { - compatible = "ubnt,ledbar"; - reg = <0x30>; - - enable-gpio = <&pio 59 0>; - - red { - label = "red"; - }; - - green { - label = "green"; - }; - - led_blue: blue { - label = "blue"; - }; - }; -}; - -&watchdog { - pinctrl-names = "default"; - pinctrl-0 = <&watchdog_pins>; - status = "okay"; -}; - -&wmac { - mediatek,mtd-eeprom = <&factory 0x0>; - mtd-mac-address = <&eeprom 0x0>; - status = "okay"; -}; diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk index bf706930e4..e0a1ac7ba1 100644 --- a/target/linux/mediatek/image/mt7622.mk +++ b/target/linux/mediatek/image/mt7622.mk @@ -1,10 +1,10 @@ +DTS_VENDOR := mediatek KERNEL_LOADADDR := 0x44080000 define Device/bpi_bananapi-r64 DEVICE_VENDOR := Bpi DEVICE_MODEL := Banana Pi R64 DEVICE_DTS := mt7622-bananapi-bpi-r64 - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek SUPPORTED_DEVICES := bananapi,bpi-r64 DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk endef @@ -14,7 +14,7 @@ define Device/bpi_bananapi-r64-rootdisk DEVICE_VENDOR := Bpi DEVICE_MODEL := Banana Pi R64 (rootdisk) DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + DEVICE_DTS_DIR := ../dts SUPPORTED_DEVICES := bananapi,bpi-r64 DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk IMAGES := sysupgrade-emmc.bin.gz @@ -26,7 +26,7 @@ define Device/elecom_wrc-2533gent DEVICE_VENDOR := Elecom DEVICE_MODEL := WRC-2533GENT DEVICE_DTS := mt7622-elecom-wrc-2533gent - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + DEVICE_DTS_DIR := ../dts DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-mt7615e \ kmod-mt7615-firmware kmod-btmtkuart swconfig endef @@ -36,7 +36,6 @@ define Device/mediatek_mt7622-rfb1 DEVICE_VENDOR := MediaTek DEVICE_MODEL := MTK7622 rfb1 AP DEVICE_DTS := mt7622-rfb1 - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk endef TARGET_DEVICES += mediatek_mt7622-rfb1 @@ -45,7 +44,7 @@ define Device/mediatek_mt7622-ubi DEVICE_VENDOR := MediaTek DEVICE_MODEL := MTK7622 AP (UBI) DEVICE_DTS := mt7622-rfb1-ubi - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + DEVICE_DTS_DIR := ../dts UBINIZE_OPTS := -E 5 BLOCKSIZE := 128k PAGESIZE := 2048 @@ -63,7 +62,7 @@ define Device/ubnt_unifi-6-lr DEVICE_VENDOR := Ubiquiti DEVICE_MODEL := UniFi 6 LR DEVICE_DTS := mt7622-ubnt-unifi-6-lr - DEVICE_DTS_DIR := $(DTS_DIR)/mediatek + DEVICE_DTS_DIR := ../dts DEVICE_PACKAGES := kmod-mt7915e endef TARGET_DEVICES += ubnt_unifi-6-lr