From: David Bauer <mail@david-bauer.net>
Date: Wed, 14 Apr 2021 22:30:24 +0000 (+0200)
Subject: ath79: fix 10 Mbit PLL data for TP-Link EAP2xx
X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=bbff6239e2ea273388f4ca0f8586945ff5f36271;p=openwrt%2Fstaging%2Fblocktrron.git

ath79: fix 10 Mbit PLL data for TP-Link EAP2xx

Fix the PLL register value for 10 Mbit/s link modes on TP-Link EAP
boards using a AR8033 SGMII PHY.

Otherwise, 10 Mbit/s links do not transfer data.

Reported-by: Tom Herbers <freifunk@tomherbers.de>
Tested-by: Tom Herbers <freifunk@tomherbers.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
---

diff --git a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
index cc9e0b7ff6..a6aefc7b55 100644
--- a/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
+++ b/target/linux/ath79/dts/qca9563_tplink_eap2x5-1port.dtsi
@@ -112,6 +112,7 @@
 
 	phy-handle = <&phy4>;
 	phy-mode = "sgmii";
+	pll-data = <0x03000000 0x00000101 0x00001313>;
 
 	mtd-mac-address = <&info 0x8>;