From: John Crispin Date: Mon, 14 Mar 2011 07:33:23 +0000 (+0000) Subject: * fixes arv4510 board support * fixes nor swizzle hack * fixes gpio .can_sleep *... X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=ba3251a90d93e7b5d30a95a30f250ec6a7b08cf1;p=openwrt%2Fstaging%2Fstintel.git * fixes arv4510 board support * fixes nor swizzle hack * fixes gpio .can_sleep * fixes compile warning inside pci driver SVN-Revision: 26157 --- diff --git a/target/linux/lantiq/image/Makefile b/target/linux/lantiq/image/Makefile index 16fe0ac6d3..5fbf332122 100644 --- a/target/linux/lantiq/image/Makefile +++ b/target/linux/lantiq/image/Makefile @@ -79,6 +79,14 @@ define Image/Build/Profile/ARV3527P $(call Image/Build/$(1),$(1),ARV3527P) endef +define Image/BuildKernel/Profile/ARV4510PW + $(call Image/BuildKernel/Template,ARV4510PW,$(xway_cmdline)) +endef + +define Image/Build/Profile/ARV4510PW + $(call Image/Build/$(1),$(1),ARV4510PW) +endef + define Image/BuildKernel/Profile/ARV4518PW $(call Image/BuildKernel/Template,ARV4518PW,$(xway_cmdline)) endef diff --git a/target/linux/lantiq/patches/104-board_xway.patch b/target/linux/lantiq/patches/104-board_xway.patch index bc7d496d66..297fbd3461 100644 --- a/target/linux/lantiq/patches/104-board_xway.patch +++ b/target/linux/lantiq/patches/104-board_xway.patch @@ -82,7 +82,7 @@ + .set = lq_ebu_set, + .base = 32, + .ngpio = 16, -+ .can_sleep = 1, ++ .can_sleep = 0, + .owner = THIS_MODULE, +}; + @@ -220,7 +220,7 @@ + .set = lq_stp_set, + .base = 48, + .ngpio = 24, -+ .can_sleep = 1, ++ .can_sleep = 0, + .owner = THIS_MODULE, +}; + diff --git a/target/linux/lantiq/patches/210-nor.patch b/target/linux/lantiq/patches/210-nor.patch index 5c46879966..fe2ce6de2b 100644 --- a/target/linux/lantiq/patches/210-nor.patch +++ b/target/linux/lantiq/patches/210-nor.patch @@ -22,7 +22,7 @@ +obj-$(CONFIG_MTD_LANTIQ) += lantiq.o --- /dev/null +++ b/drivers/mtd/maps/lantiq.c -@@ -0,0 +1,173 @@ +@@ -0,0 +1,183 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -44,6 +44,7 @@ +#include +#include +#include ++#include + +#include +#include @@ -51,6 +52,7 @@ +#ifdef CONFIG_SOC_LANTIQ_XWAY +#include +#endif ++static int ltq_mtd_probing; + +static map_word +lq_read16(struct map_info *map, unsigned long adr) @@ -58,7 +60,8 @@ + unsigned long flags; + map_word temp; + spin_lock_irqsave(&ebu_lock, flags); -+ adr ^= 2; ++ if (ltq_mtd_probing) ++ adr ^= 2; + temp.x[0] = *((__u16 *)(map->virt + adr)); + spin_unlock_irqrestore(&ebu_lock, flags); + return temp; @@ -69,7 +72,8 @@ +{ + unsigned long flags; + spin_lock_irqsave(&ebu_lock, flags); -+ adr ^= 2; ++ if (ltq_mtd_probing) ++ adr ^= 2; + *((__u16 *)(map->virt + adr)) = d.x[0]; + spin_unlock_irqrestore(&ebu_lock, flags); +} @@ -125,6 +129,7 @@ + struct mtd_partition *parts = NULL; + struct resource *res = 0; + int nr_parts = 0; ++ struct cfi_private *cfi; + +#ifdef CONFIG_SOC_LANTIQ_XWAY + lq_w32(lq_r32(LQ_EBU_BUSCON0) & ~EBU_WRDIS, LQ_EBU_BUSCON0); @@ -153,7 +158,9 @@ + return -EIO; + } + ++ ltq_mtd_probing = 1; + lq_mtd = (struct mtd_info *) do_map_probe("cfi_probe", &lq_map); ++ ltq_mtd_probing = 0; + if (!lq_mtd) { + iounmap(lq_map.virt); + dev_err(&pdev->dev, "probing failed\n"); @@ -161,6 +168,9 @@ + } + + lq_mtd->owner = THIS_MODULE; ++ cfi = lq_map.fldrv_priv; ++ cfi->addr_unlock1 ^= 1; ++ cfi->addr_unlock2 ^= 1; + + nr_parts = parse_mtd_partitions(lq_mtd, part_probe_types, &parts, 0); + if (nr_parts > 0) { @@ -196,54 +206,3 @@ +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("John Crispin "); +MODULE_DESCRIPTION("Lantiq SoC NOR"); ---- a/drivers/mtd/chips/cfi_cmdset_0001.c -+++ b/drivers/mtd/chips/cfi_cmdset_0001.c -@@ -40,7 +40,11 @@ - /* #define CMDSET0001_DISABLE_WRITE_SUSPEND */ - - // debugging, turns off buffer write mode if set to 1 --#define FORCE_WORD_WRITE 0 -+#ifdef CONFIG_LANTIQ -+# define FORCE_WORD_WRITE 1 -+#else -+# define FORCE_WORD_WRITE 0 -+#endif - - /* Intel chips */ - #define I82802AB 0x00ad -@@ -1493,6 +1497,9 @@ - int ret=0; - - adr += chip->start; -+#ifdef CONFIG_LANTIQ -+ adr ^= 2; -+#endif - - switch (mode) { - case FL_WRITING: ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -39,7 +39,11 @@ - #include - - #define AMD_BOOTLOC_BUG --#define FORCE_WORD_WRITE 0 -+#ifdef CONFIG_LANTIQ -+# define FORCE_WORD_WRITE 1 -+#else -+# define FORCE_WORD_WRITE 0 -+#endif - - #define MAX_WORD_RETRIES 3 - -@@ -1167,6 +1171,10 @@ - - adr += chip->start; - -+#ifdef CONFIG_LANTIQ -+ adr ^= 2; -+#endif -+ - mutex_lock(&chip->mutex); - ret = get_chip(map, chip, adr, FL_WRITING); - if (ret) { diff --git a/target/linux/lantiq/patches/250-watchdog.patch b/target/linux/lantiq/patches/250-watchdog.patch index 6f727c4273..510d4e1277 100644 --- a/target/linux/lantiq/patches/250-watchdog.patch +++ b/target/linux/lantiq/patches/250-watchdog.patch @@ -117,7 +117,7 @@ +}; + +static int -+lq_wdt_ioctl(struct inode *inode, struct file *file, ++lq_wdt_ioctl(struct file *file, + unsigned int cmd, unsigned long arg) +{ + int ret = -ENOTTY; diff --git a/target/linux/lantiq/patches/260-pci.patch b/target/linux/lantiq/patches/260-pci.patch index 6c0ca47cbc..462ce6e879 100644 --- a/target/linux/lantiq/patches/260-pci.patch +++ b/target/linux/lantiq/patches/260-pci.patch @@ -140,7 +140,7 @@ +} --- /dev/null +++ b/arch/mips/pci/pci-lantiq.c -@@ -0,0 +1,302 @@ +@@ -0,0 +1,303 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -394,15 +394,16 @@ + lq_w32(lq_r32(LQ_EBU_PCC_IEN) | 0x10, LQ_EBU_PCC_IEN); + + /* toggle reset pin */ -+ __gpio_set_value(21, 0); ++ gpio_set_value(21, 0); + wmb(); + mdelay(1); -+ __gpio_set_value(21, 1); ++ gpio_set_value(21, 1); + return 0; +} + +int __init +pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin){ ++ printk("%s:%s[%d]%d %d\n", __FILE__, __func__, __LINE__, slot, pin); + if(lq_pci_irq_map[slot]) + return lq_pci_irq_map[slot]; + printk("lq_pci: trying to map irq for unknown slot %d\n", slot); diff --git a/target/linux/lantiq/patches/400-mach-arv45xx.patch b/target/linux/lantiq/patches/400-mach-arv45xx.patch index 2c02944644..faaa6796f7 100644 --- a/target/linux/lantiq/patches/400-mach-arv45xx.patch +++ b/target/linux/lantiq/patches/400-mach-arv45xx.patch @@ -38,7 +38,7 @@ +obj-$(CONFIG_LANTIQ_MACH_ARV45XX) += mach-arv45xx.o --- /dev/null +++ b/arch/mips/lantiq/xway/mach-arv45xx.c -@@ -0,0 +1,504 @@ +@@ -0,0 +1,536 @@ +/* + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published @@ -69,22 +69,46 @@ +#include "dev-dwc_otg.h" + +#ifdef CONFIG_MTD_PARTITIONS ++static struct mtd_partition arv4510_partitions[] = ++{ ++ { ++ .name = "uboot", ++ .offset = 0x0, ++ .size = 0x20000, ++ }, ++ { ++ .name = "uboot_env", ++ .offset = 0x20000, ++ .size = 0x120000, ++ }, ++ { ++ .name = "linux", ++ .offset = 0x40000, ++ .size = 0xfa0000, ++ }, ++ { ++ .name = "board_config", ++ .offset = 0xfe0000, ++ .size = 0x20000, ++ }, ++}; ++ +static struct mtd_partition arv45xx_partitions[] = +{ + { + .name = "uboot", + .offset = 0x0, -+ .size = 0x10000, ++ .size = 0x20000, + }, + { + .name = "uboot_env", -+ .offset = 0x10000, ++ .offset = 0x20000, + .size = 0x10000, + }, + { + .name = "linux", -+ .offset = 0x20000, -+ .size = 0x3d0000, ++ .offset = 0x30000, ++ .size = 0x3c0000, + }, + { + .name = "board_config", @@ -119,6 +143,13 @@ + +#endif + ++static struct physmap_flash_data arv4510_flash_data = { ++#ifdef CONFIG_MTD_PARTITIONS ++ .nr_parts = ARRAY_SIZE(arv4510_partitions), ++ .parts = arv4510_partitions, ++#endif ++}; ++ +static struct physmap_flash_data arv45xx_flash_data = { +#ifdef CONFIG_MTD_PARTITIONS + .nr_parts = ARRAY_SIZE(arv45xx_partitions), @@ -354,9 +385,10 @@ + lq_register_gpio_leds(arv4510pw_leds_gpio, ARRAY_SIZE(arv4510pw_leds_gpio)); + lq_register_asc(0); + lq_register_asc(1); -+ lq_register_nor(&arv45xx_flash_data); -+ lq_pci_data.irq[15] = (INT_NUM_IM2_IRL0 + 31); -+ lq_pci_data.gpio |= PCI_EXIN1 | PCI_REQ2; ++ lq_register_nor(&arv4510_flash_data); ++ lq_pci_data.irq[12] = (INT_NUM_IM2_IRL0 + 31); ++ lq_pci_data.irq[15] = (INT_NUM_IM0_IRL0 + 26); ++ lq_pci_data.gpio |= PCI_EXIN2 | PCI_REQ2; + lq_register_pci(&lq_pci_data); + lq_register_wdt(); + bewan_register_ethernet();