From: Wolfgang Denk Date: Fri, 26 Aug 2011 02:25:43 +0000 (+0000) Subject: ARM: remove broken "at91cap9adk" board X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b5508344581d785b495df6e2b9cb94a13360afb5;p=project%2Fbcm63xx%2Fu-boot.git ARM: remove broken "at91cap9adk" board Signed-off-by: Wolfgang Denk Cc: Stelian Pop --- diff --git a/MAINTAINERS b/MAINTAINERS index 167b304730..09fa789a0e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -788,7 +788,6 @@ Manikandan Pillai Stelian Pop - at91cap9adk ARM926EJS (AT91CAP9 SoC) at91sam9260ek ARM926EJS (AT91SAM9260 SoC) at91sam9261ek ARM926EJS (AT91SAM9261 SoC) at91sam9263ek ARM926EJS (AT91SAM9263 SoC) diff --git a/board/atmel/at91cap9adk/Makefile b/board/atmel/at91cap9adk/Makefile deleted file mode 100644 index 2eec0ce231..0000000000 --- a/board/atmel/at91cap9adk/Makefile +++ /dev/null @@ -1,56 +0,0 @@ -# -# (C) Copyright 2003-2008 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. -# -# (C) Copyright 2008 -# Stelian Pop -# Lead Tech Design -# -# See file CREDITS for list of people who contributed to this -# project. -# -# This program is free software; you can redistribute it and/or -# modify it under the terms of the GNU General Public License as -# published by the Free Software Foundation; either version 2 of -# the License, or (at your option) any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place, Suite 330, Boston, -# MA 02111-1307 USA -# - -include $(TOPDIR)/config.mk - -LIB = $(obj)lib$(BOARD).o - -COBJS-y += at91cap9adk.o -COBJS-y += led.o -COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o - -SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) -OBJS := $(addprefix $(obj),$(COBJS-y)) -SOBJS := $(addprefix $(obj),$(SOBJS)) - -$(LIB): $(obj).depend $(OBJS) $(SOBJS) - $(call cmd_link_o_target, $(OBJS) $(SOBJS)) - -clean: - rm -f $(SOBJS) $(OBJS) - -distclean: clean - rm -f $(LIB) core *.bak $(obj).depend - -######################################################################### - -# defines $(obj).depend target -include $(SRCTREE)/rules.mk - -sinclude $(obj).depend - -######################################################################### diff --git a/board/atmel/at91cap9adk/at91cap9adk.c b/board/atmel/at91cap9adk/at91cap9adk.c deleted file mode 100644 index 2ab8bc2c43..0000000000 --- a/board/atmel/at91cap9adk/at91cap9adk.c +++ /dev/null @@ -1,352 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) -#include -#endif -#include - -#define MP_BLOCK_3_BASE 0xFDF00000 - -DECLARE_GLOBAL_DATA_PTR; - -/* ------------------------------------------------------------------------- */ -/* - * Miscelaneous platform dependent initialisations - */ - -static void at91cap9_slowclock_hw_init(void) -{ - /* - * On AT91CAP9 revC CPUs, the slow clock can be based on an - * internal impreciseRC oscillator or an external 32kHz oscillator. - * Switch to the latter. - */ -#define ARCH_ID_AT91CAP9_REVB 0x399 -#define ARCH_ID_AT91CAP9_REVC 0x601 - if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) { - unsigned i, tmp = at91_sys_read(AT91_SCKCR); - if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) { - timer_init(); - tmp |= AT91CAP9_SCKCR_OSC32EN; - at91_sys_write(AT91_SCKCR, tmp); - for (i = 0; i < 1200; i++) - udelay(1000); - tmp |= AT91CAP9_SCKCR_OSCSEL_32; - at91_sys_write(AT91_SCKCR, tmp); - udelay(200); - tmp &= ~AT91CAP9_SCKCR_RCEN; - at91_sys_write(AT91_SCKCR, tmp); - } - } -} - -static void at91cap9_nor_hw_init(void) -{ - unsigned long csa; - - /* Ensure EBI supply is 3.3V */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_EBI_VDDIOMSEL_3_3V); - /* Configure SMC CS0 for parallel flash */ - at91_sys_write(AT91_SMC_SETUP(0), - AT91_SMC_NWESETUP_(4) | AT91_SMC_NCS_WRSETUP_(2) | - AT91_SMC_NRDSETUP_(4) | AT91_SMC_NCS_RDSETUP_(2)); - at91_sys_write(AT91_SMC_PULSE(0), - AT91_SMC_NWEPULSE_(8) | AT91_SMC_NCS_WRPULSE_(10) | - AT91_SMC_NRDPULSE_(8) | AT91_SMC_NCS_RDPULSE_(10)); - at91_sys_write(AT91_SMC_CYCLE(0), - AT91_SMC_NWECYCLE_(16) | AT91_SMC_NRDCYCLE_(16)); - at91_sys_write(AT91_SMC_MODE(0), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_BAT_WRITE | - AT91_SMC_DBW_16 | AT91_SMC_TDF_(1)); -} - -#ifdef CONFIG_CMD_NAND -static void at91cap9_nand_hw_init(void) -{ - unsigned long csa; - - /* Enable CS3 */ - csa = at91_sys_read(AT91_MATRIX_EBICSA); - at91_sys_write(AT91_MATRIX_EBICSA, - csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA | - AT91_MATRIX_EBI_VDDIOMSEL_3_3V); - - /* Configure SMC CS3 for NAND/SmartMedia */ - at91_sys_write(AT91_SMC_SETUP(3), - AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(1) | - AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(1)); - at91_sys_write(AT91_SMC_PULSE(3), - AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(6) | - AT91_SMC_NRDPULSE_(4) | AT91_SMC_NCS_RDPULSE_(6)); - at91_sys_write(AT91_SMC_CYCLE(3), - AT91_SMC_NWECYCLE_(8) | AT91_SMC_NRDCYCLE_(8)); - at91_sys_write(AT91_SMC_MODE(3), - AT91_SMC_READMODE | AT91_SMC_WRITEMODE | - AT91_SMC_EXNWMODE_DISABLE | -#ifdef CONFIG_SYS_NAND_DBW_16 - AT91_SMC_DBW_16 | -#else /* CONFIG_SYS_NAND_DBW_8 */ - AT91_SMC_DBW_8 | -#endif - AT91_SMC_TDF_(1)); - - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD); - - /* RDY/BSY is not connected */ - - /* Enable NandFlash */ - at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); -} -#endif - -#ifdef CONFIG_MACB -static void at91cap9_macb_hw_init(void) -{ - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_EMAC); - - /* - * Disable pull-up on: - * RXDV (PB22) => PHY normal mode (not Test mode) - * ERX0 (PB25) => PHY ADDR0 - * ERX1 (PB26) => PHY ADDR1 => PHYADDR = 0x0 - * - * PHY has internal pull-down - */ - writel(pin_to_mask(AT91_PIN_PB22) | - pin_to_mask(AT91_PIN_PB25) | - pin_to_mask(AT91_PIN_PB26), - pin_to_controller(AT91_PIN_PA0) + PIO_PUDR); - - /* Need to reset PHY -> 500ms reset */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0D << 8)) | - AT91_RSTC_URSTEN); - - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); - - /* Wait for end hardware reset */ - while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)); - - /* Restore NRST value */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0 << 8)) | - AT91_RSTC_URSTEN); - - /* Re-enable pull-up */ - writel(pin_to_mask(AT91_PIN_PB22) | - pin_to_mask(AT91_PIN_PB25) | - pin_to_mask(AT91_PIN_PB26), - pin_to_controller(AT91_PIN_PA0) + PIO_PUER); - - at91_macb_hw_init(); - - /* Unlock EMAC, 3 0 2 1 sequence */ -#define MP_MAC_KEY0 0x5969cb2a -#define MP_MAC_KEY1 0xb4a1872e -#define MP_MAC_KEY2 0x05683fbc -#define MP_MAC_KEY3 0x3634fba4 -#define UNLOCK_MAC 0x00000008 - writel(MP_MAC_KEY3, MP_BLOCK_3_BASE + 0x3c); - writel(MP_MAC_KEY0, MP_BLOCK_3_BASE + 0x30); - writel(MP_MAC_KEY2, MP_BLOCK_3_BASE + 0x38); - writel(MP_MAC_KEY1, MP_BLOCK_3_BASE + 0x34); - writel(UNLOCK_MAC, MP_BLOCK_3_BASE + 0x40); -} -#endif - -#ifdef CONFIG_USB_OHCI_NEW -static void at91cap9_uhp_hw_init(void) -{ - /* Unlock USB OHCI, 3 2 0 1 sequence */ -#define MP_OHCI_KEY0 0x896c11ca -#define MP_OHCI_KEY1 0x68ebca21 -#define MP_OHCI_KEY2 0x4823efbc -#define MP_OHCI_KEY3 0x8651aae4 -#define UNLOCK_OHCI 0x00000010 - writel(MP_OHCI_KEY3, MP_BLOCK_3_BASE + 0x3c); - writel(MP_OHCI_KEY2, MP_BLOCK_3_BASE + 0x38); - writel(MP_OHCI_KEY0, MP_BLOCK_3_BASE + 0x30); - writel(MP_OHCI_KEY1, MP_BLOCK_3_BASE + 0x34); - writel(UNLOCK_OHCI, MP_BLOCK_3_BASE + 0x40); -} -#endif - -#ifdef CONFIG_LCD -vidinfo_t panel_info = { - vl_col: 240, - vl_row: 320, - vl_clk: 4965000, - vl_sync: ATMEL_LCDC_INVLINE_INVERTED | - ATMEL_LCDC_INVFRAME_INVERTED, - vl_bpix: 3, - vl_tft: 1, - vl_hsync_len: 5, - vl_left_margin: 1, - vl_right_margin:33, - vl_vsync_len: 1, - vl_upper_margin:1, - vl_lower_margin:0, - mmio: AT91CAP9_LCDC_BASE, -}; - -void lcd_enable(void) -{ - at91_set_gpio_value(AT91_PIN_PC0, 0); /* power up */ -} - -void lcd_disable(void) -{ - at91_set_gpio_value(AT91_PIN_PC0, 1); /* power down */ -} - -static void at91cap9_lcd_hw_init(void) -{ - at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ - at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ - at91_set_A_periph(AT91_PIN_PC3, 0); /* LCDDEN */ - at91_set_B_periph(AT91_PIN_PB9, 0); /* LCDCC */ - at91_set_A_periph(AT91_PIN_PC6, 0); /* LCDD2 */ - at91_set_A_periph(AT91_PIN_PC7, 0); /* LCDD3 */ - at91_set_A_periph(AT91_PIN_PC8, 0); /* LCDD4 */ - at91_set_A_periph(AT91_PIN_PC9, 0); /* LCDD5 */ - at91_set_A_periph(AT91_PIN_PC10, 0); /* LCDD6 */ - at91_set_A_periph(AT91_PIN_PC11, 0); /* LCDD7 */ - at91_set_A_periph(AT91_PIN_PC14, 0); /* LCDD10 */ - at91_set_A_periph(AT91_PIN_PC15, 0); /* LCDD11 */ - at91_set_A_periph(AT91_PIN_PC16, 0); /* LCDD12 */ - at91_set_A_periph(AT91_PIN_PC17, 0); /* LCDD13 */ - at91_set_A_periph(AT91_PIN_PC18, 0); /* LCDD14 */ - at91_set_A_periph(AT91_PIN_PC19, 0); /* LCDD15 */ - at91_set_A_periph(AT91_PIN_PC22, 0); /* LCDD18 */ - at91_set_A_periph(AT91_PIN_PC23, 0); /* LCDD19 */ - at91_set_A_periph(AT91_PIN_PC24, 0); /* LCDD20 */ - at91_set_A_periph(AT91_PIN_PC25, 0); /* LCDD21 */ - at91_set_A_periph(AT91_PIN_PC26, 0); /* LCDD22 */ - at91_set_A_periph(AT91_PIN_PC27, 0); /* LCDD23 */ - - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_LCDC); - - gd->fb_base = 0; -} - -#ifdef CONFIG_LCD_INFO -#include -#include - -void lcd_show_board_info(void) -{ - ulong dram_size, nand_size; - int i; - char temp[32]; - - lcd_printf ("%s\n", U_BOOT_VERSION); - lcd_printf ("(C) 2008 ATMEL Corp\n"); - lcd_printf ("at91support@atmel.com\n"); - lcd_printf ("%s CPU at %s MHz\n", - CONFIG_SYS_AT91_CPU_NAME, - strmhz(temp, get_cpu_clk_rate())); - - dram_size = 0; - for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) - dram_size += gd->bd->bi_dram[i].size; - nand_size = 0; - for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++) - nand_size += nand_info[i].size; - lcd_printf (" %ld MB SDRAM, %ld MB NAND\n", - dram_size >> 20, - nand_size >> 20 ); -} -#endif /* CONFIG_LCD_INFO */ -#endif - -int board_init(void) -{ - /* Enable Ctrlc */ - console_init_f(); - - /* arch number of AT91CAP9ADK-Board */ - gd->bd->bi_arch_number = MACH_TYPE_AT91CAP9ADK; - /* adress of boot parameters */ - gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; - - at91_serial_hw_init(); - at91cap9_slowclock_hw_init(); - at91cap9_nor_hw_init(); -#ifdef CONFIG_CMD_NAND - at91cap9_nand_hw_init(); -#endif -#ifdef CONFIG_HAS_DATAFLASH - at91_spi0_hw_init(1 << 0); -#endif -#ifdef CONFIG_MACB - at91cap9_macb_hw_init(); -#endif -#ifdef CONFIG_USB_OHCI_NEW - at91cap9_uhp_hw_init(); -#endif -#ifdef CONFIG_LCD - at91cap9_lcd_hw_init(); -#endif - return 0; -} - -int dram_init(void) -{ - gd->bd->bi_dram[0].start = PHYS_SDRAM; - gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; - return 0; -} - -#ifdef CONFIG_RESET_PHY_R -void reset_phy(void) -{ -} -#endif - -int board_eth_init(bd_t *bis) -{ - int rc = 0; -#ifdef CONFIG_MACB - rc = macb_eth_initialize(0, (void *)AT91CAP9_BASE_EMAC, 0x00); -#endif - return rc; -} diff --git a/board/atmel/at91cap9adk/config.mk b/board/atmel/at91cap9adk/config.mk deleted file mode 100644 index 797da0eafe..0000000000 --- a/board/atmel/at91cap9adk/config.mk +++ /dev/null @@ -1 +0,0 @@ -CONFIG_SYS_TEXT_BASE = 0x73000000 diff --git a/board/atmel/at91cap9adk/led.c b/board/atmel/at91cap9adk/led.c deleted file mode 100644 index 14aea994e9..0000000000 --- a/board/atmel/at91cap9adk/led.c +++ /dev/null @@ -1,43 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include -#include -#include -#include -#include - -void coloured_LED_init(void) -{ - /* Enable clock */ - at91_sys_write(AT91_PMC_PCER, 1 << AT91CAP9_ID_PIOABCD); - - at91_set_gpio_output(CONFIG_RED_LED, 1); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); - - at91_set_gpio_output(CONFIG_RED_LED, 0); - at91_set_gpio_output(CONFIG_GREEN_LED, 1); - at91_set_gpio_output(CONFIG_YELLOW_LED, 1); -} diff --git a/board/atmel/at91cap9adk/partition.c b/board/atmel/at91cap9adk/partition.c deleted file mode 100644 index 7e1d46f530..0000000000 --- a/board/atmel/at91cap9adk/partition.c +++ /dev/null @@ -1,39 +0,0 @@ -/* - * (C) Copyright 2008 - * Ulf Samuelsson - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ -#include -#include -#include -#include - -AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; - -struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { - {CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ -}; - -/*define the area offsets*/ -dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { - {0x00000000, 0x000041FF, FLAG_PROTECT_SET, 0, "Bootstrap"}, - {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, - {0x00008400, 0x00041FFF, FLAG_PROTECT_SET, 0, "U-Boot"}, - {0x00042000, 0x00251FFF, FLAG_PROTECT_CLEAR, 0, "Kernel"}, - {0x00252000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, 0, "FS"}, -}; diff --git a/boards.cfg b/boards.cfg index ee7ba86914..174242291e 100644 --- a/boards.cfg +++ b/boards.cfg @@ -77,7 +77,6 @@ versatileab arm arm926ejs versatile armltd aspenite arm arm926ejs - Marvell armada100 gplugd arm arm926ejs - Marvell armada100 afeb9260 arm arm926ejs - - at91 -at91cap9adk arm arm926ejs - atmel at91 at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0 at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1 diff --git a/doc/README.scrapyard b/doc/README.scrapyard index 40cda23c6a..847d02c8f0 100644 --- a/doc/README.scrapyard +++ b/doc/README.scrapyard @@ -11,6 +11,7 @@ easily if here is something they might want to dig for... Board Arch CPU removed Commit last known maintainer/contact ============================================================================= +at91cap9adk arm arm926ejs - 2011-07-17 Stelian Pop voiceblue arm arm925t - 2011-07-17 smdk2400 arm arm920t - 2011-07-17 Gary Jennejohn sbc2410x arm arm920t - 2011-07-17 diff --git a/include/configs/at91cap9adk.h b/include/configs/at91cap9adk.h deleted file mode 100644 index 49c923f163..0000000000 --- a/include/configs/at91cap9adk.h +++ /dev/null @@ -1,218 +0,0 @@ -/* - * (C) Copyright 2007-2008 - * Stelian Pop - * Lead Tech Design - * - * Configuation settings for the AT91CAP9ADK board. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define CONFIG_AT91_LEGACY - -/* ARM asynchronous clock */ -#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ -#define CONFIG_SYS_HZ 1000 - -#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ -#define CONFIG_AT91CAP9 1 /* It's an Atmel AT91CAP9 SoC */ -#define CONFIG_AT91CAP9ADK 1 /* on an AT91CAP9ADK Board */ -#define CONFIG_ARCH_CPU_INIT -#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ - -#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ -#define CONFIG_SETUP_MEMORY_TAGS 1 -#define CONFIG_INITRD_TAG 1 - -#define CONFIG_SKIP_LOWLEVEL_INIT - -/* - * Hardware drivers - */ -#define CONFIG_AT91_GPIO 1 -#define CONFIG_ATMEL_USART 1 -#undef CONFIG_USART0 -#undef CONFIG_USART1 -#undef CONFIG_USART2 -#define CONFIG_USART3 1 /* USART 3 is DBGU */ - -/* LCD */ -#define CONFIG_LCD 1 -#define LCD_BPP LCD_COLOR8 -#define CONFIG_LCD_LOGO 1 -#undef LCD_TEST_PATTERN -#define CONFIG_LCD_INFO 1 -#define CONFIG_LCD_INFO_BELOW_LOGO 1 -#define CONFIG_SYS_WHITE_ON_BLACK 1 -#define CONFIG_ATMEL_LCD 1 -#define CONFIG_ATMEL_LCD_BGR555 1 -#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 - -/* LED */ -#define CONFIG_AT91_LED -#define CONFIG_RED_LED AT91_PIN_PC29 /* this is the power led */ -#define CONFIG_GREEN_LED AT91_PIN_PA10 /* this is the user1 led */ -#define CONFIG_YELLOW_LED AT91_PIN_PA11 /* this is the user1 led */ - -#define CONFIG_BOOTDELAY 3 - -/* - * BOOTP options - */ -#define CONFIG_BOOTP_BOOTFILESIZE 1 -#define CONFIG_BOOTP_BOOTPATH 1 -#define CONFIG_BOOTP_GATEWAY 1 -#define CONFIG_BOOTP_HOSTNAME 1 - -/* - * Command line configuration. - */ -#include -#undef CONFIG_CMD_BDI -#undef CONFIG_CMD_FPGA -#undef CONFIG_CMD_IMI -#undef CONFIG_CMD_LOADS -#undef CONFIG_CMD_SOURCE - -#define CONFIG_CMD_PING 1 -#define CONFIG_CMD_DHCP 1 -#define CONFIG_CMD_NAND 1 -#define CONFIG_CMD_USB 1 - -/* SDRAM: Careful: this supposes an AT91CAP-MEM33 expansion card */ -#define CONFIG_NR_DRAM_BANKS 1 -#define PHYS_SDRAM 0x70000000 -#define PHYS_SDRAM_SIZE 0x04000000 /* 64 megs */ - -/* DataFlash */ -#define CONFIG_ATMEL_DATAFLASH_SPI -#define CONFIG_HAS_DATAFLASH 1 -#define CONFIG_SYS_SPI_WRITE_TOUT (5*CONFIG_SYS_HZ) -#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1 -#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ -#define AT91_SPI_CLK 15000000 -#define DATAFLASH_TCSS (0x1a << 16) -#define DATAFLASH_TCHS (0x1 << 24) - -/* NOR flash */ -#define CONFIG_SYS_FLASH_CFI 1 -#define CONFIG_FLASH_CFI_DRIVER 1 -#define PHYS_FLASH_1 0x10000000 -#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CONFIG_SYS_MAX_FLASH_SECT 256 -#define CONFIG_SYS_MAX_FLASH_BANKS 1 -/* our ALE is AD21 */ -#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) -/* our CLE is AD22 */ -#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) -#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15 - -/* NAND flash */ -#ifdef CONFIG_CMD_NAND -#define CONFIG_NAND_ATMEL -#define CONFIG_SYS_MAX_NAND_DEVICE 1 -#define CONFIG_SYS_NAND_BASE 0x40000000 -#define CONFIG_SYS_NAND_DBW_8 1 - -#endif - -/* Ethernet */ -#define CONFIG_MACB 1 -#define CONFIG_RMII 1 -#define CONFIG_NET_MULTI 1 -#define CONFIG_NET_RETRY_COUNT 20 -#define CONFIG_RESET_PHY_R 1 - -/* USB */ -#define CONFIG_USB_ATMEL -#define CONFIG_USB_OHCI_NEW 1 -#define CONFIG_DOS_PARTITION 1 -#define CONFIG_SYS_USB_OHCI_CPU_INIT 1 -#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91_BASE_UHP */ -#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91cap9" -#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 -#define CONFIG_USB_STORAGE 1 -#define CONFIG_CMD_FAT 1 - -#define CONFIG_SYS_LOAD_ADDR 0x72000000 /* load address */ - -#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM -#define CONFIG_SYS_MEMTEST_END 0x73e00000 - -#define CONFIG_SYS_USE_DATAFLASH 1 -#undef CONFIG_SYS_USE_NORFLASH - -#ifdef CONFIG_SYS_USE_DATAFLASH - -/* bootstrap + u-boot + env + linux in dataflash */ -#define CONFIG_ENV_IS_IN_DATAFLASH 1 -#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400) -#define CONFIG_ENV_OFFSET 0x4200 -#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x4200 -#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x72000000 0x210000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock1 " \ - "mtdparts=physmap-flash.0:-(nor);" \ - "atmel_nand:-(root) " \ - "rw rootfstype=jffs2" - -#else - -/* bootstrap + u-boot + env + linux in norflash */ -#define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_SYS_MONITOR_BASE (PHYS_FLASH_1 + 0x8000) -#define CONFIG_ENV_OFFSET 0x4000 -#define CONFIG_ENV_ADDR (PHYS_FLASH_1 + CONFIG_ENV_OFFSET) -#define CONFIG_ENV_SIZE 0x4000 -#define CONFIG_BOOTCOMMAND "cp.b 0x10040000 0x72000000 0x200000; bootm" -#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ - "root=/dev/mtdblock4 " \ - "mtdparts=physmap-flash.0:16k(bootstrap)ro,"\ - "16k(env),224k(uboot)ro,-(linux);" \ - "atmel_nand:-(root) " \ - "rw rootfstype=jffs2" - -#endif - -#define CONFIG_BAUDRATE 115200 -#define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 } - -#define CONFIG_SYS_PROMPT "U-Boot> " -#define CONFIG_SYS_CBSIZE 256 -#define CONFIG_SYS_MAXARGS 16 -#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) -#define CONFIG_SYS_LONGHELP 1 -#define CONFIG_CMDLINE_EDITING 1 - -/* - * Size of malloc() pool - */ -#define CONFIG_SYS_MALLOC_LEN ROUND(CONFIG_ENV_SIZE + 128*1024, 0x1000) - -#define CONFIG_STACKSIZE (32*1024) /* regular stack */ - -#ifdef CONFIG_USE_IRQ -#error CONFIG_USE_IRQ not supported -#endif - -#endif