From: John Crispin Date: Sat, 17 Jan 2015 07:07:06 +0000 (+0000) Subject: lantiq: Add device tree for P2812HNUF1 and P2812HNUF3 X-Git-Tag: reboot~4688 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b4d2b69c43b032f8b8ef07fc1d9dcbb80d23556d;p=openwrt%2Fopenwrt.git lantiq: Add device tree for P2812HNUF1 and P2812HNUF3 Add device tree for P2812HNUF1 and P2812HNUF3. Signed-off-by: Sylwester Petela SVN-Revision: 43986 --- diff --git a/target/linux/lantiq/dts/P2812HNUF1.dts b/target/linux/lantiq/dts/P2812HNUF1.dts new file mode 100644 index 0000000000..24ded3e853 --- /dev/null +++ b/target/linux/lantiq/dts/P2812HNUF1.dts @@ -0,0 +1,106 @@ +/dts-v1/; + +/include/ "P2812HNUFX.dtsi" + +/ { + model = "P2812HNUF1 - ZyXEL P-2812HNU-F1"; + + fpi@10000000 { + localbus@0 { + nand-parts@0 { + compatible = "gen_nand", "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <0 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x00000 0x40000>; + }; + partition@40000 { + label = "uboot-env"; + reg = <0x40000 0x20000>; + }; + partition@60000 { + label = "kernel"; + reg = <0x60000 0x200000>; + }; + partition@260000 { + label = "ubi"; + reg = <0x260000 0x7da0000>; + }; + }; + }; + pcie@d900000 { + status = "disabled"; + }; + }; + + ralink_eep { + compatible = "ralink,eeprom"; + ralink,eeprom = "RT3062.eeprom"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + internet_red { /* red */ + label = "internet_red"; + gpios = <&stp 16 1>; + }; + internet_green { + label = "internet_green"; /* green */ + gpios = <&stp 17 1>; + }; + dsl { + label = "dsl"; + gpios = <&stp 18 1>; + }; + dsl2 { + label = "dsl2"; + gpios = <&stp 19 1>; + }; + wireless_red { /* red */ + label = "wireless_red"; + gpios = <&stp 20 1>; + }; + wireless_green { /* green */ + label = "wireless_green"; + gpios = <&stp 21 1>; + }; + power { /* red */ + label = "power"; + gpios = <&stp 22 1>; + }; + power2 { /* green */ + label = "power2"; + gpios = <&stp 23 1>; + }; + usb1 { /* green */ + label = "usb1"; + gpios = <&gpio 38 1>; + }; + usb2 { /* green */ + label = "usb2"; + gpios = <&gpio 44 1>; + }; + phone1 { /* green */ + label = "phone1"; + gpios = <&gpio 11 1>; + }; + phone1warn { /* red */ + label = "phone1warn"; + gpios = <&gpio 12 1>; + }; + phone2warn { /* red */ + label = "phone2warn"; + gpios = <&gpio 26 1>; + }; + phone2 { /* green */ + label = "phone2"; + gpios = <&gpio 28 1>; + }; + }; +}; diff --git a/target/linux/lantiq/dts/P2812HNUF3.dts b/target/linux/lantiq/dts/P2812HNUF3.dts new file mode 100644 index 0000000000..5d25c3c4cb --- /dev/null +++ b/target/linux/lantiq/dts/P2812HNUF3.dts @@ -0,0 +1,109 @@ +/dts-v1/; + +/include/ "P2812HNUFX.dtsi" + +/ { + model = "P2812HNUF3 - ZyXEL P-2812HNU-F3"; + + fpi@10000000 { + localbus@0 { + nor-boot@0 { + compatible = "lantiq,nor"; + bank-width = <2>; + reg = <0 0x0 0x800000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0 0x50000>; + read-only; + }; + partition@50000 { + label = "uboot-env"; + reg = <0x50000 0x10000>; + }; + partition@60000 { + label = "unused"; + reg = <0x60000 0x7a0000>; + }; + }; + + nand-parts@0 { + compatible = "gen_nand", "lantiq,nand-xway"; + lantiq,cs = <1>; + bank-width = <2>; + reg = <1 0x0 0x2000000>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0 0x200000>; + }; + partition@200000 { + label = "ubi"; + reg = <0x200000 0x7e00000>; + }; + }; + }; + }; + + ralink_eep { + compatible = "ralink,eeprom"; + ralink,eeprom = "RT3092.eeprom"; + }; + + gpio-leds { + compatible = "gpio-leds"; + + internet2 { + label = "internet2"; + gpios = <&stp 16 1>; + }; + internet { + label = "internet"; + gpios = <&stp 17 1>; + }; + dsl { + label = "dsl"; + gpios = <&stp 18 1>; + }; + dsl2 { + label = "dsl2"; + gpios = <&stp 19 1>; + }; + wireless_red { + label = "wireless_red"; + gpios = <&stp 20 1>; + }; + wireless_green { + label = "wireless_green"; + gpios = <&stp 21 1>; + }; + power2 { + label = "power2"; + gpios = <&stp 22 1>; + }; + power { + label = "power"; + gpios = <&stp 23 1>; + }; + phone1 { + label = "phone1"; + gpios = <&gpio 11 1>; + }; + phone1warn { + label = "phone1warn"; + gpios = <&gpio 12 1>; + }; + phone2 { + label = "phone2"; + gpios = <&gpio 28 1>; + }; + phone2warn { + label = "phone2warn"; + gpios = <&gpio 26 1>; + }; + }; +}; diff --git a/target/linux/lantiq/dts/P2812HNUFX.dtsi b/target/linux/lantiq/dts/P2812HNUFX.dtsi new file mode 100644 index 0000000000..e571eb64f6 --- /dev/null +++ b/target/linux/lantiq/dts/P2812HNUFX.dtsi @@ -0,0 +1,257 @@ +/include/ "vr9.dtsi" + +/ { + chosen { + bootargs = "console=ttyLTQ0,115200 init=/etc/preinit"; + }; + + memory@0 { + reg = <0x0 0x8000000>; + }; + + fpi@10000000 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "lantiq,fpi", "simple-bus"; + ranges = <0x0 0x10000000 0xEEFFFFF>; + reg = <0x10000000 0xEF00000>; + + localbus@0 { + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 0x0 0x3ffffff /* addrsel0 */ + 1 0 0x4000000 0x4000010>; /* addsel1 */ + compatible = "lantiq,localbus", "simple-bus"; + }; + + gpio: pinmux@E100B10 { + compatible = "lantiq,pinctrl-xr9"; + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + interrupt-parent = <&icu0>; + interrupts = <166 135 66 40 41 42 38>; + + #gpio-cells = <2>; + gpio-controller; + reg = <0xE100B10 0xA0>; + + state_default: pinmux { + exin3 { + lantiq,groups = "exin3"; + lantiq,function = "exin"; + }; + mdio { + lantiq,groups = "mdio"; + lantiq,function = "mdio"; + }; + gphy-leds { + lantiq,groups = "gphy0 led1", "gphy1 led1", + "gphy0 led2", "gphy1 led2"; + lantiq,function = "gphy"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + stp { + lantiq,groups = "stp"; + lantiq,function = "stp"; + lantiq,pull = <2>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + pci-in { + lantiq,groups = "req1"; + lantiq,function = "pci"; + lantiq,output = <0>; + lantiq,open-drain = <1>; + lantiq,pull = <2>; + }; + pci-out { + lantiq,groups = "gnt1"; + lantiq,function = "pci"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + pci_rst { + lantiq,pins = "io21"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <2>; + }; + pcie-rst { + lantiq,pins = "io38"; + lantiq,pull = <0>; + lantiq,output = <1>; + }; + ifxhcd-rst { + lantiq,pins = "io33"; + lantiq,pull = <0>; + lantiq,open-drain = <0>; + lantiq,output = <1>; + }; + nand_out { + lantiq,groups = "nand cle", "nand ale"; + lantiq,function = "ebu"; + lantiq,output = <1>; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + nand_cs1 { + lantiq,groups = "nand cs1"; + lantiq,function = "ebu"; + lantiq,open-drain = <0>; + lantiq,pull = <0>; + }; + }; + }; + + eth@E108000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-net"; + reg = < 0xE108000 0x3000 /* switch */ + 0xE10B100 0x70 /* mdio */ + 0xE10B1D8 0x30 /* mii */ + 0xE10B308 0x30 >; /* pmac */ + interrupt-parent = <&icu0>; + interrupts = <73 72>; + + lan: interface@0 { + compatible = "lantiq,xrx200-pdi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + mac-address = [ 00 11 22 33 44 55 ]; + lantiq,switch; + + ethernet@0 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <0>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + }; + ethernet@1 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <1>; + phy-mode = "rgmii"; + phy-handle = <&phy1>; + }; + ethernet@2 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <2>; + phy-mode = "gmii"; + phy-handle = <&phy11>; + }; + ethernet@4 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <4>; + phy-mode = "gmii"; + phy-handle = <&phy13>; + }; + ethernet@5 { + compatible = "lantiq,xrx200-pdi-port"; + reg = <5>; + phy-mode = "rgmii"; + phy-handle = <&phy5>; + }; + }; + + mdio@0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "lantiq,xrx200-mdio"; + + phy0: ethernet-phy@0 { + reg = <0x0>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy1: ethernet-phy@1 { + reg = <0x1>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy5: ethernet-phy@5 { + reg = <0x5>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy11: ethernet-phy@11 { + reg = <0x11>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + phy13: ethernet-phy@13 { + reg = <0x13>; + compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22"; + }; + }; + }; + + stp: stp@E100BB0 { + compatible = "lantiq,gpio-stp-xway"; + reg = <0xE100BB0 0x40>; + #gpio-cells = <2>; + gpio-controller; + + lantiq,shadow = <0xffffff>; + lantiq,groups = <0x7>; + lantiq,dsl = <0x0>; + lantiq,phy1 = <0x0>; + lantiq,phy2 = <0x0>; + }; + + ifxhcd@E101000 { + status = "okay"; + gpios = <&gpio 33 0>; + lantiq,portmask = <0x3>; + }; + + pci@E105400 { + status = "okay"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + compatible = "lantiq,pci-xway"; + bus-range = <0x0 0x0>; + ranges = <0x2000000 0 0x8000000 0x8000000 0 0x2000000 /* pci memory */ + 0x1000000 0 0x00000000 0xAE00000 0 0x200000>; /* io space */ + reg = <0x7000000 0x8000 /* config space */ + 0xE105400 0x400>; /* pci bridge */ + lantiq,bus-clock = <33333333>; + /*lantiq,external-clock;*/ + lantiq,delay-hi = <0>; /* 0ns delay */ + lantiq,delay-lo = <0>; /* 0.0ns delay */ + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; + interrupt-map = < + 0x7000 0 0 1 &icu0 30 1 // slot 14, irq 30 + >; + gpio-reset = <&gpio 21 0>; + req-mask = <0x1>; /* GNT1 */ + }; + }; + + gphy-xrx200 { + compatible = "lantiq,phy-xrx200"; + firmware1 = "lantiq/vr9_phy11g_a1x.bin"; /*VR9 1.1*/ + firmware2 = "lantiq/vr9_phy11g_a2x.bin"; /*VR9 1.2*/ + phys = [ 00 01 ]; + }; + + gpio-keys-polled { + compatible = "gpio-keys-polled"; + #address-cells = <1>; + #size-cells = <0>; + poll-interval = <100>; + + reset { + label = "reset"; + gpios = <&gpio 39 1>; + linux,code = <0x198>; + }; + + rfkill { + label = "rfkill"; + gpios = <&gpio 1 1>; + linux,code = <0xf7>; + }; + }; +};