From: Zoltan HERPAI Date: Thu, 9 Aug 2018 10:16:19 +0000 (+0200) Subject: ixp4xx: bump to 4.14 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b4708f7d5a4aaa75e1787159ac822c48e7d770bb;p=openwrt%2Fstaging%2Fwigyori.git ixp4xx: bump to 4.14 Initial run to bring ixp4xx up to a recent kernel with a minimal patchset. Known issue is the init of the PCI cards where the kernel barfs, so currently the usability of this kernel is less than optimal. Signed-off-by: Zoltan HERPAI --- diff --git a/target/linux/ixp4xx/Makefile b/target/linux/ixp4xx/Makefile index e1964331a0..79f9a02dc6 100644 --- a/target/linux/ixp4xx/Makefile +++ b/target/linux/ixp4xx/Makefile @@ -14,7 +14,7 @@ MAINTAINER:=Ted Hess , \ Imre Kaloz SUBTARGETS:=generic harddisk -KERNEL_PATCHVER:=4.9 +KERNEL_PATCHVER:=4.14 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ixp4xx/config-4.14 b/target/linux/ixp4xx/config-4.14 new file mode 100644 index 0000000000..3992ceb1d1 --- /dev/null +++ b/target/linux/ixp4xx/config-4.14 @@ -0,0 +1,273 @@ +CONFIG_ALIGNMENT_TRAP=y +# CONFIG_ARCH_ADI_COYOTE is not set +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y +CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y +CONFIG_ARCH_HAS_SET_MEMORY=y +# CONFIG_ARCH_HAS_SG_CHAIN is not set +CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y +CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y +CONFIG_ARCH_HAVE_CUSTOM_GPIO_H=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_IXCDP1100=y +CONFIG_ARCH_IXDP425=y +CONFIG_ARCH_IXDP4XX=y +CONFIG_ARCH_IXP4XX=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_NR_GPIO=0 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set +# CONFIG_ARCH_PRPMC1100 is not set +# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set +# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set +CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y +CONFIG_ARCH_SUPPORTS_BIG_ENDIAN=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_WANT_GENERAL_HUGETLB=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARM=y +# CONFIG_ARM_CPU_SUSPEND is not set +CONFIG_ARM_L1_CACHE_SHIFT=5 +CONFIG_ARM_PATCH_PHYS_VIRT=y +# CONFIG_ARM_THUMB is not set +CONFIG_ATAGS=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BOUNCE=y +# CONFIG_CACHE_L2X0 is not set +CONFIG_CLKSRC_MMIO=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" +CONFIG_CMDLINE_FROM_BOOTLOADER=y +CONFIG_CPU_32v5=y +CONFIG_CPU_ABRT_EV5T=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_CACHE_VIVT=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_ENDIAN_BE32=y +# CONFIG_CPU_ENDIAN_BE8 is not set +CONFIG_CPU_PABRT_LEGACY=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V4WBI=y +CONFIG_CPU_USE_DOMAINS=y +CONFIG_CPU_XSCALE=y +CONFIG_CRYPTO_ACOMP2=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_AKCIPHER2=y +CONFIG_CRYPTO_CCM=y +CONFIG_CRYPTO_CMAC=y +CONFIG_CRYPTO_CTR=y +# CONFIG_CRYPTO_DEV_IXP4XX is not set +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_GCM=y +CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_GHASH=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_KPP2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +CONFIG_CRYPTO_NULL=y +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_SEQIV=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_LL_INCLUDE="debug/8250.S" +CONFIG_DEBUG_UART_8250=y +# CONFIG_DEBUG_UART_8250_FLOW_CONTROL is not set +CONFIG_DEBUG_UART_8250_SHIFT=2 +# CONFIG_DEBUG_UART_8250_WORD is not set +CONFIG_DEBUG_UART_PHYS=0xc8000003 +CONFIG_DEBUG_UART_VIRT=0xfef00003 +# CONFIG_DEBUG_USER is not set +CONFIG_DMABOUNCE=y +CONFIG_DNOTIFY=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_EEPROM_AT24=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FRAME_POINTER=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IO=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_SYSFS=y +# CONFIG_GRO_CELLS is not set +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set +CONFIG_HAVE_ARCH_AUDITSYSCALL=y +# CONFIG_HAVE_ARCH_BITREVERSE is not set +CONFIG_HAVE_ARCH_PFN_VALID=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set +CONFIG_HAVE_CC_STACKPROTECTOR=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DMA_API_DEBUG=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_OPTPROBES=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_PERF_REGS=y +CONFIG_HAVE_PERF_USER_STACK_DUMP=y +CONFIG_HAVE_PROC_CPU=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_UID16=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HWMON=y +CONFIG_HWMON_VID=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_IXP4XX=y +CONFIG_HZ_FIXED=0 +CONFIG_HZ_PERIODIC=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_GPIO=y +# CONFIG_I2C_IOP3XX is not set +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IOMMU_HELPER=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +# CONFIG_IWMMXT is not set +CONFIG_IXP4XX_ETH=y +# CONFIG_IXP4XX_INDIRECT_PCI is not set +CONFIG_IXP4XX_NPE=y +CONFIG_IXP4XX_QMGR=y +CONFIG_IXP4XX_WATCHDOG=y +CONFIG_LEDS_FSG=y +CONFIG_LEDS_GPIO=y +CONFIG_LEGACY_PTYS=y +CONFIG_LEGACY_PTY_COUNT=256 +# CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set +# CONFIG_MACH_ARCOM_VULCAN is not set +CONFIG_MACH_AVILA=y +# CONFIG_MACH_DEVIXP is not set +CONFIG_MACH_DSMG600=y +CONFIG_MACH_FSG=y +CONFIG_MACH_GATEWAY7001=y +# CONFIG_MACH_GORAMO_MLR is not set +# CONFIG_MACH_GTWX5715 is not set +# CONFIG_MACH_IXDP465 is not set +CONFIG_MACH_IXDPG425=y +# CONFIG_MACH_KIXRP435 is not set +CONFIG_MACH_LOFT=y +# CONFIG_MACH_MIC256 is not set +# CONFIG_MACH_MICCPT is not set +CONFIG_MACH_NAS100D=y +CONFIG_MACH_NSLU2=y +CONFIG_MACH_PRONGHORN=y +CONFIG_MACH_PRONGHORNMETRO=y +CONFIG_MACH_WG302V1=y +CONFIG_MACH_WG302V2=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MIGHT_HAVE_PCI=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_GEOMETRY is not set +CONFIG_MTD_IXP4XX=y +CONFIG_MTD_OTP=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_KUSER_HELPERS=y +CONFIG_NEED_MACH_IO_H=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_VENDOR_XSCALE=y +CONFIG_NO_BOOTMEM=y +CONFIG_NVMEM=y +# CONFIG_OF is not set +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PCI=y +CONFIG_PCI_DEBUG=y +# CONFIG_PCI_DOMAINS_GENERIC is not set +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_RCU_NEED_SEGCBLIST is not set +# CONFIG_RCU_STALL_COMMON is not set +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_RFKILL_LEDS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_DS1672=y +CONFIG_RTC_DRV_ISL1208=y +CONFIG_RTC_DRV_PCF8563=y +CONFIG_RTC_DRV_X1205=y +CONFIG_RTC_I2C_AND_SPI=y +CONFIG_RTC_MC146818_LIB=y +CONFIG_RWSEM_XCHGADD_ALGORITHM=y +# CONFIG_SCHED_INFO is not set +# CONFIG_SCSI_DMA is not set +CONFIG_SENSORS_AD7418=y +CONFIG_SENSORS_MAX6650=y +CONFIG_SENSORS_W83781D=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_NR_UARTS=4 +CONFIG_SERIAL_8250_RUNTIME_UARTS=4 +CONFIG_SPLIT_PTLOCK_CPUS=999999 +CONFIG_SRCU=y +CONFIG_SWIOTLB=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_UNCOMPRESS_INCLUDE="mach/uncompress.h" +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_VECTORS_BASE=0xffff0000 +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0x0 +CONFIG_ZBOOT_ROM_TEXT=0x0 diff --git a/target/linux/ixp4xx/patches-4.14/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch b/target/linux/ixp4xx/patches-4.14/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch new file mode 100644 index 0000000000..3ca3eb76a6 --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/001-arm-ixp4xx-set-cohorent_dma_mask-for-ethernet-platfo.patch @@ -0,0 +1,136 @@ +From 7113f56b683c5123df5c20724ac813cee66fa21a Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 1 Jul 2013 16:49:05 +0200 +Subject: [PATCH 1/2] arm: ixp4xx: set cohorent_dma_mask for ethernet platform + devices + +ARM requires the cohorent_dma_mask set, so set it for the platform +devices so that the ethernet driver has access to it. + +Signed-off-by: Jonas Gorski +--- + arch/arm/mach-ixp4xx/fsg-setup.c | 2 ++ + arch/arm/mach-ixp4xx/goramo_mlr.c | 2 ++ + arch/arm/mach-ixp4xx/ixdp425-setup.c | 3 +++ + arch/arm/mach-ixp4xx/nas100d-setup.c | 1 + + arch/arm/mach-ixp4xx/nslu2-setup.c | 1 + + arch/arm/mach-ixp4xx/omixp-setup.c | 3 +++ + arch/arm/mach-ixp4xx/vulcan-setup.c | 2 ++ + 7 files changed, 14 insertions(+) + +--- a/arch/arm/mach-ixp4xx/fsg-setup.c ++++ b/arch/arm/mach-ixp4xx/fsg-setup.c +@@ -142,12 +142,14 @@ static struct platform_device fsg_eth[] + .id = IXP4XX_ETH_NPEB, + .dev = { + .platform_data = fsg_plat_eth, ++ .coherent_dma_mask = DMA_BIT_MASK(32), + }, + }, { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev = { + .platform_data = fsg_plat_eth + 1, ++ .coherent_dma_mask = DMA_BIT_MASK(32), + }, + } + }; +--- a/arch/arm/mach-ixp4xx/goramo_mlr.c ++++ b/arch/arm/mach-ixp4xx/goramo_mlr.c +@@ -295,10 +295,12 @@ static struct platform_device device_eth + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev.platform_data = eth_plat, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + }, { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev.platform_data = eth_plat + 1, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + } + }; + +--- a/arch/arm/mach-ixp4xx/ixdp425-setup.c ++++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c +@@ -20,6 +20,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -196,10 +197,12 @@ static struct platform_device ixdp425_et + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev.platform_data = ixdp425_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + }, { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev.platform_data = ixdp425_plat_eth + 1, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + } + }; + +--- a/arch/arm/mach-ixp4xx/nas100d-setup.c ++++ b/arch/arm/mach-ixp4xx/nas100d-setup.c +@@ -170,6 +170,7 @@ static struct platform_device nas100d_et + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev.platform_data = nas100d_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + } + }; + +--- a/arch/arm/mach-ixp4xx/nslu2-setup.c ++++ b/arch/arm/mach-ixp4xx/nslu2-setup.c +@@ -182,6 +182,7 @@ static struct platform_device nslu2_eth[ + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev.platform_data = nslu2_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + } + }; + +--- a/arch/arm/mach-ixp4xx/omixp-setup.c ++++ b/arch/arm/mach-ixp4xx/omixp-setup.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + #include + + #include +@@ -188,10 +189,12 @@ static struct platform_device ixdp425_et + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEB, + .dev.platform_data = ixdp425_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + }, { + .name = "ixp4xx_eth", + .id = IXP4XX_ETH_NPEC, + .dev.platform_data = ixdp425_plat_eth + 1, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), + }, + }; + +--- a/arch/arm/mach-ixp4xx/vulcan-setup.c ++++ b/arch/arm/mach-ixp4xx/vulcan-setup.c +@@ -139,6 +139,7 @@ static struct platform_device vulcan_eth + .id = IXP4XX_ETH_NPEB, + .dev = { + .platform_data = &vulcan_plat_eth[0], ++ .coherent_dma_mask = DMA_BIT_MASK(32), + }, + }, + [1] = { +@@ -146,6 +147,7 @@ static struct platform_device vulcan_eth + .id = IXP4XX_ETH_NPEC, + .dev = { + .platform_data = &vulcan_plat_eth[1], ++ .coherent_dma_mask = DMA_BIT_MASK(32), + }, + }, + }; diff --git a/target/linux/ixp4xx/patches-4.14/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch b/target/linux/ixp4xx/patches-4.14/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch new file mode 100644 index 0000000000..b369b56f00 --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/002-ixp4xx_eth-use-parent-device-for-dma-allocations.patch @@ -0,0 +1,95 @@ +From 1d67040af0144c549f4db8144d2ccc253ff8639c Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Mon, 1 Jul 2013 16:39:28 +0200 +Subject: [PATCH 2/2] net: ixp4xx_eth: use parent device for dma allocations + +Now that the platfomr device provides a dma_cohorent_mask, use it for +dma operations. + +This fixes ethernet on ixp4xx which was broken since 3.7. + +Signed-off-by: Jonas Gorski +--- + drivers/net/ethernet/xscale/ixp4xx_eth.c | 23 ++++++++++++----------- + 1 file changed, 12 insertions(+), 11 deletions(-) + +--- a/drivers/net/ethernet/xscale/ixp4xx_eth.c ++++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c +@@ -656,10 +656,10 @@ static inline void queue_put_desc(unsign + static inline void dma_unmap_tx(struct port *port, struct desc *desc) + { + #ifdef __ARMEB__ +- dma_unmap_single(&port->netdev->dev, desc->data, ++ dma_unmap_single(port->netdev->dev.parent, desc->data, + desc->buf_len, DMA_TO_DEVICE); + #else +- dma_unmap_single(&port->netdev->dev, desc->data & ~3, ++ dma_unmap_single(port->netdev->dev.parent, desc->data & ~3, + ALIGN((desc->data & 3) + desc->buf_len, 4), + DMA_TO_DEVICE); + #endif +@@ -725,9 +725,9 @@ static int eth_poll(struct napi_struct * + + #ifdef __ARMEB__ + if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) { +- phys = dma_map_single(&dev->dev, skb->data, ++ phys = dma_map_single(dev->dev.parent, skb->data, + RX_BUFF_SIZE, DMA_FROM_DEVICE); +- if (dma_mapping_error(&dev->dev, phys)) { ++ if (dma_mapping_error(dev->dev.parent, phys)) { + dev_kfree_skb(skb); + skb = NULL; + } +@@ -750,10 +750,11 @@ static int eth_poll(struct napi_struct * + #ifdef __ARMEB__ + temp = skb; + skb = port->rx_buff_tab[n]; +- dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN, ++ dma_unmap_single(dev->dev.parent, desc->data - NET_IP_ALIGN, + RX_BUFF_SIZE, DMA_FROM_DEVICE); + #else +- dma_sync_single_for_cpu(&dev->dev, desc->data - NET_IP_ALIGN, ++ dma_sync_single_for_cpu(dev->dev.parent, ++ desc->data - NET_IP_ALIGN, + RX_BUFF_SIZE, DMA_FROM_DEVICE); + memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n], + ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4); +@@ -872,7 +873,7 @@ static int eth_xmit(struct sk_buff *skb, + memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4); + #endif + +- phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE); ++ phys = dma_map_single(dev->dev.parent, mem, bytes, DMA_TO_DEVICE); + if (dma_mapping_error(&dev->dev, phys)) { + dev_kfree_skb(skb); + #ifndef __ARMEB__ +@@ -1107,7 +1108,7 @@ static int init_queues(struct port *port + int i; + + if (!ports_open) { +- dma_pool = dma_pool_create(DRV_NAME, &port->netdev->dev, ++ dma_pool = dma_pool_create(DRV_NAME, port->netdev->dev.parent, + POOL_ALLOC_SIZE, 32, 0); + if (!dma_pool) + return -ENOMEM; +@@ -1135,9 +1136,9 @@ static int init_queues(struct port *port + data = buff; + #endif + desc->buf_len = MAX_MRU; +- desc->data = dma_map_single(&port->netdev->dev, data, ++ desc->data = dma_map_single(port->netdev->dev.parent, data, + RX_BUFF_SIZE, DMA_FROM_DEVICE); +- if (dma_mapping_error(&port->netdev->dev, desc->data)) { ++ if (dma_mapping_error(port->netdev->dev.parent, desc->data)) { + free_buffer(buff); + return -EIO; + } +@@ -1157,7 +1158,7 @@ static void destroy_queues(struct port * + struct desc *desc = rx_desc_ptr(port, i); + buffer_t *buff = port->rx_buff_tab[i]; + if (buff) { +- dma_unmap_single(&port->netdev->dev, ++ dma_unmap_single(port->netdev->dev.parent, + desc->data - NET_IP_ALIGN, + RX_BUFF_SIZE, DMA_FROM_DEVICE); + free_buffer(buff); diff --git a/target/linux/ixp4xx/patches-4.14/040-arm_mach_types.patch b/target/linux/ixp4xx/patches-4.14/040-arm_mach_types.patch new file mode 100644 index 0000000000..42c6955c2f --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/040-arm_mach_types.patch @@ -0,0 +1,19 @@ +--- a/arch/arm/tools/mach-types ++++ b/arch/arm/tools/mach-types +@@ -598,3 +598,16 @@ + remarkable MACH_REMARKABLE REMARKABLE 5106 + fa0113 MACH_FA0113 FA0113 5107 + innova_statnettawm MACH_INNOVA_STATNETTAWM INNOVA_STATNETTAWM 5108 ++wg302v1 MACH_WG302V1 WG302V1 889 ++pronghorn MACH_PRONGHORN PRONGHORN 928 ++pronghorn_metro MACH_PRONGHORNMETRO PRONGHORNMETRO 1040 ++sidewinder MACH_SIDEWINDER SIDEWINDER 1041 ++wrt300nv2 MACH_WRT300NV2 WRT300NV2 1077 ++compex42x MACH_COMPEXWP18 COMPEXWP18 1273 ++cambria MACH_CAMBRIA CAMBRIA 1468 ++ap1000 MACH_AP1000 AP1000 1543 ++tw2662 MACH_TW2662 TW2662 1658 ++tw5334 MACH_TW5334 TW5334 1664 ++usr8200 MACH_USR8200 USR8200 1762 ++mi424wr MACH_MI424WR MI424WR 1778 ++ap42x MACH_AP42X AP42X 4418 diff --git a/target/linux/ixp4xx/patches-4.14/090-increase_entropy_pools.patch b/target/linux/ixp4xx/patches-4.14/090-increase_entropy_pools.patch new file mode 100644 index 0000000000..9da213911e --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/090-increase_entropy_pools.patch @@ -0,0 +1,17 @@ +--- a/drivers/char/random.c ++++ b/drivers/char/random.c +@@ -279,11 +279,11 @@ + /* + * Configuration information + */ +-#define INPUT_POOL_SHIFT 12 ++#define INPUT_POOL_SHIFT 13 + #define INPUT_POOL_WORDS (1 << (INPUT_POOL_SHIFT-5)) +-#define OUTPUT_POOL_SHIFT 10 ++#define OUTPUT_POOL_SHIFT 11 + #define OUTPUT_POOL_WORDS (1 << (OUTPUT_POOL_SHIFT-5)) +-#define SEC_XFER_SIZE 512 ++#define SEC_XFER_SIZE 1024 + #define EXTRACT_SIZE 10 + + #define DEBUG_RANDOM_BOOT 0 diff --git a/target/linux/ixp4xx/patches-4.14/100-wg302v2_gateway7001_mac_plat_info.patch b/target/linux/ixp4xx/patches-4.14/100-wg302v2_gateway7001_mac_plat_info.patch new file mode 100644 index 0000000000..317103fdab --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/100-wg302v2_gateway7001_mac_plat_info.patch @@ -0,0 +1,78 @@ +--- a/arch/arm/mach-ixp4xx/gateway7001-setup.c ++++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c +@@ -17,6 +17,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -75,9 +76,37 @@ static struct platform_device gateway700 + .resource = &gateway7001_uart_resource, + }; + ++static struct eth_plat_info gateway7001_plat_eth[] = { ++ { ++ .phy = 1, ++ .rxq = 3, ++ .txreadyq = 20, ++ }, { ++ .phy = 2, ++ .rxq = 4, ++ .txreadyq = 21, ++ } ++}; ++ ++static struct platform_device gateway7001_eth[] = { ++ { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEB, ++ .dev.platform_data = gateway7001_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), ++ }, { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEC, ++ .dev.platform_data = gateway7001_plat_eth + 1, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), ++ } ++}; ++ + static struct platform_device *gateway7001_devices[] __initdata = { + &gateway7001_flash, +- &gateway7001_uart ++ &gateway7001_uart, ++ &gateway7001_eth[0], ++ &gateway7001_eth[1], + }; + + static void __init gateway7001_init(void) +--- a/arch/arm/mach-ixp4xx/wg302v2-setup.c ++++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c +@@ -76,9 +76,26 @@ static struct platform_device wg302v2_ua + .resource = &wg302v2_uart_resource, + }; + ++static struct eth_plat_info wg302v2_plat_eth[] = { ++ { ++ .phy = 8, ++ .rxq = 3, ++ .txreadyq = 20, ++ } ++}; ++ ++static struct platform_device wg302v2_eth[] = { ++ { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEB, ++ .dev.platform_data = wg302v2_plat_eth, ++ } ++}; ++ + static struct platform_device *wg302v2_devices[] __initdata = { + &wg302v2_flash, + &wg302v2_uart, ++ &wg302v2_eth[0], + }; + + static void __init wg302v2_init(void) diff --git a/target/linux/ixp4xx/patches-4.14/105-wg302v1_support.patch b/target/linux/ixp4xx/patches-4.14/105-wg302v1_support.patch new file mode 100644 index 0000000000..8793549c64 --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/105-wg302v1_support.patch @@ -0,0 +1,261 @@ +--- a/arch/arm/configs/ixp4xx_defconfig ++++ b/arch/arm/configs/ixp4xx_defconfig +@@ -13,6 +13,7 @@ CONFIG_MACH_AVILA=y + CONFIG_MACH_LOFT=y + CONFIG_ARCH_ADI_COYOTE=y + CONFIG_MACH_GATEWAY7001=y ++CONFIG_MACH_WG302V1=y + CONFIG_MACH_WG302V2=y + CONFIG_ARCH_IXDP425=y + CONFIG_MACH_IXDPG425=y +--- a/arch/arm/mach-ixp4xx/Kconfig ++++ b/arch/arm/mach-ixp4xx/Kconfig +@@ -45,6 +45,14 @@ config MACH_GATEWAY7001 + 7001 Access Point. For more information on this platform, + see http://openwrt.org + ++config MACH_WG302V1 ++ bool "Netgear WG302 v1 / WAG302 v1" ++ select PCI ++ help ++ Say 'Y' here if you want your kernel to support Netgear's ++ WG302 v1 or WAG302 v1 Access Points. For more information ++ on this platform, see http://openwrt.org ++ + config MACH_WG302V2 + bool "Netgear WG302 v2 / WAG302 v2" + select PCI +--- a/arch/arm/mach-ixp4xx/Makefile ++++ b/arch/arm/mach-ixp4xx/Makefile +@@ -15,6 +15,7 @@ obj-pci-$(CONFIG_MACH_NSLU2) += nslu2-p + obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o + obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o + obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o ++obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o + obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o + obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o + obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o +@@ -33,6 +34,7 @@ obj-$(CONFIG_MACH_NSLU2) += nslu2-setup. + obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o + obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o + obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o ++obj-$(CONFIG_MACH_WG302V1) += wg302v1-setup.o + obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o + obj-$(CONFIG_MACH_FSG) += fsg-setup.o + obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o +--- /dev/null ++++ b/arch/arm/mach-ixp4xx/wg302v1-pci.c +@@ -0,0 +1,63 @@ ++/* ++ * arch/arch/mach-ixp4xx/wg302v1-pci.c ++ * ++ * PCI setup routines for the Netgear WG302 v1 and WAG302 v1 ++ * ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * based on coyote-pci.c: ++ * Copyright (C) 2002 Jungo Software Technologies. ++ * Copyright (C) 2003 MontaVista Software, Inc. ++ * ++ * Maintainer: Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++void __init wg302v1_pci_preinit(void) ++{ ++ irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); ++ irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); ++ ++ ixp4xx_pci_preinit(); ++} ++ ++static int __init wg302v1_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ if (slot == 1) ++ return IRQ_IXP4XX_GPIO8; ++ else if (slot == 2) ++ return IRQ_IXP4XX_GPIO10; ++ else ++ return -1; ++} ++ ++struct hw_pci wg302v1_pci __initdata = { ++ .nr_controllers = 1, ++ .preinit = wg302v1_pci_preinit, ++ .ops = &ixp4xx_ops, ++ .setup = ixp4xx_setup, ++ .map_irq = wg302v1_map_irq, ++}; ++ ++int __init wg302v1_pci_init(void) ++{ ++ if (machine_is_wg302v1()) ++ pci_common_init(&wg302v1_pci); ++ return 0; ++} ++ ++subsys_initcall(wg302v1_pci_init); +--- /dev/null ++++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c +@@ -0,0 +1,147 @@ ++/* ++ * arch/arm/mach-ixp4xx/wg302v1-setup.c ++ * ++ * Board setup for the Netgear WG302 v1 and WAG302 v1 ++ * ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * based on coyote-setup.c: ++ * Copyright (C) 2003-2005 MontaVista Software, Inc. ++ * ++ * Author: Imre Kaloz ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct flash_platform_data wg302v1_flash_data = { ++ .map_name = "cfi_probe", ++ .width = 2, ++}; ++ ++static struct resource wg302v1_flash_resource = { ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct platform_device wg302v1_flash = { ++ .name = "IXP4XX-Flash", ++ .id = 0, ++ .dev = { ++ .platform_data = &wg302v1_flash_data, ++ }, ++ .num_resources = 1, ++ .resource = &wg302v1_flash_resource, ++}; ++ ++static struct resource wg302v1_uart_resources[] = { ++ { ++ .start = IXP4XX_UART1_BASE_PHYS, ++ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .start = IXP4XX_UART2_BASE_PHYS, ++ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, ++ .flags = IORESOURCE_MEM, ++ } ++}; ++ ++static struct plat_serial8250_port wg302v1_uart_data[] = { ++ { ++ .mapbase = IXP4XX_UART1_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART1, ++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, ++ .iotype = UPIO_MEM, ++ .regshift = 2, ++ .uartclk = IXP4XX_UART_XTAL, ++ }, ++ { ++ .mapbase = IXP4XX_UART2_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART2, ++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, ++ .iotype = UPIO_MEM, ++ .regshift = 2, ++ .uartclk = IXP4XX_UART_XTAL, ++ }, ++ { }, ++}; ++ ++static struct platform_device wg302v1_uart = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM, ++ .dev = { ++ .platform_data = wg302v1_uart_data, ++ }, ++ .num_resources = 2, ++ .resource = wg302v1_uart_resources, ++}; ++ ++static struct eth_plat_info wg302v1_plat_eth[] = { ++ { ++ .phy = 30, ++ .rxq = 3, ++ .txreadyq = 20, ++ } ++}; ++ ++static struct platform_device wg302v1_eth[] = { ++ { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEB, ++ .dev.platform_data = wg302v1_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), ++ } ++}; ++ ++static struct platform_device *wg302v1_devices[] __initdata = { ++ &wg302v1_flash, ++ &wg302v1_uart, ++ &wg302v1_eth[0], ++}; ++ ++static void __init wg302v1_init(void) ++{ ++ ixp4xx_sys_init(); ++ ++ wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); ++ wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; ++ ++ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; ++ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; ++ ++ platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices)); ++} ++ ++#ifdef CONFIG_MACH_WG302V1 ++MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1") ++ /* Maintainer: Imre Kaloz */ ++ .fixup = wg302v1_fixup, ++ .map_io = ixp4xx_map_io, ++ .init_irq = ixp4xx_init_irq, ++ .init_time = ixp4xx_timer_init, ++ .atag_offset = 0x0100, ++ .init_machine = wg302v1_init, ++#if defined(CONFIG_PCI) ++ .dma_zone_size = SZ_64M, ++#endif ++ .restart = ixp4xx_restart, ++MACHINE_END ++#endif diff --git a/target/linux/ixp4xx/patches-4.14/110-pronghorn_series_support.patch b/target/linux/ixp4xx/patches-4.14/110-pronghorn_series_support.patch new file mode 100644 index 0000000000..d1fdfcba49 --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/110-pronghorn_series_support.patch @@ -0,0 +1,393 @@ +--- a/arch/arm/configs/ixp4xx_defconfig ++++ b/arch/arm/configs/ixp4xx_defconfig +@@ -15,6 +15,8 @@ CONFIG_ARCH_ADI_COYOTE=y + CONFIG_MACH_GATEWAY7001=y + CONFIG_MACH_WG302V1=y + CONFIG_MACH_WG302V2=y ++CONFIG_MACH_PRONGHORN=y ++CONFIG_MACH_PRONGHORNMETRO=y + CONFIG_ARCH_IXDP425=y + CONFIG_MACH_IXDPG425=y + CONFIG_MACH_IXDP465=y +--- a/arch/arm/mach-ixp4xx/Kconfig ++++ b/arch/arm/mach-ixp4xx/Kconfig +@@ -61,6 +61,22 @@ config MACH_WG302V2 + WG302 v2 or WAG302 v2 Access Points. For more information + on this platform, see http://openwrt.org + ++config MACH_PRONGHORN ++ bool "ADI Pronghorn series" ++ select PCI ++ help ++ Say 'Y' here if you want your kernel to support the ADI ++ Engineering Pronghorn series. For more ++ information on this platform, see http://www.adiengineering.com ++ ++# ++# There're only minimal differences kernel-wise between the Pronghorn and ++# Pronghorn Metro boards - they use different chip selects to drive the ++# CF slot connected to the expansion bus, so we just enable them together. ++# ++config MACH_PRONGHORNMETRO ++ def_bool MACH_PRONGHORN ++ + config ARCH_IXDP425 + bool "IXDP425" + help +--- a/arch/arm/mach-ixp4xx/Makefile ++++ b/arch/arm/mach-ixp4xx/Makefile +@@ -19,6 +19,7 @@ obj-pci-$(CONFIG_MACH_WG302V1) += wg302 + obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o + obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o + obj-pci-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-pci.o ++obj-pci-$(CONFIG_MACH_PRONGHORN) += pronghorn-pci.o + + obj-y += common.o + +@@ -39,6 +40,7 @@ obj-$(CONFIG_MACH_WG302V2) += wg302v2-se + obj-$(CONFIG_MACH_FSG) += fsg-setup.o + obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_mlr.o + obj-$(CONFIG_MACH_ARCOM_VULCAN) += vulcan-setup.o ++obj-$(CONFIG_MACH_PRONGHORN) += pronghorn-setup.o + + obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o + obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o +--- a/arch/arm/mach-ixp4xx/include/mach/uncompress.h ++++ b/arch/arm/mach-ixp4xx/include/mach/uncompress.h +@@ -42,7 +42,8 @@ static __inline__ void __arch_decomp_set + */ + if (machine_is_adi_coyote() || machine_is_gtwx5715() || + machine_is_gateway7001() || machine_is_wg302v2() || +- machine_is_devixp() || machine_is_miccpt() || machine_is_mic256()) ++ machine_is_devixp() || machine_is_miccpt() || machine_is_mic256() || ++ machine_is_pronghorn() || machine_is_pronghorn_metro()) + uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS; + else + uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS; +--- /dev/null ++++ b/arch/arm/mach-ixp4xx/pronghorn-pci.c +@@ -0,0 +1,69 @@ ++/* ++ * arch/arch/mach-ixp4xx/pronghorn-pci.c ++ * ++ * PCI setup routines for ADI Engineering Pronghorn series ++ * ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * based on coyote-pci.c: ++ * Copyright (C) 2002 Jungo Software Technologies. ++ * Copyright (C) 2003 MontaVista Softwrae, Inc. ++ * ++ * Maintainer: Imre Kaloz ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++#include ++ ++void __init pronghorn_pci_preinit(void) ++{ ++ irq_set_irq_type(IRQ_IXP4XX_GPIO4, IRQ_TYPE_LEVEL_LOW); ++ irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); ++ irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); ++ irq_set_irq_type(IRQ_IXP4XX_GPIO1, IRQ_TYPE_LEVEL_LOW); ++ ++ ixp4xx_pci_preinit(); ++} ++ ++static int __init pronghorn_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ if (slot == 13) ++ return IRQ_IXP4XX_GPIO4; ++ else if (slot == 14) ++ return IRQ_IXP4XX_GPIO6; ++ else if (slot == 15) ++ return IRQ_IXP4XX_GPIO11; ++ else if (slot == 16) ++ return IRQ_IXP4XX_GPIO1; ++ else ++ return -1; ++} ++ ++struct hw_pci pronghorn_pci __initdata = { ++ .nr_controllers = 1, ++ .preinit = pronghorn_pci_preinit, ++ .ops = &ixp4xx_ops, ++ .setup = ixp4xx_setup, ++ .map_irq = pronghorn_map_irq, ++}; ++ ++int __init pronghorn_pci_init(void) ++{ ++ if (machine_is_pronghorn() || machine_is_pronghorn_metro()) ++ pci_common_init(&pronghorn_pci); ++ return 0; ++} ++ ++subsys_initcall(pronghorn_pci_init); +--- /dev/null ++++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c +@@ -0,0 +1,252 @@ ++/* ++ * arch/arm/mach-ixp4xx/pronghorn-setup.c ++ * ++ * Board setup for the ADI Engineering Pronghorn series ++ * ++ * Copyright (C) 2008 Imre Kaloz ++ * ++ * based on coyote-setup.c: ++ * Copyright (C) 2003-2005 MontaVista Software, Inc. ++ * ++ * Author: Imre Kaloz ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++static struct flash_platform_data pronghorn_flash_data = { ++ .map_name = "cfi_probe", ++ .width = 2, ++}; ++ ++static struct resource pronghorn_flash_resource = { ++ .flags = IORESOURCE_MEM, ++}; ++ ++static struct platform_device pronghorn_flash = { ++ .name = "IXP4XX-Flash", ++ .id = 0, ++ .dev = { ++ .platform_data = &pronghorn_flash_data, ++ }, ++ .num_resources = 1, ++ .resource = &pronghorn_flash_resource, ++}; ++ ++static struct resource pronghorn_uart_resources [] = { ++ { ++ .start = IXP4XX_UART1_BASE_PHYS, ++ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, ++ .flags = IORESOURCE_MEM ++ }, ++ { ++ .start = IXP4XX_UART2_BASE_PHYS, ++ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, ++ .flags = IORESOURCE_MEM ++ } ++}; ++ ++static struct plat_serial8250_port pronghorn_uart_data[] = { ++ { ++ .mapbase = IXP4XX_UART1_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART1, ++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, ++ .iotype = UPIO_MEM, ++ .regshift = 2, ++ .uartclk = IXP4XX_UART_XTAL, ++ }, ++ { ++ .mapbase = IXP4XX_UART2_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART2, ++ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, ++ .iotype = UPIO_MEM, ++ .regshift = 2, ++ .uartclk = IXP4XX_UART_XTAL, ++ }, ++ { }, ++}; ++ ++static struct platform_device pronghorn_uart = { ++ .name = "serial8250", ++ .id = PLAT8250_DEV_PLATFORM, ++ .dev = { ++ .platform_data = pronghorn_uart_data, ++ }, ++ .num_resources = 2, ++ .resource = pronghorn_uart_resources, ++}; ++ ++static struct i2c_gpio_platform_data pronghorn_i2c_gpio_data = { ++ .sda_pin = 9, ++ .scl_pin = 10, ++}; ++ ++static struct platform_device pronghorn_i2c_gpio = { ++ .name = "i2c-gpio", ++ .id = 0, ++ .dev = { ++ .platform_data = &pronghorn_i2c_gpio_data, ++ }, ++}; ++ ++static struct gpio_led pronghorn_led_pin[] = { ++ { ++ .name = "pronghorn:green:status", ++ .gpio = 7, ++ } ++}; ++ ++static struct gpio_led_platform_data pronghorn_led_data = { ++ .num_leds = 1, ++ .leds = pronghorn_led_pin, ++}; ++ ++static struct platform_device pronghorn_led = { ++ .name = "leds-gpio", ++ .id = -1, ++ .dev.platform_data = &pronghorn_led_data, ++}; ++ ++static struct resource pronghorn_pata_resources[] = { ++ { ++ .flags = IORESOURCE_MEM ++ }, ++ { ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .name = "intrq", ++ .start = IRQ_IXP4XX_GPIO0, ++ .end = IRQ_IXP4XX_GPIO0, ++ .flags = IORESOURCE_IRQ, ++ }, ++}; ++ ++static struct ixp4xx_pata_data pronghorn_pata_data = { ++ .cs0_bits = 0xbfff0043, ++ .cs1_bits = 0xbfff0043, ++}; ++ ++static struct platform_device pronghorn_pata = { ++ .name = "pata_ixp4xx_cf", ++ .id = 0, ++ .dev.platform_data = &pronghorn_pata_data, ++ .num_resources = ARRAY_SIZE(pronghorn_pata_resources), ++ .resource = pronghorn_pata_resources, ++}; ++ ++static struct eth_plat_info pronghorn_plat_eth[] = { ++ { ++ .phy = 0, ++ .rxq = 3, ++ .txreadyq = 20, ++ }, { ++ .phy = 1, ++ .rxq = 4, ++ .txreadyq = 21, ++ } ++}; ++ ++static struct platform_device pronghorn_eth[] = { ++ { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEB, ++ .dev.platform_data = pronghorn_plat_eth, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), ++ }, { ++ .name = "ixp4xx_eth", ++ .id = IXP4XX_ETH_NPEC, ++ .dev.platform_data = pronghorn_plat_eth + 1, ++ .dev.coherent_dma_mask = DMA_BIT_MASK(32), ++ } ++}; ++ ++static struct platform_device *pronghorn_devices[] __initdata = { ++ &pronghorn_flash, ++ &pronghorn_uart, ++ &pronghorn_led, ++ &pronghorn_eth[0], ++ &pronghorn_eth[1], ++}; ++ ++static void __init pronghorn_init(void) ++{ ++ ixp4xx_sys_init(); ++ ++ pronghorn_flash_resource.start = IXP4XX_EXP_BUS_BASE(0); ++ pronghorn_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1; ++ ++ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE; ++ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0; ++ ++ platform_add_devices(pronghorn_devices, ARRAY_SIZE(pronghorn_devices)); ++ ++ if (machine_is_pronghorn()) { ++ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(2); ++ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(2); ++ ++ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(3); ++ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(3); ++ ++ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS2; ++ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS3; ++ } else { ++ pronghorn_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(3); ++ pronghorn_pata_resources[0].end = IXP4XX_EXP_BUS_END(3); ++ ++ pronghorn_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(4); ++ pronghorn_pata_resources[1].end = IXP4XX_EXP_BUS_END(4); ++ ++ pronghorn_pata_data.cs0_cfg = IXP4XX_EXP_CS3; ++ pronghorn_pata_data.cs1_cfg = IXP4XX_EXP_CS4; ++ ++ platform_device_register(&pronghorn_i2c_gpio); ++ } ++ ++ platform_device_register(&pronghorn_pata); ++} ++ ++MACHINE_START(PRONGHORN, "ADI Engineering Pronghorn") ++ /* Maintainer: Imre Kaloz */ ++ .map_io = ixp4xx_map_io, ++ .init_irq = ixp4xx_init_irq, ++ .init_time = ixp4xx_timer_init, ++ .atag_offset = 0x0100, ++ .init_machine = pronghorn_init, ++#if defined(CONFIG_PCI) ++ .dma_zone_size = SZ_64M, ++#endif ++ .restart = ixp4xx_restart, ++MACHINE_END ++ ++MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro") ++ /* Maintainer: Imre Kaloz */ ++ .map_io = ixp4xx_map_io, ++ .init_irq = ixp4xx_init_irq, ++ .init_time = ixp4xx_timer_init, ++ .atag_offset = 0x0100, ++ .init_machine = pronghorn_init, ++#if defined(CONFIG_PCI) ++ .dma_zone_size = SZ_64M, ++#endif ++ .restart = ixp4xx_restart, ++MACHINE_END diff --git a/target/linux/ixp4xx/patches-4.14/111-pronghorn_swap_uarts.patch b/target/linux/ixp4xx/patches-4.14/111-pronghorn_swap_uarts.patch new file mode 100644 index 0000000000..ed9f7a785d --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/111-pronghorn_swap_uarts.patch @@ -0,0 +1,44 @@ +--- a/arch/arm/mach-ixp4xx/pronghorn-setup.c ++++ b/arch/arm/mach-ixp4xx/pronghorn-setup.c +@@ -52,31 +52,31 @@ static struct platform_device pronghorn_ + + static struct resource pronghorn_uart_resources [] = { + { +- .start = IXP4XX_UART1_BASE_PHYS, +- .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, ++ .start = IXP4XX_UART2_BASE_PHYS, ++ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM + }, + { +- .start = IXP4XX_UART2_BASE_PHYS, +- .end = IXP4XX_UART2_BASE_PHYS + 0x0fff, ++ .start = IXP4XX_UART1_BASE_PHYS, ++ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff, + .flags = IORESOURCE_MEM + } + }; + + static struct plat_serial8250_port pronghorn_uart_data[] = { + { +- .mapbase = IXP4XX_UART1_BASE_PHYS, +- .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, +- .irq = IRQ_IXP4XX_UART1, ++ .mapbase = IXP4XX_UART2_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART2, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, + .uartclk = IXP4XX_UART_XTAL, + }, + { +- .mapbase = IXP4XX_UART2_BASE_PHYS, +- .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET, +- .irq = IRQ_IXP4XX_UART2, ++ .mapbase = IXP4XX_UART1_BASE_PHYS, ++ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET, ++ .irq = IRQ_IXP4XX_UART1, + .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, + .iotype = UPIO_MEM, + .regshift = 2, diff --git a/target/linux/ixp4xx/patches-4.14/162-wg302v1_mem_fixup.patch b/target/linux/ixp4xx/patches-4.14/162-wg302v1_mem_fixup.patch new file mode 100644 index 0000000000..efa389d786 --- /dev/null +++ b/target/linux/ixp4xx/patches-4.14/162-wg302v1_mem_fixup.patch @@ -0,0 +1,37 @@ +--- a/arch/arm/mach-ixp4xx/wg302v1-setup.c ++++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c +@@ -117,6 +117,34 @@ static struct platform_device *wg302v1_d + &wg302v1_eth[0], + }; + ++static char wg302v1_mem_fixup[] __initdata = " mem=32M"; ++ ++static void __init wg302v1_fixup(struct tag *tags, char **cmdline) ++{ ++ struct tag *t = tags; ++ char *p = *cmdline; ++ size_t fixlen, cmdlen; ++ ++ /* Find the end of the tags table, taking note of any cmdline tag. */ ++ for (; t->hdr.size; t = tag_next(t)) { ++ if (t->hdr.tag == ATAG_CMDLINE) { ++ p = t->u.cmdline.cmdline; ++ } ++ } ++ ++ fixlen = strlen(wg302v1_mem_fixup); ++ cmdlen = strlen(p); ++ if (fixlen + cmdlen >= COMMAND_LINE_SIZE) ++ return; ++ ++ /* append the fixup to the cmdline */ ++ memmove(p + cmdlen, wg302v1_mem_fixup, fixlen + 1); ++ ++ /* Adjust the size of the atag if there was one */ ++ if (t->hdr.size) ++ t->hdr.size += fixlen; ++} ++ + static void __init wg302v1_init(void) + { + ixp4xx_sys_init();