From: Daniel Golle Date: Thu, 6 Feb 2020 18:02:25 +0000 (+0200) Subject: ath79: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b439d3bfb5bf6e5cc1e2ad5b7a086eb46995eeaf;p=openwrt%2Fstaging%2Fstintel.git ath79: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE On AR934x this UART is usually not initialized by the bootloader as it is only used as a secondary serial port while the primary UART is a newly introduced NS16550-compatible. In order to make use of the ar933x-uart on AR934x without RTS/CTS hardware flow control, one needs to set the UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this UART is used as primary/console, the bootloader on AR934x typically doesn't set those bits. Setting them explicitely on AR933x does not do any harm, so just set them unconditionally. Tested-by: Chuanhong Guo --- diff --git a/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch b/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch new file mode 100644 index 0000000000..2ed520683e --- /dev/null +++ b/target/linux/ath79/patches-4.19/0060-serial-ar933x_uart-set-UART_CS_-RX-TX-_READY_ORIDE.patch @@ -0,0 +1,64 @@ +From patchwork Fri Feb 7 09:53:35 2020 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Daniel Golle +X-Patchwork-Id: 1190470 +Date: Fri, 7 Feb 2020 11:53:35 +0200 +From: Daniel Golle +To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org +Cc: Greg Kroah-Hartman , + Jiri Slaby , + Chuanhong Guo , + Eitan Cohen , + Ori Gofen +Subject: [PATCH] serial: ar933x_uart: set UART_CS_{RX,TX}_READY_ORIDE +Message-ID: <20200207095335.GA179836@makrotopia.org> +MIME-Version: 1.0 +Content-Disposition: inline +Sender: linux-kernel-owner@vger.kernel.org +Precedence: bulk +List-ID: +X-Mailing-List: linux-kernel@vger.kernel.org + +On AR934x this UART is usually not initialized by the bootloader +as it is only used as a secondary serial port while the primary +UART is a newly introduced NS16550-compatible. +In order to make use of the ar933x-uart on AR934x without RTS/CTS +hardware flow control, one needs to set the +UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this +UART is used as primary/console, the bootloader on AR934x typically +doesn't set those bits. +Setting them explicitely on AR933x should not do any harm, so just +set them unconditionally. + +Tested-by: Chuanhong Guo +Signed-off-by: Daniel Golle +--- + drivers/tty/serial/ar933x_uart.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/tty/serial/ar933x_uart.c ++++ b/drivers/tty/serial/ar933x_uart.c +@@ -328,6 +328,10 @@ static void ar933x_uart_set_termios(stru + ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, + AR933X_UART_CS_HOST_INT_EN); + ++ /* enable RX and TX ready overide */ ++ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, ++ AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); ++ + /* reenable the UART */ + ar933x_uart_rmw(up, AR933X_UART_CS_REG, + AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S, +@@ -460,6 +464,10 @@ static int ar933x_uart_startup(struct ua + ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, + AR933X_UART_CS_HOST_INT_EN); + ++ /* enable RX and TX ready overide */ ++ ar933x_uart_rmw_set(up, AR933X_UART_CS_REG, ++ AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); ++ + /* Enable RX interrupts */ + up->ier = AR933X_UART_INT_RX_VALID; + ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);