From: Luis Araneda Date: Thu, 19 Oct 2017 03:18:41 +0000 (-0300) Subject: sunxi: add support for NanoPi M1 Plus board X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b31c1237c749b927d296f18c16894f162abccd30;p=openwrt%2Fstaging%2Frmilecki.git sunxi: add support for NanoPi M1 Plus board Backported devicetree from Kernel 4.13 with some additions to enable Ethernet and WiFi module The following features are working: - Ethernet - WiFi - eMMC and microSD slot - USB ports The following features are not working: * Bluetooth NanoPi M1 Plus key features - SoC: Allwinner H3, Quad-core Cortex-A7@1.2GHz - RAM: 1GB DDR3 - eMMC: 8GB - microSD slot - Ethernet 10/100/1000M - Wifi: AP6212 Signed-off-by: Luis Araneda --- diff --git a/target/linux/sunxi/image/cortex-a7.mk b/target/linux/sunxi/image/cortex-a7.mk index d219a1d097a..229b055e688 100644 --- a/target/linux/sunxi/image/cortex-a7.mk +++ b/target/linux/sunxi/image/cortex-a7.mk @@ -118,6 +118,18 @@ endef TARGET_DEVICES += sun8i-h2-plus-orangepi-r1 +define Device/sun8i-h3-nanopi-m1-plus + DEVICE_TITLE:=FriendlyArm NanoPi M1 Plus + DEVICE_PACKAGES:=kmod-rtc-sunxi \ + kmod-leds-gpio kmod-ledtrig-heartbeat \ + kmod-brcmfmac brcmfmac-firmware-43430-sdio wpad-mini + SUPPORTED_DEVICES:=friendlyarm,nanopi-m1-plus + SUNXI_DTS:=sun8i-h3-nanopi-m1-plus +endef + +TARGET_DEVICES += sun8i-h3-nanopi-m1-plus + + define Device/sun8i-h3-nanopi-neo DEVICE_TITLE:=FriendlyARM NanoPi NEO SUPPORTED_DEVICES:=friendlyarm,nanopi-neo diff --git a/target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch b/target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch new file mode 100644 index 00000000000..c304f7937f3 --- /dev/null +++ b/target/linux/sunxi/patches-4.9/0045-arm-dts-sun8i-add-common-dtsi-file-for-nanopi-SBCs.patch @@ -0,0 +1,160 @@ +From 49f01c9e14b3476cbdf9623c4812c43f6485830b Mon Sep 17 00:00:00 2001 +From: Milo Kim +Date: Fri, 28 Oct 2016 15:59:01 +0900 +Subject: ARM: dts: sun8i: Add common dtsi file for NanoPi SBCs + +(backported from kernel 4.13) + +This patch provides a common file for NanoPi M1 and Neo SBC. + +Those have common features below. + * UART0 + * 2 LEDs + * USB host (EHCI3, OHCI3) and PHY + * MicroSD + * GPIO key switch + +Cc: James Pettigrew +Signed-off-by: Milo Kim +Signed-off-by: Maxime Ripard + +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi.dtsi +@@ -0,0 +1,137 @@ ++/* ++ * Copyright (C) 2016 James Pettigrew ++ * Copyright (C) 2016 Milo Kim ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include ++#include ++ ++/ { ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&leds_npi>, <&leds_r_npi>; ++ ++ status { ++ label = "nanopi:blue:status"; ++ gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ ++ pwr { ++ label = "nanopi:green:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; ++ default-state = "on"; ++ }; ++ }; ++ ++ r_gpio_keys { ++ compatible = "gpio-keys"; ++ input-name = "k1"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sw_r_npi>; ++ ++ k1@0 { ++ label = "k1"; ++ linux,code = ; ++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&mmc0 { ++ bus-width = <4>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; ++ cd-inverted; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc0_pins_a>, <&mmc0_cd_pin>; ++ status = "okay"; ++ vmmc-supply = <®_vcc3v3>; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&pio { ++ leds_npi: led_pins@0 { ++ pins = "PA10"; ++ function = "gpio_out"; ++ }; ++}; ++ ++&r_pio { ++ leds_r_npi: led_pins@0 { ++ pins = "PL10"; ++ function = "gpio_out"; ++ }; ++ ++ sw_r_npi: key_pins@0 { ++ pins = "PL3"; ++ function = "gpio_in"; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pins_a>; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-4.9/205-arm-dts-sun8i-add-support-for-nanopi-m1-plus-board.patch b/target/linux/sunxi/patches-4.9/205-arm-dts-sun8i-add-support-for-nanopi-m1-plus-board.patch new file mode 100644 index 00000000000..d0ee8edd14a --- /dev/null +++ b/target/linux/sunxi/patches-4.9/205-arm-dts-sun8i-add-support-for-nanopi-m1-plus-board.patch @@ -0,0 +1,168 @@ +From 2ed2388bc0c5b7d04c7b079d673ce61a0333c818 Mon Sep 17 00:00:00 2001 +From: Jagan Teki +Date: Tue, 30 May 2017 17:42:50 +0000 +Subject: ARM: dts: sun8i: h3: Add initial NanoPi M1 Plus support + +Backported support from kernel 4.13 with the following changes: +- Added WiFi node +- Added Ethernet node +- Added eMMC node + +Original commit message: +NanoPi M1 Plus is designed and developed by FriendlyElec +for professionals, enterprise users, makers and hobbyists +using the Allwinner H3 SOC. + +NanoPi M1 Plus key features +- Allwinner H3, Quad-core Cortex-A7@1.2GHz +- 1GB DDR3 RAM +- 8GB eMMC +- microSD slot +- 10/100/1000M Ethernet +- Serial Debug Port +- 5V 2A DC power-supply + +Signed-off-by: Jagan Teki +Signed-off-by: Maxime Ripard +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -821,6 +821,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-a83t-cubietruck-plus.dtb \ + sun8i-h2-plus-orangepi-r1.dtb \ + sun8i-h3-bananapi-m2-plus.dtb \ ++ sun8i-h3-nanopi-m1-plus.dtb \ + sun8i-h3-nanopi-neo.dtb \ + sun8i-h3-orangepi-2.dtb \ + sun8i-h3-orangepi-lite.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts +@@ -0,0 +1,129 @@ ++/* ++ * Copyright (C) 2017 Jagan Teki ++ * ++ * This file is dual-licensed: you can use it either under the terms ++ * of the GPL or the X11 license, at your option. Note that this dual ++ * licensing only applies to this file, and not this project as a ++ * whole. ++ * ++ * a) This file is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This file is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * Or, alternatively, ++ * ++ * b) Permission is hereby granted, free of charge, to any person ++ * obtaining a copy of this software and associated documentation ++ * files (the "Software"), to deal in the Software without ++ * restriction, including without limitation the rights to use, ++ * copy, modify, merge, publish, distribute, sublicense, and/or ++ * sell copies of the Software, and to permit persons to whom the ++ * Software is furnished to do so, subject to the following ++ * conditions: ++ * ++ * The above copyright notice and this permission notice shall be ++ * included in all copies or substantial portions of the Software. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, ++ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES ++ * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND ++ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT ++ * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, ++ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING ++ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR ++ * OTHER DEALINGS IN THE SOFTWARE. ++ */ ++ ++#include "sun8i-h3-nanopi.dtsi" ++ ++/ { ++ model = "FriendlyArm NanoPi M1 Plus"; ++ compatible = "friendlyarm,nanopi-m1-plus", "allwinner,sun8i-h3"; ++ ++ aliases { ++ ethernet0 = &emac; ++ }; ++ ++ pwrseq_wifi: pwrseq0 { ++ compatible = "mmc-pwrseq-simple"; ++ pinctrl-names = "default"; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ }; ++ ++ reg_gmac_3v3: gmac-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "gmac-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ startup-delay-us = <100000>; ++ enable-active-high; ++ gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>; /* PD6 */ ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&emac { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&emac_rgmii_pins>; ++ phy-supply = <®_gmac_3v3>; ++ phy-handle = <&ext_rgmii_phy>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++&mdio { ++ ext_rgmii_phy: ethernet-phy@7 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <7>; ++ }; ++}; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins_a>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&pwrseq_wifi>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&pio>; ++ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc2_8bit_pins>; ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ bus-width = <8>; ++ non-removable; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++};