From: John Crispin Date: Wed, 23 Mar 2016 12:52:17 +0000 (+0000) Subject: Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x" X-Git-Tag: reboot~155 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b269a3520d4e9e7855e383d0c0ad750d446d42e5;p=openwrt%2Fstaging%2Flynxis.git Revert "ar71xx: Allow to set the RXDV, RXD, TXD, TXE delays for QCA955x" The default delays RXD 3. RDV 3, TXD 0, TXE 0 doesn't seem to work for some boards. These boards depend on the preset values of u-boot which may differ. This reverts commit f2d4bb96b62512caa161dcc2867c91692fb16a38. Signed-off-by: Sven Eckelmann SVN-Revision: 49071 --- diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c index 6445023ec4..2f2825f945 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c @@ -830,9 +830,7 @@ void __init ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, iounmap(base); } -void __init ath79_setup_qca955x_eth_cfg(u32 mask, - unsigned int rxd, unsigned int rxdv, - unsigned int txd, unsigned int txe) +void __init ath79_setup_qca955x_eth_cfg(u32 mask) { void __iomem *base; u32 t, m; @@ -847,10 +845,6 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask, QCA955X_ETH_CFG_RMII_GE0 | QCA955X_ETH_CFG_MII_CNTL_SPEED | QCA955X_ETH_CFG_RMII_GE0_MASTER; - m |= QCA955X_ETH_CFG_RXD_DELAY_MASK << QCA955X_ETH_CFG_RXD_DELAY_SHIFT; - m |= QCA955X_ETH_CFG_RDV_DELAY_MASK << QCA955X_ETH_CFG_RDV_DELAY_SHIFT; - m |= QCA955X_ETH_CFG_TXD_DELAY_MASK << QCA955X_ETH_CFG_TXD_DELAY_SHIFT; - m |= QCA955X_ETH_CFG_TXE_DELAY_MASK << QCA955X_ETH_CFG_TXE_DELAY_SHIFT; base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE); @@ -858,10 +852,6 @@ void __init ath79_setup_qca955x_eth_cfg(u32 mask, t &= ~m; t |= mask; - t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT; - t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT; - t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT; - t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT; __raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h index 3908750318..5a226e4028 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h +++ b/target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h @@ -48,7 +48,6 @@ void ath79_register_mdio(unsigned int id, u32 phy_mask); void ath79_setup_ar933x_phy4_switch(bool mac, bool mdio); void ath79_setup_ar934x_eth_cfg(u32 mask); void ath79_setup_ar934x_eth_rx_delay(unsigned int rxd, unsigned int rxdv); -void ath79_setup_qca955x_eth_cfg(u32 mask, unsigned int rxd, unsigned int rxdv, - unsigned int txd, unsigned int txe); +void ath79_setup_qca955x_eth_cfg(u32 mask); #endif /* _ATH79_DEV_ETH_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c index ca882cd830..fc1251303e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-archer-c7.c @@ -211,7 +211,7 @@ static void __init common_setup(bool pcie_slot) ARRAY_SIZE(archer_c7_mdio0_info)); ath79_register_mdio(0, 0x0); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c index d89d4c4746..3d60afc408 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-epg5000.c @@ -149,7 +149,7 @@ static void __init epg5000_setup(void) ath79_register_usb(); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c index ef8abb8da0..2a34b3a2e9 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr1750.c @@ -148,7 +148,7 @@ static void __init esr1750_setup(void) ath79_register_usb(); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c index dd07248f38..aa2e7f7f4e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-esr900.c @@ -170,7 +170,7 @@ static void __init esr900_setup(void) ath79_register_wmac(art + ESR900_WMAC_CALDATA_OFFSET, wlan0_mac); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c index c1f56790b9..69d005d795 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-f9k1115v2.c @@ -152,7 +152,7 @@ static void __init f9k1115v2_setup(void) mdiobus_register_board_info(f9k1115v2_mdio0_info, ARRAY_SIZE(f9k1115v2_mdio0_info)); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_init_mac(ath79_eth0_data.mac_addr, art + F9K1115V2_WAN_MAC_OFFSET, 0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c index 215dd55d39..a24cb3fce6 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-mr18.c @@ -253,8 +253,9 @@ static void __init mr18_setup(void) res = mr18_extract_sgmii_res_cal(); if (res >= 0) { /* Setup SoC Eth Config */ - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, - 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN | + (3 << QCA955X_ETH_CFG_RXD_DELAY_SHIFT) | + (3 << QCA955X_ETH_CFG_RDV_DELAY_SHIFT)); /* MDIO Interface */ ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c index 3555c9b6d2..c28a8a5118 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-nbg6716.c @@ -287,7 +287,7 @@ static void __init nbg6716_common_setup(u32 leds_num, struct gpio_led* leds, ath79_register_wmac(art + NBG6716_WMAC_CALDATA_OFFSET, tmpmac); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c index 986bfd274e..c88c522b80 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-rb922.c @@ -203,7 +203,7 @@ static void __init rb922gs_setup(void) rb922gs_nand_init(); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c index 05a344f23e..cf863ac666 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tew-823dru.c @@ -155,7 +155,7 @@ static void __init tew_823dru_setup(void) ARRAY_SIZE(tew_823dru_mdio0_info)); ath79_register_mdio(0, 0x0); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c index 73808aba2b..abdbde08d2 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-tl-wr1043nd-v2.c @@ -183,7 +183,7 @@ static void __init tl_wr1043nd_v2_setup(void) ARRAY_SIZE(wr1043nd_v2_mdio0_info)); ath79_register_mdio(0, 0x0); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c index a4e4872e5c..88022e7533 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wlr8100.c @@ -152,7 +152,7 @@ static void __init wlr8100_common_setup(void) ath79_register_wmac(art + WLR8100_WMAC_CALDATA_OFFSET, NULL); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c index 954976e23e..c7b120dc2e 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wpj558.c @@ -156,7 +156,7 @@ static void __init wpj558_setup(void) ath79_init_mac(ath79_eth0_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); ath79_init_mac(ath79_eth1_data.mac_addr, art + WPJ558_MAC_OFFSET, 0); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to an AR8327 switch */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; diff --git a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c index 77c7cecae6..428876fccb 100644 --- a/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c +++ b/target/linux/ar71xx/files/arch/mips/ath79/mach-wzr-450hp2.c @@ -193,7 +193,7 @@ static void __init wzr_450hp2_setup(void) ARRAY_SIZE(wzr_450hp2_mdio0_info)); ath79_register_mdio(0, 0x0); - ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); + ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); /* GMAC0 is connected to the RMGII interface */ ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; diff --git a/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch index f13cd9eb47..4d7902e166 100644 --- a/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch +++ b/target/linux/ar71xx/patches-4.1/609-MIPS-ath79-ap136-fixes.patch @@ -149,7 +149,7 @@ + + ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); + -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -static int ap136_pci_plat_dev_init(struct pci_dev *dev) + ath79_register_mdio(0, 0x0); diff --git a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch index f13cd9eb47..4d7902e166 100644 --- a/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch +++ b/target/linux/ar71xx/patches-4.4/609-MIPS-ath79-ap136-fixes.patch @@ -149,7 +149,7 @@ + + ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET, NULL); + -+ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0); ++ ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN); -static int ap136_pci_plat_dev_init(struct pci_dev *dev) + ath79_register_mdio(0, 0x0);