From: Gregory CLEMENT Date: Wed, 14 Mar 2018 16:19:28 +0000 (+0100) Subject: ARM64: dts: marvell: armada-cp110: Add registers clock for the PCIe nodes X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=b15c9d3550767d87d07d894e374e16bf8570ed9a;p=openwrt%2Fstaging%2Fblogic.git ARM64: dts: marvell: armada-cp110: Add registers clock for the PCIe nodes This extra clock is needed to access the registers of the PCIe host controller used on CP110 component of the Armada 7K/8K SoCs. This follow the changes already made in the binding documentation (as well as in the driver): "PCI: armada8k: Fix clock resource by adding a register clock" Signed-off-by: Gregory CLEMENT --- diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index 9ffb86b9441e..48cad7919efa 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -433,7 +433,8 @@ interrupt-map = <0 0 0 0 &CP110_LABEL(icu) ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = ; num-lanes = <1>; - clocks = <&CP110_LABEL(clk) 1 13>; + clock-names = "core", "reg"; + clocks = <&CP110_LABEL(clk) 1 13>, <&CP110_LABEL(clk) 1 14>; status = "disabled"; }; @@ -460,7 +461,8 @@ interrupts = ; num-lanes = <1>; - clocks = <&CP110_LABEL(clk) 1 11>; + clock-names = "core", "reg"; + clocks = <&CP110_LABEL(clk) 1 11>, <&CP110_LABEL(clk) 1 14>; status = "disabled"; }; @@ -487,7 +489,8 @@ interrupts = ; num-lanes = <1>; - clocks = <&CP110_LABEL(clk) 1 12>; + clock-names = "core", "reg"; + clocks = <&CP110_LABEL(clk) 1 12>, <&CP110_LABEL(clk) 1 14>; status = "disabled"; }; };