From: Lokesh Vutla Date: Thu, 5 Mar 2020 08:27:13 +0000 (+0530) Subject: clocksource/drivers/timer-ti-dm: Do not update counter on updating the period X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=aff7665dc64b60c1f93d6e52fde297ae6b8999ae;p=openwrt%2Fstaging%2Fblogic.git clocksource/drivers/timer-ti-dm: Do not update counter on updating the period Write to trigger register(OMAP_TIMER_TRIGGER_REG) will load the value in Load register(OMAP_TIMER_LOAD_REG) into Counter register (OMAP_TIMER_COUNTER_REG). omap_dm_timer_set_load() writes into trigger register every time load register is updated. When timer is configured in pwm mode, this causes disruption in current pwm cycle, which is not expected especially when pwm is used as PPS signal for synchronized PTP clocks. So do not write into trigger register on updating the period. Tested-by: Tony Lindgren Signed-off-by: Lokesh Vutla Signed-off-by: Daniel Lezcano Link: https://lore.kernel.org/r/20200305082715.15861-5-lokeshvutla@ti.com --- diff --git a/drivers/clocksource/timer-ti-dm.c b/drivers/clocksource/timer-ti-dm.c index 1d1bea79cbf1..b565b8456e5c 100644 --- a/drivers/clocksource/timer-ti-dm.c +++ b/drivers/clocksource/timer-ti-dm.c @@ -579,7 +579,6 @@ static int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload, omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load); - omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0); omap_dm_timer_disable(timer); return 0; }