From: Ville Syrjälä Date: Mon, 19 Jan 2015 11:50:50 +0000 (+0200) Subject: Revert "Revert "drm/i915/chv: Use timeout mode for RC6 on chv"" X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=af5a75a37501b30a8230ee9493d9184e896a2faa;p=openwrt%2Fstaging%2Fblogic.git Revert "Revert "drm/i915/chv: Use timeout mode for RC6 on chv"" The performance regression from the CHV RC6 EI->TO change is now fixed so re-enable TO mode for better RC6 resicency. This reverts commit e85a5c7989c5be8fe30acc35eba9fb54b3450f36. Signed-off-by: Ville Syrjälä Reviewed-by: Deepak S Signed-off-by: Daniel Vetter --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 8c7a07d3930f..8ee65da932d7 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4724,7 +4724,8 @@ static void cherryview_enable_rps(struct drm_device *dev) I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); I915_WRITE(GEN6_RC_SLEEP, 0); - I915_WRITE(GEN6_RC6_THRESHOLD, 50000); /* 50/125ms per EI */ + /* TO threshold set to 1750 us ( 0x557 * 1.28 us) */ + I915_WRITE(GEN6_RC6_THRESHOLD, 0x557); /* allows RC6 residency counter to work */ I915_WRITE(VLV_COUNTER_CONTROL, @@ -4738,7 +4739,7 @@ static void cherryview_enable_rps(struct drm_device *dev) /* 3: Enable RC6 */ if ((intel_enable_rc6(dev) & INTEL_RC6_ENABLE) && (pcbr >> VLV_PCBR_ADDR_SHIFT)) - rc6_mode = GEN6_RC_CTL_EI_MODE(1); + rc6_mode = GEN7_RC_CTL_TO_MODE; I915_WRITE(GEN6_RC_CONTROL, rc6_mode);