From: Arend van Spriel Date: Mon, 15 Aug 2011 13:34:26 +0000 (+0200) Subject: staging: brcm80211: restrict MIPS dma bug workaround to BCM47XX X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=adf27befdc79a9403bfba82ee84f02a47bcd546c;p=openwrt%2Fstaging%2Fblogic.git staging: brcm80211: restrict MIPS dma bug workaround to BCM47XX The inline function dma_spin_for_len() was defined for MIPS platforms but the problem only occurs with dma of the PCI core in bcm47xx chips. This patch restricts the function further to BCM47XX platforms only. Tested on BCM63281. Reviewed-by: Pieter-Paul Giesberts Reviewed-by: Henry Ptasinski Reviewed-by: Roland Vossen Tested-by: Jonas Gorski Signed-off-by: Arend van Spriel Signed-off-by: Greg Kroah-Hartman --- diff --git a/drivers/staging/brcm80211/brcmsmac/dma.h b/drivers/staging/brcm80211/brcmsmac/dma.h index 134402cc008a..2ce5963818d4 100644 --- a/drivers/staging/brcm80211/brcmsmac/dma.h +++ b/drivers/staging/brcm80211/brcmsmac/dma.h @@ -100,21 +100,21 @@ void dma_walk_packets(struct dma_pub *dmah, void (*callback_fnc) (void *pkt, void *arg_a), void *arg_a); /* - * DMA(Bug) on some chips seems to declare that the packet is ready, but the - * packet length is not updated yet (by DMA) on the expected time. + * DMA(Bug) on bcm47xx chips seems to declare that the packet is ready, but + * the packet length is not updated yet (by DMA) on the expected time. * Workaround is to hold processor till DMA updates the length, and stay off * the bus to allow DMA update the length in buffer */ static inline void dma_spin_for_len(uint len, struct sk_buff *head) { -#if defined(__mips__) +#if defined(CONFIG_BCM47XX) if (!len) { while (!(len = *(u16 *) KSEG1ADDR(head->data))) udelay(1); *(u16 *) (head->data) = cpu_to_le16((u16) len); } -#endif /* defined(__mips__) */ +#endif /* defined(CONFIG_BCM47XX) */ } #endif /* _BRCM_DMA_H_ */