From: Mieczyslaw Nalewaj Date: Fri, 12 Apr 2024 14:14:18 +0000 (+0200) Subject: ramips: mt7620a_tplink_archer.dtsi rename to mt7620a_tplink_8m.dtsi X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=ada3c41acd22357689e700f1475ab376b6628d00;p=openwrt%2Fstaging%2Fblogic.git ramips: mt7620a_tplink_archer.dtsi rename to mt7620a_tplink_8m.dtsi Change the name mt7620a_tplink_archer.dtsi to mt7620a_tplink_8m.dtsi because it will also be a base for TP-Link non-Archer routers. Signed-off-by: Mieczyslaw Nalewaj --- diff --git a/target/linux/ramips/dts/mt7620a_tplink_8m.dtsi b/target/linux/ramips/dts/mt7620a_tplink_8m.dtsi new file mode 100644 index 000000000000..4bcefd234695 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_tplink_8m.dtsi @@ -0,0 +1,144 @@ +#include "mt7620a.dtsi" + +#include +#include + +/ { + chosen { + bootargs = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + rfkill { + label = "rfkill"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <30000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + compatible = "tplink,firmware"; + label = "firmware"; + reg = <0x20000 0x7a0000>; + }; + + partition@7c0000 { + label = "config"; + reg = <0x7c0000 0x10000>; + read-only; + }; + + partition@7d0000 { + label = "rom"; + reg = <0x7d0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_rom_f100: macaddr@f100 { + compatible = "mac-base"; + reg = <0xf100 0x6>; + #nvmem-cell-cells = <1>; + }; + }; + }; + + partition@7e0000 { + label = "romfile"; + reg = <0x7e0000 0x10000>; + read-only; + }; + + partition@7f0000 { + label = "radio"; + reg = <0x7f0000 0x10000>; + read-only; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom_radio_0: eeprom@0 { + reg = <0x0 0x200>; + }; + + eeprom_radio_8000: eeprom@8000 { + reg = <0x8000 0x200>; + }; + }; + }; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + + nvmem-cells = <&macaddr_rom_f100 0>; + nvmem-cell-names = "mac-address"; + + mediatek,portmap = "wllll"; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi: mt76@0,0 { + reg = <0x0000 0 0 0 0>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts index ea3533e446a3..10756e3b3c14 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts @@ -2,7 +2,7 @@ #include -#include "mt7620a_tplink_archer.dtsi" +#include "mt7620a_tplink_8m.dtsi" / { compatible = "tplink,archer-c2-v1", "ralink,mt7620a-soc"; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c20-v1.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c20-v1.dts index 726a86ae1721..285e27c35704 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_archer-c20-v1.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c20-v1.dts @@ -1,6 +1,6 @@ #include -#include "mt7620a_tplink_archer.dtsi" +#include "mt7620a_tplink_8m.dtsi" / { compatible = "tplink,archer-c20-v1", "ralink,mt7620a-soc"; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c20i.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c20i.dts index a977156e5fa8..12141a6e595a 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_archer-c20i.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c20i.dts @@ -1,6 +1,6 @@ #include -#include "mt7620a_tplink_archer.dtsi" +#include "mt7620a_tplink_8m.dtsi" / { compatible = "tplink,archer-c20i", "ralink,mt7620a-soc"; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts index fcebf87c3f2f..1ed156e8af92 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c5-v4.dts @@ -2,7 +2,7 @@ #include -#include "mt7620a_tplink_archer.dtsi" +#include "mt7620a_tplink_8m.dtsi" / { compatible = "tplink,archer-c5-v4", "ralink,mt7620a-soc"; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c50-v1.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c50-v1.dts index cfb31b47fe0c..97b803470d05 100644 --- a/target/linux/ramips/dts/mt7620a_tplink_archer-c50-v1.dts +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c50-v1.dts @@ -1,6 +1,6 @@ #include -#include "mt7620a_tplink_archer.dtsi" +#include "mt7620a_tplink_8m.dtsi" / { compatible = "tplink,archer-c50-v1", "ralink,mt7620a-soc"; diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer.dtsi b/target/linux/ramips/dts/mt7620a_tplink_archer.dtsi deleted file mode 100644 index 4bcefd234695..000000000000 --- a/target/linux/ramips/dts/mt7620a_tplink_archer.dtsi +++ /dev/null @@ -1,144 +0,0 @@ -#include "mt7620a.dtsi" - -#include -#include - -/ { - chosen { - bootargs = "console=ttyS0,115200"; - }; - - keys { - compatible = "gpio-keys"; - - reset { - label = "reset"; - gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - rfkill { - label = "rfkill"; - gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&gpio3 { - status = "okay"; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <30000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x0 0x20000>; - read-only; - }; - - partition@20000 { - compatible = "tplink,firmware"; - label = "firmware"; - reg = <0x20000 0x7a0000>; - }; - - partition@7c0000 { - label = "config"; - reg = <0x7c0000 0x10000>; - read-only; - }; - - partition@7d0000 { - label = "rom"; - reg = <0x7d0000 0x10000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_rom_f100: macaddr@f100 { - compatible = "mac-base"; - reg = <0xf100 0x6>; - #nvmem-cell-cells = <1>; - }; - }; - }; - - partition@7e0000 { - label = "romfile"; - reg = <0x7e0000 0x10000>; - read-only; - }; - - partition@7f0000 { - label = "radio"; - reg = <0x7f0000 0x10000>; - read-only; - - nvmem-layout { - compatible = "fixed-layout"; - #address-cells = <1>; - #size-cells = <1>; - - eeprom_radio_0: eeprom@0 { - reg = <0x0 0x200>; - }; - - eeprom_radio_8000: eeprom@8000 { - reg = <0x8000 0x200>; - }; - }; - }; - }; - }; -}; - -ðernet { - pinctrl-names = "default"; - - nvmem-cells = <&macaddr_rom_f100 0>; - nvmem-cell-names = "mac-address"; - - mediatek,portmap = "wllll"; -}; - -&ehci { - status = "okay"; -}; - -&ohci { - status = "okay"; -}; - -&pcie { - status = "okay"; -}; - -&pcie0 { - wifi: mt76@0,0 { - reg = <0x0000 0 0 0 0>; - ieee80211-freq-limit = <5000000 6000000>; - }; -};