From: Álvaro Fernández Rojas Date: Tue, 30 May 2023 17:28:48 +0000 (+0200) Subject: bmips: 6.1: copy patches, config from 5.15 X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=a937eef305ca3ce0bb945185f3c2914478f14c4a;p=openwrt%2Fstaging%2Fneocturne.git bmips: 6.1: copy patches, config from 5.15 Copy patches and config from 5.15 kernel version. Signed-off-by: Álvaro Fernández Rojas --- diff --git a/target/linux/bmips/bcm6318/config-6.1 b/target/linux/bmips/bcm6318/config-6.1 new file mode 100644 index 0000000000..50401a58e8 --- /dev/null +++ b/target/linux/bmips/bcm6318/config-6.1 @@ -0,0 +1,271 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_BCM6318=y +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +CONFIG_PINCTRL_BCM6318=y +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +# CONFIG_SPI_BCM63XX is not set +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm63268/config-6.1 b/target/linux/bmips/bcm63268/config-6.1 new file mode 100644 index 0000000000..09754e9f8b --- /dev/null +++ b/target/linux/bmips/bcm63268/config-6.1 @@ -0,0 +1,285 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +CONFIG_CLK_BCM63268_TIMER=y +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +CONFIG_PINCTRL_BCM63268=y +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6328/config-6.1 b/target/linux/bmips/bcm6328/config-6.1 new file mode 100644 index 0000000000..1e7712ead6 --- /dev/null +++ b/target/linux/bmips/bcm6328/config-6.1 @@ -0,0 +1,283 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +CONFIG_PINCTRL_BCM6328=y +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +# CONFIG_SPI_BCM63XX is not set +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6358/config-6.1 b/target/linux/bmips/bcm6358/config-6.1 new file mode 100644 index 0000000000..5d7a299444 --- /dev/null +++ b/target/linux/bmips/bcm6358/config-6.1 @@ -0,0 +1,265 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +CONFIG_BCM6348_ENET=y +# CONFIG_BCM6368_ENETSW is not set +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +# CONFIG_MDIO_BUS_MUX_BCM6368 is not set +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +# CONFIG_PCIE_BCM6318 is not set +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +CONFIG_PINCTRL_BCM6358=y +# CONFIG_PINCTRL_BCM6362 is not set +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +# CONFIG_SOC_BCM63XX is not set +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +# CONFIG_SPI_BCM63XX_HSSPI is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6362/config-6.1 b/target/linux/bmips/bcm6362/config-6.1 new file mode 100644 index 0000000000..5f9b528d95 --- /dev/null +++ b/target/linux/bmips/bcm6362/config-6.1 @@ -0,0 +1,285 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM63XX_POWER=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +CONFIG_PCIEPORTBUS=y +# CONFIG_PCIE_BCM6318 is not set +CONFIG_PCIE_BCM6328=y +CONFIG_PCIE_PME=y +# CONFIG_PCI_BCM6348 is not set +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +CONFIG_PINCTRL_BCM6362=y +# CONFIG_PINCTRL_BCM6368 is not set +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOC_BCM63XX=y +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +CONFIG_SPI_BCM63XX_HSSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/bcm6368/config-6.1 b/target/linux/bmips/bcm6368/config-6.1 new file mode 100644 index 0000000000..910d36ce0b --- /dev/null +++ b/target/linux/bmips/bcm6368/config-6.1 @@ -0,0 +1,281 @@ +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_B53_MMAP_DRIVER=y +CONFIG_B53_SPI_DRIVER=y +CONFIG_BCM6345_EXT_IRQ=y +CONFIG_BCM6345_L1_IRQ=y +# CONFIG_BCM6348_ENET is not set +CONFIG_BCM6368_ENETSW=y +CONFIG_BCM7038_WDT=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_PM=y +CONFIG_BMIPS_GENERIC=y +CONFIG_CEVT_R4K=y +# CONFIG_CLK_BCM63268_TIMER is not set +CONFIG_CLK_BCM_63XX_GATE=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_BMIPS=y +CONFIG_CPU_BMIPS32_3300=y +CONFIG_CPU_BMIPS4350=y +CONFIG_CPU_BMIPS4380=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_NO_EFFICIENT_FFS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_CPUFREQ=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRYPTO_DEFLATE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_LZO=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_ZSTD=y +CONFIG_CSRC_R4K=y +CONFIG_DEBUG_INFO=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DTC=y +# CONFIG_DT_BCM93384WVG is not set +# CONFIG_DT_BCM93384WVG_VIPER is not set +# CONFIG_DT_BCM96368MVWG is not set +# CONFIG_DT_BCM97125CBMB is not set +# CONFIG_DT_BCM97346DBSMB is not set +# CONFIG_DT_BCM97358SVMB is not set +# CONFIG_DT_BCM97360SVMB is not set +# CONFIG_DT_BCM97362SVMB is not set +# CONFIG_DT_BCM97420C is not set +# CONFIG_DT_BCM97425SVMB is not set +# CONFIG_DT_BCM97435SVMB is not set +# CONFIG_DT_BCM9EJTAGPRB is not set +# CONFIG_DT_COMTREND_VR3032U is not set +# CONFIG_DT_NETGEAR_CVG834G is not set +CONFIG_DT_NONE=y +# CONFIG_DT_SFR_NEUFBOX4_SERCOMM is not set +# CONFIG_DT_SFR_NEUFBOX6_SERCOMM is not set +CONFIG_FIXED_PHY=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +# CONFIG_GPIO_BRCMSTB is not set +CONFIG_GPIO_CDEV=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_GPIO_REGMAP=y +CONFIG_GRO_CELLS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_BCM2835=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +# CONFIG_LEDS_SERCOMM_MSP430 is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_BCM6368=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_EXTERNAL_TIMER=y +CONFIG_MIPS_L1_CACHE_SHIFT=6 +CONFIG_MIPS_L1_CACHE_SHIFT_4=y +CONFIG_MIPS_L1_CACHE_SHIFT_6=y +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=2 +CONFIG_MIPS_O32_FP64_SUPPORT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULE_FORCE_LOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +# CONFIG_MTD_BCM63XX_PARTS is not set +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_BE_BYTE_SWAP=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_NOSWAP is not set +CONFIG_MTD_CFI_STAA=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_NAND_BRCMNAND=y +CONFIG_MTD_NAND_CORE=y +CONFIG_MTD_NAND_ECC=y +CONFIG_MTD_NAND_ECC_SW_HAMMING=y +# CONFIG_MTD_PARSER_IMAGETAG is not set +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_RAW_NAND=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_BCM63XX_FW=y +CONFIG_MTD_SPLIT_BCM_WFI_FW=y +CONFIG_MTD_UBI=y +CONFIG_MTD_UBI_BEB_LIMIT=20 +CONFIG_MTD_UBI_BLOCK=y +CONFIG_MTD_UBI_WL_THRESHOLD=4096 +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NO_EXCEPT_FILL=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=2 +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_PADATA=y +CONFIG_PCI=y +# CONFIG_PCIE_BCM6318 is not set +# CONFIG_PCIE_BCM6328 is not set +CONFIG_PCI_BCM6348=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYSICAL_START=0x80010000 +CONFIG_PHY_BCM63XX_USBH=y +# CONFIG_PHY_BRCM_SATA is not set +CONFIG_PINCTRL=y +# CONFIG_PINCTRL_BCM6318 is not set +# CONFIG_PINCTRL_BCM63268 is not set +# CONFIG_PINCTRL_BCM6328 is not set +# CONFIG_PINCTRL_BCM6358 is not set +# CONFIG_PINCTRL_BCM6362 is not set +CONFIG_PINCTRL_BCM6368=y +CONFIG_PINCTRL_BCM63XX=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +CONFIG_POWER_SUPPLY=y +CONFIG_PROC_VMCORE=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RELAY=y +CONFIG_RESET_BCM6345=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +# CONFIG_SERIAL_8250 is not set +CONFIG_SERIAL_BCM63XX=y +CONFIG_SERIAL_BCM63XX_CONSOLE=y +CONFIG_SGL_ALLOC=y +CONFIG_SMP=y +CONFIG_SMP_UP=y +CONFIG_SOCK_RX_QUEUE_MAPPING=y +# CONFIG_SOC_BCM63XX is not set +CONFIG_SPI=y +CONFIG_SPI_BCM63XX=y +# CONFIG_SPI_BCM63XX_HSSPI is not set +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SRCU=y +CONFIG_SWAP_IO_SPACE=y +CONFIG_SWPHY=y +CONFIG_SYNC_R4K=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_BMIPS=y +CONFIG_SYS_HAS_CPU_BMIPS32_3300=y +CONFIG_SYS_HAS_CPU_BMIPS4350=y +CONFIG_SYS_HAS_CPU_BMIPS4380=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TARGET_ISA_REV=0 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UBIFS_FS=y +CONFIG_USB_EHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WATCHDOG_NOWAYOUT=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_ZLIB_DEFLATE=y +CONFIG_ZLIB_INFLATE=y +CONFIG_ZSTD_COMPRESS=y +CONFIG_ZSTD_DECOMPRESS=y diff --git a/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch b/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch new file mode 100644 index 0000000000..44cdb068f9 --- /dev/null +++ b/target/linux/bmips/patches-6.1/100-irqchip-add-support-for-bcm6345-style-external-inter.patch @@ -0,0 +1,373 @@ +From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 30 Nov 2014 14:54:27 +0100 +Subject: [PATCH] irqchip: add support for bcm6345-style external interrupt + controller + +Signed-off-by: Jonas Gorski +--- + .../brcm,bcm6345-ext-intc.txt | 29 ++ + drivers/irqchip/Kconfig | 4 + + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-bcm6345-ext.c | 280 ++++++++++++++++++ + include/linux/irqchip/irq-bcm6345-ext.h | 14 + + 5 files changed, 328 insertions(+) + create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt + create mode 100644 drivers/irqchip/irq-bcm6345-ext.c + create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h + +--- /dev/null ++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt +@@ -0,0 +1,29 @@ ++Broadcom BCM6345-style external interrupt controller ++ ++Required properties: ++ ++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc". ++- reg: Specifies the base physical addresses and size of the registers. ++- interrupt-controller: identifies the node as an interrupt controller. ++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt ++ source, Should be 2. ++- interrupt-parent: Specifies the phandle to the parent interrupt controller ++ this one is cascaded from. ++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller ++ node, valid values depend on the type of parent interrupt controller. ++ ++Optional properties: ++ ++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the ++ register. Defaults to 4. ++ ++Example: ++ ++ext_intc: interrupt-controller@10000018 { ++ compatible = "brcm,bcm6345-ext-intc"; ++ interrupt-parent = <&periph_intc>; ++ #interrupt-cells = <2>; ++ reg = <0x10000018 0x4>; ++ interrupt-controller; ++ interrupts = <24>, <25>, <26>, <27>; ++}; +--- a/drivers/irqchip/Kconfig ++++ b/drivers/irqchip/Kconfig +@@ -108,6 +108,10 @@ config I8259 + bool + select IRQ_DOMAIN + ++config BCM6345_EXT_IRQ ++ bool "BCM6345 External IRQ Controller" ++ select IRQ_DOMAIN ++ + config BCM6345_L1_IRQ + bool + select GENERIC_IRQ_CHIP +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -62,6 +62,7 @@ obj-$(CONFIG_XTENSA_MX) += irq-xtensa- + obj-$(CONFIG_XILINX_INTC) += irq-xilinx-intc.o + obj-$(CONFIG_IRQ_CROSSBAR) += irq-crossbar.o + obj-$(CONFIG_SOC_VF610) += irq-vf610-mscm-ir.o ++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o + obj-$(CONFIG_BCM6345_L1_IRQ) += irq-bcm6345-l1.o + obj-$(CONFIG_BCM7038_L1_IRQ) += irq-bcm7038-l1.o + obj-$(CONFIG_BCM7120_L2_IRQ) += irq-bcm7120-l2.o +--- /dev/null ++++ b/drivers/irqchip/irq-bcm6345-ext.c +@@ -0,0 +1,280 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define MAX_IRQS 4 ++ ++#define EXTIRQ_CFG_SENSE 0 ++#define EXTIRQ_CFG_STAT 1 ++#define EXTIRQ_CFG_CLEAR 2 ++#define EXTIRQ_CFG_MASK 3 ++#define EXTIRQ_CFG_BOTHEDGE 4 ++#define EXTIRQ_CFG_LEVELSENSE 5 ++ ++struct intc_data { ++ struct irq_chip chip; ++ struct irq_domain *domain; ++ raw_spinlock_t lock; ++ ++ int parent_irq[MAX_IRQS]; ++ void __iomem *reg; ++ int shift; ++ unsigned int toggle_clear_on_ack:1; ++}; ++ ++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc) ++{ ++ struct intc_data *data = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ unsigned int irq = irq_desc_get_irq(desc); ++ unsigned int idx; ++ ++ chained_irq_enter(chip, desc); ++ ++ for (idx = 0; idx < MAX_IRQS; idx++) { ++ if (data->parent_irq[idx] != irq) ++ continue; ++ ++ generic_handle_irq(irq_find_mapping(data->domain, idx)); ++ } ++ ++ chained_irq_exit(chip, desc); ++} ++ ++static void bcm6345_ext_intc_irq_ack(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)), ++ priv->reg); ++ if (priv->toggle_clear_on_ack) ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_mask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift)); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ u32 reg; ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift); ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++} ++ ++static int bcm6345_ext_intc_set_type(struct irq_data *data, ++ unsigned int flow_type) ++{ ++ struct intc_data *priv = data->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(data); ++ bool levelsense = 0, sense = 0, bothedge = 0; ++ u32 reg; ++ ++ flow_type &= IRQ_TYPE_SENSE_MASK; ++ ++ if (flow_type == IRQ_TYPE_NONE) ++ flow_type = IRQ_TYPE_LEVEL_LOW; ++ ++ switch (flow_type) { ++ case IRQ_TYPE_EDGE_BOTH: ++ bothedge = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_RISING: ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_EDGE_FALLING: ++ break; ++ ++ case IRQ_TYPE_LEVEL_HIGH: ++ levelsense = 1; ++ sense = 1; ++ break; ++ ++ case IRQ_TYPE_LEVEL_LOW: ++ levelsense = 1; ++ break; ++ ++ default: ++ pr_err("bogus flow type combination given!\n"); ++ return -EINVAL; ++ } ++ ++ raw_spin_lock(&priv->lock); ++ reg = __raw_readl(priv->reg); ++ ++ if (levelsense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift)); ++ if (sense) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift)); ++ if (bothedge) ++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift); ++ else ++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift)); ++ ++ __raw_writel(reg, priv->reg); ++ raw_spin_unlock(&priv->lock); ++ ++ irqd_set_trigger_type(data, flow_type); ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ irq_set_handler_locked(data, handle_level_irq); ++ else ++ irq_set_handler_locked(data, handle_edge_irq); ++ ++ return 0; ++} ++ ++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq, ++ irq_hw_number_t hw) ++{ ++ struct intc_data *priv = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops bcm6345_ext_domain_ops = { ++ .xlate = irq_domain_xlate_twocell, ++ .map = bcm6345_ext_intc_map, ++}; ++ ++static int __init __bcm6345_ext_intc_init(struct device_node *node, ++ int num_irqs, int *irqs, ++ void __iomem *reg, int shift, ++ bool toggle_clear_on_ack) ++{ ++ struct intc_data *data; ++ unsigned int i; ++ ++ data = kzalloc(sizeof(*data), GFP_KERNEL); ++ if (!data) ++ return -ENOMEM; ++ ++ raw_spin_lock_init(&data->lock); ++ ++ for (i = 0; i < num_irqs; i++) { ++ data->parent_irq[i] = irqs[i]; ++ ++ irq_set_handler_data(irqs[i], data); ++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle); ++ } ++ ++ data->reg = reg; ++ data->shift = shift; ++ data->toggle_clear_on_ack = toggle_clear_on_ack; ++ ++ data->chip.name = "bcm6345-ext-intc"; ++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack; ++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask; ++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask; ++ data->chip.irq_set_type = bcm6345_ext_intc_set_type; ++ ++ data->domain = irq_domain_add_linear(node, num_irqs, ++ &bcm6345_ext_domain_ops, data); ++ if (!data->domain) { ++ kfree(data); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg, ++ int shift) ++{ ++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false); ++} ++ ++#ifdef CONFIG_OF ++static int __init bcm6345_ext_intc_of_init(struct device_node *node, ++ struct device_node *parent) ++{ ++ int num_irqs, ret = -EINVAL; ++ unsigned i; ++ void __iomem *base; ++ int irqs[MAX_IRQS] = { 0 }; ++ u32 shift; ++ bool toggle_clear_on_ack = false; ++ ++ num_irqs = of_irq_count(node); ++ ++ if (!num_irqs || num_irqs > MAX_IRQS) ++ return -EINVAL; ++ ++ if (of_property_read_u32(node, "brcm,field-width", &shift)) ++ shift = 4; ++ ++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */ ++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc")) ++ toggle_clear_on_ack = true; ++ ++ for (i = 0; i < num_irqs; i++) { ++ irqs[i] = irq_of_parse_and_map(node, i); ++ if (!irqs[i]) ++ return -ENOMEM; ++ } ++ ++ base = of_iomap(node, 0); ++ if (!base) ++ return -ENXIO; ++ ++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift, ++ toggle_clear_on_ack); ++ if (!ret) ++ return 0; ++ ++ iounmap(base); ++ ++ for (i = 0; i < num_irqs; i++) ++ irq_dispose_mapping(irqs[i]); ++ ++ return ret; ++} ++ ++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc", ++ bcm6345_ext_intc_of_init); ++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc", ++ bcm6345_ext_intc_of_init); ++#endif +--- /dev/null ++++ b/include/linux/irqchip/irq-bcm6345-ext.h +@@ -0,0 +1,14 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2014 Jonas Gorski ++ */ ++ ++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H ++ ++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift); ++ ++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */ diff --git a/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch b/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch new file mode 100644 index 0000000000..e2b73e6ac4 --- /dev/null +++ b/target/linux/bmips/patches-6.1/200-mips-bmips-automatically-detect-CPU-frequency.patch @@ -0,0 +1,239 @@ +From 0377ad93031d3e51c2afe44231241185f684b6af Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Fri, 5 Mar 2021 15:14:32 +0100 +Subject: [PATCH] mips: bmips: automatically detect CPU frequency +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some BCM63xx SoCs support multiple CPU frequencies depending on HW config. + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/bmips/setup.c | 197 ++++++++++++++++++++++++++++++++++++++-- + 1 file changed, 190 insertions(+), 7 deletions(-) + +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -31,13 +31,52 @@ + + #define RELO_NORMAL_VEC BIT(18) + ++#define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) ++#define BCM6318_FREQ_SHIFT 23 ++#define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) ++ + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) ++#define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) ++#define BCM6328_FCVO_SHIFT 7 ++#define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) ++ ++#define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) ++#define BCM6358_PLLC_M1_SHIFT 0 ++#define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) ++#define BCM6358_PLLC_N1_SHIFT 23 ++#define BCM6358_PLLC_N1_MASK (0x3f << BCM6358_PLLC_N1_SHIFT) ++#define BCM6358_PLLC_N2_SHIFT 29 ++#define BCM6358_PLLC_N2_MASK (0x7 << BCM6358_PLLC_N2_SHIFT) ++ ++#define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) ++#define BCM6362_FCVO_SHIFT 1 ++#define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) ++ ++#define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) ++#define BCM6368_PLLC_P1_SHIFT 0 ++#define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) ++#define BCM6368_PLLC_P2_SHIFT 4 ++#define BCM6368_PLLC_P2_MASK (0xf << BCM6368_PLLC_P2_SHIFT) ++#define BCM6368_PLLC_NDIV_SHIFT 16 ++#define BCM6368_PLLC_NDIV_MASK (0x1ff << BCM6368_PLLC_NDIV_SHIFT) ++#define REG_BCM6368_DDR_PLLD ((void __iomem *)CKSEG1ADDR(0x100012a4)) ++#define BCM6368_PLLD_MDIV_SHIFT 0 ++#define BCM6368_PLLD_MDIV_MASK (0xff << BCM6368_PLLD_MDIV_SHIFT) ++ ++#define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) ++#define BCM63268_FCVO_SHIFT 21 ++#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) + + extern bool bmips_rac_flush_disable; + + static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000; + ++struct bmips_cpufreq { ++ const char *compatible; ++ u32 (*cpu_freq)(void); ++}; ++ + struct bmips_quirk { + const char *compatible; + void (*quirk_fn)(void); +@@ -142,17 +181,161 @@ const char *get_system_type(void) + return "Generic BMIPS kernel"; + } + ++static u32 bcm6318_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6318_SOB); ++ ++ switch ((val & BCM6318_FREQ_MASK) >> BCM6318_FREQ_SHIFT) { ++ case 0: ++ return 166000000; ++ case 2: ++ return 250000000; ++ case 3: ++ return 333000000; ++ case 1: ++ return 400000000; ++ default: ++ return 0; ++ } ++} ++ ++static u32 bcm6328_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6328_MISC_SB); ++ ++ switch ((val & BCM6328_FCVO_MASK) >> BCM6328_FCVO_SHIFT) { ++ case 0x12: ++ case 0x14: ++ case 0x19: ++ return 160000000; ++ case 0x1c: ++ return 192000000; ++ case 0x13: ++ case 0x15: ++ return 200000000; ++ case 0x1a: ++ return 384000000; ++ case 0x16: ++ return 400000000; ++ default: ++ return 320000000; ++ } ++} ++ ++static u32 bcm6358_cpufreq(void) ++{ ++ u32 val, n1, n2, m1; ++ ++ val = __raw_readl(REG_BCM6358_DDR_PLLC); ++ n1 = (val & BCM6358_PLLC_N1_MASK) >> BCM6358_PLLC_N1_SHIFT; ++ n2 = (val & BCM6358_PLLC_N2_MASK) >> BCM6358_PLLC_N2_SHIFT; ++ m1 = (val & BCM6358_PLLC_M1_MASK) >> BCM6358_PLLC_M1_SHIFT; ++ ++ return (16 * 1000000 * n1 * n2) / m1; ++} ++ ++static u32 bcm6362_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM6362_MISC_SB); ++ ++ switch ((val & BCM6362_FCVO_MASK) >> BCM6362_FCVO_SHIFT) { ++ case 0x04: ++ case 0x0c: ++ case 0x14: ++ case 0x1c: ++ return 160000000; ++ case 0x15: ++ case 0x1d: ++ return 200000000; ++ case 0x03: ++ case 0x0b: ++ case 0x13: ++ case 0x1b: ++ return 240000000; ++ case 0x07: ++ case 0x17: ++ return 384000000; ++ case 0x05: ++ case 0x0e: ++ case 0x16: ++ case 0x1e: ++ case 0x1f: ++ return 400000000; ++ case 0x06: ++ return 440000000; ++ default: ++ return 320000000; ++ } ++} ++ ++static u32 bcm6368_cpufreq(void) ++{ ++ u32 val, p1, p2, ndiv, m1; ++ ++ val = __raw_readl(REG_BCM6368_DDR_PLLC); ++ p1 = (val & BCM6368_PLLC_P1_MASK) >> BCM6368_PLLC_P1_SHIFT; ++ p2 = (val & BCM6368_PLLC_P2_MASK) >> BCM6368_PLLC_P2_SHIFT; ++ ndiv = (val & BCM6368_PLLC_NDIV_MASK) >> ++ BCM6368_PLLC_NDIV_SHIFT; ++ ++ val = __raw_readl(REG_BCM6368_DDR_PLLD); ++ m1 = (val & BCM6368_PLLD_MDIV_MASK) >> BCM6368_PLLD_MDIV_SHIFT; ++ ++ return (((64 * 1000000) / p1) * p2 * ndiv) / m1; ++} ++ ++static u32 bcm63268_cpufreq(void) ++{ ++ u32 val = __raw_readl(REG_BCM63268_MISC_SB); ++ ++ switch ((val & BCM63268_FCVO_MASK) >> BCM63268_FCVO_SHIFT) { ++ case 0x3: ++ case 0xe: ++ return 320000000; ++ case 0xa: ++ return 333000000; ++ case 0x2: ++ case 0xb: ++ case 0xf: ++ return 400000000; ++ default: ++ return 0; ++ } ++} ++ ++static const struct bmips_cpufreq bmips_cpufreq_list[] = { ++ { "brcm,bcm6318", &bcm6318_cpufreq }, ++ { "brcm,bcm6328", &bcm6328_cpufreq }, ++ { "brcm,bcm6358", &bcm6358_cpufreq }, ++ { "brcm,bcm6362", &bcm6362_cpufreq }, ++ { "brcm,bcm6368", &bcm6368_cpufreq }, ++ { "brcm,bcm63268", &bcm63268_cpufreq }, ++ { /* sentinel */ } ++}; ++ + void __init plat_time_init(void) + { ++ const struct bmips_cpufreq *cf; + struct device_node *np; +- u32 freq; ++ u32 freq = 0; + +- np = of_find_node_by_name(NULL, "cpus"); +- if (!np) +- panic("missing 'cpus' DT node"); +- if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) +- panic("missing 'mips-hpt-frequency' property"); +- of_node_put(np); ++ for (cf = bmips_cpufreq_list; cf->cpu_freq; cf++) { ++ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), ++ cf->compatible)) { ++ freq = cf->cpu_freq() / 2; ++ printk("%s detected @ %u MHz\n", cf->compatible, freq / 500000); ++ break; ++ } ++ } ++ ++ if (!freq) { ++ np = of_find_node_by_name(NULL, "cpus"); ++ if (!np) ++ panic("missing 'cpus' DT node"); ++ if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0) ++ panic("missing 'mips-hpt-frequency' property"); ++ of_node_put(np); ++ } + + mips_hpt_frequency = freq; + } diff --git a/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch b/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch new file mode 100644 index 0000000000..c0bdb0d5ce --- /dev/null +++ b/target/linux/bmips/patches-6.1/201-mips-bmips-automatically-detect-RAM-size.patch @@ -0,0 +1,196 @@ +From f9ee3f28ecb979c77423be965ef9dd313bdb9e9b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 8 Mar 2021 16:58:34 +0100 +Subject: [PATCH] mips: bmips: automatically detect RAM size +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Some devices have different amounts of RAM installed depending on HW revision. + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/bmips/setup.c | 119 ++++++++++++++++++++++++++++++++++++++++ + 1 file changed, 119 insertions(+) + +--- a/arch/mips/bmips/setup.c ++++ b/arch/mips/bmips/setup.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -34,13 +35,16 @@ + #define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900)) + #define BCM6318_FREQ_SHIFT 23 + #define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT) ++#define BCM6318_SDRAM_ADDR ((void __iomem *)CKSEG1ADDR(0x10004000)) + + #define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c)) + #define BCM6328_TP1_DISABLED BIT(9) + #define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40)) + #define BCM6328_FCVO_SHIFT 7 + #define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT) ++#define BCM6328_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) + ++#define BCM6358_MEMC_ADDR ((void __iomem *)0xfffe1200) + #define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8) + #define BCM6358_PLLC_M1_SHIFT 0 + #define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT) +@@ -52,7 +56,9 @@ + #define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) + #define BCM6362_FCVO_SHIFT 1 + #define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT) ++#define BCM6362_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) + ++#define BCM6368_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10001200)) + #define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0)) + #define BCM6368_PLLC_P1_SHIFT 0 + #define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT) +@@ -67,6 +73,21 @@ + #define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814)) + #define BCM63268_FCVO_SHIFT 21 + #define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT) ++#define BCM63268_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000)) ++ ++#define SDRAM_CFG_REG 0x0 ++#define SDRAM_SPACE_SHIFT 4 ++#define SDRAM_SPACE_MASK (0xf << SDRAM_SPACE_SHIFT) ++ ++#define MEMC_CFG_REG 0x4 ++#define MEMC_CFG_32B_SHIFT 1 ++#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) ++#define MEMC_CFG_COL_SHIFT 3 ++#define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT) ++#define MEMC_CFG_ROW_SHIFT 6 ++#define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT) ++ ++#define DDR_CSEND_REG 0x8 + + extern bool bmips_rac_flush_disable; + +@@ -77,6 +98,11 @@ struct bmips_cpufreq { + u32 (*cpu_freq)(void); + }; + ++struct bmips_memsize { ++ const char *compatible; ++ phys_addr_t (*mem_size)(void); ++}; ++ + struct bmips_quirk { + const char *compatible; + void (*quirk_fn)(void); +@@ -340,9 +366,90 @@ void __init plat_time_init(void) + mips_hpt_frequency = freq; + } + ++static inline phys_addr_t bmips_dram_size(unsigned int cols, ++ unsigned int rows, ++ unsigned int is_32b, ++ unsigned int banks) ++{ ++ rows += 11; /* 0 => 11 address bits ... 2 => 13 address bits */ ++ cols += 8; /* 0 => 8 address bits ... 2 => 10 address bits */ ++ is_32b += 1; ++ ++ return 1 << (cols + rows + is_32b + banks); ++} ++ ++static phys_addr_t _bcm6318_memsize(void __iomem *addr) ++{ ++ u32 val; ++ ++ val = __raw_readl(addr + SDRAM_CFG_REG); ++ val = (val & SDRAM_SPACE_MASK) >> SDRAM_SPACE_SHIFT; ++ ++ return (1 << (val + 20)); ++} ++ ++static phys_addr_t _bcm6328_memsize(void __iomem *addr) ++{ ++ return __raw_readl(addr + DDR_CSEND_REG) << 24; ++} ++ ++static phys_addr_t _bcm6358_memsize(void __iomem *addr) ++{ ++ unsigned int cols, rows, is_32b; ++ u32 val; ++ ++ val = __raw_readl(addr + MEMC_CFG_REG); ++ rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT; ++ cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT; ++ is_32b = (val & MEMC_CFG_32B_MASK) ? 0 : 1; ++ ++ return bmips_dram_size(cols, rows, is_32b, 2); ++} ++ ++static phys_addr_t bcm6318_memsize(void) ++{ ++ return _bcm6318_memsize(BCM6318_SDRAM_ADDR); ++} ++ ++static phys_addr_t bcm6328_memsize(void) ++{ ++ return _bcm6328_memsize(BCM6328_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6358_memsize(void) ++{ ++ return _bcm6358_memsize(BCM6358_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6362_memsize(void) ++{ ++ return _bcm6328_memsize(BCM6362_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm6368_memsize(void) ++{ ++ return _bcm6358_memsize(BCM6368_MEMC_ADDR); ++} ++ ++static phys_addr_t bcm63268_memsize(void) ++{ ++ return _bcm6328_memsize(BCM63268_MEMC_ADDR); ++} ++ ++static const struct bmips_memsize bmips_memsize_list[] = { ++ { "brcm,bcm6318", &bcm6318_memsize }, ++ { "brcm,bcm6328", &bcm6328_memsize }, ++ { "brcm,bcm6358", &bcm6358_memsize }, ++ { "brcm,bcm6362", &bcm6362_memsize }, ++ { "brcm,bcm6368", &bcm6368_memsize }, ++ { "brcm,bcm63268", &bcm63268_memsize }, ++ { /* sentinel */ } ++}; ++ + void __init plat_mem_setup(void) + { + void *dtb; ++ const struct bmips_memsize *ms; + const struct bmips_quirk *q; + + set_io_port_base(0); +@@ -360,6 +467,18 @@ void __init plat_mem_setup(void) + + __dt_setup_arch(dtb); + ++ for (ms = bmips_memsize_list; ms->mem_size; ms++) { ++ if (of_flat_dt_is_compatible(of_get_flat_dt_root(), ++ ms->compatible)) { ++ phys_addr_t mem = ms->mem_size(); ++ if (mem) { ++ memblock_add(0, mem); ++ printk("%uMB of RAM installed\n", mem >> 20); ++ break; ++ } ++ } ++ } ++ + for (q = bmips_quirk_list; q->quirk_fn; q++) { + if (of_flat_dt_is_compatible(of_get_flat_dt_root(), + q->compatible)) { diff --git a/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch b/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch new file mode 100644 index 0000000000..c39df850a0 --- /dev/null +++ b/target/linux/bmips/patches-6.1/202-mips-bmips-tweak-Kconfig-options.patch @@ -0,0 +1,42 @@ +From 20a4b57c0fafd23ae0f6bcab5b5adf4af4c80280 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Thu, 16 Mar 2023 19:31:21 +0100 +Subject: [PATCH] mips: bmips: tweak Kconfig options +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/Kconfig | 7 +------ + 1 file changed, 1 insertion(+), 6 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -274,25 +274,20 @@ config BMIPS_GENERIC + select SYNC_R4K + select COMMON_CLK + select BCM6345_L1_IRQ +- select BCM7038_L1_IRQ +- select BCM7120_L2_IRQ +- select BRCMSTB_L2_IRQ + select IRQ_MIPS_CPU + select DMA_NONCOHERENT + select SYS_SUPPORTS_32BIT_KERNEL +- select SYS_SUPPORTS_LITTLE_ENDIAN + select SYS_SUPPORTS_BIG_ENDIAN +- select SYS_SUPPORTS_HIGHMEM + select SYS_HAS_CPU_BMIPS32_3300 + select SYS_HAS_CPU_BMIPS4350 + select SYS_HAS_CPU_BMIPS4380 +- select SYS_HAS_CPU_BMIPS5000 + select SWAP_IO_SPACE + select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN + select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN + select HARDIRQS_SW_RESEND ++ select MIPS_L1_CACHE_SHIFT_4 + help + Build a generic DT-based kernel image that boots on select + BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top diff --git a/target/linux/bmips/patches-6.1/210-macronix_nand_block_protection_support.patch b/target/linux/bmips/patches-6.1/210-macronix_nand_block_protection_support.patch new file mode 100644 index 0000000000..25a16084ef --- /dev/null +++ b/target/linux/bmips/patches-6.1/210-macronix_nand_block_protection_support.patch @@ -0,0 +1,114 @@ +From 5a37811de679bff03e9c5a746f75574910ede964 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 22 Mar 2023 20:52:13 +0100 +Subject: [PATCH] Revert "mtd: rawnand: Macronix: Add support for block + protection" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit 03a539c7a118427a6609a26461358c56ac8f3a06. + +Macronix block protection doesn't seem to be supported on Sercomm H-500s +devices since it hangs the device. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/mtd/nand/raw/nand_macronix.c | 72 ---------------------------- + 1 file changed, 72 deletions(-) + +--- a/drivers/mtd/nand/raw/nand_macronix.c ++++ b/drivers/mtd/nand/raw/nand_macronix.c +@@ -12,10 +12,6 @@ + #define MACRONIX_READ_RETRY_BIT BIT(0) + #define MACRONIX_NUM_READ_RETRY_MODES 6 + +-#define ONFI_FEATURE_ADDR_MXIC_PROTECTION 0xA0 +-#define MXIC_BLOCK_PROTECTION_ALL_LOCK 0x38 +-#define MXIC_BLOCK_PROTECTION_ALL_UNLOCK 0x0 +- + #define ONFI_FEATURE_ADDR_MXIC_RANDOMIZER 0xB0 + #define MACRONIX_RANDOMIZER_BIT BIT(1) + #define MACRONIX_RANDOMIZER_ENPGM BIT(0) +@@ -179,73 +175,6 @@ static void macronix_nand_fix_broken_get + ONFI_FEATURE_ADDR_TIMING_MODE, 1); + } + +-/* +- * Macronix NAND supports Block Protection by Protectoin(PT) pin; +- * active high at power-on which protects the entire chip even the #WP is +- * disabled. Lock/unlock protection area can be partition according to +- * protection bits, i.e. upper 1/2 locked, upper 1/4 locked and so on. +- */ +-static int mxic_nand_lock(struct nand_chip *chip, loff_t ofs, uint64_t len) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_LOCK; +- nand_select_target(chip, 0); +- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret) +- pr_err("%s all blocks failed\n", __func__); +- +- return ret; +-} +- +-static int mxic_nand_unlock(struct nand_chip *chip, loff_t ofs, uint64_t len) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; +- nand_select_target(chip, 0); +- ret = nand_set_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret) +- pr_err("%s all blocks failed\n", __func__); +- +- return ret; +-} +- +-static void macronix_nand_block_protection_support(struct nand_chip *chip) +-{ +- u8 feature[ONFI_SUBFEATURE_PARAM_LEN]; +- int ret; +- +- bitmap_set(chip->parameters.get_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- +- feature[0] = MXIC_BLOCK_PROTECTION_ALL_UNLOCK; +- nand_select_target(chip, 0); +- ret = nand_get_features(chip, ONFI_FEATURE_ADDR_MXIC_PROTECTION, +- feature); +- nand_deselect_target(chip); +- if (ret || feature[0] != MXIC_BLOCK_PROTECTION_ALL_LOCK) { +- if (ret) +- pr_err("Block protection check failed\n"); +- +- bitmap_clear(chip->parameters.get_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- return; +- } +- +- bitmap_set(chip->parameters.set_feature_list, +- ONFI_FEATURE_ADDR_MXIC_PROTECTION, 1); +- +- chip->ops.lock_area = mxic_nand_lock; +- chip->ops.unlock_area = mxic_nand_unlock; +-} +- + static int nand_power_down_op(struct nand_chip *chip) + { + int ret; +@@ -323,7 +252,6 @@ static int macronix_nand_init(struct nan + + macronix_nand_fix_broken_get_timings(chip); + macronix_nand_onfi_init(chip); +- macronix_nand_block_protection_support(chip); + macronix_nand_deep_power_down_support(chip); + + return 0; diff --git a/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch b/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch new file mode 100644 index 0000000000..71ed53235f --- /dev/null +++ b/target/linux/bmips/patches-6.1/500-net-broadcom-add-BCM6368-enetsw-controller-driver.patch @@ -0,0 +1,44 @@ +From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 1 Mar 2021 07:34:39 +0100 +Subject: [PATCH] net: broadcom: add BCM6368 enetsw controller driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This controller is present on BCM6318, BCM6328, BCM6362, BCM6368 and BCM63268 +SoCs. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ + drivers/net/ethernet/broadcom/Makefile | 1 + + 2 files changed, 9 insertions(+) + +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -68,6 +68,14 @@ config BCM63XX_ENET + This driver supports the ethernet MACs in the Broadcom 63xx + MIPS chipset family (BCM63XX). + ++config BCM6368_ENETSW ++ tristate "Broadcom BCM6368 internal mac support" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ default y ++ help ++ This driver supports Ethernet controller integrated into Broadcom ++ BCM6368 family SoCs. ++ + config BCMGENET + tristate "Broadcom GENET internal MAC support" + depends on HAS_IOMEM +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -6,6 +6,7 @@ + obj-$(CONFIG_B44) += b44.o + obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o ++obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o + obj-$(CONFIG_CNIC) += cnic.o diff --git a/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch b/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch new file mode 100644 index 0000000000..af09f4dd4f --- /dev/null +++ b/target/linux/bmips/patches-6.1/501-net-broadcom-add-BCM6348-enet-controller-driver.patch @@ -0,0 +1,43 @@ +From 590b60fb08cb1e70fe02d3f407c6b3dbe9ad06ff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Mon, 1 Mar 2021 07:34:39 +0100 +Subject: [PATCH] net: broadcom: add BCM6348 enetsw controller driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This controller is present on BCM6338, BCM6348 and BCM6358 SoCs. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/ethernet/broadcom/Kconfig | 8 ++++++++ + drivers/net/ethernet/broadcom/Makefile | 1 + + 2 files changed, 9 insertions(+) + +--- a/drivers/net/ethernet/broadcom/Kconfig ++++ b/drivers/net/ethernet/broadcom/Kconfig +@@ -68,6 +68,14 @@ config BCM63XX_ENET + This driver supports the ethernet MACs in the Broadcom 63xx + MIPS chipset family (BCM63XX). + ++config BCM6348_ENET ++ tristate "Broadcom BCM6348 internal mac support" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ default y ++ help ++ This driver supports Ethernet controller integrated into Broadcom ++ BCM6348 family SoCs. ++ + config BCM6368_ENETSW + tristate "Broadcom BCM6368 internal mac support" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/net/ethernet/broadcom/Makefile ++++ b/drivers/net/ethernet/broadcom/Makefile +@@ -6,6 +6,7 @@ + obj-$(CONFIG_B44) += b44.o + obj-$(CONFIG_BCM4908_ENET) += bcm4908_enet.o + obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o ++obj-$(CONFIG_BCM6348_ENET) += bcm6348-enet.o + obj-$(CONFIG_BCM6368_ENETSW) += bcm6368-enetsw.o + obj-$(CONFIG_BCMGENET) += genet/ + obj-$(CONFIG_BNX2) += bnx2.o diff --git a/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch b/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch new file mode 100644 index 0000000000..6071bea42d --- /dev/null +++ b/target/linux/bmips/patches-6.1/502-net-mdio-mux-bcm6368-allow-disabling.patch @@ -0,0 +1,23 @@ +From 21145a89c79a22c4fb719cce5a2f4e3373d39756 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:16:46 +0200 +Subject: [PATCH] net: mdio: mux-bcm6368: allow disabling for bmips +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/net/mdio/Kconfig | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/mdio/Kconfig ++++ b/drivers/net/mdio/Kconfig +@@ -219,7 +219,6 @@ config MDIO_BUS_MUX_BCM6368 + tristate "Broadcom BCM6368 MDIO bus multiplexers" + depends on OF && OF_MDIO && (BMIPS_GENERIC || COMPILE_TEST) + select MDIO_BUS_MUX +- default BMIPS_GENERIC + help + This module provides a driver for MDIO bus multiplexers found in + BCM6368 based Broadcom SoCs. This multiplexer connects one of several diff --git a/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch b/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch new file mode 100644 index 0000000000..36b09105b7 --- /dev/null +++ b/target/linux/bmips/patches-6.1/600-mips-bmips-add-pci-support.patch @@ -0,0 +1,34 @@ +From 7742c1ba191a005a1356ff89b5fe2279d6f0ec4d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:18:43 +0200 +Subject: [PATCH] mips: bmips: add PCI support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + arch/mips/Kconfig | 1 + + arch/mips/pci/Makefile | 1 + + 2 files changed, 2 insertions(+) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -274,6 +274,7 @@ config BMIPS_GENERIC + select SYNC_R4K + select COMMON_CLK + select BCM6345_L1_IRQ ++ select HAVE_PCI + select IRQ_MIPS_CPU + select DMA_NONCOHERENT + select SYS_SUPPORTS_32BIT_KERNEL +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -28,6 +28,7 @@ obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xt + # These are still pretty much in the old state, watch, go blind. + # + obj-$(CONFIG_ATH79) += fixup-ath79.o ++obj-$(CONFIG_BMIPS_GENERIC) += fixup-bmips.o + obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o + obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o + obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o diff --git a/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch b/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch new file mode 100644 index 0000000000..c976430fd5 --- /dev/null +++ b/target/linux/bmips/patches-6.1/601-pci-controllers-add-bcm6328-pcie-support.patch @@ -0,0 +1,36 @@ +From 49133041e0a5770decf1a25f575764d13a0d425c Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:20:10 +0200 +Subject: [PATCH] pci: add bcm6328-pcie support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCIE_BCM6328 ++ bool "BCM6328 PCIe controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCI_MVEBU + bool "Marvell EBU PCIe controller" + depends on ARCH_MVEBU || ARCH_DOVE || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ + obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o + obj-$(CONFIG_PCI_IXP4XX) += pci-ixp4xx.o diff --git a/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch b/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch new file mode 100644 index 0000000000..1a3ec1db2a --- /dev/null +++ b/target/linux/bmips/patches-6.1/602-pci-controllers-add-bcm6318-pcie-support.patch @@ -0,0 +1,36 @@ +From cc3c30bdc98eabbaa07c64302eb5124a0f4a74f0 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:20:46 +0200 +Subject: [PATCH] pci: add bcm6318-pcie support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCIE_BCM6318 ++ bool "BCM6318 PCIe controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCIE_BCM6328 + bool "BCM6328 PCIe controller" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o + obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ + obj-$(CONFIG_PCI_FTPCI100) += pci-ftpci100.o diff --git a/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch b/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch new file mode 100644 index 0000000000..32aeea6a74 --- /dev/null +++ b/target/linux/bmips/patches-6.1/603-pci-controllers-add-bcm6348-pci-support.patch @@ -0,0 +1,36 @@ +From 5e7813e5725d79d00e0988472c306490fc48b3e1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 17 May 2023 18:21:19 +0200 +Subject: [PATCH] pci: add bcm6348-pci support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/pci/controller/Kconfig | 5 +++++ + drivers/pci/controller/Makefile | 1 + + 2 files changed, 6 insertions(+) + +--- a/drivers/pci/controller/Kconfig ++++ b/drivers/pci/controller/Kconfig +@@ -3,6 +3,11 @@ + menu "PCI controller drivers" + depends on PCI + ++config PCI_BCM6348 ++ bool "BCM6348 PCI controller" ++ depends on BMIPS_GENERIC || COMPILE_TEST ++ depends on OF ++ + config PCIE_BCM6318 + bool "BCM6318 PCIe controller" + depends on BMIPS_GENERIC || COMPILE_TEST +--- a/drivers/pci/controller/Makefile ++++ b/drivers/pci/controller/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 ++obj-$(CONFIG_PCI_BCM6348) += pci-bcm6348.o + obj-$(CONFIG_PCIE_BCM6318) += pcie-bcm6318.o + obj-$(CONFIG_PCIE_BCM6328) += pcie-bcm6328.o + obj-$(CONFIG_PCIE_CADENCE) += cadence/ diff --git a/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch b/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch new file mode 100644 index 0000000000..8b91cac173 --- /dev/null +++ b/target/linux/bmips/patches-6.1/700-leds-add-support-for-Sercomm-MSP430-LED-controller.patch @@ -0,0 +1,45 @@ +From 1a5f2263d388016c88d39e141c7eb8085c9313fc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Wed, 5 Apr 2023 08:07:00 +0200 +Subject: [PATCH] leds: add support for Sercomm MSP430 LED controller +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Sercomm added an external MSP430G2513 for controlling LEDs through SPI on some +boards. + +Signed-off-by: Álvaro Fernández Rojas +--- + drivers/leds/Kconfig | 9 +++++++++ + drivers/leds/Makefile | 1 + + 2 files changed, 10 insertions(+) + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -288,6 +288,15 @@ config LEDS_COBALT_RAQ + help + This option enables support for the Cobalt Raq series LEDs. + ++config LEDS_SERCOMM_MSP430 ++ tristate "LED support for Sercomm MSP430 SPI LED controllers" ++ depends on LEDS_CLASS ++ depends on SPI ++ depends on OF ++ help ++ This option enables support for the Sercomm MSP430G2513 SPI LED ++ controllers. ++ + config LEDS_SUNFIRE + tristate "LED support for SunFire servers." + depends on LEDS_CLASS +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -77,6 +77,7 @@ obj-$(CONFIG_LEDS_PWM) += leds-pwm.o + obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o + obj-$(CONFIG_LEDS_S3C24XX) += leds-s3c24xx.o + obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o ++obj-$(CONFIG_LEDS_SERCOMM_MSP430) += leds-sercomm-msp430.o + obj-$(CONFIG_LEDS_SUNFIRE) += leds-sunfire.o + obj-$(CONFIG_LEDS_SYSCON) += leds-syscon.o + obj-$(CONFIG_LEDS_TCA6507) += leds-tca6507.o diff --git a/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch b/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch new file mode 100644 index 0000000000..d98d27c6b4 --- /dev/null +++ b/target/linux/bmips/patches-6.1/800-jffs2-work-around-unaligned-accesses-failing-on-bcm6.patch @@ -0,0 +1,26 @@ +From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Sun, 6 Apr 2014 22:33:16 +0200 +Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp + +Unligned memcpy_fromio randomly fails with an unaligned dst. Work around +it by ensuring we are always doing aligned copies. + +Should fix filename corruption in jffs2 with SMP. + +Signed-off-by: Jonas Gorski +--- + fs/jffs2/nodelist.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/jffs2/nodelist.h ++++ b/fs/jffs2/nodelist.h +@@ -259,7 +259,7 @@ struct jffs2_full_dirent + uint32_t ino; /* == zero for unlink */ + unsigned int nhash; + unsigned char type; +- unsigned char name[]; ++ unsigned char name[] __attribute__((aligned((sizeof(long))))); + }; + + /*