From: Zoltan HERPAI Date: Tue, 16 Nov 2021 15:42:12 +0000 (+0100) Subject: opensbi-d1: add new package X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=a772c63f946023edfe8c0bf494fceea1f1f41ece;p=openwrt%2Fstaging%2Fwigyori.git opensbi-d1: add new package Above the usual OpenSBI inits, the D1 SoCs require additional inits to be brought up properly. Signed-off-by: Zoltan HERPAI --- diff --git a/package/boot/opensbi-d1/Makefile b/package/boot/opensbi-d1/Makefile new file mode 100644 index 0000000000..fb264d619c --- /dev/null +++ b/package/boot/opensbi-d1/Makefile @@ -0,0 +1,62 @@ +# +# Copyright (C) 2020 Zoltan HERPAI +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=opensbi-d1 +PKG_RELEASE:=0.9 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL=https://github.com/riscv/opensbi +PKG_SOURCE_DATE:=2021-11-02 +PKG_SOURCE_VERSION:=0979ffda12b636fab58228c2b40bab1e2f6b327b +PKG_MIRROR_HASH:=94e256d246713076329cbd99f43db2c9b038c3adc14fa5ecb53a96a7e195b257 + +PKG_BUILD_DIR = $(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION) + +PKG_TARGETS:=bin +PKG_FLAGS:=nonshared +PKG_LICENSE:=BSD-2-Clause +PKG_LICENSE_FILES:=COPYING.BSD +PKG_BUILD_PARALLEL:=1 + +PKG_MAINTAINER:=Zoltan HERPAI + +include $(INCLUDE_DIR)/package.mk + +define Package/opensbi-d1 + SECTION:=boot + CATEGORY:=Boot Loaders + DEPENDS:=@TARGET_sunxid1 + VARIANT:=$(subst _,/,$(subst opensbi-d1_,,$(1))) + URL:=https://github.com/riscv/opensbi/blob/master/README.md +endef + +define Package/opensbi-d1_generic + $(Package/opensbi-d1) + TITLE:=OpenSBI generic + OPENSBI_IMAGE:=fw_dynamic.bin + OPENSBI_PLATFORM:=generic +endef + +export GCC_HONOUR_COPTS=s + +MAKE_VARS = \ + CROSS_COMPILE="$(TARGET_CROSS)" + +define Build/Compile + $(eval $(Package/opensbi-d1_$(BUILD_VARIANT))) \ + +$(MAKE_VARS) $(MAKE) -C $(PKG_BUILD_DIR) \ + PLATFORM=$(OPENSBI_PLATFORM) +endef + +define Build/InstallDev + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(CP) $(PKG_BUILD_DIR)/build/platform/$(OPENSBI_PLATFORM)/firmware/fw_dynamic.bin $(STAGING_DIR_IMAGE)/fw_dynamic-${BUILD_VARIANT}.bin +endef + +$(eval $(call BuildPackage,opensbi-d1_generic)) diff --git a/package/boot/opensbi-d1/patches/0001-lib-utils-fdt-Require-match-data-to-be-const.patch b/package/boot/opensbi-d1/patches/0001-lib-utils-fdt-Require-match-data-to-be-const.patch new file mode 100644 index 0000000000..b145990850 --- /dev/null +++ b/package/boot/opensbi-d1/patches/0001-lib-utils-fdt-Require-match-data-to-be-const.patch @@ -0,0 +1,66 @@ +From e952a3135c1b9c03ae3c50ab7da9da4be308d24e Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Tue, 19 Oct 2021 19:25:37 -0500 +Subject: [PATCH 1/2] lib: utils/fdt: Require match data to be const + +Match data stores hardware attributes which do not change at runtime, so +it does not need to be mutable. Make it const. + +Signed-off-by: Samuel Holland +--- + include/sbi_utils/fdt/fdt_helper.h | 2 +- + lib/utils/ipi/fdt_ipi_mswi.c | 2 +- + lib/utils/reset/fdt_reset_gpio.c | 4 ++-- + 3 files changed, 4 insertions(+), 4 deletions(-) + +diff --git a/include/sbi_utils/fdt/fdt_helper.h b/include/sbi_utils/fdt/fdt_helper.h +index 24fee7a..fde00b7 100644 +--- a/include/sbi_utils/fdt/fdt_helper.h ++++ b/include/sbi_utils/fdt/fdt_helper.h +@@ -15,7 +15,7 @@ + + struct fdt_match { + const char *compatible; +- void *data; ++ const void *data; + }; + + #define FDT_MAX_PHANDLE_ARGS 16 +diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c +index 1f0fda7..0176941 100644 +--- a/lib/utils/ipi/fdt_ipi_mswi.c ++++ b/lib/utils/ipi/fdt_ipi_mswi.c +@@ -51,7 +51,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff, + return 0; + } + +-static unsigned long clint_offset = CLINT_MSWI_OFFSET; ++static const unsigned long clint_offset = CLINT_MSWI_OFFSET; + + static const struct fdt_match ipi_mswi_match[] = { + { .compatible = "riscv,clint0", .data = &clint_offset }, +diff --git a/lib/utils/reset/fdt_reset_gpio.c b/lib/utils/reset/fdt_reset_gpio.c +index 302035b..5f34b8e 100644 +--- a/lib/utils/reset/fdt_reset_gpio.c ++++ b/lib/utils/reset/fdt_reset_gpio.c +@@ -143,7 +143,7 @@ static int gpio_reset_init(void *fdt, int nodeoff, + } + + static const struct fdt_match gpio_poweroff_match[] = { +- { .compatible = "gpio-poweroff", .data = (void *)FALSE }, ++ { .compatible = "gpio-poweroff", .data = (const void *)FALSE }, + { }, + }; + +@@ -153,7 +153,7 @@ struct fdt_reset fdt_poweroff_gpio = { + }; + + static const struct fdt_match gpio_reset_match[] = { +- { .compatible = "gpio-restart", .data = (void *)TRUE }, ++ { .compatible = "gpio-restart", .data = (const void *)TRUE }, + { }, + }; + +-- +2.20.1 + diff --git a/package/boot/opensbi-d1/patches/0002-lib-utils-timer-Add-a-separate-compatible-for-the-D1.patch b/package/boot/opensbi-d1/patches/0002-lib-utils-timer-Add-a-separate-compatible-for-the-D1.patch new file mode 100644 index 0000000000..45e19291bb --- /dev/null +++ b/package/boot/opensbi-d1/patches/0002-lib-utils-timer-Add-a-separate-compatible-for-the-D1.patch @@ -0,0 +1,146 @@ +From efbc2b8c7372067622d4169cf59378fd58fe3ec3 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sun, 8 Aug 2021 01:18:44 -0500 +Subject: [PATCH 2/2] lib: utils/timer: Add a separate compatible for the D1 + CLINT + +The CLINT in the Allwinner D1 SoC apparently does not support 64-bit +MMIO access. A property was added to support this quirk (and that +property was copied to the ACLINT MTIMER code). However, since this +difference in behavior makes the D1 CLINT incompatible with the SiFive +CLINT's programming interface, a better solution is to use a separate +compatible string. + +Signed-off-by: Samuel Holland +--- + docs/platform/thead-c9xx.md | 4 +-- + lib/utils/ipi/fdt_ipi_mswi.c | 1 + + lib/utils/timer/fdt_timer_mtimer.c | 39 +++++++++++++++++++----------- + 3 files changed, 27 insertions(+), 17 deletions(-) + +diff --git a/docs/platform/thead-c9xx.md b/docs/platform/thead-c9xx.md +index 3490ed5..ced784d 100644 +--- a/docs/platform/thead-c9xx.md ++++ b/docs/platform/thead-c9xx.md +@@ -52,12 +52,11 @@ DTS Example1: (Single core, eg: Allwinner D1 - c906) + ranges; + + clint0: clint@14000000 { +- compatible = "riscv,clint0"; ++ compatible = "allwinner,sun20i-d1-clint"; + interrupts-extended = < + &cpu0_intc 3 &cpu0_intc 7 + >; + reg = <0x0 0x14000000 0x0 0x04000000>; +- clint,has-no-64bit-mmio; + }; + + intc: interrupt-controller@10000000 { +@@ -163,7 +162,6 @@ DTS Example2: (Multi cores with soc reset-regs) + &cpu4_intc 3 &cpu4_intc 7 + >; + reg = <0xff 0xdc000000 0x0 0x04000000>; +- clint,has-no-64bit-mmio; + }; + + intc: interrupt-controller@ffd8000000 { +diff --git a/lib/utils/ipi/fdt_ipi_mswi.c b/lib/utils/ipi/fdt_ipi_mswi.c +index 0176941..af69e16 100644 +--- a/lib/utils/ipi/fdt_ipi_mswi.c ++++ b/lib/utils/ipi/fdt_ipi_mswi.c +@@ -54,6 +54,7 @@ static int ipi_mswi_cold_init(void *fdt, int nodeoff, + static const unsigned long clint_offset = CLINT_MSWI_OFFSET; + + static const struct fdt_match ipi_mswi_match[] = { ++ { .compatible = "allwinner,sun20i-d1-clint", .data = &clint_offset }, + { .compatible = "riscv,clint0", .data = &clint_offset }, + { .compatible = "sifive,clint0", .data = &clint_offset }, + { .compatible = "riscv,aclint-mswi" }, +diff --git a/lib/utils/timer/fdt_timer_mtimer.c b/lib/utils/timer/fdt_timer_mtimer.c +index 1ad8508..e140567 100644 +--- a/lib/utils/timer/fdt_timer_mtimer.c ++++ b/lib/utils/timer/fdt_timer_mtimer.c +@@ -15,6 +15,11 @@ + + #define MTIMER_MAX_NR 16 + ++struct timer_mtimer_quirks { ++ unsigned int mtime_offset; ++ bool has_64bit_mmio; ++}; ++ + static unsigned long mtimer_count = 0; + static struct aclint_mtimer_data mtimer[MTIMER_MAX_NR]; + static struct aclint_mtimer_data *mt_reference = NULL; +@@ -23,7 +28,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff, + const struct fdt_match *match) + { + int i, rc; +- unsigned long offset, addr[2], size[2]; ++ unsigned long addr[2], size[2]; + struct aclint_mtimer_data *mt; + + if (MTIMER_MAX_NR <= mtimer_count) +@@ -43,28 +48,25 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff, + return rc; + + if (match->data) { /* SiFive CLINT */ ++ const struct timer_mtimer_quirks *quirks = match->data; ++ + /* Set CLINT addresses */ + mt->mtimecmp_addr = addr[0] + ACLINT_DEFAULT_MTIMECMP_OFFSET; + mt->mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE; + mt->mtime_addr = addr[0] + ACLINT_DEFAULT_MTIME_OFFSET; + mt->mtime_size = size[0] - mt->mtimecmp_size; + /* Adjust MTIMER address and size for CLINT device */ +- offset = *((unsigned long *)match->data); +- mt->mtime_addr += offset; +- mt->mtimecmp_addr += offset; +- mt->mtime_size -= offset; +- /* Parse additional CLINT properties */ +- if (fdt_getprop(fdt, nodeoff, "clint,has-no-64bit-mmio", &rc)) +- mt->has_64bit_mmio = false; ++ mt->mtime_addr += quirks->mtime_offset; ++ mt->mtimecmp_addr += quirks->mtime_offset; ++ mt->mtime_size -= quirks->mtime_offset; ++ /* Apply additional CLINT quirks */ ++ mt->has_64bit_mmio = quirks->has_64bit_mmio; + } else { /* RISC-V ACLINT MTIMER */ + /* Set ACLINT MTIMER addresses */ + mt->mtime_addr = addr[0]; + mt->mtime_size = size[0]; + mt->mtimecmp_addr = addr[1]; + mt->mtimecmp_size = size[1]; +- /* Parse additional ACLINT MTIMER properties */ +- if (fdt_getprop(fdt, nodeoff, "mtimer,no-64bit-mmio", &rc)) +- mt->has_64bit_mmio = false; + } + + /* Check if MTIMER device has shared MTIME address */ +@@ -107,11 +109,20 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff, + return 0; + } + +-static unsigned long clint_offset = CLINT_MTIMER_OFFSET; ++static const struct timer_mtimer_quirks d1_clint_quirks = { ++ .mtime_offset = CLINT_MTIMER_OFFSET, ++ .has_64bit_mmio = false, ++}; ++ ++static const struct timer_mtimer_quirks sifive_clint_quirks = { ++ .mtime_offset = CLINT_MTIMER_OFFSET, ++ .has_64bit_mmio = true, ++}; + + static const struct fdt_match timer_mtimer_match[] = { +- { .compatible = "riscv,clint0", .data = &clint_offset }, +- { .compatible = "sifive,clint0", .data = &clint_offset }, ++ { .compatible = "allwinner,sun20i-d1-clint", .data = &d1_clint_quirks }, ++ { .compatible = "riscv,clint0", .data = &sifive_clint_quirks }, ++ { .compatible = "sifive,clint0", .data = &sifive_clint_quirks }, + { .compatible = "riscv,aclint-mtimer" }, + { }, + }; +-- +2.20.1 +