From: Wanpeng Li Date: Mon, 24 Oct 2016 10:23:10 +0000 (+0800) Subject: KVM: LAPIC: guarantee the timer is in tsc-deadline mode X-Git-Url: http://git.lede-project.org./?a=commitdiff_plain;h=a10388e11fd09b99ca1bde4b9362502f005fb6d4;p=openwrt%2Fstaging%2Fblogic.git KVM: LAPIC: guarantee the timer is in tsc-deadline mode Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot() and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when rdmsr MSR_IA32_TSCDEADLINE. Suggested-by: Radim Krčmář Cc: Paolo Bonzini Cc: Radim Krčmář Cc: Yunhong Jiang Signed-off-by: Wanpeng Li Signed-off-by: Radim Krčmář --- diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index dad743e3c1f5..dce6c0bf2a21 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -1711,8 +1711,8 @@ u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu) { struct kvm_lapic *apic = vcpu->arch.apic; - if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) || - apic_lvtt_period(apic)) + if (!lapic_in_kernel(vcpu) || + !apic_lvtt_tscdeadline(apic)) return 0; return apic->lapic_timer.tscdeadline;